Characteristic analysis method and device, electronic equipment, storage medium and program product
Through a characteristic analysis method, by receiving characteristic analysis instructions, determining the target chip and test cases, and performing characteristic analysis on them, the problem of low efficiency in semiconductor flash memory characteristics in the prior art is solved, improving analysis efficiency and reducing production costs.
Patent Information
- Application Number
- CN202510222716.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-27
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2045-02-27
AI Technical Summary
In the prior art, the characteristic analysis efficiency of semiconductor flash memory is low, resulting in an increase in the production cycle and cost of solid-state hard disks.
By a characteristic analysis method, in response to receiving the characteristic analysis instruction, the parameters carried by the instruction, including the target channel number and the test case are determined. The chip to be analyzed is determined based on the target channel number and controlled to perform initialization. Based on the initialization results and test cases, the target chip and the target use case are determined, and then the characteristic analysis is performed on the target chip, and the characteristic analysis results are determined and displayed.
It improves the performance analysis efficiency of semiconductor flash memory, shortens the production cycle of solid-state drives and reduces costs.
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Figure CN119718808A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of data processing technology, and in particular to a characteristic analysis method, device, electronic device, storage medium and program product. Background Art
[0002] Solid State Drive (SSD) is a storage device that uses semiconductor flash memory (NAND Flash, also known as chips) as the medium. Due to the differences in the architecture and manufacturing process of different semiconductor flash memories, the characteristics of different semiconductor flash memories (such as read and write speed, read and write time, etc.) are different, which affects the product characteristics of different solid state drives.
[0003] The related semiconductor flash memory characteristic analysis method mainly generates a corresponding single board according to the bill of materials of the semiconductor flash memory, and performs characteristic analysis on the semiconductor flash memory based on the single board. However, the analysis efficiency of the above method is low, which increases the production cycle and cost of the solid state drive. Summary of the invention
[0004] The present application provides a characteristic analysis method, device, electronic device, storage medium and program product to at least solve the problem of low efficiency of characteristic analysis of semiconductor flash memory in the related art.
[0005] The present application provides a characteristic analysis method, comprising:
[0006] In response to receiving the characteristic analysis instruction, determining the parameters carried by the characteristic analysis instruction; the parameters include at least one target channel number and at least one corresponding test case;
[0007] Determine at least one chip to be analyzed based on at least one target channel number, and control each chip to be analyzed to perform initialization;
[0008] Based on the initialization results of each chip to be analyzed and at least one test case, determine the corresponding target chip and target case;
[0009] Based on each target use case, a characteristic analysis is performed on each target chip, and the characteristic analysis results of each target chip are determined and displayed.
[0010] The present application also provides a characteristic analysis device, comprising:
[0011] A first determination module is used to determine the parameters carried by the characteristic analysis instruction in response to receiving the characteristic analysis instruction; the parameters include at least one target channel number and at least one corresponding test case;
[0012] A second determination module, configured to determine at least one chip to be analyzed based on at least one target channel number, and control each chip to be analyzed to perform initialization;
[0013] A third determination module is used to determine the corresponding target chip and target test case based on the initialization result of each chip to be analyzed and at least one test case;
[0014] The fourth determination module is used to perform characteristic analysis on each target chip based on each target use case, determine the characteristic analysis result of each target chip and display it.
[0015] The present application also provides an electronic device, comprising: a memory for storing a computer program; and a processor for implementing the steps of any one of the above-mentioned characteristic analysis methods when executing the computer program.
[0016] The present application also provides a computer-readable storage medium, in which a computer program is stored, wherein when the computer program is executed by a processor, the steps of any of the above-mentioned characteristic analysis methods are implemented.
[0017] The present application also provides a computer program product, including a computer program, which implements the steps of any of the above-mentioned characteristic analysis methods when executed by a processor.
[0018] Through the present application, since the electronic device is connected to at least one chip, when the electronic device receives a characteristic analysis instruction, batch characteristic analysis operations can be performed on one or more chips in the at least one chip according to the characteristic analysis instruction. Therefore, the technical problem of low efficiency of characteristic analysis of semiconductor flash memory in the related technology can be solved, and the efficiency of characteristic analysis of semiconductor flash memory can be improved. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0020] Figure 1 A characteristic analysis system architecture diagram provided in an embodiment of the present application;
[0021] Figure 2 One of the flow charts of the characteristic analysis method provided in the embodiment of the present application;
[0022] Figure 3 The second flowchart of the characteristic analysis method provided in the embodiment of the present application;
[0023] Figure 4 One of the structural schematic diagrams of the characteristic analysis module provided in the embodiment of the present application;
[0024] Figure 5 The second structural diagram of the characteristic analysis module provided in the embodiment of the present application;
[0025] Figure 6 A schematic diagram of the structure of a test fixture provided in an embodiment of the present application;
[0026] Figure 7 A schematic diagram of the initialization process provided in an embodiment of the present application;
[0027] Figure 8 The third flowchart of the characteristic analysis method provided in the embodiment of the present application;
[0028] Fig. 9 A schematic diagram of an application of the characteristic analysis method provided in an embodiment of the present application;
[0029] Fig.10 A schematic diagram of the structure of a characteristic analysis device provided in an embodiment of the present application;
[0030] Fig.11 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0031] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0032] It should be noted that, in the description of this application, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. The terms "first", "second", etc. in this application are used to distinguish similar objects, and are not used to describe a specific order or sequence.
[0033] Solid State Drive (SSD) is a storage device that uses semiconductor flash memory (NAND Flash) as the medium.
[0034] Semiconductor flash memory (NAND Flash) is a flash memory, or non-volatile memory. For the sake of convenience, semiconductor flash memory will be referred to as chip below.
[0035] Due to differences in the architecture and manufacturing processes of different chips, the reading and writing speeds, reading and writing time and other characteristics of different chips are different, which affects the product characteristics of solid-state drives using different chips as media.
[0036] The relevant chip characteristic analysis method mainly generates a single board based on the chip material list, and performs characteristic analysis on the corresponding chip based on the single board to determine the product characteristics of the solid-state drive.
[0037] However, the above method is less efficient in analyzing the characteristics of the chip, which results in a longer cycle and higher costs for determining the product characteristics of the solid-state drive.
[0038] In order to enable those skilled in the art to better understand the present application, the present application is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0039] In conjunction with the specific hardware architecture on which the execution of the characteristic analysis method depends, the specific hardware architecture is described herein.
[0040] Figure 1 A characteristic analysis system architecture diagram provided in an embodiment of the present application.
[0041] See also Figure 1 The characteristic analysis system 100 includes an analysis control module 101, a characteristic analysis module 102, and an environment control module 103. The analysis control module 101 is connected to the characteristic analysis module 102 and the environment control module 103.
[0042] Among them, the analysis control module 101 is used to parse the characteristic analysis instruction, determine the chip to be analyzed according to the parameters carried by the characteristic analysis instruction; send the initialization instruction to the characteristic analysis module 102; determine the target chip and test case according to the initialization result of each chip to be analyzed and the parameters carried by the characteristic analysis instruction; send the characteristic analysis instruction to the characteristic analysis module 102 and display the characteristic analysis results of each target chip.
[0043] The characteristic analysis module 102 is electrically connected to at least one chip. The characteristic analysis module 102 is used to control the chip to be analyzed to perform initialization when receiving an initialization instruction, and feed back the initialization result of the chip to be analyzed to the analysis control module; and when receiving a characteristic analysis instruction, based on a target use case, perform characteristic analysis on the target chip, and feed back the characteristic analysis result to the analysis control module 101;
[0044] The analysis control module 101 is further configured to send an environment control instruction to the environment control module 103 when the characteristic analysis instruction carries an adjustment parameter.
[0045] Optionally, the analysis control module 101 also includes functions such as system initialization, fault alarm, and test case customization.
[0046] The environment control module 103 is used to adjust the environment parameters based on the adjustment parameters in the environment control instruction when receiving the environment control instruction.
[0047] Optionally, the environment control module 103 has a network card function to receive and adjust environment parameters.
[0048] Optionally, the characteristic analysis module 102 may be used to place the chip to be analyzed, and the characteristic analysis module 102 is located in the hardware environment of the environment control module 103 , so that the environment of the chip to be analyzed placed in the characteristic analysis module 102 can be adjusted through the environment control module 103 .
[0049] Optionally, the analysis control module 101 , the characteristic analysis module 102 , and the environment control module 103 are connected to a network switch to achieve communication connection between the above modules through a network.
[0050] Figure 2 One of the flow charts of the characteristic analysis method provided in the embodiment of the present application is as follows: Figure 2 As shown, the embodiment of the present application provides a characteristic analysis method, and the characteristic analysis method is described in detail as follows:
[0051] S201: In response to receiving a characteristic analysis instruction, determine parameters carried by the characteristic analysis instruction; the parameters include at least one target channel number and at least one corresponding test case.
[0052] Specifically, in response to receiving the characteristic analysis instruction, the characteristic analysis instruction is parsed to determine the parameters carried by the characteristic analysis instruction.
[0053] Optionally, the parameters include but are not limited to at least one target channel number and at least one corresponding test case.
[0054] The channel number is used to indicate the channel number of the interface connected to the chip.
[0055] Specifically, one interface is used to connect one chip, and each interface has a unique channel number, so each chip corresponds to one channel number. According to the target channel number, the chip specified for characteristic analysis in the characteristic analysis instruction can be determined, which can also be called the chip to be analyzed.
[0056] Specifically, the test case is used to indicate the process case of the chip to perform the characteristic analysis test. The test case corresponds to the target channel number one by one. In this way, each test case can be used to perform the characteristic analysis test on the chip corresponding to the test case.
[0057] Optionally, the parameters carried by the characteristic analysis instruction also include the number of chips to be analyzed, the type of interface, the device ID, etc. The device ID is used to identify the model of the chip, which can be stored in a specific area of the chip, such as an ID register. The type of interface is used to identify the model of the interface connected to the chip.
[0058] S202: Determine at least one chip to be analyzed based on at least one target channel number, and control each chip to be analyzed to perform initialization.
[0059] Specifically, based on at least one target channel number carried in the characteristic analysis instruction, at least one corresponding chip is determined as a chip to be analyzed, and each chip to be analyzed is controlled to perform initialization based on the characteristic analysis instruction.
[0060] S203: Determine a corresponding target chip and a target test case based on the initialization result of each chip to be analyzed and at least one test case.
[0061] Specifically, based on the initialization results of each chip to be analyzed, a target chip that can perform a characteristic analysis test is determined. In at least one test case, a corresponding test case is determined according to each target chip as a target test case.
[0062] Optionally, the chip to be analyzed whose initialization result is passed is determined as the target chip.
[0063] S204: Based on each target use case, perform characteristic analysis on each target chip, determine the characteristic analysis result of each target chip and display it.
[0064] Specifically, based on each target use case, a characteristic analysis test is performed on a target chip corresponding to each target use case, and a characteristic analysis result of each target chip is determined and displayed.
[0065] In some embodiments, each chip corresponds to a channel number; determining at least one chip to be analyzed based on at least one target channel number, and controlling each chip to be analyzed to perform initialization, including:
[0066] Determine the chip corresponding to each target channel number as the chip to be analyzed;
[0067] An initialization instruction is sent to each chip to be analyzed, so as to control each chip to be analyzed to perform initialization based on the initialization instruction.
[0068] Specifically, based on the one-to-one correspondence between chips and channel numbers, a chip corresponding to each target channel number is matched in at least one chip to be analyzed and determined as the chip to be analyzed.
[0069] Specifically, an initialization instruction is sent to each chip to be analyzed, so that each chip to be analyzed is controlled to perform initialization according to the initialization instruction.
[0070] The initialization is used to determine the working state of the chip to be analyzed. When the initialization result of the chip to be analyzed is that the initialization is successful, the working state of the chip to be analyzed is determined to be a normal state, and the characteristic analysis of the chip to be analyzed can be performed. When the initialization result of the characteristic analysis chip is that the initialization fails, the working state of the chip to be analyzed is determined to be an abnormal state, and the characteristic analysis of the chip to be analyzed cannot be performed.
[0071] The embodiment of the present application is electrically connected to at least one chip, and upon receiving a characteristic analysis instruction, performs batch characteristic analysis on one or more chips to be analyzed in at least one chip, determines the characteristic analysis results of each chip to be analyzed, and improves the efficiency of chip characteristic analysis, thereby reducing the production cycle of the solid-state hard disk and reducing the cost.
[0072] Figure 3 The second flow chart of the characteristic analysis method provided in the embodiment of the present application is as follows: Figure 3 As shown, the characteristic analysis method provided in the embodiment of the present application includes the following steps:
[0073] S2031: receiving the initialization results returned by each chip to be analyzed, and parsing each initialization result to obtain initialization information of each chip to be analyzed.
[0074] Specifically, the initialization results returned by each chip to be analyzed are received, and each initialization result is analyzed to obtain the initialization information of each chip to be analyzed.
[0075] Optionally, the initialization information includes but is not limited to a chip ID.
[0076] S2032: When the initialization information of the chip to be analyzed indicates that the initialization is successful, determine that the chip to be analyzed is a target chip.
[0077] Specifically, when the initialization information of any one or more chips to be analyzed indicates that the initialization is successful, it is determined that the characteristic analysis test can be performed on the chips to be analyzed, and the chips to be analyzed that have been successfully initialized are determined as target chips.
[0078] Optionally, when the initialization information of each chip to be analyzed indicates that the initialization is successful, each chip to be analyzed is determined as a target chip.
[0079] In some possible implementations, when there is a chip to be analyzed whose initialization information indicates that the initialization has failed in at least one chip to be analyzed, it is determined that the initialization of each chip to be analyzed has failed, and the characteristic analysis test of each chip to be analyzed is not performed. In this way, the chips to be analyzed are initialized only when all the chips to be analyzed have been successfully initialized in at least one chip to be analyzed, thereby avoiding the situation where the characteristic analysis test of some of the chips to be analyzed that have failed to be initialized is omitted, resulting in the problem that the product characteristics of the solid-state drive cannot be determined.
[0080] S2033: In at least one test case, determine the test case corresponding to each target chip as a target case.
[0081] Specifically, based on the one-to-one correspondence between chips and channel numbers and the one-to-one correspondence between target channel numbers and test cases, test cases corresponding to each target chip are found in at least one test case carried by the characteristic analysis instruction and used as target cases.
[0082] In some implementations, after receiving the initialization results returned by each chip to be analyzed and parsing each initialization result to obtain the initialization information of each chip to be analyzed, the following steps are included:
[0083] When the initialization information carries the chip ID, and the chip ID matches the chip ID of the chip to be analyzed, it is determined that the chip to be analyzed is initialized successfully.
[0084] Optionally, the electronic device stores the chip ID of each chip, and can determine the unique corresponding chip based on the chip ID.
[0085] Optionally, the chip ID may be the same as the device ID or may be different from the device ID.
[0086] Specifically, when the chip ID is carried in the initialization information of the chip to be analyzed and matches the chip ID of the chip to be analyzed, it is determined that the chip to be analyzed feeds back the correct chip ID, determines that the chip to be analyzed is in a normal state, and that the chip to be analyzed is initialized successfully.
[0087] In some implementations, after receiving the initialization results returned by each chip to be analyzed and parsing each initialization result to obtain the initialization information of each chip to be analyzed, the following steps are included:
[0088] When the initialization information carries the chip ID, and the chip ID does not match the chip ID of the chip to be analyzed, it is determined that the initialization of the chip to be analyzed fails;
[0089] Generate and display the first initialization failure information.
[0090] Specifically, when the initialization information of the chip to be analyzed carries a chip ID, and the carried chip ID does not match the chip ID to be analyzed of the chip to be analyzed, it is determined that the chip is in an abnormal state, and the initialization of the chip to be analyzed fails, and the characteristic analysis test cannot be performed on the chip to be analyzed, and the first initialization failure information is generated and displayed.
[0091] The first initialization failure information is used to indicate that there is an initialized chip. Optionally, the first initialization failure information includes the chip ID of the chip to be analyzed that failed to be initialized and the chip ID carried in the initialization information of the chip to be analyzed.
[0092] Optionally, the initialization failure information may further include an erroneous chip ID fed back by the chip to be analyzed, so as to facilitate the user to analyze the reason why the initialization of the chip to be analyzed fails and to feed back the erroneous chip ID.
[0093] In some implementations, after receiving the initialization results returned by each chip to be analyzed and parsing each initialization result to obtain the initialization information of each chip to be analyzed, the following steps are included:
[0094] When the initialization information does not carry the chip ID, it is determined that the initialization of the chip to be analyzed fails;
[0095] Generate and display the second initialization failure information.
[0096] Specifically, when the initialization information of the chip to be analyzed does not carry the chip ID, it is determined that the initialization of the chip to be analyzed has failed, and second initialization failure information is generated and displayed.
[0097] Optionally, the initialization information of multiple chips to be analyzed can be analyzed simultaneously to determine the initialization results of the multiple chips to be analyzed, and corresponding information can be generated according to the initialization results of the multiple chips to be analyzed. The above information includes initialization success notification, first initialization failure information and / or second initialization failure information.
[0098] Optionally, the first initialization failure information and the second initialization failure information may include any one or more of text data, image data, audio data, etc. Optionally, the user may be reminded to check the initialization failure information in the form of vibration, flashing lights, etc.
[0099] Figure 4 This is one of the structural diagrams of the characteristic analysis module provided in the embodiment of the present application.
[0100] See also Figure 4 The characteristic analysis module includes a network card connector 401, a circuit board 402, a network card chip 403, a memory 404, a controller 405 and a test fixture 406.
[0101] Optionally, the characteristic analysis module also includes a power supply circuit.
[0102] The network card connector 401, the network card chip 403, the memory 404, the controller 405 and the test fixture 406 are placed on the panel of the circuit board 402. The circuit board 402 is used to realize the connection between the network card connector 401, the network card chip 403, the memory 404, the controller 405 and the test fixture 406.
[0103] The network card connector 401 is used for data exchange with other modules (such as the analysis control module) other than the characteristic analysis module through an external network cable interface.
[0104] The network card chip 403 is used to implement protocol conversion between the controller 405 and the external network interface.
[0105] The memory 404 is used to implement cache data.
[0106] The controller 405 is used to control the chip through a chip interface (such as NAND Flash) and to implement data interaction with the analysis and control module through a network.
[0107] Optionally, the channel number may be a channel number of the controller 405 .
[0108] The test fixture 406 is used to be electrically connected to the chip interface of the controller 405 .
[0109] Optionally, one test fixture 406 is connected to one chip. One test fixture 406 corresponds to one chip interface channel of the controller 405 .
[0110] Optionally, the test fixture 406 can also realize the replacement of particles of different chips to be analyzed.
[0111] Optionally, the chip is buckled on a panel of the test fixture 406. The number of the test fixture 406 can be set according to actual conditions ( Figure 4 Only 8 are shown in the figure), for example, 8 test fixtures are set on the panel of the circuit board 402; or, 16 test fixtures are set; or, 32 test fixtures are set.
[0112] The chip interface supports two common standard interfaces: data switching (Toggle) interface and open NAND flash interface (ONFI) interface. The selection of the number of interface channels depends on the maximum number of chip particles supported by the characteristic analysis module. An 8-channel or 16-channel controller can be selected. The controller 405 implements operations such as NAND read, write and erase, NAND bad block scanning, and read, write and erase time measurement through the interface, or adjusts environmental parameters to achieve characteristic analysis tests under specific environmental conditions to meet different test requirements for the chip.
[0113] Figure 5 This is a second structural diagram of the characteristic analysis module provided in an embodiment of the present application.
[0114] See also Figure 5 In the characteristic analysis module, the network card connector 401, the network card chip 403, the memory 404, the controller 405, and the test fixture are all placed on the circuit board 402. The controller 405 is connected to the memory 404 through the memory interface. The controller 405 is connected to the network card connector 401 through the network card chip 403. The controller 405 is connected to at least one chip on the test fixture through the chip interface ( Figure 5 4) connections are shown.
[0115] Figure 6 A schematic diagram of the structure of a test fixture provided in an embodiment of the present application.
[0116] See also Figure 6 The test fixture includes a chip groove 601, a bottom screw 602, a top cover 603, and a circuit board 604.
[0117] The chip groove 601 is used to place the chip, and a probe is arranged at the bottom of the chip groove 601, and the probe corresponds to the pins of the chip one by one.
[0118] The bottom screw 602 is used to lock the test fixture onto the circuit board 604 .
[0119] The top cover 603 has a buckle. When the top cover 603 is buckled down and the buckle is fastened, the chip on the test device can be pressed into the chip slot 601, so that the probes in the chip slot 601 are connected to the pins of the chip and to the pads locked on the circuit board 604, thereby electrically connecting the chip pins to the circuit board 604.
[0120] Figure 7 A schematic diagram of the initialization process provided for an embodiment of the present application.
[0121] See also Figure 7 , the initialization process includes:
[0122] 701. Initialization process begins.
[0123] Optionally, in response to a user clicking or dragging an initialization control in the electronic device, the initialization process is initiated.
[0124] 702. The analysis control module receives the chip ID and target channel number of the chip to be analyzed.
[0125] Specifically, the analysis control module receives the chip ID of the chip to be analyzed input by the user and the target channel number of the controller corresponding to the chip to be analyzed.
[0126] Optionally, the analysis control module may also receive the number of chips to be analyzed, interface types, and characteristic analysis test cases input by a user.
[0127] 703. The analysis control module generates an initialization instruction according to the chip ID to be analyzed and the target channel number, and sends the initialization instruction to the controller.
[0128] Specifically, the analysis control module generates a corresponding initialization instruction according to the chip ID and the target channel number of the chip to be analyzed. The initialization instruction is used to control the chip to be analyzed to feedback the chip ID through the controller.
[0129] 704. The controller receives and parses the initialization instruction to obtain the chip ID to be analyzed and the target channel number.
[0130] Specifically, the controller receives the initialization instruction and parses it to obtain the chip ID to be analyzed and the target channel number carried in the initialization instruction.
[0131] 705. The controller generates a chip control instruction according to the chip ID to be analyzed and the target channel number, and sends the chip control instruction to the chip to be analyzed.
[0132] Specifically, the controller determines the target channel according to the target channel number, and sends a chip control instruction to the chip to be analyzed corresponding to the chip ID to be analyzed based on the target channel. The chip control instruction is used to control the chip to be analyzed to feedback the chip ID of the chip.
[0133] 706. The controller receives the chip ID fed back by the chip to be analyzed, and determines whether the chip ID matches the chip ID to be analyzed.
[0134] Specifically, the controller receives the chip ID fed back by the chip to be analyzed, and compares the chip ID with the chip ID of the chip to be analyzed to determine whether the chip ID matches the chip ID of the chip to be analyzed.
[0135] When the chip ID fed back by the chip to be analyzed matches the chip ID to be analyzed, execute 707. When the chip ID fed back by the chip to be analyzed does not match the chip ID to be analyzed, it is determined that the initialization of the chip to be analyzed fails, and execute 709.
[0136] 707. Generate and display a notification of successful initialization.
[0137] Specifically, when the chip ID fed back by the chip to be analyzed matches the chip ID to be analyzed, an initialization success notification is generated according to the chip ID to be analyzed and displayed.
[0138] 708. The initialization process ends.
[0139] 709. Check the connection status.
[0140] Specifically, when the chip ID fed back by the chip to be analyzed does not match the chip ID to be analyzed, the connection state is detected, and when the connection state is normal, the process returns to step 703. Otherwise, the process goes to step 710.
[0141] 710. Exit the initialization process.
[0142] In some embodiments, after determining that the chip to be analyzed fails to be initialized, the method includes:
[0143] Determine the connection status of the chip to be analyzed;
[0144] When the connection state is the working state, the process returns to the step of determining at least one chip to be analyzed based on at least one target channel number, and controlling each chip to be analyzed to execute initialization and subsequent steps.
[0145] Specifically, when it is determined that the initialization of the chip to be analyzed fails, the connection status of the chip to be analyzed is detected, and the above connection status includes a working status and a non-working status. When the connection status of the chip to be analyzed is a working status, it is determined that the hardware configuration of the chip to be analyzed is normal and the connection with the current electronic device is not interrupted, then the execution is returned to determine at least one chip to be analyzed based on at least one target channel number, and each chip to be analyzed is controlled to perform initialization and subsequent steps, so as to control the chip to be analyzed electrically connected to the electronic device to re-initialize, and when the correct chip ID is fed back, a characteristic analysis test is performed on the successfully initialized chip to be analyzed.
[0146] Optionally, when the connection status of the chip to be analyzed is in a non-working state, it is determined that the connection between the chip to be analyzed and the electronic device is interrupted, and the characteristic analysis test cannot be performed on the chip to be analyzed, and a configuration detection notification is generated to prompt the user to detect the software and hardware configuration environment of the chip to be analyzed to determine the reason for the interruption of the connection between the chip to be analyzed and the electronic device.
[0147] The status of the chip to be analyzed is determined by initialization, and characteristic analysis test is performed only on the chip to be analyzed that has been successfully initialized, reducing the characteristic analysis processing of abnormal chips, thereby improving the chip characteristic analysis test efficiency.
[0148] Figure 8 The third flow chart of the characteristic analysis method provided in the embodiment of the present application is as follows: Figure 8 As shown, the characteristic analysis method provided in the embodiment of the present application includes the following steps:
[0149] S2041: Analyze each target use case to obtain the test parameters carried by each target use case;
[0150] S2042: Based on the test parameters carried by each target use case, perform characteristic analysis on each target chip, and collect corresponding characteristic analysis parameters in each target chip;
[0151] S2043: When the characteristic analysis parameters of the target chip match the corresponding test parameters, determining that the characteristic analysis result of the target chip is passed;
[0152] S2044: Generate a feature analysis pass notification based on the feature analysis result and display it.
[0153] Specifically, each target use case is parsed to obtain the test parameters carried by each target test case, and the test parameters include but are not limited to at least one of the target parameter type, the target parameter threshold corresponding to the target parameter type, and the number of cycle tests. Based on the test parameters carried by each target user, a characteristic analysis test is performed on each corresponding target chip, and the characteristic analysis parameters corresponding to the test parameters in each target chip are collected. Among them, the target parameter type, target parameter threshold, and number of cycle tests can all be specifically set according to actual conditions. For example, the test parameters include temperature: 25°C, air pressure: 100Pa, and number of cycle tests: 2 times.
[0154] Optionally, the controller performs a characteristic analysis test on each corresponding target chip based on the test parameters carried by each target user, and collects the corresponding characteristic analysis parameters in each target chip.
[0155] Optionally, the characteristic analysis parameters include characteristic analysis parameter values corresponding to each target parameter type; correspondingly, characteristic analysis parameter values corresponding to each target parameter type in each target chip may be collected during each cycle test.
[0156] Specifically, based on each target parameter type, the characteristic analysis parameter value of each target chip is compared with the test parameter of the corresponding type. When the characteristic analysis parameter value of the target chip matches the test parameter of the corresponding type, the characteristic analysis result of the target chip is determined to be passed, and a characteristic analysis pass notification is generated and displayed.
[0157] Optionally, the characteristic analysis notification includes but is not limited to at least one of a test parameter, a corresponding characteristic analysis parameter, and a chip ID of the target chip.
[0158] A characteristic analysis test may be performed on at least one type of parameter in a target chip through a target use case, thereby determining characteristic analysis results of different types of parameters of the target chip.
[0159] In some implementations, after performing characteristic analysis on each target chip based on the test parameters carried by each target use case and collecting corresponding characteristic analysis parameters in each target chip, the method includes:
[0160] When the characteristic analysis parameters of the target chip do not match the corresponding test parameters, determining that an abnormality exists in the target chip;
[0161] Generates a chip exception notification and displays it.
[0162] Specifically, when there is a mismatch between the characteristic analysis parameter value of the target chip and the test parameter of the corresponding type, the characteristic analysis result of the target chip is determined to be failed, the target chip is abnormal, and a chip abnormality notification is generated and displayed.
[0163] In some implementations, the test parameters further include adjustment parameters; after parsing each target use case and obtaining the test parameters carried by each target use case, the following steps are included:
[0164] Based on the adjustment parameters, the environmental parameters of each target chip are adjusted; the adjustment parameters include at least one of temperature, humidity, and air pressure.
[0165] Optionally, parameters such as the storage time of the chip, the stability of the chip, etc. are susceptible to change due to the influence of the environment in which they are located. The test parameters carried by the target use case also include adjustment parameters, which include but are not limited to at least one of temperature, humidity, and air pressure.
[0166] Specifically, based on the adjustment parameters carried in the target use case, the environmental parameters of each target chip are adjusted, and the environmental parameters correspond to the types of the adjustment parameters one by one.
[0167] For example, if the adjustment parameters include temperature: 25° C., then the ambient temperature of the target chip is adjusted to 25° C.
[0168] In this way, by adjusting the environmental parameters of the target chip, the chip can be kept in a stable state during the characteristic analysis test of the chip, thereby improving the accuracy of the characteristic analysis results of the chip.
[0169] In some embodiments, the method further comprises:
[0170] In response to receiving the setting instruction, determining the setting parameters carried by the setting instruction; wherein the setting parameters include chip parameters to be configured and / or test case parameters to be configured;
[0171] Parameter configuration is performed on at least one chip to be configured and / or at least one test case to be configured based on the setting parameters.
[0172] Optionally, in response to receiving the setting instruction, setting parameters carried by the setting instruction are determined, wherein the setting parameters include but are not limited to at least one of chip parameters to be configured of the chip to be configured and test case parameters to be configured of the test case to be configured.
[0173] Optionally, at least one chip to be configured and / or at least one test case to be configured is determined based on the setting instruction. Optionally, the chip parameters to be configured may include but are not limited to at least one of a channel number and a chip ID corresponding to the parameters to be configured. The test case parameters to be configured include but are not limited to at least one of a parameter to be tested and a test condition.
[0174] Optionally, parameters of at least one chip to be configured and / or at least one test case to be configured are configured based on the setting parameters, so as to perform characteristic analysis test on the chip according to the test case.
[0175] Optionally, the test case parameters to be configured may be collected through the test case customization interface of the feature analysis, so as to implement operations such as adding, deleting or modifying test cases based on the test case parameters to be configured.
[0176] In some embodiments, the method further comprises:
[0177] Collecting operating parameters; wherein the operating parameters include at least one of operating status, network port parameters, and environmental parameters;
[0178] When the operating parameter satisfies the first condition, determining that the electronic device is faulty;
[0179] Generating and displaying third initialization failure information; wherein the third initialization failure information is used to indicate that the electronic device fails and that the characteristic analysis of the target chip cannot be performed;
[0180] The first condition includes at least one of the following:
[0181] The operating state is non-working state;
[0182] The network port parameters do not match the target port parameters;
[0183] The environment parameters do not match the adjustment parameters carried by the feature analysis command.
[0184] Specifically, the operating parameters of the electronic device are collected in real time, and the operating parameters include but are not limited to at least one of the operating state, network port parameters, and environmental parameters. The operating state includes the working state and the non-working state, and the environmental parameters include but are not limited to at least one of the temperature, humidity, and air pressure.
[0185] Specifically, when the operating parameters meet the first condition, it is determined that the electronic device is in a fault state, and third initialization failure information is generated and displayed. The third initialization failure information is used to indicate that the electronic device is in a fault state and the characteristic analysis of the target chip cannot be performed.
[0186] Among them, the first condition includes at least one of the following: the operating state of the electronic device is non-working, the network port parameters of the electronic device do not match the target port parameters, and after adjustment, the environmental parameters in the electronic device do not match the adjustment parameters carried by the characteristic analysis instruction.
[0187] In some implementations, after performing characteristic analysis on each target chip based on each target use case, determining and displaying the characteristic analysis result of each target chip, the method includes:
[0188] Based on each target use case, the target chip ID of each target chip and the characteristic analysis results, a standard use case is generated and stored.
[0189] Specifically, when determining the characteristic analysis results of each target chip, a standard use case can be generated and stored based on the above-mentioned characteristic analysis results, the target use case corresponding to each target chip, and the target chip ID of each target chip, so that users can perform viewing or adding, modifying, deleting and other operations.
[0190] Fig. 9 A schematic diagram of the application of the characteristic analysis method provided in an embodiment of the present application.
[0191] 900. The characteristic analysis process begins.
[0192] Specifically, in response to the user's operation of clicking and dragging the characteristic analysis control in the electronic device, the characteristic analysis process begins.
[0193] 901. System initialization.
[0194] Specifically, in response to the characteristic analysis process starting, the characteristic analysis system is initialized.
[0195] Optionally, system initialization includes IP configuration of the test fixtures in each characteristic analysis module, IP configuration of the environmental control module, and communication connection configuration between modules. When the above configurations are completed, a notification of successful system initialization is displayed. In this way, batch deployment of multiple modules and multiple chips can be achieved.
[0196] 902. Obtain a characteristic analysis instruction and perform characteristic analysis initialization.
[0197] Specifically, a characteristic analysis instruction is obtained, and the chip to be analyzed is initialized based on the characteristic analysis instruction to control the chip to be analyzed to feedback a chip ID.
[0198] Optionally, the parameters carried by the characteristic analysis instruction include but are not limited to at least one target channel number and at least one corresponding test case.
[0199] 903. Determine whether the characteristic analysis initialization is successful.
[0200] Specifically, based on whether the chip ID fed back by the chip to be analyzed matches the chip ID to be analyzed of the chip to be analyzed, it is determined whether the characteristic analysis initialization is successful. When the chip ID fed back by the chip to be analyzed matches the chip ID to be analyzed of the chip to be analyzed, it is determined that the characteristic analysis initialization is successful, the chip to be analyzed is determined as a target chip and step 904 is executed, otherwise, step 911 is executed.
[0201] 911. Check the connection status.
[0202] Specifically, the connection state between the chip to be analyzed and the electronic device is detected, and when the connection state is a working state, the process returns to execute step 902 and subsequent steps.
[0203] 904. Analyze the characteristic analysis instruction and obtain parameters.
[0204] Specifically, the characteristic analysis instruction is parsed to obtain the parameters carried by the characteristic analysis instruction.
[0205] 905. Determine whether the parameters in the characteristic analysis instruction include adjustment parameters.
[0206] Specifically, it is determined whether the parameters carried in the characteristic analysis instruction include adjustment parameters. When the parameters carried in the characteristic analysis instruction include adjustment parameters, step 906 is executed; otherwise, step 907 is executed.
[0207] 906. Adjust environmental parameters based on the adjustment parameters.
[0208] Specifically, when the parameters carried in the characteristic analysis instruction include adjustment parameters, the environment parameters of the target chip are adjusted based on the adjustment parameters carried in the characteristic analysis instruction.
[0209] 907. Based on the target use case in the characteristic analysis instruction, perform characteristic analysis on the target chip, and collect characteristic analysis parameters of each target chip.
[0210] Specifically, based on the target use case carried in the feature analysis instruction, feature analysis is performed on the corresponding target chip, and corresponding feature analysis parameters in the target chip are collected.
[0211] 908. Determine a characteristic analysis result of each target use case based on the characteristic analysis parameters of each target chip.
[0212] Specifically, based on the characteristic analysis parameters of each target chip, the characteristic analysis results of each target use case are determined.
[0213] Optionally, when the characteristic analysis parameters of the target chip match the target parameter threshold of the test parameter corresponding to the characteristic analysis instruction, the characteristic analysis result of the target chip is determined to be passed. When the characteristic analysis parameters of the target chip do not match the target parameter threshold of the test parameter corresponding to the characteristic analysis instruction, the characteristic analysis result of the target chip is determined to be failed, and the target chip is abnormal.
[0214] 909. Generate and store standard use cases based on each target use case, the target chip ID of each target chip, and the characteristic analysis result.
[0215] Specifically, based on the target ID, characteristic analysis results and corresponding target use cases of each target chip, a standard use case is generated and stored.
[0216] Optionally, standard use cases can also be called test cases.
[0217] Optionally, the characteristic analysis parameters and the operating parameters of the electronic device during the characteristic analysis process may be displayed and recorded in real time, and the characteristic analysis process may be displayed after the characteristic analysis is completed to facilitate abnormality location.
[0218] Optionally, based on the real-time collected operating parameters of the electronic device, determine whether there is a fault in the operating state of the electronic device, network port parameters, environmental parameters, characteristic analysis process, etc. When a fault is detected, a fault alarm is issued and the third initialization failure information is displayed.
[0219] Optionally, a test case customization interface for feature analysis is set to determine configuration requirements for feature analysis algorithms and external environment parameters in the test case.
[0220] 910. The characteristic analysis process ends.
[0221] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method.
[0222] Fig.10 This is a schematic diagram of the structure of the characteristic analysis device provided in the embodiment of the present application. Fig.10 As shown, an embodiment of the present application further provides a characteristic analysis device, comprising:
[0223] The first determination module 1001 is used to determine the parameters carried by the characteristic analysis instruction in response to receiving the characteristic analysis instruction; the parameters include at least one target channel number and at least one corresponding test case;
[0224] The second determination module 1002 is used to determine at least one chip to be analyzed based on at least one target channel number, and control each chip to be analyzed to perform initialization;
[0225] The third determination module 1003 is used to determine the corresponding target chip and target test case based on the initialization result of each chip to be analyzed and at least one test case;
[0226] The fourth determination module 1004 is used to perform characteristic analysis on each target chip based on each target use case, determine the characteristic analysis result of each target chip and display it.
[0227] Optionally, each chip corresponds to a channel number; the second determination module includes:
[0228] A first determining unit, used to determine the chip corresponding to each target channel number as the chip to be analyzed;
[0229] The first control unit is used to send an initialization instruction to each chip to be analyzed, so as to control each chip to be analyzed to perform initialization based on the initialization instruction.
[0230] Optionally, the third determining module includes:
[0231] A first parsing unit is used to receive the initialization results returned by each chip to be analyzed, and parse each initialization result to obtain initialization information of each chip to be analyzed;
[0232] A second determining unit, configured to determine that the chip to be analyzed is a target chip when the initialization information of the chip to be analyzed indicates that the initialization is successful;
[0233] The third determining unit is used to determine, in at least one test case, a test case corresponding to each target chip as a target case.
[0234] Optionally, the third determining module includes:
[0235] The fourth determining unit is configured to determine that the chip to be analyzed is successfully initialized when the initialization information carries the chip ID and the chip ID matches the chip to be analyzed ID.
[0236] Optionally, the third determining module includes:
[0237] a fifth determining unit, configured to determine that the initialization of the chip to be analyzed fails when the initialization information carries a chip ID and the chip ID does not match the chip ID of the chip to be analyzed;
[0238] The first generating unit is used to generate and display first initialization failure information.
[0239] Optionally, the third determining module includes:
[0240] A sixth determining unit, configured to determine that the initialization of the chip to be analyzed fails when the initialization information does not carry the chip ID;
[0241] The second generating unit is used to generate and display second initialization failure information.
[0242] Optionally, the third determining module includes:
[0243] A seventh determining unit, used to determine the connection status of the chip to be analyzed;
[0244] The loop unit is used to return to the execution of determining at least one chip to be analyzed based on at least one target channel number when the connection state is the working state, and control each chip to be analyzed to execute initialization and subsequent steps.
[0245] Optionally, the fourth determining module includes:
[0246] The second parsing unit is used to parse each target use case to obtain the test parameters carried by each target use case;
[0247] A characteristic analysis unit, used to perform characteristic analysis on each target chip based on the test parameters carried by each target use case, and collect corresponding characteristic analysis parameters in each target chip;
[0248] an eighth determination unit, configured to determine that the characteristic analysis result of the target chip is passed when the characteristic analysis parameter of the target chip matches the corresponding test parameter;
[0249] The third generating unit is used to generate a characteristic analysis pass notification based on the characteristic analysis result and display it.
[0250] Optionally, the fourth determining module includes:
[0251] a ninth determination unit, configured to determine that an abnormality exists in the target chip when the characteristic analysis parameter of the target chip does not match the corresponding test parameter;
[0252] The fourth generating unit is used to generate and display a chip abnormality notification.
[0253] Optionally, the test parameters also include adjustment parameters; and the fourth determination module includes:
[0254] The adjustment unit is used to adjust the environmental parameters of each target chip based on the adjustment parameters; the adjustment parameters include at least one of temperature, humidity and air pressure.
[0255] Optionally, the device further comprises:
[0256] A collection module, used for collecting operating parameters; wherein the operating parameters include at least one of operating status, network port parameters, and environmental parameters;
[0257] a fifth determination module, configured to determine that the electronic device is faulty when the operating parameter satisfies the first condition;
[0258] A first generating module is used to generate and display third initialization failure information; wherein the third initialization failure information is used to indicate that the electronic device fails and the characteristic analysis of the target chip cannot be performed;
[0259] The first condition includes at least one of the following:
[0260] The operating state is non-working state;
[0261] The network port parameters do not match the target port parameters;
[0262] The environment parameters do not match the adjustment parameters carried by the feature analysis command.
[0263] Optionally, the device comprises:
[0264] A sixth determination module, configured to determine, in response to receiving a setting instruction, setting parameters carried by the setting instruction; wherein the setting parameters include chip parameters to be configured and / or test case parameters to be configured;
[0265] A configuration module is used to perform parameter configuration on at least one chip to be configured and / or at least one test case to be configured based on the setting parameters.
[0266] Optionally, the device comprises:
[0267] The second generation module is used to generate and store standard use cases based on each target use case, the target chip ID of each target chip and the characteristic analysis result.
[0268] For the description of the features in the embodiment corresponding to the characteristic analysis device, reference can be made to the relevant description of the embodiment corresponding to the characteristic analysis method, which will not be repeated here.
[0269] Fig.11 This is a schematic diagram of the structure of the electronic device provided in this application. Fig.11 As shown, the electronic device 50 provided in this embodiment includes: at least one processor 501 and a memory 502. Optionally, the device 50 also includes a communication component 503. The processor 501, the memory 502 and the communication component 503 are connected via a bus.
[0270] In a specific implementation process, at least one processor 501 executes the computer execution instructions stored in the memory 502, so that at least one processor 501 executes the above-mentioned characteristic analysis method embodiment.
[0271] The specific implementation process of the processor 501 can be found in the above method embodiment, and its implementation principle and technical effect are similar, so this embodiment will not be repeated here.
[0272] In the above embodiments, it should be understood that the processor may be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The steps of the method disclosed in the application may be directly implemented as being executed by a hardware processor, or may be executed by a combination of hardware and software modules in the processor.
[0273] The memory may include a high-speed memory (Random Access Memory, RAM), and may also include a non-volatile memory (NVM), such as at least one disk storage.
[0274] The bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component Interconnect (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus, etc. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the bus in the drawings of this application is not limited to only one bus or one type of bus.
[0275] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above-mentioned characteristic analysis method embodiments when running.
[0276] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.
[0277] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above-mentioned characteristic analysis method embodiments are implemented.
[0278] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above-mentioned characteristic analysis method embodiments are implemented.
[0279] Professionals may further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians may use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.
[0280] The above is a detailed introduction to a characteristic analysis method, device, electronic device, storage medium and program product provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and core idea of the present application. It should be pointed out that for ordinary technicians in this technical field, without departing from the principles of the present application, several improvements and modifications can be made to the present application, and these improvements and modifications also fall within the scope of protection of the claims of the present application.
Claims
1. A characteristic analysis method, characterized in that: Applicable to electronic equipment, the electronic equipment is connected to at least one chip, and comprises: In response to receiving a characteristic analysis instruction, determining parameters carried by the characteristic analysis instruction; the parameters include at least one target channel number and at least one corresponding test case; Determine at least one chip to be analyzed based on the at least one target channel number, and control each of the chips to be analyzed to perform initialization; Based on the initialization result of each of the chips to be analyzed and the at least one test case, determining a corresponding target chip and a target case; Based on each of the target use cases, characteristic analysis is performed on each of the target chips, and characteristic analysis results of each of the target chips are determined and displayed.
2. The characteristic analysis method according to claim 1, characterized in that: Each of the chips corresponds to a channel number; determining at least one chip to be analyzed based on the at least one target channel number, and controlling each of the chips to be analyzed to perform initialization, comprises: Determine the chip corresponding to each of the target channel numbers as the chip to be analyzed; An initialization instruction is sent to each of the chips to be analyzed, so as to control each of the chips to be analyzed to perform initialization based on the initialization instruction.
3. The characteristic analysis method according to claim 1, characterized in that: The determining of the corresponding target chip and target case based on the initialization result of each chip to be analyzed and the at least one test case includes: Receiving the initialization results returned by each of the chips to be analyzed, and parsing each of the initialization results to obtain initialization information of each of the chips to be analyzed; When the initialization information of the chip to be analyzed indicates that the initialization is successful, determining that the chip to be analyzed is a target chip; Among the at least one test case, a test case corresponding to each of the target chips is determined as a target case.
4. The characteristic analysis method according to claim 3, characterized in that: After receiving the initialization results returned by the chips to be analyzed, parsing the initialization results, and obtaining the initialization information of the chips to be analyzed, the method further includes: When the initialization information carries a chip ID, and the chip ID matches the chip ID of the chip to be analyzed, it is determined that the chip to be analyzed is initialized successfully.
5. The characteristic analysis method according to claim 3, characterized in that: After receiving the initialization results returned by the chips to be analyzed, parsing the initialization results, and obtaining the initialization information of the chips to be analyzed, the method further includes: When the initialization information carries a chip ID, and the chip ID does not match the chip ID of the chip to be analyzed, determining that the initialization of the chip to be analyzed fails; Generate and display the first initialization failure information.
6. The characteristic analysis method according to claim 3, characterized in that: After receiving the initialization results returned by the chips to be analyzed, parsing the initialization results, and obtaining the initialization information of the chips to be analyzed, the method further includes: When the initialization information does not carry the chip ID, determining that the initialization of the chip to be analyzed fails; Generate and display the second initialization failure information.
7. The characteristic analysis method according to claim 5 or 6, characterized in that: After determining that the chip to be analyzed fails to be initialized, the method includes: Determining the connection status of the chip to be analyzed; When the connection state is the working state, the process returns to executing the steps of determining at least one chip to be analyzed based on the at least one target channel number, and controlling each chip to be analyzed to execute initialization and subsequent steps.
8. The characteristic analysis method according to claim 1, characterized in that: The performing characteristic analysis on each target chip based on each target use case, determining and displaying the characteristic analysis result of each target chip, comprises: Parsing each of the target use cases to obtain test parameters carried by each of the target use cases; Based on the test parameters carried by each of the target use cases, characteristic analysis is performed on each of the target chips, and corresponding characteristic analysis parameters in each of the target chips are collected; When the characteristic analysis parameters of the target chip match the corresponding test parameters, determining that the characteristic analysis result of the target chip is passed; A characteristic analysis pass notification is generated based on the characteristic analysis result and displayed.
9. The characteristic analysis method according to claim 8, characterized in that: The test parameters also include adjustment parameters; after parsing each of the target use cases to obtain the test parameters carried by each of the target use cases, the method includes: Based on the adjustment parameters, the environmental parameters of each of the target chips are adjusted; the adjustment parameters include at least one of temperature, humidity, and air pressure.
10. The characteristic analysis method according to any one of claims 1 to 4, characterized in that: The method further comprises: In response to receiving the setting instruction, determining the setting parameters carried by the setting instruction; wherein the setting parameters include chip parameters to be configured and / or test case parameters to be configured; Parameter configuration is performed on at least one chip to be configured and / or at least one test case to be configured based on the setting parameters.
11. The characteristic analysis method according to any one of claims 1 to 4, characterized in that: The method further comprises: Collecting operating parameters; wherein the operating parameters include at least one of operating status, network port parameters, and environmental parameters; When the operating parameter satisfies a first condition, determining that the electronic device is faulty; Generating and displaying third initialization failure information; wherein the third initialization failure information is used to indicate that the electronic device fails and the characteristic analysis of the target chip cannot be performed; The first condition includes at least one of the following: The operating state is a non-working state; The network port parameters do not match the target port parameters; The environmental parameters do not match the adjustment parameters carried by the characteristic analysis instruction.
12. The characteristic analysis method according to any one of claims 1 to 4, characterized in that: After performing characteristic analysis on each target chip based on each target use case, determining and displaying the characteristic analysis result of each target chip, the method further comprises: Based on each of the target use cases, the target chip ID of each of the target chips and the characteristic analysis results, a standard use case is generated and stored.
13. An electronic device, characterized in that: include: Memory for storing computer programs; A processor, configured to implement the steps of the characteristic analysis method according to any one of claims 1 to 12 when executing the computer program.
14. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein the computer program, when executed by a processor, implements the steps of the characteristic analysis method according to any one of claims 1 to 12.
15. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the characteristic analysis method according to any one of claims 1 to 12 are implemented.
Citation Information
Patent Citations
Chip test analysis method, apparatus and device and storage medium
CN110082666A
Chip correction method and device and storage medium
CN114460441A
Information recording method and device of NAND flash memory chip, electronic equipment and medium
CN114822677A
Capacitance reduction test method, system and device for LPDDR chip and storage medium
CN116597887A