Safe starting system and method, storage medium and electronic equipment

Abstract

The invention discloses a secure startup system and method, a storage medium and electronic equipment, and relates to the technical field of network security. The system is characterized in that a universal processor comprises a plurality of firmware to be started, and a hierarchical relationship exists between the firmware; the memory is used for storing mirror image files corresponding to the multiple pieces of firmware, and after the first-level firmware belonging to the first level in the multiple pieces of firmware is started, the firmware carries out security verification on the lower-level firmware of the lower level according to the hierarchical relation; the trusted root unit is respectively connected with the general processor and the memory through a first interface, is connected with the control logic module through a second interface, and is used for carrying out security verification on the first-level firmware according to the first mirror image file of the first-level firmware, and when the first-level firmware passes verification, sending the first mirror image file to the control logic module; a control signal indicating that the first-level firmware passes verification is sent to the control logic module; and the control logic module is connected with the universal processor through the second interface and is used for starting the first-stage firmware according to the control signal.

Description

Technical Field

[0001] The present application relates to the field of network security technology, and in particular to a secure boot system, method, storage medium and electronic device. Background Art

[0002] In a complex network environment, devices are vulnerable to external attacks when running software. For example, attackers attack the Basic Input Output System (BIOS) firmware. Once the firmware tampered by the attacker is run, the device will have security risks, leading to the leakage of customer sensitive information, loss of important files and other problems.

[0003] Therefore, how to achieve secure startup of equipment is an urgent problem to be solved. Summary of the invention

[0004] The present application provides a secure boot system, method, storage medium and electronic device to improve the security of device booting.

[0005] In a first aspect, a secure boot system is provided, comprising: a general processor, a control logic module, a trusted root unit, and a memory, wherein the general processor comprises a plurality of firmwares to be started, and a hierarchical relationship exists between each firmware;

[0006] The memory is used to store the image files corresponding to the multiple firmwares respectively, so that after the first-level firmware belonging to the first level among the multiple firmwares of the general-purpose processor is started, each firmware among the multiple firmwares obtains the image file of the respective next-level firmware according to the hierarchical relationship, and performs security verification on the respective next-level firmware;

[0007] The trusted root unit is connected to the general processor and the memory through a first interface, and is connected to the control logic module through a second interface, and is used to perform a security check on the first-level firmware according to the first image file of the first-level firmware, and when the security check result of the first-level firmware is passed, send a control signal that the first-level firmware has passed the check to the control logic module;

[0008] The control logic module is connected to the general processor through the second interface, and is used to start the first level firmware of the general processor according to the control signal.

[0009] In a possible implementation, the trusted root unit includes a trusted root logic module and a trusted root storage module;

[0010] The trusted root logic module is used to obtain a first image file of the first-level firmware from the memory and calculate a first digest value of the first image file; wherein the first image file is an image file of the first-level firmware in the first partition;

[0011] Read the first signature value information encrypted in the first image file, and obtain the first trusted root from the trusted root storage module;

[0012] Decrypt the encrypted first signature value information using the first trusted root to obtain a second summary value of the first-level firmware;

[0013] A security check is performed on the first level firmware according to the first digest value and the second digest value.

[0014] In a possible implementation, the trusted root logic module is further used for:

[0015] When the security check result of the first-level firmware fails, obtaining a second image file of the first-level firmware from the memory, and calculating a third digest value of the second image file; wherein the second image file is an image file of the first-level firmware in the second partition;

[0016] Read the second signature value information encrypted in the second image file, and obtain the second trusted root from the trusted root storage module;

[0017] Decrypt the encrypted second signature value information using the second trusted root to obtain a fourth summary value of the first-level firmware;

[0018] A security check is performed on the first-level firmware according to the third digest value and the fourth digest value.

[0019] In one possible implementation, the system further includes a trusted key management module;

[0020] The trusted key management module is connected to the general processor, and is used to read the multiple firmwares according to the startup sequence of the multiple firmwares after the multiple firmwares of the general processor are all started, and calculate the measurement value of each of the multiple firmwares;

[0021] The plurality of firmwares are security-verified according to the respective measurement values ​​and the root public key information stored in the plurality of firmwares.

[0022] In a possible implementation, the first interface is an SPI interface, and the second interface is a control interface.

[0023] In a possible implementation, the control logic module is FPGA or CPLD.

[0024] In a possible implementation, the first level firmware is BIOS firmware or UBoot firmware.

[0025] In the embodiment of the present application, since the trusted root unit can be used as an active verification module outside the general processor and is connected to the general processor through the hardware logic of the control logic module, the security of the first-level firmware started by the device is guaranteed during the startup process.

[0026] In a second aspect, a secure boot method is provided, applied to the system according to any one of the first aspects, comprising:

[0027] According to a first image file of the first-level firmware, a security check is performed on the first-level firmware; wherein the first-level firmware is the first level of a plurality of firmwares, and the first-level image file is obtained from a memory storing image files corresponding to the plurality of firmwares;

[0028] When the security check result of the first-level firmware passes, a control signal indicating that the first-level firmware passes the check is sent to the control logic module, so that the control logic module starts the first-level firmware.

[0029] In a possible implementation, the performing security verification on the first-level firmware according to the first image file of the first-level firmware includes:

[0030] Calculating a first digest value of the first image file; wherein the first image file is an image file of the first-level firmware in the first partition;

[0031] Read the first signature value information encrypted in the first image file, and obtain the first trusted root from the trusted root storage module;

[0032] Decrypt the encrypted first signature value information using the first trusted root to obtain a second summary value of the first-level firmware;

[0033] A security check is performed on the first level firmware according to the first digest value and the second digest value.

[0034] In one possible implementation, the method further includes:

[0035] When the security check result of the first-level firmware fails, obtaining a second image file of the first-level firmware from the memory, and calculating a third digest value of the second image file; wherein the second image file is an image file of the first-level firmware in the second partition;

[0036] Read the second signature value information encrypted in the second image file, and obtain the second trusted root from the trusted root storage module;

[0037] Decrypt the encrypted second signature value information using the second trusted root to obtain a fourth summary value of the first-level firmware;

[0038] A security check is performed on the first-level firmware according to the third digest value and the fourth digest value.

[0039] In one possible implementation, the method further includes:

[0040] After the multiple firmwares of the general processor are all started, reading the multiple firmwares according to the startup order of the multiple firmwares, and calculating the measurement value of each of the multiple firmwares;

[0041] The plurality of firmwares are security-verified according to the respective measurement values ​​and the root public key information stored in the plurality of firmwares.

[0042] According to a third aspect, an electronic device is provided, including:

[0043] A memory for storing a computer program; a processor for implementing any one of the method steps in the first aspect when executing the computer program stored in the memory.

[0044] According to a fourth aspect, a computer-readable storage medium is provided, wherein a computer program is stored in the computer-readable storage medium, and when the computer program is executed by a processor, the method steps described in any one of the first aspects are implemented.

[0045] For each aspect from the second to the fourth aspect and the technical effects that may be achieved by each aspect, please refer to the above description of the technical effects that can be achieved by the first aspect or various possible schemes in the first aspect, and no further details will be given here. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 A schematic diagram of the structure of a secure boot system provided in an embodiment of the present application;

[0047] Figure 2 A flowchart of performing security verification on the first-level firmware provided in an embodiment of the present application;

[0048] Figure 3 A complete secure startup flowchart provided for an embodiment of the present application;

[0049] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The specific operating methods in the method embodiments can also be applied to device embodiments or system embodiments. It should be noted that in the description of the present application, "multiple" is understood as "at least two". "And / or" describes the association relationship of associated objects, indicating that three relationships may exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. A is connected to B, which can represent: A is directly connected to B and A is connected to B through C. In addition, in the description of the present application, words such as "first" and "second" are only used to distinguish the purpose of description, and cannot be understood as indicating or implying relative importance, nor can they be understood as indicating or implying order.

[0051] In order to better understand the embodiments of the present application, the technical terms involved in the embodiments of the present application are first explained below.

[0052] (1) As the basic component of trusted computing, the root of trust is usually a trusted hardware chip. It mainly provides basic services such as cryptographic calculation, trusted reference value storage, and policy storage. The root of trust has two forms: hardware and software. It can be used in hardware or software according to the host security level and actual needs. Among them, the system of security protection level 3 and above should adopt the root of trust in hardware form, for example, the root of trust for measurement (RTM), which uses various encryption algorithms to judge or measure the status of the platform; another example is the root of trust for storage (RTS), which provides a cryptographic mechanism to protect the information (data and keys) stored outside the trusted platform module (TPM); another example is the root of trust for report (RTR), which provides a cryptographic mechanism to digitally sign the status and information of the TPM.

[0053] (2) The main function of the trust chain is to extend the trust relationship to the entire computer platform. It is built on the basis of the trust root. The trust chain can obtain various data that affect the trustworthiness of the platform through the trust measurement mechanism, and judge the trustworthiness of the platform by comparing these data with the expected data.

[0054] (3) Serial Peripheral Interface (SPI) is a full-duplex synchronous serial communication interface that enables a microcontroller unit (MCU) to communicate with various peripheral devices in a serial manner to exchange information. The communication baud rate can be as high as 5Mbps.

[0055] (4) Basic Input Output System (BIOS) firmware is a set of system programs that are fixed to a storage chip on the motherboard of a computing device. It plays an indispensable role in the normal initialization, startup and operating system booting of the computer system, and is a key link in realizing key functions such as the security and reliability of the computer system.

[0056] (5) Unified Extensible Firmware Interface (UEFI) is a personal computer system specification that defines the software interface between the operating system and the system firmware as an alternative to BIOS. The UEFI is responsible for the power-on self-test (POST), communicating with the operating system, and providing an interface between the operating system and the hardware.

[0057] (6) The Reuse Based on Object-Oriented Technology (REBOOT) component model is a faceted classification and retrieval model based on existing components.

[0058] (7) Kernel is the core of an operating system. It is the first layer of software expansion based on hardware, providing the most basic functions of the operating system. It is the basis for the operation of the operating system. It is responsible for managing the system's processes, memory, device drivers, files, and network systems, and determines the system's performance and stability.

[0059] (8) Initialized RAM disk (initrd) is a temporary root file system mounted during the system boot process to support the two-stage boot process. The initrd file contains various executable programs and drivers that can be used to mount the actual root file system and then unmount the random access memory (RAM) disk of the initrd to release memory.

[0060] (9) Operating System (OS) is a set of interrelated system software programs that manage and control computer operations, use and run hardware and software resources, and provide public services to organize user interactions. Depending on the operating environment, operating systems can be divided into desktop operating systems, mobile operating systems, server operating systems, embedded operating systems, etc.

[0061] (10) Universal Boot Loader (UBoot) is a boot loader mainly used in embedded systems and can support a variety of different computer system structures.

[0062] (11) Field Programmable Gate Array (FPGA) devices consist of three programmable circuits, namely programmable logic blocks, input / output modules and programmable interconnection resources, and a configuration storage unit. They can be used to implement logic control, motion control, data acquisition and other functions in control systems. They can be used in industrial automation, robot control, smart home and other fields.

[0063] (12) Complex Programmable Logic Device (CPLD) consists of triggers, logic units, input and output interfaces, and an internal programmable interconnect network. It is flexible, low power, and compact, and can realize different logic functions.

[0064] (13) GRand Unified Bootloader (abbreviated as GRUB). GRUB is an implementation of the multi-boot specification. It allows users to have multiple operating systems on the computer at the same time and select the operating system they want to run when the computer starts. GRUB can be used to select different kernels on the operating system partition and can also be used to pass boot parameters to these kernels.

[0065] Figure 1 A schematic diagram of a secure boot structure provided by an embodiment of the present application. Figure 1 As shown, the secure boot system 100 may include a general processor 101, a memory 102, a trusted root unit 103, a control logic module 104, and may further include a trusted key management module 105. Each module in the above system will be described in detail below.

[0066] Exemplarily, the general processor 101 refers to the central processing unit (CPU) used by the main program, which provides support for business operations and may include multiple firmware to be started, and there is a hierarchical relationship between each firmware. For example, based on the x86 architecture, according to the hierarchical relationship, it may include BIOS firmware, GRUB firmware, RBOOT firmware, kernel firmware, initrd firmware, and OS firmware in sequence; for another example, based on the mips architecture or the arm architecture, according to the hierarchical relationship, it may include UBOOT firmware, kernel firmware, initrd firmware, and OS firmware in sequence.

[0067] Exemplarily, the memory 102 is used to store image files corresponding to each of the multiple firmwares. After the first-level firmware belonging to the first level among the multiple firmwares of the general processor is started, each firmware in the multiple firmwares obtains the image file of the respective next-level firmware according to the hierarchical relationship, and performs security verification on the respective next-level firmware.

[0068] Exemplarily, after the first-level firmware of the first level among the multiple firmwares is started, each firmware among the multiple firmwares performs a security check on the subordinate firmware of the next level according to the hierarchical relationship. Each firmware performs a security check on the subordinate firmware of the next level according to the hierarchical relationship. For example, under the x86 architecture, the memory 102 stores the image files corresponding to the BIOS firmware, GRUB firmware, RBOOT firmware, kernel firmware, initrd firmware, and OS firmware. After the first-level firmware (i.e., the BIOS firmware) is started, the image file of the GRUB firmware can be provided to the BIOS firmware, so that the BIOS firmware can perform a security check on the GRUB firmware based on the image file of the GRUB firmware. Further, after the check is passed, the BIOS firmware can start the GRUB firmware. Then, after the GRUB firmware is started, the GRUB firmware obtains the image files of the kernel firmware and the initrd firmware from the memory 102 and performs a security check on them. After the check is passed, the GRUB firmware starts the kernel firmware. After the kernel firmware is started, the kernel firmware starts the initrd firmware. Finally, after the initrd firmware is started, the image file of the OS firmware is obtained from the memory 102, and a security check is performed on the OS firmware. After the check is passed, the OS firmware is started, thereby completing the secure boot process of the device.

[0069] Furthermore, the BIOS firmware performs a security check on the GRUB firmware based on the image file of the GRUB firmware. Specifically, the BIOS firmware obtains the image file corresponding to the GRUB firmware (for example, bootx64.efi, gurb.cfg, grub_version, etc.) from the memory, and calculates the summary value 1 of the image file of the GRUB firmware; then, reads the signature value information in the image file of the GRUB firmware, and uses the BIOS hard-coded trust root to decrypt and verify the signature value information to obtain the summary value 2 of the GRUB firmware; finally, compares whether the summary value 1 is consistent with the summary value 2. If they are consistent, it indicates that the GRUB firmware has passed the verification and can guide the GRUB firmware to start normally. If they are inconsistent, the backup partition of the GRUB firmware can be switched to perform the verification. The explanation of the backup partition is specifically referred to the explanation below. Similarly, other firmwares can also perform security checks on their respective next-level firmware according to the above logic, which will not be repeated here.

[0070] Exemplarily, the trusted root unit 103 is respectively connected to the general processor 101 and the memory 102 through a first interface, and is connected to the control logic module 104 through a second interface, and is used to perform a security check on the first-level firmware according to the first image file of the first-level firmware, and when the security check result of the first-level firmware is passed, a control signal indicating that the first-level firmware has passed the check is sent to the control logic module 104. The first interface may be an SPI interface, and the second interface may be a control interface.

[0071] Furthermore, the trusted root unit 103 may specifically include a trusted root logic module and a trusted root storage module. The trusted root logic module may be implemented by a secure MCU or CPLD, may realize the management and control of the external general processor 101, may communicate with the trusted root storage module, and in combination with the memory 102, read and perform integrity verification on the first-level firmware that needs to be verified. For example, the SPI bus connecting the memory 102 and the general processor 101 may not pass through the trusted root logic module, or may pass through the trusted root logic module (indicating that when the memory 102 and the firmware in the general processor 101 are transmitting data, it needs to be forwarded through the trusted root logic module).

[0072] When the first-level firmware is security-checked, the first-level firmware may be security-checked according to the first image file of the first-level firmware. When the security check result of the first-level firmware is passed, a control signal indicating that the first-level firmware has passed the security check may be sent to the control logic module 104, so that the control logic module starts the first-level firmware according to the control signal. The specific process is as follows: Figure 2 As shown, a flowchart of performing security verification on the first-level firmware provided by an embodiment of the present application is exemplified.

[0073] 201: The trusted root logic module obtains a first image file of the first-level firmware from a memory, and calculates a first digest value of the first image file.

[0074] When the device runs each firmware, it will be divided into two partitions, one partition as the primary partition and the other partition as the backup partition, so that when a problem is found in the primary partition, it can be switched to the backup partition for verification. In view of this, the first image file can be the image file of the first-level firmware in the first partition (primary partition).

[0075] The memory may specifically be Figure 1 In the memory 102 shown, the trusted root logic module obtains the first image file of the first-level firmware from the memory 102 through the SPI interface, and calculates a first digest value of the first image file.

[0076] 202: The trusted root logic module reads the first signature value information encrypted in the first image file, and obtains the first trusted root from the trusted root storage module.

[0077] 203: The trusted root logic module uses the first trusted root to decrypt the encrypted first signature value information to obtain a second summary value of the first-level firmware.

[0078] 204: The trusted root logic module performs a security check on the first-level firmware according to the first digest value and the second digest value.

[0079] In this step, a security check is performed on the first-level firmware, specifically: if the first summary value is consistent with the second summary value, it indicates that the security check result of the first-level firmware is passed, and a control signal indicating that the first-level firmware of the first partition has passed the check can be sent to the control logic module 104; if the first summary value is consistent with the second summary value, it indicates that the security check result of the first-level firmware is failed, and the security check can be switched to the second partition.

[0080] Exemplarily, switching to the second partition for security verification may be specifically as follows: the trusted root logic module obtains the second image file of the first-level firmware from the memory 102, and calculates the third digest value of the second image file; wherein the second image file is the image file of the first-level firmware in the second partition; reads the second signature value information encrypted in the second image file, and obtains the second trusted root from the trusted root storage module; uses the second trusted root to decrypt the encrypted second signature value information, and decrypts to obtain the fourth digest value of the first-level firmware; performs security verification on the first-level firmware according to the third digest value and the fourth digest value, and if the verification passes, sends a control signal indicating that the first-level firmware of the second partition has passed the verification to the control logic module 104; if the verification fails, it indicates that the first-level firmware has been tampered with, and the first-level firmware of the general processor is stopped from starting.

[0081] Based on the above Figure 2 The method shown solves the problems of root public key storage and certificate security storage of startup measurement because the trusted root unit is constructed with a security chip and the trusted root storage module in the trusted root unit. It has hardware-level security and cannot be physically detected by the outside world. It controls the first-level firmware startup in the general processor in combination with the control logic module to ensure the security of the startup. At the same time, it eliminates the verification process of the public key and effectively improves the startup efficiency.

[0082] It should be noted that the summary value calculation involving each firmware can use the national secret hash algorithm, or the secure hash algorithm (English: Security Hash Algorithm, abbreviation: SHA) algorithm, or the asymmetric encryption algorithm (English: RSA algorithm, abbreviation: RSA), etc., which are not limited in the embodiments of the present application.

[0083] Exemplarily, the control logic module 104 is connected to the general processor 101 through the second interface, and is used to start the first level firmware of the general processor 101 according to the control signal when receiving the control signal sent by the trusted root unit 103 to pass the verification. The control logic module 104 can be constructed by FPGA or CPLD.

[0084] Exemplarily, the trusted key management module 105 is connected to the general processor 101 (can be connected using an SPI interface), and is used to read the multiple firmwares according to the startup order of the multiple firmwares after the multiple firmwares of the general processor 101 are all started, and calculate the measurement values ​​of each of the multiple firmwares; and perform security verification on the multiple firmwares according to their respective measurement values ​​and the root public key information stored in itself. The trusted key management module 105 can be a trusted platform module (English: Trusted Platform Module, abbreviated: TPM) hardware security chip or a trusted cryptographic module (English: Trusted Cryptography Module, abbreviated: TCM) hardware security chip, and its purpose is: after the OS stage is started, it prevents the software of the device from being tampered with during operation, and further improves the security of device startup.

[0085] Based on the above Figure 1 The system shown, Figure 3 The following is an example of a complete interactive diagram of secure boot provided by an embodiment of the present application. Taking the x86 architecture as an example, according to the hierarchical relationship, the firmware may include BIOS firmware, GRUB firmware, RBOOT firmware, kernel firmware, initrd firmware, and OS firmware in sequence. Figure 3 As shown, the following steps are included:

[0086] 301: The trusted root logic module obtains the image file B of the BIOS firmware from the memory.

[0087] The trusted root logic module can specifically be Figure 1 The trusted root logic module shown in the figure can be Figure 1 The memory 102 is shown.

[0088] 302: The trusted root logic module calculates the digest value y1 of the image file B, reads the encrypted signature value information B in the image file B, and obtains ROT1 from the trusted root storage module.

[0089] 303: The root of trust logic module uses ROT1 to decrypt the encrypted signature value information B, and decrypts to obtain the summary value y2 of the BIOS firmware.

[0090] 304: If the digest value y1 is consistent with the digest value y2, the trusted root logic module sends a control signal indicating that the BIOS firmware verification has passed to the control logic module.

[0091] The control logic module can specifically be Figure 1 The control logic module 104 is shown.

[0092] 305: After receiving the control signal, the control logic module starts the BIOS firmware in the general processor.

[0093] 306: The BIOS firmware obtains the image file G of the GRUB firmware from the memory, calculates the digest value y3 of the image file G, and reads the encrypted signature value information G in the image file G.

[0094] 307: The BIOS firmware uses the hard-coded ROT2 of the BIOS to decrypt and verify the encrypted signature value information G, and obtains the digest value y4 of the GRUB firmware.

[0095] 308: If the digest value y3 is consistent with the digest value y4, the BIOS firmware guides the GRUB firmware to start.

[0096] 309: The GRUB firmware obtains the image file R of the RBOOT firmware from the memory, calculates the digest value y5 of the image file R, and reads the encrypted signature value information R in the image file R.

[0097] 310: The GRUB firmware uses the GRUB hard-coded ROT3 to decrypt and verify the encrypted signature value information R, and obtains the summary value y6 of the RBOOT firmware.

[0098] 311: If the digest value y5 is consistent with the digest value y6, the GRUB firmware guides the RBOOT firmware to start.

[0099] 312: The RBOOT firmware obtains the image file K of the kernel firmware and the image file I of the intitrd firmware from the memory, calculates the digest value y7 of the image file K and the digest value 8 of the image file I, and reads the encrypted signature value information K in the image file K and the encrypted signature value information I in the image file I.

[0100] 313: The RBOOT firmware uses RBOOT hard-coded ROT4 to decrypt and verify the encrypted signature value information K, and ROT5 to decrypt and verify the encrypted signature value information, and obtains the digest value y9 of the kernel firmware and the digest value y10 of the intitrd firmware respectively.

[0101] 314: If the digest value y7 is consistent with the digest value y9, and the digest value y8 is consistent with the digest value y10, the RBOOT firmware guides the kernel firmware to start, and the kernel firmware guides the intitrd firmware to start.

[0102] 315: the initrd firmware obtains the image file O of the OS firmware from the memory, calculates the digest value y11 of the image file O, and reads the encrypted signature value information O in the image file O.

[0103] 316: the initrd firmware uses the hard-coded ROT6 of initrd to decrypt and verify the encrypted signature value information O, and obtains the digest value y12 of the OS firmware.

[0104] 317: If the digest value y11 is consistent with the digest value y12, the intitrd firmware guides the OS firmware to start.

[0105] 318: The trusted key management module reads the BIOS firmware, GRUB firmware, RBOOT firmware, kernel firmware, initrd firmware, and OS firmware in sequence, and calculates respective metric values ​​of the BIOS firmware, GRUB firmware, RBOOT firmware, kernel firmware, initrd firmware, and OS firmware.

[0106] 319: The trusted key management module performs security verification on the multiple firmwares according to the respective measurement values ​​and the root public key information stored in the module, and performs security verification on the BIOS firmware, GRUB firmware, RBOOT firmware, kernel firmware, initrd firmware, and OS firmware.

[0107] Taking BIOS firmware as an example, the metric value corresponding to the BIOS firmware is securely signed with the root public key corresponding to the BIOS. If the metric value matches the root public key, it means that the BIOS firmware has not been tampered with and the verification has passed. Similarly, the verification of other firmware is similar and will not be repeated here.

[0108] 320: If the BIOS firmware, GRUB firmware, RBOOT firmware, kernel firmware, initrd firmware, and OS firmware are all verified and passed, this process ends.

[0109] Based on the same technical concept, an electronic device is also provided in an embodiment of the present application, and the electronic device can realize the functions of the aforementioned secure startup system.

[0110] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application.

[0111] At least one processor 401, and a memory 402 connected to the at least one processor 401. The specific connection medium between the processor 401 and the memory 402 is not limited in the embodiment of the present application. Figure 4 In the example, the processor 401 and the memory 402 are connected via the bus 400. The bus 400 is Figure 4 The connection between other components is shown by bold lines, and is not intended to be limiting. The bus 400 can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one thick line is used in the figure, but it does not mean that there is only one bus or one type of bus. Alternatively, the processor 401 can also be called a controller, and there is no limitation on the name.

[0112] In the embodiment of the present application, the memory 402 stores instructions that can be executed by at least one processor 401. The at least one processor 401 can execute a secure boot method discussed above by executing the instructions stored in the memory 402. The processor 401 can implement Figure 1 The functions of each module in the system are shown.

[0113] Among them, the processor 401 is the control center of the device, and can use various interfaces and lines to connect the various parts of the entire control device. By running or executing instructions stored in the memory 402 and calling the data stored in the memory 402, the various functions of the system and processing data, the system can be monitored as a whole.

[0114] In one possible design, the processor 401 may include one or more processing units, and the processor 401 may integrate an application processor and a modem processor, wherein the application processor mainly processes an operating system, a user interface, and application programs, and the modem processor mainly processes wireless communications. It is understandable that the modem processor may not be integrated into the processor 401. In some embodiments, the processor 401 and the memory 402 may be implemented on the same chip, and in some embodiments, they may also be implemented separately on separate chips.

[0115] Processor 401 can be a general-purpose processor, such as a central processing unit (CPU), a digital signal processor, an application-specific integrated circuit, a field programmable gate array or other programmable logic device, a discrete gate or transistor logic device, a discrete hardware component, and can implement or execute the various methods, steps and logic block diagrams disclosed in the embodiments of the present application. A general-purpose processor can be a microprocessor or any conventional processor, etc. The steps of a secure boot method disclosed in the embodiments of the present application can be directly embodied as a hardware processor execution, or a combination of hardware and software modules in the processor.

[0116] The memory 402 is a non-volatile computer-readable storage medium that can be used to store non-volatile software programs, non-volatile computer executable programs and modules. The memory 402 may include at least one type of storage medium, such as a flash memory, a hard disk, a multimedia card, a card-type memory, a random access memory (Random Access Memory, RAM), a static random access memory (Static Random Access Memory, SRAM), a programmable read-only memory (Programmable Read Only Memory, PROM), a read-only memory (Read Only Memory, ROM), an electrically erasable programmable read-only memory (Electrically Erasable Programmable Read-Only Memory, EEPROM), a magnetic memory, a disk, an optical disk, etc. The memory 402 is any other medium that can be used to carry or store a desired program code in the form of an instruction or data structure and can be accessed by a computer, but is not limited thereto. The memory 402 in the embodiment of the present application can also be a circuit or any other device that can realize a storage function, for storing program instructions and / or data.

[0117] By programming the processor 401, the code corresponding to the secure boot method described in the above embodiment can be fixed into the chip, so that the chip can execute the secure boot method when running. Figure 2The embodiment shown is a secure boot method. How to design and program the processor 401 is a technique known to those skilled in the art and will not be described in detail here.

[0118] It should be noted here that the above-mentioned electronic device provided in the embodiment of the present application can implement all the method steps implemented in the above-mentioned method embodiment, and can achieve the same technical effect. The parts and beneficial effects of this embodiment that are the same as the method embodiment will not be described in detail here.

[0119] An embodiment of the present application also provides a computer-readable storage medium, which stores computer-executable instructions, and the computer-executable instructions are used to enable a computer to execute a secure startup method in the above embodiment.

[0120] An embodiment of the present application also provides a computer program product, which, when called by a computer, enables the computer to execute a secure boot method in the above embodiment.

[0121] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that include computer-usable program code.

[0122] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0123] These computer program instructions may also be stored in a computer-readable memory capable of directing a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture comprising an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1A function specified in one or more boxes.

[0124] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

Claims

1. A secure boot system, characterized in that: include: A general processor, a control logic module, a trusted root unit, and a memory, wherein the general processor includes a plurality of firmwares to be started, and a hierarchical relationship exists between each firmware; The memory is used to store the image files corresponding to the multiple firmwares respectively, so that after the first-level firmware belonging to the first level among the multiple firmwares of the general-purpose processor is started, each firmware among the multiple firmwares obtains the image file of the respective next-level firmware according to the hierarchical relationship, and performs security verification on the respective next-level firmware; The trusted root unit is connected to the general processor and the memory through a first interface, and is connected to the control logic module through a second interface, and is used to perform a security check on the first-level firmware according to the first image file of the first-level firmware, and when the security check result of the first-level firmware is passed, send a control signal that the first-level firmware has passed the check to the control logic module; The control logic module is connected to the general processor through the second interface, and is used to start the first level firmware of the general processor according to the control signal.

2. The system according to claim 1, characterized in that The trusted root unit includes a trusted root logic module and a trusted root storage module; The trusted root logic module is used to obtain a first image file of the first-level firmware from the memory and calculate a first digest value of the first image file; wherein the first image file is an image file of the first-level firmware in the first partition; Read the first signature value information encrypted in the first image file, and obtain the first trusted root from the trusted root storage module; Decrypt the encrypted first signature value information using the first trusted root to obtain a second summary value of the first-level firmware; A security check is performed on the first level firmware according to the first digest value and the second digest value.

3. The system according to claim 2, characterized in that The trusted root logic module is also used for: When the security check result of the first-level firmware fails, obtaining a second image file of the first-level firmware from the memory, and calculating a third digest value of the second image file; wherein the second image file is an image file of the first-level firmware in the second partition; Read the second signature value information encrypted in the second image file, and obtain the second trusted root from the trusted root storage module; Decrypt the encrypted second signature value information using the second trusted root to obtain a fourth summary value of the first-level firmware; A security check is performed on the first-level firmware according to the third digest value and the fourth digest value.

4. The system according to claim 1, characterized in that The system also includes a trusted key management module; The trusted key management module is connected to the general processor, and is used to read the multiple firmwares according to the startup sequence of the multiple firmwares after the multiple firmwares of the general processor are all started, and calculate the measurement value of each of the multiple firmwares; The plurality of firmwares are security-verified according to the respective measurement values ​​and the root public key information stored in the plurality of firmwares.

5. The system according to claim 1, wherein: The first interface is a serial peripheral interface SPI interface, and the second interface is a control interface.

6. The system according to claim 1, characterized in that The control logic module is a field programmable gate array device FPGA or a complex programmable logic device CPLD.

7. The system according to claim 1, characterized in that The first level firmware is the input / output system BIOS firmware or the universal boot loader UBoot firmware.

8. A secure boot method, characterized in that: Applied to the system described in any one of 1-7, the method comprises: According to a first image file of the first-level firmware, a security check is performed on the first-level firmware; wherein the first-level firmware is the first level of a plurality of firmwares, and the first-level image file is obtained from a memory storing image files corresponding to the plurality of firmwares; When the security check result of the first-level firmware is passed, a control signal indicating that the first-level firmware has passed the check is sent to the control logic module, so that the control logic module starts the first-level firmware according to the control signal.

9. An electronic device, characterized in that: include: Memory, used to store computer programs; The processor is used to implement the method steps described in claim 8 when executing the computer program stored in the memory.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method steps of claim 8 are implemented.

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