A method for generating an alignment image and a chip alignment method

By adding environmental graphics to the alignment image to make it more in line with the actual situation of the chip, the identification error and measurement instability caused by the difference between the alignment image and the actual situation in the prior art are solved, and the success rate of chip alignment is improved.

CN119722871BActive Publication Date: 2025-05-16RONGXIN SEMICONDUCTOR (NINGBO) CO LTD
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Patent Information

Application Number
CN202510215224.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-02-26
Publication Date
2025-05-16
Estimated Expiration
2045-02-26

AI Technical Summary

Technical Problem

In the prior art, the alignment images used by measurement software to compare only include graphics of alignment marks, which are very different from the actual situation, resulting in errors and limitations in the identification of alignment marks and unstable measurements.

Method used

By drawing the alignment mark graphics in the drawing software and obtaining a reference image that reflects the actual situation of the target chip, adding an environment graphics around the alignment mark graphics to generate an alignment image to make it more in line with the actual situation of the chip.

Benefits of technology

The accuracy of alignment image recognition is improved, thereby improving the success rate of chip alignment and ensuring accurate positioning of measurement targets.

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Abstract

A method for generating an alignment image and a chip alignment method, the method comprising: drawing an alignment mark graphic in drawing software; obtaining a reference image reflecting the actual situation of a target chip; adding an environmental graphic around the alignment mark graphic according to the reference image; generating an alignment image according to the alignment mark graphic and the environmental graphic, the alignment image being used to align the target chip. The invention adds an environmental graphic to the alignment image, so that the alignment image is more consistent with the actual situation of the chip, and can improve the accuracy of alignment image recognition.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a method for generating an alignment image and a chip alignment method. Background Art

[0002] In the field of semiconductor technology, critical dimension (CD) is the minimum dimension that can be processed in the chip manufacturing process line, and is also an important technical indicator that characterizes the level of integrated circuit design and manufacturing. By measuring and monitoring CD, accurate control of all critical dimensions of the product can be achieved to ensure that the product process parameters meet the design requirements. When measuring CD, firstly, the rough alignment before measurement is performed by identifying the measurement alignment mark. After the rough alignment is successful, the target to be measured is further searched for fine alignment. Therefore, the successful identification of the rough alignment mark is the prerequisite for successful CD measurement. If the alignment mark identification is inaccurate or fails, it will directly lead to the failure of subsequent target measurement.

[0003] When performing CD measurement, the alignment image used for comparison in the measurement software only includes the graphics of the alignment mark, which is different from the actual situation. This causes certain errors and limitations in the measurement software's recognition of the alignment mark of the measurement target, resulting in measurement instability. Summary of the invention

[0004] A series of simplified concepts are introduced in the Summary of the Invention, which will be further described in detail in the Detailed Description of the Invention. The Summary of the Invention does not mean to attempt to define the key features and essential technical features of the claimed technical solution, nor does it mean to attempt to determine the scope of protection of the claimed technical solution.

[0005] In view of the existing problems, an embodiment of the present invention provides a method for generating an alignment image, comprising:

[0006] Draw the alignment mark graphics in the drawing software;

[0007] Acquire a reference image reflecting the actual situation of the target chip;

[0008] adding an environmental graphic around the alignment mark graphic according to the reference image;

[0009] An alignment image is generated according to the alignment mark pattern and the environment pattern, and the alignment image is used to align the target chip.

[0010] In one embodiment, adding an environmental graphic around the alignment mark graphic according to the reference image comprises:

[0011] drawing an environmental graphic on the alignment mark graphic;

[0012] The alignment mark pattern is cut out from the environment pattern to obtain a first fused pattern.

[0013] In one embodiment, after obtaining the first fused graph, the method further includes:

[0014] An inversion operation is performed on the first fused graph to obtain a second fused graph.

[0015] In one embodiment, after obtaining the first fused graph, the method further includes:

[0016] The first fused graphic is intercepted to obtain a fused graphic of a preset size, and the generating of an alignment image according to the alignment mark graphic and the environment graphic includes generating an alignment image of a preset size according to the fused graphic of the preset size.

[0017] In one embodiment, the method further comprises:

[0018] Grayscale processing is performed on the alignment image to reduce the grayscale of a dark portion in the alignment image and / or to increase the grayscale of a bright portion in the alignment image.

[0019] In one embodiment, the grayscale processing of the alignment image includes:

[0020] Performing grayscale processing of different levels on the alignment image to obtain at least two grayscale alignment images;

[0021] Comparing the at least two grayscale alignment images with the reference image to obtain a similarity between each of the grayscale alignment images and the reference image;

[0022] The grayscale alignment image with the highest similarity is selected for aligning the target chip.

[0023] A second aspect of an embodiment of the present invention provides a chip alignment method, the method comprising:

[0024] Acquire an alignment image, wherein the alignment image is generated based on the above-mentioned alignment image generation method, and the alignment image includes an alignment mark pattern and an environment pattern located around the alignment mark;

[0025] The target chip is aligned based on the alignment image.

[0026] In one embodiment, the alignment image is a grayscale image.

[0027] In one embodiment, the method further comprises:

[0028] acquiring at least two alignment images having different gray levels;

[0029] Acquire a reference image reflecting the actual situation of the target chip;

[0030] Comparing the at least two alignment images with the reference image to obtain a similarity between each of the alignment images and the reference image;

[0031] The alignment image with the highest similarity is selected for aligning the target chip.

[0032] In one embodiment, the method further comprises:

[0033] Key dimension measurement is performed based on the aligned target chip.

[0034] According to the alignment image generation method and chip alignment method provided by the present invention, environmental graphics are added to the alignment image to make the alignment image more consistent with the actual situation of the chip, which can improve the accuracy of alignment image recognition and thus improve the success rate of chip alignment. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] The following drawings of the present invention are used to understand the present invention as part of the present invention. The embodiments of the present invention are shown in the drawings and the description thereof is used to explain the principle of the present invention.

[0036] Figure 1 A schematic flow chart showing a method for generating an alignment image according to a specific embodiment of the present invention;

[0037] Figures 2A to 2G A schematic diagram showing adding an environmental graphic to an alignment image according to an embodiment of the present invention is shown;

[0038] FIG. 3A to FIG. 3E A schematic diagram showing grayscale processing of an alignment image according to an embodiment of the present invention is shown;

[0039] Figure 3F A schematic diagram showing a reference image according to an embodiment of the present invention;

[0040] Figure 4 A schematic flow chart of a chip alignment method according to a specific embodiment of the present invention is shown. DETAILED DESCRIPTION

[0041] In the following description, a large number of specific details are provided to provide a more thorough understanding of the present invention. However, it is apparent to those skilled in the art that the present invention can be implemented without one or more of these details. In other examples, in order to avoid confusion with the present invention, some technical features well known in the art are not described.

[0042] It should be understood that the present invention can be implemented in different forms and should not be construed as being limited to the embodiments presented herein. On the contrary, providing these embodiments will make the disclosure thorough and complete and fully convey the scope of the present invention to those skilled in the art. In the accompanying drawings, the sizes and relative sizes of layers and regions may be exaggerated for clarity. The same reference numerals throughout represent the same elements.

[0043] It should be understood that when an element or layer is referred to as being "on, adjacent to, connected to or coupled to other elements or layers, it may be directly on, adjacent to, connected to or coupled to other elements or layers, or there may be intervening elements or layers. In contrast, when an element is referred to as being "directly on, directly adjacent to, directly connected to or directly coupled to other elements or layers, there may be no intervening elements or layers. It should be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below may be represented as a second element, component, region, layer or part.

[0044] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.

[0045] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present invention. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.

[0046] In order to fully understand the present invention, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed by the present invention. The preferred embodiments of the present invention are described in detail below, but in addition to these detailed descriptions, the present invention may also have other implementations.

[0047] Figure 1 A flowchart of the steps of a method for generating an alignment image according to an embodiment of the present invention is shown. Figure 1 A method for generating an alignment image according to an embodiment of the present invention is described in detail.

[0048] like Figure 1 As shown, the method 100 for generating an alignment image according to an embodiment of the present invention includes the following steps:

[0049] In step S110, an alignment mark pattern is drawn in drawing software;

[0050] In step S120, a reference image reflecting the actual situation of the target chip is obtained;

[0051] In step S130, an environmental graphic is added around the alignment mark graphic according to the reference image;

[0052] In step S140, an alignment image is generated according to the alignment mark pattern and the environment pattern, and the alignment image is used to align the target chip.

[0053] The method 100 for generating an alignment image according to an embodiment of the present invention adds an environmental graphic to the alignment image, so that the alignment image is more consistent with the actual situation of the chip, and can improve the accuracy of alignment image recognition, thereby improving the success rate of chip alignment.

[0054] Specifically, in step S110, a suitable open source drawing software may be selected to draw the alignment mark graphic. Since the alignment image needs to be imported into the alignment software to align the target chip later, a drawing software that can generate a file format supported by the alignment software may be selected to draw the alignment image. Exemplarily, the alignment mark graphic may be drawn in a CAD file.

[0055] like Figure 2A and Figure 2B As shown, first draw an alignment mark pattern 201, which is a pattern corresponding to the alignment mark on the chip. The alignment mark is a pattern with a significant shape difference between the chip surface and the surrounding environment and a significant boundary. Figure 2A and Figure 2B In the example of FIG. 2 , the alignment mark pattern 201 is in a cross shape. The alignment mark pattern 201 may also be in other iconic shapes.

[0056] Exemplarily, the size data of the alignment mark may be acquired from the design layout, and the alignment mark pattern 201 may be drawn according to the size data of the alignment mark.

[0057] Next, an environmental pattern 202 is added around the alignment mark pattern 201 .

[0058] First, step S120 is performed to obtain a reference image reflecting the actual situation of the target chip. The reference image can be Figure 3F The real shot image shown. Compared with the design layout, the real shot image can reflect the grayscale of the target chip, which is conducive to serving as a reference for subsequent grayscale processing. Optionally, the design layout can also be selected as the reference image. Preferably, the alignment mark pattern is located at the center of the real shot image.

[0059] Next, step S130 is executed to add an environment graphic 202 around the alignment mark graphic 201 according to the reference image.

[0060] The environment graphic 202 is used to depict the environment around the alignment mark on the target chip, that is, to depict a top view of the device structure around the alignment mark. For example, the environment graphic 202 can be drawn according to the performance of the real shot image, and the size of the environment graphic can be obtained according to the design layout.

[0061] For example, Figure 2C As shown, firstly, the environment pattern 202 is drawn on the alignment mark pattern 201 , and at this time, the environment pattern 202 is superimposed on the alignment mark pattern 201 .

[0062] Then, if Figure 2D As shown, the alignment mark pattern 201 is subtracted from the environment pattern 202. Specifically, a Boolean operation may be performed on the environment pattern 202 and the alignment mark pattern 201, thereby merging the environment pattern 202 and the alignment mark pattern 201 and obtaining a first fused pattern.

[0063] After obtaining the first fused graph, Figure 2EAs shown, the first fused graph is subjected to an inversion operation to obtain a second fused graph. After the inversion operation, the blank area in the image becomes the graph area, and the graph area becomes the blank area. Since the alignment mark graph has been cut out from the environment graph in the previous step, the alignment mark can be highlighted after the inversion operation.

[0064] Practice has shown that the drawing method of first performing a clipping operation and then performing an inversion operation can improve the accuracy of graphics drawing.

[0065] like Figure 2F As shown, after performing the inversion operation, the second fused graph may be intercepted to obtain a fused graph of a preset size. Optionally, the first fused graph may be intercepted before performing the inversion operation, and the intercepted fused graph may be inverted.

[0066] Then, if Figure 2G As shown, an alignment image is generated according to the fused graph. Specifically, the fused graph can be converted into a CAD file that can be recognized by the alignment software.

[0067] Figure 2G The alignment image shown is a black and white image, while Figure 3F As shown, the actual image on the target chip is a grayscale image. In order to improve the similarity between the alignment image and the actual image, the alignment image can be grayscale processed, that is, the grayscale of the dark part in the alignment image is reduced, and / or the grayscale of the bright part in the alignment image is increased. Before the grayscale processing, the value of each pixel in the alignment image is 0 or 255. After the grayscale processing, the grayscale value of each pixel in the alignment image is between 0 and 255.

[0068] In some embodiments, the alignment image may be gray-scale processed according to the reference image, so that the processed alignment image is more consistent with the actual situation of the target chip.

[0069] Exemplarily, the alignment image can also be processed at different levels of grayscale to obtain at least two grayscale alignment images; the at least two grayscale alignment images are compared with the reference image to obtain the similarity between each grayscale alignment image and the reference image; and the grayscale alignment image with the highest similarity is selected for aligning the target chip.

[0070] like FIG. 3A to FIG. 3F As shown, FIG. 3A to FIG. 3E Grayscale alignment images for different gray levels, Figure 3F is the actual benchmark image. Figure 3E The grayscale alignment image shown is Figure 3F The reference image shown is closest, so Figure 3E The grayscale alignment image shown is used as the final alignment image for comparison.

[0071] In practical applications, the alignment image with environmental graphics added and grayscale processing is imported into the alignment software for alignment with the real image of the target chip to obtain the similarity score (0-100%) between the alignment image and the real image. The similarity threshold of the similarity score is set in the alignment software. If it is lower than the similarity threshold, it is considered that the comparison is inconsistent and the alignment fails. If it is higher than the similarity threshold, it is considered that the comparison passes.

[0072] Since the alignment image of the embodiment of the present invention is closer to the actual image, the similarity threshold can be increased, which can ensure the successful recognition of the alignment mark and avoid misrecognition of other graphics to cause alignment deviation, resulting in the measurement target deviation and inability to be positioned for measurement.

[0073] In contrast, if an alignment image without environmental graphics added and grayscale processing is used, the similarity threshold needs to be lowered to ensure successful recognition of the alignment mark, due to the large difference between the alignment image and the actual image, which may easily cause misrecognition of other graphics.

[0074] In summary, the alignment image generation method 100 of the embodiment of the present invention adds environmental graphics to the alignment image and performs grayscale processing on the alignment image, so that the alignment image is more consistent with the actual situation of the chip, which can improve the accuracy of alignment image recognition and thereby improve the success rate of chip alignment.

[0075] Another aspect of the present invention provides a chip alignment method, such as Figure 4 As shown, the chip alignment method 400 includes:

[0076] In step S410, an alignment image is acquired, wherein the alignment image includes an alignment mark pattern and an environment pattern located around the alignment mark;

[0077] In step S420, the target chip is aligned based on the alignment image.

[0078] The alignment image may be an alignment image generated based on the above method, wherein an environmental graphic is added to make the alignment image more consistent with the actual situation of the target chip.

[0079] Furthermore, the alignment image may also be a grayscale image after grayscale processing, that is, the grayscale value of each pixel in the alignment image is between 0 and 255.

[0080] In some embodiments, at least two alignment images with different grayscale levels can be obtained; a reference image reflecting the actual situation of the target chip can be obtained; at least two alignment images are compared with the reference image to obtain the similarity between each alignment image and the reference image; and the alignment image with the highest similarity is selected for aligning the target chip.

[0081] Specifically, aligning the target chip according to the alignment image includes: identifying an area in the target chip whose similarity with the alignment image is greater than a similarity threshold. Afterwards, key dimension measurement can be performed based on the aligned target chip. Since the alignment mark used in the embodiment of the present invention is more in line with the actual situation, the similarity threshold can be increased to avoid misidentification. It should be noted that the alignment image and recognition method of the embodiment of the present invention can be used for alignment in the key dimension measurement process, and can also be used for alignment in the lithography process.

[0082] The alignment image used by the chip alignment method 400 of the embodiment of the present invention has an environmental pattern, and the alignment image is more consistent with the actual situation of the chip, which can improve the accuracy of alignment image recognition and further improve the success rate of chip alignment.

[0083] Although example embodiments have been described herein with reference to the accompanying drawings, it should be understood that the above example embodiments are merely exemplary and are not intended to limit the scope of the present invention thereto. Various changes and modifications may be made therein by one of ordinary skill in the art without departing from the scope and spirit of the present invention. All such changes and modifications are intended to be included within the scope of the present invention as required by the appended claims.

[0084] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0085] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of the units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed.

[0086] Similarly, it should be understood that in order to streamline the present invention and help understand one or more of the various inventive aspects, in the description of the exemplary embodiments of the present invention, the various features of the present invention are sometimes grouped together into a single embodiment, figure, or description thereof. However, the method of the present invention should not be interpreted as reflecting the following intention: the claimed invention requires more features than the features explicitly stated in each claim. More specifically, as reflected in the corresponding claims, the inventive point is that the corresponding technical problem can be solved with less than all the features of a single disclosed embodiment. Therefore, the claims following the specific embodiment are hereby expressly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present invention.

[0087] Those skilled in the art will understand that, except for mutually exclusive features, all features disclosed in this specification (including the accompanying claims, abstract and drawings) and all processes or units of any method or device disclosed in this specification may be combined in any combination. Unless otherwise explicitly stated, each feature disclosed in this specification (including the accompanying claims, abstract and drawings) may be replaced by an alternative feature that provides the same, equivalent or similar purpose.

[0088] The various component embodiments of the present invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. It should be understood by those skilled in the art that a microprocessor or other suitable processor may be used in practice to implement some or all of the functions of some modules according to embodiments of the present invention. The present invention may also be implemented as a device program (e.g., a computer program and a computer program product) for executing part or all of the methods described herein. Such a program implementing the present invention may be stored on a computer-readable medium, or may have the form of one or more signals. Such a signal may be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0089] The above is only a specific embodiment of the present invention or an explanation of a specific embodiment. The protection scope of the present invention is not limited thereto. Any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed by the present invention, which should be included in the protection scope of the present invention. The protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for generating an alignment image, characterized in that: The method comprises: Draw the alignment mark graphics in the drawing software; Acquire a reference image reflecting the actual situation of the target chip; adding an environmental graphic around the alignment mark graphic according to the reference image; Generate an alignment image according to the alignment mark pattern and the environment pattern, wherein the alignment image is used to align the target chip; The adding of an environmental graphic around the alignment mark graphic according to the reference image comprises: drawing an environmental graphic on the alignment mark graphic; Cutting the alignment mark graphic from the environment graphic to obtain a first fused graphic; Performing interception and inversion operations on the first fused graph to obtain a fused graph of a preset size; The generating of the alignment image according to the alignment mark graphic and the environment graphic includes generating an alignment image of a preset size according to the fused graphic of the preset size.

2. The method for generating an alignment image according to claim 1, wherein: The method further comprises: Grayscale processing is performed on the alignment image to reduce the grayscale of a dark portion in the alignment image and / or to increase the grayscale of a bright portion in the alignment image.

3. The method for generating an alignment image according to claim 2, wherein: The grayscale processing of the aligned image comprises: Performing grayscale processing of different levels on the alignment image to obtain at least two grayscale alignment images; Comparing the at least two grayscale alignment images with the reference image to obtain a similarity between each of the grayscale alignment images and the reference image; The grayscale alignment image with the highest similarity is selected for aligning the target chip.

4. A chip alignment method, characterized in that: The method comprises: Acquire an alignment image, wherein the alignment image is generated based on the method according to any one of claims 1 to 3, and the alignment image includes an alignment mark pattern and an environment pattern located around the alignment mark; The target chip is aligned based on the alignment image.

5. The chip alignment method according to claim 4, characterized in that: The alignment image is a grayscale image.

6. The chip alignment method according to claim 5, characterized in that: The method further comprises: acquiring at least two alignment images having different gray levels; Acquire a reference image reflecting the actual situation of the target chip; Comparing the at least two alignment images with the reference image to obtain a similarity between each of the alignment images and the reference image; The alignment image with the highest similarity is selected for aligning the target chip.

7. The chip alignment method according to claim 4, characterized in that: The method further comprises: Key dimension measurement is performed based on the aligned target chip.

Citation Information

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