Pixel circuit, driving method of pixel circuit, display panel and display device

Abstract

The invention discloses a pixel circuit, a driving method of the pixel circuit, a display panel and a display device, and belongs to the technical field of display. The grid reset module is connected with the control end of the driving module; in the first reset stage, the gate reset module transmits a first reset voltage to the control end of the driving module, and in the second reset stage, the gate reset module transmits a second reset voltage to the control end of the driving module; wherein in the same frame, the first reset stage is before the second reset stage, and the first reset voltage is smaller than the second reset voltage. According to the embodiment of the invention, the problem of threshold voltage drift caused by different voltage bias conditions of the control end of the driving module in the use process of the display panel can be solved, and the display effect is improved.

Description

Technical Field

[0001] The present application belongs to the field of display technology, and in particular relates to a pixel circuit, a driving method of a pixel circuit, a display panel, and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) and flat display devices based on technologies such as Light Emitting Diode (LED) have been widely used in various consumer electronic products such as mobile phones, televisions, laptops, desktop computers, etc. due to their advantages of high image quality, power saving, thin body and wide application range, becoming the mainstream of display devices. However, the display performance of current OLED display products needs to be improved. Summary of the invention

[0003] The embodiments of the present application provide a pixel circuit, a driving method for the pixel circuit, a display panel and a display device, which can solve the threshold voltage drift problem caused by different voltage bias conditions of the driving transistor during use of the display panel and improve the display effect.

[0004] In a first aspect, an embodiment of the present application provides a pixel circuit, including:

[0005] Driver module;

[0006] A gate reset module, the gate reset module is connected to the control end of the driving module;

[0007] In the first reset stage, the gate reset module transmits a first reset voltage to the control end of the driving module, and in the second reset stage, the gate reset module transmits a second reset voltage to the control end of the driving module;

[0008] In the same frame, the first reset stage is before the second reset stage, and the first reset voltage is less than the second reset voltage.

[0009] According to any of the aforementioned implementations of the first aspect of the present application, the first reset stage and the second reset stage do not overlap.

[0010] According to any of the aforementioned embodiments of the first aspect of the present application, the first end of the gate reset module is connected to the control end of the driving module, the second end of the gate reset module is connected to the initialization signal line, the control end of the gate reset module is connected to the first scanning signal line, in the first reset stage, the initialization signal line is used to transmit the first reset voltage, and in the second reset stage, the initialization signal line is used to transmit the second reset voltage.

[0011] According to any of the aforementioned embodiments of the first aspect of the present application, the gate reset module includes a first transistor, the first electrode of the first transistor is connected to the control end of the driving module, the second electrode of the first transistor is connected to the initialization signal line, and the gate of the first transistor is connected to the first scanning signal line.

[0012] According to any of the aforementioned embodiments of the first aspect of the present application, the first transistor is a dual-gate transistor.

[0013] According to any of the aforementioned embodiments of the first aspect of the present application, the pixel circuit also includes a first reset module, the control end of the first reset module is connected to the second scanning signal line, the first end of the first reset module is connected to the anode of the light-emitting device, and the second end of the first reset module is connected to the first reset signal line; the first reset signal line transmits a third reset voltage to the anode of the light-emitting device.

[0014] According to any of the aforementioned embodiments of the first aspect of the present application, the third reset voltage is greater than or equal to the second reset voltage.

[0015] According to any of the aforementioned implementations of the first aspect of the present application, the first scanning signal line and the second scanning signal line transmit the same signal; or, the first scanning signal line and the second scanning signal line transmit different signals.

[0016] According to any of the aforementioned implementations of the first aspect of the present application, the first scanning signal line and the second scanning signal line transmit the same signal, and the initialization signal line and the first reset signal line transmit different signals.

[0017] According to any of the aforementioned implementations of the first aspect of the present application, the first scanning signal line and the second scanning signal line transmit different signals, and the initialization signal line and the first reset signal line transmit different signals.

[0018] According to any of the aforementioned embodiments of the first aspect of the present application, the first reset module includes a second transistor, the gate of the second transistor is connected to the second scanning signal line, the first electrode of the second transistor is connected to the anode of the light-emitting device, and the second electrode of the second transistor is connected to the first reset signal line.

[0019] According to any of the aforementioned implementations of the first aspect of the present application, the gate reset module includes a first sub-gate reset module and a second sub-gate reset module;

[0020] A first end of the first sub-gate reset module is connected to the control end of the driving module, a second end of the first sub-gate reset module is connected to the first sub-initialization signal line, and a control end of the first sub-gate reset module is connected to the first sub-scanning signal line;

[0021] A first end of the second sub-gate reset module is connected to the control end of the driving module, a second end of the second sub-gate reset module is connected to the second sub-initialization signal line, and a control end of the second sub-gate reset module is connected to the second sub-scanning signal line;

[0022] In the first reset phase, the first sub-initialization signal line is used to transmit a first reset voltage, and in the second reset phase, the second sub-initialization signal line is used to transmit a second reset voltage.

[0023] According to any of the aforementioned implementations of the first aspect of the present application, the first sub-gate reset module includes a third transistor, and the second sub-gate reset module includes a fourth transistor;

[0024] A first electrode of the third transistor is connected to the control end of the driving module, a second electrode of the third transistor is connected to the first sub-initialization signal line, a gate of the third transistor is connected to the first sub-scanning signal line, and the first sub-initialization signal line is used to transmit a first reset voltage;

[0025] A first electrode of the fourth transistor is connected to the control end of the driving module, a second electrode of the fourth transistor is connected to the second sub-initialization signal line, a gate of the fourth transistor is connected to the second sub-scanning signal line, and the second sub-initialization signal line is used to transmit a second reset voltage;

[0026] In the first reset phase, the first sub-scanning signal is at an effective level, and in the second reset phase, the second sub-scanning signal is at an effective level.

[0027] According to any of the aforementioned implementations of the first aspect of the present application, the pulse width of the effective level of the first sub-scanning signal is adjustable;

[0028] According to any of the aforementioned embodiments of the first aspect of the present application, the pulse width of the effective level of the first sub-scanning signal is greater than the pulse width of the effective level of the second sub-scanning signal.

[0029] According to any of the aforementioned embodiments of the first aspect of the present application, the pulse width of the effective level of the first sub-scanning signal does not overlap with the pulse width of the effective level of the second sub-scanning signal.

[0030] According to any of the aforementioned embodiments of the first aspect of the present application, the third transistor is a dual-gate transistor.

[0031] According to any of the aforementioned embodiments of the first aspect of the present application, the pixel circuit also includes a second reset module, the control end of the second reset module is connected to the third scanning signal line, the first end of the second reset module is connected to the anode of the light-emitting device, and the second end of the second reset module is connected to the second reset signal line; the second reset signal line transmits a fourth reset voltage to the anode of the light-emitting device.

[0032] According to any of the aforementioned embodiments of the first aspect of the present application, the fourth reset voltage is greater than or equal to the second reset voltage.

[0033] According to any of the aforementioned embodiments of the first aspect of the present application, the second reset signal line and the second sub-initialization signal line transmit the same signal, or the second reset signal line and the second sub-initialization signal line transmit different signals.

[0034] According to any of the aforementioned embodiments of the first aspect of the present application, the second reset signal line and the second sub-initialization signal line transmit the same signal, and the third scan signal line and the second sub-scan signal line transmit the same signal.

[0035] According to any of the aforementioned implementations of the first aspect of the present application, the second reset signal line and the second sub-initialization signal line transmit different signals, and the third scan signal line and the second sub-scan signal line transmit the same signal.

[0036] According to any of the aforementioned embodiments of the first aspect of the present application, the second reset module includes a fifth transistor, the gate of the fifth transistor is connected to the third scanning signal line, the first electrode of the fifth transistor is connected to the anode of the light-emitting device, and the second electrode of the fifth transistor is connected to the second reset signal line.

[0037] According to any of the aforementioned implementations of the first aspect of the present application, the pixel circuit further includes:

[0038] A data writing module, the data writing module is connected between the data line and the first end of the driving module;

[0039] A threshold compensation module, the threshold compensation module is connected between the second end of the driving module and the control end;

[0040] A storage module, the storage module is connected between the first power supply terminal and the control terminal of the driving module;

[0041] The first light emitting control module and / or the second light emitting control module are connected in series with the driving module between the first power supply terminal and the anode of the light emitting device.

[0042] In a second aspect, an embodiment of the present application provides a method for driving a pixel circuit, the method being applied to any pixel circuit shown in the first aspect, the driving method comprising:

[0043] Transmitting a first reset voltage to the control end of the driving module through the gate reset module to reset the control end of the driving module;

[0044] Transmitting a second reset voltage to the control end of the driving module through the gate reset module to complete the reset of the control end of the driving module;

[0045] Wherein, in the same frame, the first reset voltage is smaller than the second reset voltage.

[0046] In a third aspect, an embodiment of the present application provides a display panel, comprising a pixel circuit as shown in any one of the first aspects above.

[0047] In a fourth aspect, an embodiment of the present application provides a display device, comprising a display panel as shown in any one of the aforementioned third aspects.

[0048] The pixel circuit, the driving method of the pixel circuit, the display panel and the display device provided by the embodiments of the present application are connected to the control end of the driving module through a gate reset module in the pixel circuit. In the first reset stage, the gate reset module transmits a first reset voltage to the control end of the driving module. In the second reset stage, the gate reset module transmits a second reset voltage to the control end of the driving module. The control end of the driving module can be reset multiple times. At the same time, the first reset voltage is set to be smaller than the second reset voltage. The threshold voltage drift problem caused by different voltage bias conditions of the driving module during use of the display panel can be solved, thereby improving the display effect. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0050] Figure 1 A schematic diagram of a pixel circuit provided for some embodiments of the present application.

[0051] Figure 2 A schematic diagram of another pixel circuit provided for some embodiments of the present application.

[0052] Figure 3 A schematic diagram of another pixel circuit provided for some embodiments of the present application.

[0053] Figure 4 A timing diagram of the output signal of the pixel circuit provided in an embodiment of the present application.

[0054] Figure 5 Another timing diagram of the output signal of the pixel circuit provided in an embodiment of the present application.

[0055] Figure 6 A schematic diagram of another pixel circuit provided for some embodiments of the present application.

[0056] Figure 7 This is another timing diagram of the output signal of the pixel circuit provided in the embodiment of the present application.

[0057] Figure 8 This is another timing diagram of the output signal of the pixel circuit provided in the embodiment of the present application.

[0058] Fig. 9 A flowchart of a driving method for a pixel circuit provided in some embodiments of the present application.

[0059] Fig.10 A schematic diagram of a display panel structure provided for some embodiments of the present application.

[0060] Fig.11 A schematic diagram of the structure of a display device provided in some embodiments of the present application. DETAILED DESCRIPTION

[0061] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0062] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0063] Before describing the technical solutions provided by the embodiments of the present application, in order to facilitate the understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:

[0064] Currently, AMOLED displays are widely used in different display devices due to their thinner and lighter, high definition, high brightness, good contrast, and resistance to bending. Figure 1 As shown, Figure 1A schematic diagram of a 7T1C pixel circuit is shown, but the AMOLED display panel is prone to threshold voltage drift during use due to different voltage bias conditions of the driving transistor T1 that displays different grayscale images, which may cause a difference in the displayed grayscale brightness of two adjacent light-emitting areas in the next picture, that is, there is a ghost image in the displayed picture.

[0065] Based on this, the embodiments of the present application provide a pixel circuit, a driving method of a pixel circuit, a display panel and a display device, which can solve the above problems. Below, the pixel circuit provided by the embodiments of the present application is described in detail.

[0066] like Figure 1 As shown, an embodiment of the present application provides a pixel circuit 100, which includes:

[0067] A driving module 101; a gate reset module 102, the gate reset module is connected to the control end of the driving module; in a first reset stage, the gate reset module can transmit a first reset voltage to the control end of the driving module, and in a second reset stage, the gate reset module can transmit a second reset voltage to the control end of the driving module; wherein, in the same frame, in the first reset stage before the second reset stage, the first reset voltage is less than the second reset voltage.

[0068] like Figure 1 As shown, Figure 1 is a schematic diagram of an exemplary pixel circuit, Figure 1 The gate reset module in the device can transmit a first reset voltage to the control end of the driving module in the first reset phase, and transmit a second reset voltage to the control end of the driving module in the second reset phase. The first reset voltage is less than the second reset voltage. For example, when the second reset voltage is -5V, the first reset voltage can be any voltage less than -5V.

[0069] In some examples, the gate reset module includes a first transistor T1, and the driving module includes a transistor T2.

[0070] In the embodiment of the present application, a gate reset module is set in the pixel circuit to be connected with the control end of the driving module. In the first reset stage, the gate reset module transmits a first reset voltage to the control end of the driving module, and in the second reset stage, the gate reset module transmits a second reset voltage to the control end of the driving module. This can achieve multiple resets of the control end of the driving module. By setting the writing time of the data signal to be delayed in the two reset stages, and setting the first reset voltage to be less than the second reset voltage, the threshold voltage drift problem caused by different voltage bias conditions of the driving module during use of the display panel can be solved, thereby improving afterimages and enhancing display effects.

[0071] In some embodiments, the first reset phase and the second reset phase do not overlap.

[0072] The above-mentioned first reset stage and the second reset stage are different stages when resetting the control end of the driving module. The above-mentioned first reset stage and the second reset stage do not overlap. The embodiment of the present application can achieve multiple resets of the driving module by setting the first reset stage and the second reset stage to have no overlap, thereby avoiding afterimages and improving display effects.

[0073] In some embodiments, Figure 2 As shown, Figure 2 is a schematic diagram of another exemplary pixel circuit, such as Figure 2 As shown, the first end of the above-mentioned gate reset module can be connected to the control end of the driving module, the second end of the gate reset module can be connected to the initialization signal line Vref1, and the control end of the gate reset module can be connected to the first scanning signal line S1. In the first reset stage, the initialization signal line Vref1 is used to transmit the first reset voltage, and in the second reset stage, the initialization signal line Vref1 is used to transmit the second reset voltage.

[0074] like Figure 2 As shown, the gate reset module includes a first transistor T1, the first electrode of the first transistor is connected to the control end of the driving module, the second electrode of the first transistor is connected to the initialization signal line Vref1, and the gate of the first transistor is connected to the first scanning signal line S1. The initialization signal line can transmit a first reset voltage value in the first reset stage, and transmit a second reset voltage value in the second reset stage.

[0075] In some examples, the driving module may include a transistor T2, the gate of which is connected to the first electrode of the first transistor, the first electrode of which may be connected to the light-emitting control module, the second electrode of which may be connected to the light-emitting device 10, and the first transistor T1 may be a single-gate transistor or a double-gate transistor.

[0076] The embodiment of the present application sets the above-mentioned gate reset module to include a first transistor, connects the control end of the driving module through the first electrode of the first transistor, connects the gate of the first transistor to the first scanning signal line, and connects the second electrode of the first transistor to the initialization signal line. It can realize that the scanning signal transmitted by the corresponding first scanning signal line is controlled to be turned on by the above-mentioned first transistor, and different reset voltage values ​​of the initialization voltage signal are transmitted to the control end of the driving module, so as to realize multiple resets of the gate of the driving transistor, solve the threshold voltage drift problem caused by different voltage bias conditions of the driving transistor during the use of the display panel, improve the afterimage, and enhance the display effect.

[0077] In some embodiments, Figure 3 As shown, Figure 3 A schematic diagram of another pixel circuit provided in an embodiment of the application is shown as follows: Figure 3 , the pixel circuit may include:

[0078] A data writing module 103, the data writing module is connected between the data line and the first end of the driving module;

[0079] The threshold compensation module 104 is connected between the second end of the driving module and the control end; Figure 3 , the control end of the threshold compensation module is connected to the scanning signal line S2.

[0080] The first light emitting control module 105 and / or the second light emitting control module 106 are connected in series with the driving module between the first power supply terminal and the anode of the light emitting device.

[0081] The storage module 107 is connected between the first power supply terminal and the control terminal of the driving module.

[0082] It can be imagined that the above-mentioned gate reset module 102 can transmit the reset voltage transmitted by the initialization signal line Vref1 in different reset stages to the control end of the driving module 101, thereby realizing multiple resets of the control end of the driving module. Through the above-mentioned pixel circuit, it can realize the normal light emission of the driving light-emitting device 10, and at the same time solve the problem of threshold voltage drift of the driving transistor due to different factors during the use of the display panel, improve the afterimage, and enhance the display effect.

[0083] In some embodiments, Figure 3 As shown, Figure 3 A schematic diagram of another pixel circuit provided in an embodiment of the present application is shown as follows: Figure 3 The gate reset module 102 includes a first transistor T1, the driving module 101 includes a transistor T2, the data writing module 103 includes a transistor T3, the threshold compensation module 104 includes a transistor T4, the first light emitting control module includes a transistor T5, the second light emitting control module includes a transistor T6, and the storage module includes a storage capacitor Cst.

[0084] like Figure 3 As shown, the pixel circuit further includes a first reset module 401, the control end of the first reset module 401 is connected to the second scanning signal line S3, the first end of the first reset module is connected to the anode of the light emitting device 10, and the second end of the first reset module is connected to the first reset signal line Vref2; the first reset signal line transmits a third reset voltage to the anode of the light emitting device. Here, as Figure 3As shown, the control end of the first reset module is connected to the second scan signal line S3. The first reset module 401 can be turned on in response to the scan signal output by the second scan signal line S3, and transmit the third reset voltage output by the first reset signal line Vref2 to the anode of the light-emitting device 10, where the third reset voltage is greater than or equal to the second reset voltage.

[0085] In some examples, the first reset module 401 may include a second transistor T7, a gate of the second transistor T7 is connected to the second scan signal line, a first electrode of the second transistor T7 is connected to the anode of the light emitting device, and a second electrode of the second transistor T7 is connected to the first reset signal line.

[0086] The embodiment of the present application can improve the problem of low brightness in the first frame of the display panel and improve the display effect by setting a first reset module in the pixel circuit and setting the first reset module to transmit a third reset voltage value greater than or equal to the second reset voltage to the anode during the light-emitting period.

[0087] In some embodiments, the first scan signal line S1 and the second scan signal line S3 transmit the same signal; or, the first scan signal line S1 and the second scan signal line S3 transmit different signals.

[0088] In some examples, the first scan signal line S1 and the second scan signal line S3 transmit the same signal, such as Figure 4 , S1 transmits SCAN1, S3 transmits SCAN3, SCAN1 and SCAN3 can be the same, and the initialization signal line Vref1 and the first reset signal line Vref2 transmit different signals. Here, Figure 4 As shown, Figure 4 FIG. 1 is a timing diagram of an output signal of an exemplary pixel circuit. Figure 4 , at time t in the first reset stage, when the scan signal is at a low level, the control end of the gate reset module is turned on in response to the first scan signal line S1 outputting a low-level first scan signal SCAN1, and the first reset voltage output by the initialization signal line Vref1 can be transmitted to the control end of the driving module; then at time t+i in the second reset stage, the control end of the gate reset module is turned on in response to the first scan signal line S1 outputting a low-level first scan signal SCAN1, and the second reset voltage output by the initialization signal line Vref1 can be transmitted to the control end of the driving module. It can be imagined that the above-mentioned driving module can be a transistor.

[0089] It is conceivable that, in the second reset stage, the second transistor T7 can be turned on in response to the scan signal SCAN3 transmitted by the second scan signal line S3, and transmit the third reset voltage output by the first reset signal line Vref2 to the anode of the light-emitting device 10 to complete the reset of the anode of the light-emitting device 10. Thereafter, at time t+j, the data transmission module 103 and the threshold compensation module 104 are turned on in response to SCAN2 transmitted by S2, and the data signal is written.

[0090] The embodiment of the present application sets the first reset stage and the second reset stage to have no overlap, so that the control end of the driving module can be reset in different reset stages, thereby solving the problem of threshold voltage drift of the driving transistor due to different factors during use of the display panel, improving afterimages, and improving display effects.

[0091] In some embodiments, the first scan signal line S1 and the second scan signal line S3 transmit different signals, for example Figure 5 , S2 transmits SCAN2, S3 transmits SCAN3, the above SCAN2 can be the same as SCAN3, the initialization signal line Vref1 and the first reset signal line Vref2 transmit different signals; the pulse width of the effective level of the first scanning signal SCAN1 output by the above first scanning signal line S1 is adjustable.

[0092] like Figure 5 As shown, Figure 5 A timing diagram of output signals of another pixel circuit provided in an embodiment of the present application. Figure 5 In the embodiments of the present application, the cut-off level of the light-emitting control signal EM is taken as a high level and the on-level is taken as a low level. At time t, when the SCAN1 outputted by the initialization signal line Vref1 is at a low level, the control end of the gate reset module 102 is turned on in response to the low level, and the reset voltage can be transmitted to the control end of the driving module 101. When the control end of the gate reset module 102 is turned on in response to SCAN1, the first voltage value is transmitted to the driving module; and the second voltage value is transmitted to the driving module at time t+i. Figure 5 At time t+j, the first reset module can transmit the third reset voltage value to the anode of the light emitting device 10 in response to SCAN2 output by the second scan signal line S3 to complete the resetting of the anode of the light emitting device 10.

[0093] The embodiment of the present application realizes multiple resets of the control end of the driving module by setting the pulse width of the effective level of the first scanning signal output by the first scanning signal line to be adjustable, thereby solving the problem of threshold voltage drift caused by different voltage bias conditions of the driving module during use of the display panel, improving the display effect, and setting the voltage value for resetting the anode of the light-emitting device equal to the second voltage value, which can optimize the problem of low brightness in the first frame.

[0094] In some embodiments, Figure 6 As shown, Figure 6 A schematic diagram of another pixel circuit provided in an embodiment of the present application is shown as follows: Figure 6 The gate reset module includes a first sub-reset module 601 and a second sub-reset module 602, wherein the first end of the first sub-gate reset module 601 is connected to the control end of the driving module, the second end of the first sub-gate reset module 601 is connected to the first sub-initialization signal line Vref3, and the control end of the first sub-gate reset module 602 is connected to the first sub-scanning signal line S4; the first end of the second sub-gate reset module 602 is connected to the control end of the driving module 101, the second end of the second sub-gate reset module 602 is connected to the second sub-initialization signal line Vref1', and the control end of the second sub-gate reset module is connected to the second sub-scanning signal line S1'.

[0095] In the first reset phase, the first sub-initialization signal line Vref3 is used to transmit a first reset voltage, and in the second reset phase, the second sub-initialization signal line Vref1 ′ is used to transmit a second reset voltage.

[0096] like Figure 6 The first sub-gate reset module 601 includes a third transistor T8, and the second sub-gate reset module includes a fourth transistor T1'; the first electrode of the third transistor T8 is connected to the control end of the driving module, the second electrode of the third transistor T8 is connected to the first sub-initialization signal line Vref3, and the gate of the third transistor T8 is connected to the first sub-scanning signal line S4, and the first sub-initialization signal line Vref3 is used to transmit the first reset voltage; the first electrode of the fourth transistor T1' is connected to the control end of the driving module 101, the second electrode of the fourth transistor T1' is connected to the second sub-initialization signal line Vref1', the gate of the fourth transistor T1' is connected to the second sub-scanning signal line S1', and the second sub-initialization signal line Vref1' is used to transmit the second reset voltage.

[0097] In the first reset stage, the first sub-scanning signal SCAN4 is at an effective level, and in the second reset stage, the second sub-scanning signal SCAN5 is at an effective level; the first sub-scanning signal SCAN4 is a signal transmitted by the first sub-scanning signal line S4, and the second sub-scanning signal SCAN5 is a signal transmitted by the second sub-scanning signal line S1'.

[0098] In some examples, the pulse width of the active level of the first sub-scanning signal SCAN4 is adjustable.

[0099] In some examples, the pulse width of the active level of the first sub-scanning signal SCAN4 is greater than the pulse width of the active level of the second sub-scanning signal SCAN5 .

[0100] In some examples, the pulse width of the active level of the first sub-scanning signal SCAN4 does not overlap with the pulse width of the active level of the second sub-scanning signal SCAN5 .

[0101] like Figure 6 As shown, the second reset module 402 includes a fifth transistor T7', a gate of the fifth transistor T7' connected to the third scan signal line S5, a first electrode of the fifth transistor T7' connected to the anode of the light emitting device 10, and a second electrode of the fifth transistor T7' connected to the second reset signal line Vref4.

[0102] In some examples, the third transistor T8 may be a single-gate transistor or a double-gate transistor.

[0103] The embodiment of the present application sets the gate reset module to include a first sub-gate reset module and a second sub-gate reset module. In the first reset stage, the first sub-gate reset module transmits a first reset voltage to the control end of the driving module, and in the second reset stage, the second sub-gate reset module transmits a second reset voltage to the control end of the driving module, so as to achieve multiple resets of the control end of the driving module, reduce smear, and improve the display effect. And the third line for resetting the anode of the light-emitting device is set to be greater than or equal to the second voltage value, which can optimize the problem of low brightness in the first frame.

[0104] In some embodiments, Figure 6 As shown, the pixel circuit further includes a second reset module 402, a control end of the second reset module 402 is connected to the third scan signal line S5, a first end of the second reset module 402 is connected to the anode of the light emitting device 10, and a second end of the second reset module 402 is connected to the second reset signal line Vref4; the second reset signal line Vref4 transmits a fourth reset voltage to the anode of the light emitting device 10;

[0105] The fourth reset voltage is greater than or equal to the second reset voltage. By setting the fourth reset voltage to be greater than or equal to the second reset voltage, the problem of dark brightness in the first frame of the display panel can be overcome, thereby improving the display effect.

[0106] The embodiment of the present application can overcome the problem of dark brightness in the first frame of the display panel and improve the display effect by configuring the pixel circuit to include a second reset module and transmitting a fourth reset voltage to the anode of the light-emitting device through the second reset module.

[0107] In some embodiments, the second reset signal line Vref4 and the second sub-initialization signal line transmit the same signal, or the second reset signal line Vref4 and the second sub-initialization signal line transmit different signals.

[0108] like Figure 7 As shown, Figure 7FIG. 1 is another exemplary timing diagram of a pixel circuit. The second reset signal line Vref4 can transmit the same signal as the second sub-initialization signal line Vref1', and the third scan signal line S5 can transmit the same signal as the second sub-scan signal line S1'. Figure 7 , S1' transmits SCAN5, S5 transmits SCAN6, SCAN5 and SCAN6 can be the same, at time t, the control end of the first sub-gate reset module 601 is turned on in response to the first sub-scanning signal SCAN4 output by the first sub-scanning signal line S4, and transmits the first reset voltage transmitted by the first sub-initialization signal line Vref3 to the control end of the driving module 101; at time t+i, the control end of the second sub-gate reset module 602 is turned on in response to the second sub-scanning signal SCAN5 output by the second sub-scanning signal line S1', and transmits the second reset voltage transmitted by the second sub-initialization signal line Vref1' to the control end of the driving module 101 to complete the reset of the control end of the driving module, and at the same time, the second reset module 402 can be turned on in response to the above SCAN5, and transmit the above second reset voltage to the anode of the light-emitting device to complete the reset of the anode of the light-emitting device 10. Afterwards, at time t+j, the data writing module 103 and the threshold compensation module 104 can be turned on in response to the scanning signal SCAN2 output by S2 to achieve the writing of the data signal.

[0109] The embodiment of the present application sets the second reset signal line and the second sub-initialization signal line to transmit the same signal, and the third scanning signal line and the second sub-scanning signal line to transmit the same signal, thereby realizing multiple resets of the control end of the driving module and the reset of the anode of the light-emitting device, and can optimize the ghosting caused by the threshold drift problem and improve the display effect.

[0110] In some embodiments, the second reset signal line Vref4 and the second sub-initialization signal line Vref1' transmit different signals, and the third scan signal line S5 and the second sub-scan signal line S1' transmit the same signal. Figure 8 As shown, Figure 8 A timing diagram of another pixel circuit provided in an embodiment of the present application is shown in FIG. Figure 8, S1' transmits SCAN5, S5 transmits SCAN6, SCAN5 and SCAN6 can be the same, at time t, the control end of the first sub-gate reset module 601 is turned on in response to the first sub-scanning signal SCAN4 output by the first sub-scanning signal line S4, and transmits the first reset voltage transmitted by the first sub-initialization signal line Vref3 to the control end of the driving module 101; at time t+i, the control end of the second sub-gate reset module 602 is turned on in response to the second sub-scanning signal SCAN5 output by the second sub-scanning signal line S1', and transmits the second reset voltage transmitted by the second sub-initialization signal line Vref1' to the control end of the driving module 101 to complete the reset of the control end of the driving module, and at the same time, the second reset module 402 can be turned on in response to the above SCAN6, and transmit the fourth reset voltage to the anode of the light-emitting device to complete the reset of the anode of the light-emitting device 10. Afterwards, at time t+j, the data writing module 103 and the threshold compensation module 104 can be turned on in response to the scanning signal output by S2 to achieve the writing of the data signal.

[0111] The embodiment of the present application realizes multiple resets of the control end of the driving module by setting the pulse width of the effective level of the first scanning signal output by the first scanning signal line to be adjustable, thereby solving the threshold voltage drift problem caused by different voltage bias conditions of the driving module during use of the display panel, improving the display effect, and setting the fourth voltage value for resetting the anode of the light-emitting device to be greater than or equal to the second voltage value, which can optimize the problem of low brightness in the first frame.

[0112] In some embodiments, Fig. 9 As shown, Fig. 9 A driving method for a pixel circuit provided in an embodiment of the present application is applied to the aforementioned pixel circuit, and the driving method may include the following steps:

[0113] S910: Transmitting a first reset voltage to the control end of the driving module through the gate reset module to reset the control end of the driving module.

[0114] The driving module may include a transistor, and the control end of the driving module may include a gate of the transistor. The control end of the driving module may be reset by transmitting a first reset voltage to the gate of the transistor through a gate reset module.

[0115] S920: transmitting a second reset voltage to the control end of the driving module through the gate reset module to complete the resetting of the control end of the driving module; wherein, in the same frame, the first reset voltage is less than the second reset voltage.

[0116] Afterwards, the second reset voltage can be transmitted to the control end of the driving module through the gate reset module to complete the reset of the control end of the driving module, and the first reset voltage is less than the second reset voltage. For example, when the second reset voltage is -5V, the first reset voltage can be any voltage less than the second voltage.

[0117] In the embodiment of the present application, a first reset voltage is transmitted to the control end of the driving module through the gate reset module, and then a second reset voltage is transmitted to the control end of the driving module through the gate reset module, so as to achieve a secondary reset of the control end of the module. By resetting the control end of the driving module multiple times, the threshold voltage drift problem can be solved, so that adjacent light-emitting modules in the display panel have the same brightness when displaying the picture to be displayed, thereby improving the display effect.

[0118] Fig.10 A schematic diagram of the structure of a display panel provided in an embodiment of the present application. Fig.10 As shown, the present application further provides a display panel 1000 , and the display panel 1000 may include the pixel circuit 100 provided in an embodiment of the present application.

[0119] The display panel 1000 provided in the embodiment of the present application has the beneficial effects of the pixel circuit 100 provided in the embodiment of the present application. For details, reference may be made to the specific description of the pixel circuit 100 in the above embodiments, which will not be repeated in this embodiment.

[0120] Based on the display panel 1000 provided in the above embodiment, the present application also provides a display device, including the display panel provided in the present application. Fig.11 , Fig.11 A schematic diagram of the structure of a display device provided in an embodiment of the present application. Fig.11 The provided display device 2000 includes the display panel 1000 provided by any of the above embodiments of the present application. Fig.11 In the embodiment, a mobile phone is used as an example to illustrate the display device 2000. It can be understood that the display device provided in the embodiment of the present application can be a wearable product, a computer, a television, a car display device, or other display devices with display functions, and the present application does not impose specific restrictions on this. The display device provided in the embodiment of the present application has the beneficial effects of the display panel 1000 or the pixel circuit 100 provided in the embodiment of the present application. For details, please refer to the specific description of the display panel 1000 or the pixel circuit 100 in the above embodiments, and this embodiment will not be repeated here.

[0121] It should be understood that the specific structures of the pixel circuit and the display panel provided in the drawings of the embodiments of the present application are merely examples and are not intended to limit the present application. In addition, the above embodiments provided in the present application may be combined with each other if there is no contradiction.

[0122] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0123] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0124] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or devices based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0125] The above reference is according to the method of the embodiment of the present application, the flow chart of the device (device) and the computer program product and / or the block diagram described various aspects of the present application.It should be understood that each square box in the flow chart and / or the block diagram and the combination of each square box in the flow chart and / or the block diagram can be realized by computer program instructions.These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the realization of the function / action specified in one or more square boxes of the flow chart and / or the block diagram.Such a processor can be but is not limited to a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit.It can also be understood that each square box in the block diagram and / or the flow chart and the combination of the square boxes in the block diagram and / or the flow chart can also be realized by the dedicated hardware that performs the specified function or action, or can be realized by the combination of dedicated hardware and computer instructions.

[0126] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the above-described devices, modules and units can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application.

Claims

1. A pixel circuit, characterized in that: include: Driver module; A gate reset module, the gate reset module is connected to the control end of the driving module; In the first reset stage, the gate reset module transmits a first reset voltage to the control terminal of the driving module, and in the second reset stage, the gate reset module transmits a second reset voltage to the control terminal of the driving module; Wherein, in the same frame, the first reset stage is before the second reset stage, and the first reset voltage is less than the second reset voltage.

2. The pixel circuit according to claim 1, characterized in that: The first reset phase and the second reset phase do not overlap.

3. The pixel circuit according to claim 1, characterized in that: The first end of the gate reset module is connected to the control end of the driving module, the second end of the gate reset module is connected to the initialization signal line, the control end of the gate reset module is connected to the first scanning signal line, in the first reset stage, the initialization signal line is used to transmit the first reset voltage, in the second reset stage, the initialization signal line is used to transmit the second reset voltage; Preferably, the gate reset module comprises a first transistor, a first electrode of the first transistor is connected to the control end of the driving module, a second electrode of the first transistor is connected to the initialization signal line, and a gate of the first transistor is connected to the first scanning signal line; Preferably, the first transistor is a dual-gate transistor.

4. The pixel circuit according to claim 3, characterized in that: The pixel circuit further comprises a first reset module, a control end of the first reset module is connected to the second scanning signal line, a first end of the first reset module is connected to the anode of the light emitting device, and a second end of the first reset module is connected to the first reset signal line; the first reset signal line transmits a third reset voltage to the anode of the light emitting device; Preferably, the third reset voltage is greater than or equal to the second reset voltage; Preferably, the first scanning signal line and the second scanning signal line transmit the same signal; or, the first scanning signal line and the second scanning signal line transmit different signals; Preferably, the first scanning signal line and the second scanning signal line transmit the same signal, and the initialization signal line and the first reset signal line transmit different signals; Preferably, the first scanning signal line and the second scanning signal line transmit different signals, and the initialization signal line and the first reset signal line transmit different signals; Preferably, the first reset module includes a second transistor, a gate of the second transistor is connected to the second scanning signal line, a first electrode of the second transistor is connected to the anode of the light-emitting device, and a second electrode of the second transistor is connected to the first reset signal line.

5. The pixel circuit according to claim 1, characterized in that: The gate reset module includes a first sub-gate reset module and a second sub-gate reset module; A first end of the first sub-gate reset module is connected to the control end of the driving module, a second end of the first sub-gate reset module is connected to the first sub-initialization signal line, and a control end of the first sub-gate reset module is connected to the first sub-scanning signal line; A first end of the second sub-gate reset module is connected to the control end of the driving module, a second end of the second sub-gate reset module is connected to the second sub-initialization signal line, and a control end of the second sub-gate reset module is connected to the second sub-scanning signal line; In the first reset phase, the first sub-initialization signal line is used to transmit the first reset voltage, and in the second reset phase, the second sub-initialization signal line is used to transmit the second reset voltage; Preferably, the first sub-gate reset module includes a third transistor, and the second sub-gate reset module includes a fourth transistor; A first electrode of the third transistor is connected to the control end of the driving module, a second electrode of the third transistor is connected to the first sub-initialization signal line, a gate of the third transistor is connected to the first sub-scanning signal line, and the first sub-initialization signal line is used to transmit the first reset voltage; A first electrode of the fourth transistor is connected to the control end of the driving module, a second electrode of the fourth transistor is connected to the second sub-initialization signal line, a gate of the fourth transistor is connected to the second sub-scanning signal line, and the second sub-initialization signal line is used to transmit the second reset voltage; In the first reset phase, the first sub-scanning signal is at an effective level, and in the second reset phase, the second sub-scanning signal is at an effective level; Preferably, the pulse width of the effective level of the first sub-scanning signal is adjustable; Preferably, the pulse width of the effective level of the first sub-scanning signal is greater than the pulse width of the effective level of the second sub-scanning signal; Preferably, the pulse width of the effective level of the first sub-scanning signal does not overlap with the pulse width of the effective level of the second sub-scanning signal; Preferably, the third transistor is a dual-gate transistor.

6. The pixel circuit according to claim 5, characterized in that: The pixel circuit further includes a second reset module, a control end of the second reset module is connected to the third scan signal line, a first end of the second reset module is connected to the anode of the light emitting device, and a second end of the second reset module is connected to the second reset signal line; the second reset signal line transmits a fourth reset voltage to the anode of the light emitting device; Preferably, the fourth reset voltage is greater than or equal to the second reset voltage; Preferably, the second reset signal line and the second sub-initialization signal line transmit the same signal, or the second reset signal line and the second sub-initialization signal line transmit different signals; Preferably, the second reset signal line and the second sub-initialization signal line transmit the same signal, and the third scan signal line and the second sub-scan signal line transmit the same signal; Preferably, the second reset signal line and the second sub-initialization signal line transmit different signals, and the third scan signal line and the second sub-scan signal line transmit the same signal; Preferably, the second reset module includes a fifth transistor, a gate of the fifth transistor is connected to the third scanning signal line, a first electrode of the fifth transistor is connected to the anode of the light-emitting device, and a second electrode of the fifth transistor is connected to the second reset signal line.

7. The pixel circuit according to claim 1, characterized in that: The pixel circuit further includes: A data writing module, wherein the data writing module is connected between the data line and the first end of the driving module; A threshold compensation module, wherein the threshold compensation module is connected between the second end of the driving module and the control end; A storage module, the storage module is connected between the first power supply terminal and the control terminal of the driving module; The first light emitting control module and / or the second light emitting control module are connected in series with the driving module between the first power supply terminal and the anode of the light emitting device.

8. A method for driving a pixel circuit, characterized in that: Applied to the pixel circuit according to any one of claims 1 to 7, the driving method comprises: Transmitting a first reset voltage to the control end of the driving module through a gate reset module to reset the control end of the driving module; Transmitting a second reset voltage to the control end of the driving module through the gate reset module to complete the resetting of the control end of the driving module; Wherein, in the same frame, the first reset voltage is smaller than the second reset voltage.

9. A display panel, characterized in that: include: A pixel circuit as described in any one of claims 1 to 7.

10. A display device, characterized in that: include: The display panel as claimed in claim 9.

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