OLED display panel, OLED display device and electronic equipment

Abstract

The invention relates to an OLED display panel, an OLED display device and electronic equipment, and the OLED display panel comprises a pixel array, a gate line and a source line. The pixel array comprises a plurality of sub-pixel units, and each sub-pixel unit is connected to one gate line and one source line; every four sub-pixel units in each row of the pixel array are circularly arranged according to the sequence of the first sub-pixel unit, the second sub-pixel unit, the third sub-pixel unit and the fourth sub-pixel unit; the sub-pixel units in the same row are respectively connected to one of the two gate lines corresponding to the sub-pixel units in the same row, and the gate lines connected with the sub-pixel units in different rows are different; the sub-pixel units in each column are respectively connected to the corresponding source lines, and all the sub-pixel units connected with at least part of the source lines belong to two different columns; according to the OLED display panel disclosed by the invention, the height between the effective display area and the source electrode driving chip can be reduced, and the charging speed of the sub-pixel units is relatively high.

Description

Technical Field

[0001] The present disclosure relates to the field of display driving, and in particular to an OLED display panel, an OLED display device and an electronic device. Background Art

[0002] Organic Light-Emitting Diode (OLED) display panels have the advantages of being thin, light, energy-saving, fast response, and high contrast, and therefore have broad application prospects. Existing OLED display panels use a multiplexer (MUX) to reduce the number of source output channels, but the MUX increases the height between the active area (AA) of the OLED display panel and the source driver chip, and the on-resistance of the MUX reduces the charging speed of the sub-pixel unit in the OLED display panel. Summary of the invention

[0003] In view of this, the present disclosure proposes an OLED display panel, an OLED display device and an electronic device, which can reduce the number of source output channels without adding a MUX in the panel, and can reduce the height between the AA area of ​​the OLED display panel and the source driver chip, so that the lower frame of the OLED display panel can be narrower, and will not reduce the charging speed of the sub-pixel unit in the OLED display panel.

[0004] According to one aspect of the present disclosure, an OLED display panel is provided, comprising a pixel array, gate lines and source lines; the pixel array comprises a plurality of sub-pixel units; each sub-pixel unit is connected to a gate line and a source line; in each row of the pixel array, every four sub-pixel units are arranged cyclically in the order of a first sub-pixel unit, a second sub-pixel unit, a third sub-pixel unit and a fourth sub-pixel unit; wherein each sub-pixel unit in the same row of the pixel array is respectively connected to one of the two gate lines corresponding to the sub-pixel unit in the row, and sub-pixel units in different rows are connected to different gate lines; each column of the pixel array sub-pixel units is respectively connected to the corresponding source lines, and all sub-pixel units connected to at least some of the source lines belong to two different columns.

[0005] In a possible implementation, in the same row of the pixel array, the first sub-pixel unit is sub-pixel unit R, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit B, and the fourth sub-pixel unit is sub-pixel unit G; or, in the same row of the pixel array, the first sub-pixel unit is sub-pixel unit B, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit R, and the fourth sub-pixel unit is sub-pixel unit G; wherein sub-pixel unit R is used to display red light, sub-pixel unit B is used to display blue light, and sub-pixel unit G is used to display green light.

[0006] In a possible implementation, in the odd-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; or, in the odd-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; wherein the sub-pixel unit R is used to display red light, the sub-pixel unit B is used to display blue light, and the sub-pixel unit G is used to display green light.

[0007] In a possible implementation, in each row of the pixel array, the first sub-pixel unit is sub-pixel unit R, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit B, and the fourth sub-pixel unit is sub-pixel unit G; or, in each row of the pixel array, the first sub-pixel unit is sub-pixel unit B, the second sub-pixel unit is sub-pixel unit G, the third sub-pixel unit is sub-pixel unit R, and the fourth sub-pixel unit is sub-pixel unit G; wherein sub-pixel unit R is used to display red light, sub-pixel unit B is used to display blue light, and sub-pixel unit G is used to display green light.

[0008] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the third sub-pixel unit are connected to the first gate line corresponding to the sub-pixel unit in the row, and the second sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the sub-pixel unit in the row; the number of the source lines is half the number of columns in the pixel array, and all the sub-pixel units connected to each of the source lines belong to two adjacent columns of sub-pixel units.

[0009] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line corresponding to the sub-pixel unit in the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the sub-pixel unit in the row; the number of source lines is half the number of columns in the pixel array, and all the sub-pixel units connected to each source line belong to two columns of sub-pixel units respectively, with one column of sub-pixel units between them.

[0010] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line corresponding to the sub-pixel units in the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the sub-pixel units in the row; four adjacent columns of sub-pixel units of the pixel array correspond to three source lines, and in the four adjacent columns of sub-pixel units, the sub-pixel units located in odd rows in the first column of sub-pixel units and the sub-pixel units located in even rows in the third column of sub-pixel units are connected to the first source line among the three source lines, the sub-pixel units located in even rows in the first column of sub-pixel units and the sub-pixel units located in odd rows in the third column of sub-pixel units are connected to the second source line among the three source lines, and the sub-pixel units in the second column and the sub-pixel units in the fourth column are connected to the third source line among the three source lines.

[0011] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line corresponding to the sub-pixel units in the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line corresponding to the sub-pixel units in the row; four adjacent columns of sub-pixel units of the pixel array correspond to three source lines, and in the four adjacent columns of sub-pixel units, the first column of sub-pixel units is connected to the first source line of the three source lines, the second column of sub-pixel units and the fourth column of sub-pixel units are connected to the second source line of the three source lines, and the third column of sub-pixel units is connected to the third source line of the three source lines.

[0012] According to another aspect of the present disclosure, an OLED display device is provided, comprising the above-mentioned OLED display panel, a gate driving circuit and a source driving circuit; wherein the gate driving circuit is connected to each gate line in the OLED display panel; the source driving circuit is connected to each source line in the OLED display panel; the gate driving circuit is used to output a gate driving signal to the gate line to control the corresponding row channel in the pixel array to be turned on or off; the source driving circuit is used to output a source driving signal to the source line to provide a driving voltage for the sub-pixel unit in the pixel array; wherein one row channel corresponds to a sub-pixel unit connected to the same gate line in the pixel array.

[0013] According to another aspect of the present disclosure, an electronic device is provided, comprising the above-mentioned OLED display device.

[0014] The OLED display panel disclosed in the present invention reduces the number of source output channels by increasing the number of gate lines (i.e., increasing the number of row channels) and designing the connection method of sub-pixel units in the AA area (i.e., the area composed of the pixel array). There is no need to add MUX in the panel to reduce the number of source output channels, and the height between the AA area and the source driver chip in the OLED display panel can be reduced, so that the lower frame of the OLED display panel can be narrower, thereby reducing the area of ​​the frame region of the OLED display panel; and since there is no need to use MUX, the OLED display panel disclosed in the present invention is not affected by the on-resistance of MUX, and the charging speed of the sub-pixel units in the pixel array will not be reduced.

[0015] Further features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the disclosure and, together with the description, serve to explain the principles of the disclosure.

[0017] Figure 1 A schematic diagram of a conventional OLED display device is shown.

[0018] Figure 2 A schematic diagram of an OLED display panel according to an embodiment of the present disclosure is shown.

[0019] Figure 3 A schematic diagram of an OLED display device according to an embodiment of the present disclosure is shown.

[0020] Figure 4 A schematic diagram of an OLED display device according to an embodiment of the present disclosure is shown.

[0021] Figure 5 A schematic diagram of an OLED display device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0022] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0023] In the description of the present disclosure, it should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present disclosure.

[0024] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0025] In the present disclosure, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present disclosure can be understood according to specific circumstances.

[0026] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.

[0027] Figure 1A schematic diagram of an existing OLED display device is shown, wherein: Figure 1 (a) shows a schematic structural diagram of an existing OLED display device. Figure 1 (b) shows a driving timing diagram of the OLED display device. Figure 1 As shown in (a), the OLED display device includes an OLED display panel, a gate drive circuit and a source drive circuit. The OLED display panel includes an AA area and a MUX composed of PMOS tubes (i.e., PMOS1-1, PMOS1-2, PMOS2-1, PMOS2-1). The AA area is an area composed of a pixel array. Each row of sub-pixel units in the pixel array shares a gate line, and each gate line corresponds to a row channel; every two columns of sub-pixel units share a source line, and each source line corresponds to a source output channel. The gate drive circuit is used to output a gate drive signal (i.e., G1~G4) to control the row channels (i.e., ROW1~ROW4) to be turned on row by row. When G1~G4 is at a low level, the corresponding row channels are turned on. The source drive circuit is integrated in the source drive chip and is used to provide a drive voltage for the sub-pixel units in the pixel array. When the source drive circuit provides a drive voltage for the sub-pixel unit and the row channel corresponding to the sub-pixel unit is turned on, the sub-pixel unit is charged.

[0028] like Figure 1 As shown in (b), when G1 changes from high level to low level, ROW1 is turned on, and at the same time SW1 changes from high level to low level, PMOS1-1 and PMOS1-2 are turned on, the source driving unit SOP1 charges the sub-pixel unit R1, and the source driving unit SOP2 charges the sub-pixel unit B1; then SW1 changes from low level to high level, and SW2 changes from high level to low level, at this time PMOS2-1 and PMOS2-2 are turned on, SOP1 charges the sub-pixel unit G11, and SOP2 charges the sub-pixel unit G12; Then G1 changes from low level to high level, G2 changes from high level to low level, ROW1 is closed, ROW2 is opened, and SW1 changes from high level to low level, PMOS1-1 and PMOS1-2 are turned on, SOP1 charges sub-pixel unit B2, and SOP2 charges sub-pixel unit R2; then SW1 changes from low level to high level, SW2 changes from high level to low level, at this time PMOS2-1 and PMOS2-2 are turned on, SOP1 charges sub-pixel unit G21, and SOP2 charges sub-pixel unit G22. In the above process, the sub-pixel units output by the source output channel S1 are R1, G11, B2, G21 in sequence (that is, SOP1 charges R1, G11, B2, G21 in sequence); the sub-pixel units output by the source output channel S2 are B1, G12, R2, G22 in sequence (that is, SOP2 charges B1, G12, R2, G22 in sequence).

[0029] Compared with a conventional display device in which one source output channel is used to charge a column of sub-pixel units, the number of source output channels is the same as the number of columns of the pixel array. Figure 1 The OLED display panel shown in the figure reduces the number of source output channels by half by using a 1-to-2 MUX, but the MUX increases the height between the AA area of ​​the OLED display panel and the source driver chip (i.e. Figure 1 H in the OLED display panel increases the area of ​​the border region; and the on-resistance of the MUX (ie, the on-resistance of the PMOS tube constituting the MUX) reduces the charging speed of the sub-pixel unit.

[0030] In view of this, the present disclosure proposes an OLED display panel that can reduce the number of source output channels without using a MUX, reduce the height between the AA area and the source driver chip, and will not reduce the charging speed of the sub-pixel unit.

[0031] Figure 2 A schematic diagram of an OLED display panel according to an embodiment of the present disclosure is shown as follows: Figure 2 As shown, the LED display panel includes a pixel array, a gate line and a source line; the pixel array includes a plurality of sub-pixel units; each sub-pixel unit is connected to a gate line and a source line; in each row of the pixel array, every four sub-pixel units are arranged cyclically in the order of a first sub-pixel unit, a second sub-pixel unit, a third sub-pixel unit, and a fourth sub-pixel unit.

[0032] Among them, each sub-pixel unit in the same row of the pixel array is respectively connected to one of the two gate lines corresponding to the sub-pixel unit in the row, and the gate lines connected to the sub-pixel units in different rows are different; the sub-pixel units in each column of the pixel array are respectively connected to the corresponding source lines, and all the sub-pixel units connected to at least some of the source lines belong to two different columns.

[0033] Exemplarily, among the source lines corresponding to four adjacent columns of sub-pixel units of the pixel array, all sub-pixel units connected to at least some of the source lines belong to two different columns. If the OLED display panel includes a pixel array of M rows and 4*N columns, M and N are both positive integers, then the OLED display panel includes 2*M gate lines and at most 3*N source lines (i.e., 2*M row channels and at most 3*N source output channels).

[0034] Compared with the conventional display panel in which the number of gate lines (i.e., the number of row channels) is the same as the number of rows of the pixel array, and the number of source lines (i.e., the number of source output channels) is the same as the number of columns of the pixel array, the OLED display panel of the present disclosure reduces the number of source output channels by increasing the number of row channels and designing the connection mode of the sub-pixel units in the AA area, and does not need to add MUX in the panel to reduce the number of source output channels. Figure 1 The OLED display panel shown in the figure reduces the height between the AA area and the source driver chip, so that the lower frame of the OLED display panel can be narrower, thereby reducing the area of ​​the frame region of the OLED display panel; and, since no MUX is required, the OLED display panel of the embodiment of the present disclosure is relatively Figure 1 The OLED display panel shown is not affected by the on-resistance of the MUX, and the charging speed of the sub-pixel units in the pixel array is not reduced.

[0035] In a possible implementation, the pixel array of the OLED display panel includes a sub-pixel unit R, a sub-pixel unit B, and a sub-pixel unit G; in the same row of the pixel array, the first sub-pixel unit is the sub-pixel unit R, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit B, and the fourth sub-pixel unit is the sub-pixel unit G; or, in the same row of the pixel array, the first sub-pixel unit is the sub-pixel unit B, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit R, and the fourth sub-pixel unit is the sub-pixel unit G; wherein the sub-pixel unit R is used to display red light, the sub-pixel unit B is used to display blue light, and the sub-pixel unit G is used to display green light. That is, in the same row of the pixel array, the sub-pixel units are arranged cyclically in the order of R, G, B, G, or in the order of B, G, R, G.

[0036] Exemplarily, the arrangement order of the sub-pixel units in odd-numbered rows in the pixel array is different from the arrangement order of the sub-pixel units in even-numbered rows.

[0037] As an example, in the odd-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit R, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit B, and the fourth sub-pixel unit is the sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit B, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit R, and the fourth sub-pixel unit is the sub-pixel unit G. That is, in the odd-numbered rows of the pixel array, the sub-pixel units are arranged cyclically in the order of R, G, B, G; and in the even-numbered rows of the pixel array, the sub-pixel units are arranged cyclically in the order of B, G, R, G.

[0038] As another example, in the odd-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit B, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit R, and the fourth sub-pixel unit is the sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is the sub-pixel unit R, the second sub-pixel unit is the sub-pixel unit G, the third sub-pixel unit is the sub-pixel unit B, and the fourth sub-pixel unit is the sub-pixel unit G. That is, in the odd-numbered rows of the pixel array, the sub-pixel units are arranged cyclically in the order of B, G, R, G; and in the even-numbered rows of the pixel array, the sub-pixel units are arranged cyclically in the order of R, G, B, G.

[0039] Exemplarily, the arrangement order of sub-pixel units in each row in the pixel array is the same.

[0040] As an example, in each row of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G. That is, the sub-pixel units in each row of the pixel array are cyclically arranged in the order of R, G, B, G.

[0041] As another example, in each row of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G. That is, the sub-pixel units in each row of the pixel array are cyclically arranged in the order of B, G, R, and G.

[0042] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the third sub-pixel unit are connected to the first gate line of the two gate lines corresponding to the sub-pixel units in the row, and the second sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line of the two gate lines corresponding to the sub-pixel units in the row; the number of source lines in the OLED display panel is half of the number of columns in the pixel array, and all sub-pixel units connected to each source line belong to two adjacent columns of sub-pixel units. That is, in each row of the pixel array, all sub-pixel units R and sub-pixel units B share a gate line, and all sub-pixel units G share a gate line; two adjacent columns of sub-pixel units in the pixel array share a source line. In this way, for an OLED display panel with a pixel array of M rows and 4*N columns, the OLED display panel includes 2*M gate lines and 2*N source lines (that is, 2*M row channels and 2*N source output channels), and the number of source output channels is reduced by half.

[0043] In a possible implementation, in the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line of the two gate lines corresponding to the sub-pixel units in the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line of the two gate lines corresponding to the sub-pixel units in the row; the number of source lines in the OLED display panel is half the number of columns in the pixel array, and there is one column of sub-pixel units between the two columns of sub-pixel units to which all sub-pixel units connected by each source line belong respectively. If the adjacent sub-pixel units R and sub-pixel units G are regarded as the first pixel unit group, and the adjacent sub-pixel units B and sub-pixel units G are regarded as the second pixel unit group, that is, in each row of the pixel array, all the first pixel unit groups share a gate line, and all the second pixel unit groups share a gate line; in the adjacent four columns of sub-pixel units of the pixel array, all the sub-pixel units R and sub-pixel units B share a source line, and all the sub-pixel units G share a source line. In this way, for an OLED display panel including a pixel array of M rows and 4*N columns, the OLED display panel includes 2*M gate lines and 2*N source lines (that is, includes 2*M row channels and 2*N source output channels), and the number of source output channels is reduced by half; and when the sub-pixel units in the pixel array are charged, the source output channels corresponding to the source lines connected to the sub-pixel units G can continuously charge the sub-pixel units G, thereby achieving a power saving effect.

[0044] In a possible implementation, when the arrangement order of sub-pixel units in odd rows and the arrangement order of sub-pixel units in even rows in a pixel array are different, in the sub-pixel units in the same row of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line of the two gate lines corresponding to the sub-pixel units in the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line of the two gate lines corresponding to the sub-pixel units in the row; four adjacent columns of sub-pixel units in the pixel array correspond to three source lines, and in the four adjacent columns of sub-pixel units, the sub-pixel units in the odd rows of the first column of sub-pixel units and the sub-pixel units in the even rows of the third column of sub-pixel units are connected to the first source line of the three source lines, the sub-pixel units in the even rows of the first column of sub-pixel units and the sub-pixel units in the odd rows of the third column of sub-pixel units are connected to the second source line of the three source lines, and the sub-pixel units in the second column and the sub-pixel units in the fourth column are connected to the third source line of the three source lines. That is, in each row of the pixel array, all the first pixel unit groups share a gate line, and all the second pixel unit groups share a gate line; in the four adjacent columns of sub-pixel units in the pixel array, all the sub-pixel units R share a source line, all the sub-pixel units B share a source line, and all the sub-pixel units G share a source line. In this way, for an OLED display panel with a pixel array of M rows and 4*N columns, the OLED display panel includes 2*M gate lines and 3*N source lines (i.e., 2*M row channels and 3*N source output channels), and the number of source output channels is reduced by 1 / 4; and when charging the sub-pixel units in the pixel array, the source output channel corresponding to the source line connected to the sub-pixel unit R can continuously charge the sub-pixel unit R, the source output channel corresponding to the source line connected to the sub-pixel unit B can continuously charge the sub-pixel unit B, and the source output channel corresponding to the source line connected to the sub-pixel unit G can continuously charge the sub-pixel unit G, thereby achieving a power saving effect.

[0045] In a possible implementation, when the arrangement order of sub-pixel units in each row of the pixel array is the same, in the sub-pixel units in the same row of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to the first gate line of the two gate lines corresponding to the sub-pixel units in the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to the second gate line of the two gate lines corresponding to the sub-pixel units in the row; the four adjacent columns of sub-pixel units in the pixel array correspond to three source lines, and in the four adjacent columns of sub-pixel units, the first column of sub-pixel units are connected to the first source line of the three source lines, the second column of sub-pixel units and the fourth column of sub-pixel units are connected to the second source line of the three source lines, and the third column of sub-pixel units are connected to the third source line of the three source lines. That is, in each row of the pixel array, all the first pixel unit groups share a gate line, and all the second pixel unit groups share a gate line; in the four adjacent columns of sub-pixel units in the pixel array, all the sub-pixel units R share a source line, all the sub-pixel units B share a source line, and all the sub-pixel units G share a source line. In this way, for an OLED display panel including a pixel array of M rows and 4*N columns, the OLED display panel includes 2*M gate lines and 3*N source lines (i.e., includes 2*M row channels and 3*N source output channels), and the number of source output channels is reduced by 1 / 4; and when charging the sub-pixel units in the pixel array, the source output channel corresponding to the source line connected to the sub-pixel unit R can continuously charge the sub-pixel unit R, the source output channel corresponding to the source line connected to the sub-pixel unit B can continuously charge the sub-pixel unit B, and the source output channel corresponding to the source line connected to the sub-pixel unit G can continuously charge the sub-pixel unit G, thereby achieving a power saving effect.

[0046] The embodiment of the present disclosure also proposes an OLED display device, which includes the OLED display panel, gate driving circuit and source driving circuit proposed in the embodiment of the present disclosure; wherein the gate driving circuit is connected to each gate line in the OLED display panel; the source driving circuit is connected to each source line in the OLED display panel; the gate driving circuit is used to output a gate driving signal to the gate line to control the corresponding row channel in the pixel array to be turned on or off; one row channel corresponds to a sub-pixel unit connected to the same gate line in the pixel array; the source driving circuit is used to output a source driving signal to the source line to provide a driving voltage for the sub-pixel unit in the pixel array.

[0047] Exemplarily, the source driving circuit may include a plurality of source driving units, each of which is connected to a source line in the OLED display panel and is used to provide a driving voltage for a sub-pixel unit connected to the source line.

[0048] Exemplarily, when the gate drive signal is at a low level, the corresponding row channel in the pixel array (ie, the row channel corresponding to the gate line input by the gate drive signal) is turned on; when the gate drive signal is at a high level, the corresponding row channel in the pixel array is turned off.

[0049] For example, the gate driving circuit can output a gate driving signal to control the row channels in the pixel array to be turned on row by row, and the source driving circuit can generate a source driving signal according to the display data to provide a driving voltage for each sub-pixel unit, thereby driving the OLED display panel to display the image to be displayed.

[0050] Exemplarily, the gate driving circuit in the OLED display device may be integrated into a gate driving chip, and the source driving circuit in the OLED display device may be integrated into a source driving chip.

[0051] The OLED display device of the embodiment of the present disclosure reduces the number of source output channels by increasing the number of row channels and designing the connection method of the sub-pixel units in the AA area of ​​the OLED display panel. It is not necessary to add a MUX in the OLED display panel to reduce the number of source output channels. Figure 1 The OLED display device shown in the figure reduces the height between the AA area in the OLED display panel and the source driver chip, thereby reducing the area of ​​the frame area of ​​the OLED display panel; and since no MUX is required, the OLED display device of the embodiment of the present disclosure is relatively Figure 1 The OLED display device shown is not affected by the on-resistance of the MUX, and the charging speed of the sub-pixel unit is faster.

[0052] Figure 3 A schematic diagram of an OLED display device according to an embodiment of the present disclosure is shown, wherein: Figure 3 (a) shows a schematic structural diagram of an OLED display device according to an embodiment of the present disclosure. Figure 3 (b) shows a schematic diagram of the driving timing of the OLED display device. It should be noted that: Figure 3 (a) shows only the first four rows and the first four columns of the pixel array of the OLED display device. Figure 3As shown in (a), in the OLED display device, the sub-pixel units of the odd-numbered rows of the pixel array of the OLED display panel are arranged cyclically in the order of R, G, B, G, and the sub-pixel units of the even-numbered rows are arranged cyclically in the order of B, G, R, G; in each row of the pixel array, all the sub-pixel units R and sub-pixel units B share a gate line, and all the sub-pixel units G share a gate line; two adjacent columns of sub-pixel units in the pixel array share a source line; the gate driving circuit is connected to each gate line in the OLED display panel, and the gate driving circuit is used to output a gate driving signal (i.e., G1~G8), and G1~G8 can control the row channels corresponding to gate lines 1 to gate lines 8 to be turned on row by row; the source driving circuit includes a plurality of source driving units (i.e., SOP1, SOP2), each source driving unit is connected to a source line in the OLED display panel, and is used to provide a driving voltage for the sub-pixel unit connected to the source line.

[0053] like Figure 3 As shown in (b), taking the first two rows of sub-pixel units of the pixel array as an example, when G1 changes from a high level to a low level, the row channel corresponding to gate line 1 is turned on, SOP1 charges sub-pixel unit R1, and SOP2 charges sub-pixel unit B1; then G1 changes from a low level to a high level, G2 changes from a high level to a low level, the row channel corresponding to gate line 1 is closed, the row channel corresponding to gate line 2 is turned on, SOP1 charges sub-pixel unit G11, and SOP2 charges sub-pixel unit G12; then G2 changes from a low level to a high level, G3 changes from a high level to a low level, the row channel corresponding to gate line 2 is closed, the row channel corresponding to gate line 3 is turned on, SOP1 charges sub-pixel unit B2, and SOP2 charges sub-pixel unit R2; then G3 changes from a low level to a high level, G4 changes from a high level to a low level, the row channel corresponding to gate line 3 is closed, the row channel corresponding to gate line 4 is turned on, SOP1 charges sub-pixel unit G21, and SOP2 charges sub-pixel unit G22. In the above process, the sub-pixel units output by the source output channel S1 are R1, G11, B2, and G21 in sequence (that is, SOP1 charges R1, G11, B2, and G21 in sequence); the sub-pixel units output by the source output channel S2 are B1, G12, R2, and G22 in sequence (that is, SOP2 charges B1, G12, R2, and G22 in sequence).

[0054] In this way, the OLED display device of the embodiment of the present disclosure can reduce the source output channels by half without using MUX. Figure 1 The OLED display device shown can reduce the height between the AA area of ​​the OLED display panel and the source driver chip, so that the lower frame of the OLED display panel can be narrower, thereby reducing the area of ​​the frame region of the OLED display panel without reducing the charging speed of the sub-pixel unit.

[0055] Figure 4 A schematic diagram of an OLED display device according to an embodiment of the present disclosure is shown, wherein: Figure 4 (a) shows a schematic structural diagram of an OLED display device according to an embodiment of the present disclosure. Figure 4 (b) shows a schematic diagram of the driving timing of the OLED display device. It should be noted that: Figure 4 (a) shows only the first four rows and the first four columns of the pixel array of the OLED display device. Figure 4 As shown in (a), in the OLED display device, the sub-pixel units of the odd-numbered rows of the pixel array of the OLED display panel are arranged in a cyclic order of R, G, B, G, and the sub-pixel units of the even-numbered rows are arranged in a cyclic order of B, G, R, G; in each row of the pixel array, all first pixel unit groups (i.e., adjacent sub-pixel units R and sub-pixel units G) share a gate line, and all second pixel unit groups (i.e., adjacent sub-pixel units B and sub-pixel units G) share a gate line; in four adjacent columns of sub-pixel units of the pixel array, all sub-pixels The unit R and the sub-pixel unit B share a source line, and all the sub-pixel units G share a source line; the gate drive circuit is connected to each gate line in the OLED display panel, and the gate drive circuit is used to output gate drive signals (i.e., G1 to G8), and G1 to G8 can control the row channels corresponding to gate lines 1 to gate lines 8 to be turned on row by row; the source drive circuit includes multiple source drive units (i.e., SOP1, SOP2), each source drive unit is connected to a source line in the OLED display panel, and is used to provide a drive voltage for the sub-pixel unit connected to the source line.

[0056] like Figure 4As shown in (b), taking the first two rows of sub-pixel units of the pixel array as an example, when G1 changes from a high level to a low level, the row channel corresponding to gate line 1 is turned on, SOP1 charges sub-pixel unit R1, and SOP2 charges sub-pixel unit G11; then G1 changes from a low level to a high level, G2 changes from a high level to a low level, the row channel corresponding to gate line 1 is closed, the row channel corresponding to gate line 2 is opened, SOP1 charges sub-pixel unit B1, and SOP2 charges sub-pixel unit G12; then G2 changes from a low level to a high level, G3 changes from a high level to a low level, the row channel corresponding to gate line 2 is closed, the row channel corresponding to gate line 3 is opened, SOP1 charges sub-pixel unit B2, and SOP2 charges sub-pixel unit G21; then G3 changes from a low level to a high level, G4 changes from a high level to a low level, the row channel corresponding to gate line 3 is closed, the row channel corresponding to gate line 4 is opened, SOP1 charges sub-pixel unit R2, and SOP2 charges sub-pixel unit G22. In the above process, the sub-pixel units output by the source output channel S1 are R1, B1, B2, and R2 in sequence (i.e., SOP1 charges R1, B1, B2, and R2 in sequence); the sub-pixel units output by the source output channel S2 are G11, G12, G21, and G22 in sequence (i.e., SOP2 charges G11, G12, G21, and G22 in sequence).

[0057] In this way, the OLED display device of the embodiment of the present disclosure can reduce the source output channels by half without using MUX. Figure 1 The OLED display device shown can reduce the height between the AA area of ​​the OLED display panel and the source driver chip, so that the lower frame of the OLED display panel can be narrower, thereby reducing the area of ​​the frame region of the OLED display panel and will not reduce the charging speed of the sub-pixel unit; in addition, in the OLED display device of the embodiment of the present disclosure, half of the source output channels can output two consecutive sub-pixel units displaying the same color (that is, can charge two consecutive sub-pixel units displaying the same color), and the other half of the source output channels can continuously output sub-pixel units displaying the same color (that is, can continuously charge sub-pixel units displaying the same color), and continuous charging of sub-pixel units displaying the same color does not require changing the charging voltage, so that a power saving effect can be achieved.

[0058] Figure 5 A schematic diagram of an OLED display device according to an embodiment of the present disclosure is shown, wherein: Figure 5 (a) shows a schematic structural diagram of an OLED display device according to an embodiment of the present disclosure. Figure 5 (b) shows a schematic diagram of the driving timing of the OLED display device. It should be noted that: Figure 5(a) shows only the first four rows and the first four columns of the pixel array of the OLED display device. Figure 5 As shown in (a), in the OLED display device, the sub-pixel units of the odd-numbered rows of the pixel array of the OLED display panel are arranged cyclically in the order of R, G, B, G, and the sub-pixel units of the even-numbered rows are arranged cyclically in the order of B, G, R, G; in each row of the pixel array, all the first pixel unit groups (i.e., adjacent sub-pixel units R and sub-pixel units G) share a gate line, and all the second pixel unit groups (i.e., adjacent sub-pixel units B and sub-pixel units G) share a gate line; in the four adjacent columns of sub-pixel units of the pixel array, all the sub-pixel units R share a gate line. Source line, all sub-pixel units B share one source line, and all sub-pixel units G share one source line; the gate driving circuit is connected to each gate line in the OLED display panel, and the gate driving circuit is used to output gate driving signals (i.e., G1~G8), and G1~G8 can control the row channels corresponding to gate lines 1~gate lines 8 to be turned on row by row; the source driving circuit includes multiple source driving units (i.e., SOP1, SOP2, SOP3), each source driving unit is connected to a source line in the OLED display panel, and is used to provide a driving voltage for the sub-pixel unit connected to the source line.

[0059] like Figure 5As shown in (b), taking the first two rows of sub-pixel units of the pixel array as an example, before G1 changes from a high level to a low level, SOP1 can pre-charge the sub-pixel unit R1. Since the row channel corresponding to gate line 1 is closed at this time, the charge pre-charged by SOP1 on the sub-pixel unit R1 can be accumulated on source line 1, and the sub-pixel unit R1 is charged when the row channel corresponding to gate line 1 is turned on; when G1 changes from a high level to a low level, the row channel corresponding to gate line 1 is turned on, SOP1 charges the sub-pixel unit R1, and SOP3 charges the sub-pixel unit R1. The pixel unit G11 is charged, and SOP2 can pre-charge the sub-pixel unit B1. Since the row channel corresponding to gate line 2 is closed at this time, the charge pre-charged by SOP2 for sub-pixel unit B1 can be accumulated on source line 2, and the sub-pixel unit B1 is charged when the row channel corresponding to gate line 2 is opened; then G1 changes from a low level to a high level, and G2 changes from a high level to a low level, the row channel corresponding to gate line 1 is closed, and the row channel corresponding to gate line 2 is opened, SOP2 charges the sub-pixel unit B1, and SOP3 charges the sub-pixel unit G12 is charged, SOP1 can pre-charge the sub-pixel unit R2. Since the row channel corresponding to gate line 3 is closed at this time, the charge pre-charged by SOP1 for sub-pixel unit R2 can be accumulated on source line 1, and the sub-pixel unit R2 is charged when the row channel corresponding to gate line 3 is turned on; then G2 changes from low level to high level, G3 changes from high level to low level, the row channel corresponding to gate line 2 is closed, and the row channel corresponding to gate line 3 is turned on, SOP1 charges the sub-pixel unit R2, and SOP3 charges the sub-pixel unit G21 Charging, SOP2 can pre-charge the sub-pixel unit B2. Since the row channel corresponding to gate line 4 is closed at this time, the charge pre-charged by SOP2 for sub-pixel unit B2 can be accumulated on source line 2, and the sub-pixel unit B2 is charged when the row channel corresponding to gate line 4 is turned on; then G3 changes from a low level to a high level, G4 changes from a high level to a low level, the row channel corresponding to gate line 3 is closed, and the row channel corresponding to gate line 4 is turned on, SOP2 charges sub-pixel unit B2, and SOP3 charges sub-pixel unit G22. In the above process, source output channel S1 continuously outputs sub-pixel unit R (i.e., SOP1 continuously charges sub-pixel unit R), source output channel S2 continuously outputs sub-pixel unit B (i.e., SOP2 continuously charges sub-pixel unit B), source output channel S3 continuously outputs sub-pixel unit G (i.e., SOP3 continuously charges sub-pixel unit G), and the charging time (including pre-charging time) of sub-pixel unit R and sub-pixel unit B is twice that of sub-pixel unit G.

[0060] In this way, the OLED display device of the embodiment of the present disclosure can reduce the source output channels by 1 / 4 without using MUX, and can reduce the height between the AA area of ​​the OLED display panel and the source driver chip, so that the lower frame of the OLED display panel can be narrower, thereby reducing the area of ​​the frame area of ​​the OLED display panel, and will not reduce the charging speed of the sub-pixel unit; and, in the OLED display device of the embodiment of the present disclosure, each source output channel can continuously output sub-pixel units displaying the same color (that is, can continuously charge sub-pixel units displaying the same color), thereby achieving a power saving effect; and In addition, since the areas of the sub-pixel units R and the sub-pixel units B are larger than the area of ​​the sub-pixel unit G, the charging time required for the sub-pixel units R and the sub-pixel units B is longer than the charging time required for the sub-pixel unit G. The charging time of the sub-pixel units R and the sub-pixel units B in the OLED display device of the embodiment of the present disclosure is twice that of the sub-pixel unit G. This can avoid the problem of darker display colors due to insufficient charging time of the sub-pixel units R and the sub-pixel units B when the refresh rate of the OLED display panel is high, and ensure that the charging time of the sub-pixel units R and the sub-pixel units B is sufficient, thereby ensuring a better display effect.

[0061] The embodiment of the present disclosure further provides an electronic device, which includes the OLED display device provided in the embodiment of the present disclosure.

[0062] Exemplarily, the electronic devices in the embodiments of the present disclosure include but are not limited to desktop computers, televisions, mobile devices with large screens such as mobile phones, tablet computers, and other common electronic devices.

[0063] The above description is merely an exemplary embodiment of the present invention and is not intended to limit the protection scope of the present invention. The protection scope of the present invention is determined by the appended claims.

[0064] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0065] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of more restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0066] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0067] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. An organic light emitting diode (OLED) display panel, characterized in that: The invention comprises a pixel array, a gate line and a source line; the pixel array comprises a plurality of sub-pixel units; each sub-pixel unit is connected to a gate line and a source line; in each row of the pixel array, every four sub-pixel units are arranged cyclically in the order of a first sub-pixel unit, a second sub-pixel unit, a third sub-pixel unit and a fourth sub-pixel unit; Among them, each sub-pixel unit in the same row of the pixel array is respectively connected to one of the two gate lines corresponding to the sub-pixel unit in the row, and the gate lines connected to the sub-pixel units in different rows are different; the sub-pixel units in each column of the pixel array are respectively connected to the corresponding source lines, and all the sub-pixel units connected to at least some of the source lines belong to two different columns.

2. The OLED display panel according to claim 1, characterized in that: In the same row of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; or, In the same row of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; The sub-pixel unit R is used to display red light, the sub-pixel unit B is used to display blue light, and the sub-pixel unit G is used to display green light.

3. The OLED display panel according to claim 1, characterized in that: In the odd-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; or, In the odd-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; in the even-numbered rows of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; The sub-pixel unit R is used to display red light, the sub-pixel unit B is used to display blue light, and the sub-pixel unit G is used to display green light.

4. The OLED display panel according to claim 1, characterized in that: In each row of the pixel array, the first sub-pixel unit is a sub-pixel unit R, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit B, and the fourth sub-pixel unit is a sub-pixel unit G; or, In each row of the pixel array, the first sub-pixel unit is a sub-pixel unit B, the second sub-pixel unit is a sub-pixel unit G, the third sub-pixel unit is a sub-pixel unit R, and the fourth sub-pixel unit is a sub-pixel unit G; The sub-pixel unit R is used to display red light, the sub-pixel unit B is used to display blue light, and the sub-pixel unit G is used to display green light.

5. The OLED display panel according to any one of claims 1 to 4, characterized in that: In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the third sub-pixel unit are connected to a first gate line corresponding to the sub-pixel unit of the row, and the second sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the sub-pixel unit of the row; The number of the source lines is half of the number of columns in the pixel array, and all sub-pixel units connected to each source line belong to two adjacent columns of sub-pixel units.

6. The OLED display panel according to any one of claims 1 to 4, characterized in that: In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to a first gate line corresponding to the sub-pixel unit of the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the sub-pixel unit of the row; The number of the source lines is half the number of columns in the pixel array, and all the sub-pixel units connected to each source line belong to two columns of sub-pixel units, each of which is spaced apart by one column of sub-pixel units.

7. The OLED display panel according to claim 3, characterized in that: In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to a first gate line corresponding to the sub-pixel unit of the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the sub-pixel unit of the row; Four adjacent columns of sub-pixel units of the pixel array correspond to three source lines, and among the four adjacent columns of sub-pixel units, the sub-pixel units located in odd rows in the first column of sub-pixel units and the sub-pixel units located in even rows in the third column of sub-pixel units are connected to the first source line among the three source lines, the sub-pixel units located in even rows in the first column of sub-pixel units and the sub-pixel units located in odd rows in the third column of sub-pixel units are connected to the second source line among the three source lines, and the sub-pixel units in the second column and the sub-pixel units in the fourth column are connected to the third source line among the three source lines.

8. The OLED display panel according to claim 4, characterized in that: In the same row of sub-pixel units of the pixel array, the first sub-pixel unit and the second sub-pixel unit are connected to a first gate line corresponding to the sub-pixel unit of the row, and the third sub-pixel unit and the fourth sub-pixel unit are connected to a second gate line corresponding to the sub-pixel unit of the row; Four adjacent columns of sub-pixel units of the pixel array correspond to three source lines, and among the four adjacent columns of sub-pixel units, the first column of sub-pixel units is connected to the first source line among the three source lines, the second column of sub-pixel units and the fourth column of sub-pixel units are connected to the second source line among the three source lines, and the third column of sub-pixel units is connected to the third source line among the three source lines.

9. An OLED display device, characterized in that: An OLED display panel, a gate driving circuit and a source driving circuit comprising any one of claims 1 to 8; Wherein, the gate driving circuit is connected to each gate line in the OLED display panel; the source driving circuit is connected to each source line in the OLED display panel; the gate driving circuit is used to output a gate driving signal to the gate line to control the corresponding row channel in the pixel array to be turned on or off; the source driving circuit is used to output a source driving signal to the source line to provide a driving voltage for the sub-pixel unit in the pixel array; wherein, one row channel corresponds to a sub-pixel unit connected to the same gate line in the pixel array.

10. An electronic device, characterized in that: The OLED display device according to claim 9 is included.

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