Transient current sharing method and system for parallel power modules
By sampling the current of the parallel power module, calculating the current equivalent difference and injecting additional driving current, the problem of current imbalance in the parallel power module is solved, fast and simple current balance is achieved, and system reliability and output performance are improved.
Patent Information
- Application Number
- CN202411925605.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-25
- Publication Date
- 2025-03-28
- Estimated Expiration
- 2044-12-25
AI Technical Summary
In parallel power modules, current imbalance causes power loss and electrical stress imbalance, reducing system reliability and output performance.
By sampling the current in the parallel power module, converting it into an induced voltage, integrating reduction, calculating the current equivalent difference, and generating an additional driving current injection module gate according to the difference to achieve current balance.
Quickly implement current balance of multiple parallel power modules in a single switching cycle, reducing power loss and electrical stress imbalance, and improving system reliability and output performance.
Smart Images

Figure CN119727334A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of power electronics technology, and in particular to a method and system for transient current sharing of parallel power modules. Background Art
[0002] At present, power devices widely used in industrial applications, such as insulated-gate bipolar transistors (IGBT) and silicon carbide metal-oxide semiconductor field-effect transistors (SiC Metal-Oxide-Semiconductor Field-Effect Transistor, SiC MOSFET), play a core role in power conversion in power transmission, rail transportation, electric vehicles and renewable energy generation. In order to improve the power capacity of the converter, multiple power modules are usually connected in parallel. However, parallel connection of multiple modules is prone to current imbalance. This current imbalance leads to power loss and differences in voltage and current stress within the converter system. Electrothermal stress imbalance accelerates module degradation, reduces system reliability and increases the probability of failure. Therefore, solving the problem of unbalanced current distribution between parallel power modules and improving the consistency of electrical stress and loss are crucial to optimizing the parallel output performance and reliability of power modules.
[0003] In terms of suppressing uneven transient currents, existing methods mainly include passive technology and active gate drive methods. Passive methods quickly achieve current sharing by adding additional coupled inductors, resistors, or a combination thereof. However, these methods always change the original layout of the equipment and change the overall electrical and thermal characteristics of the parallel modules. As the number of parallel devices increases, the number of passive components also increases, making it difficult to reduce their size and weight. When the current level and frequency change, it is difficult for passive methods to make corresponding adjustments, resulting in poor adaptability. These limitations hinder the scalability and flexibility of passive current balancing technology. At present, active drive methods still have shortcomings such as increased system scale and complexity and difficulty in achieving current balancing within a single switching cycle. Summary of the invention
[0004] The present invention provides a method and system for transient current balancing of parallel power modules, and solves the technical problem of how to quickly and simply achieve current balancing of multiple parallel power modules within a single switching cycle.
[0005] In order to solve the above technical problems, the present invention provides a method for transient current sharing of parallel power modules, comprising the steps of:
[0006] S1, sample the current of N power modules connected in parallel and convert it into induced voltage, N≥2;
[0007] S2, integrating and restoring the sampled induced voltage of each power module to obtain a corresponding integrated voltage;
[0008] S3, taking the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and taking the N integrated voltages as the comparison current equivalent values;
[0009] S4, calculating the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values;
[0010] S5. Generate corresponding additional driving current according to the N current equivalent differences and inject it into the gate of the corresponding power module.
[0011] Furthermore, the step S5 specifically includes the steps of:
[0012] Each current equivalent difference is compared with the corresponding set reference value through a high-speed hysteresis comparator, and the corresponding control pulse is output;
[0013] After the signal selection tri-state gate, only the control pulse at the opening moment is retained, and then the control pulse is isolated by a high-bandwidth digital isolator and input into the Schmitt buffer for buffering;
[0014] The buffered control pulse is used as a control signal of a current mirror circuit, and the current mirror circuit outputs a driving current to a gate of a corresponding power module.
[0015] Furthermore, the current mirror circuit includes an N MOSFET M1, a PMOSFET M2 complementary to the N MOSFET, a P MOSFET M3 identical to M2, an anti-backflow diode D1, and an M1 pull-down resistor R cm1 , Input branch resistor R cm2 , output branch resistor R cm3 And the driving power supply of the corresponding power module is used as the current mirror power supply V DD ; where R cm1 Coupled between the Schmitt buffer in the front stage of the current mirror circuit and the driving ground GND, R cm2 Coupled between the source of M1 and the driving ground GND, the gate of M1 is connected to the Schmitt buffer before the current mirror circuit, the drain is connected to the drain of M2, the drain of M2 is shorted to its own gate and connected to the gate of M3, the source of M2 is connected to the source of M3 and connected to V DD connected, the drain of M3 is connected to the anode of D1, R cm3 Coupled between the cathode of D1 and the gate of the corresponding power module.
[0016] Further, V gp is the Miller platform voltage corresponding to the controlled power module, V D1 is the conduction voltage drop of diode D1, iLM is the input branch current of the current mirror circuit, R dsonm3 is the on-state voltage drop of MOSFET M3, R gint is the gate drive internal resistance of the controlled power module, Δv ge (t) is the driving voltage value required for compensation.
[0017] Furthermore, in the step S1, N printed circuit board Rogowski coil current sensors, ie, PCB RCCS, are respectively inserted into the current branches of the N power modules to sample the currents of the N power modules, and the sampled currents are converted into induced voltages.
[0018] Furthermore, each PCB RCCS is equivalent to a voltage source e(t), a coil self-inductance L s , the distributed capacitance C in the coil s , coil internal resistance R s And the terminal resistance R d , where the voltage source e(t), self-inductance L s With internal resistance R s After connecting in series with the distributed capacitance C s Parallel, distributed capacitance C s And the terminal resistance R d Parallel connection, terminal resistance R d The two ends are connected to the subsequent circuit.
[0019] Furthermore, the terminal resistance R d The values are:
[0020] Further, in the step S2, N active integrators are used to perform integral restoration; each of the active integrators includes: an integral resistor, an integral capacitor, a high-bandwidth operational amplifier, an integral capacitor auxiliary reset circuit, i.e., an Aux circuit, a debiasing zeroing circuit, and a high-bandwidth follower; the integral resistor is coupled between the output of the sampling unit and the inverting input terminal of the high-bandwidth operational amplifier, and is connected to the integral capacitor and the Aux circuit; the integral capacitor is coupled between the inverting input terminal and the output terminal of the high-bandwidth operational amplifier, and is connected in parallel with the Aux circuit; the debiasing zeroing circuit is coupled between the non-inverting input terminal of the high-bandwidth operational amplifier and the ground GND; the high-bandwidth follower is coupled between the output of the high-bandwidth operational amplifier and the maximum value selection unit; the output of the high-bandwidth operational amplifier is equivalent to the corresponding power module current, and the output impedance is increased by the high-bandwidth follower.
[0021] Furthermore, in step S4, N differential followers are used to calculate the current equivalent difference; the calculation process of each differential follower is: taking an integrated voltage and a maximum voltage as a group of input voltages, the differential follower calculates the difference between the integrated voltage and the maximum voltage in the group of input voltages to obtain the corresponding current equivalent difference.
[0022] The present invention also provides a transient current sharing system for parallel power modules, the key of which is that it includes a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit and a drive current injection unit, and the sampling unit, the active integration unit, the maximum value selection unit, the current difference calculation unit and the drive current injection unit are respectively used to execute steps S1 to S5 in the transient current sharing method for parallel power modules.
[0023] The instantaneous current balancing method and system for parallel power modules provided by the present invention first samples the current of N parallel power modules and converts it into an induced voltage, N≥2; then integrates and restores the induced voltage of each sampled power module to obtain the corresponding integrated voltage; then uses the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and uses the N integrated voltages as the comparison current equivalent value; then calculates the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values; then generates the corresponding additional drive current according to the N current equivalent difference and injects it into the gate of the corresponding power module. The system respectively sets up the sampling unit, active integration unit, maximum value selection unit, current difference calculation unit and drive current injection unit to implement each step in the method, and these units are built by basic electronic components such as comparators, resistors, diodes, filters, etc. Compared with the existing active drive method, the low cost, compact size and fast response characteristics of the invention provide an efficient and practical solution for current balancing in industrial applications involving multiple parallel modules. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 is a flow chart of a method for transient current sharing of parallel power modules provided by an embodiment of the present invention;
[0025] Figure 2 is a circuit diagram of a transient current sharing system for parallel power modules provided by an embodiment of the present invention;
[0026] Figure 3 is an equivalent circuit diagram of a PCB RCCS and an active integrator provided in an embodiment of the present invention;
[0027] Figure 4 It is a measurement effect diagram of the PCB RCCS and active integrator provided by an embodiment of the present invention;
[0028] Figure 5is a circuit diagram of a first driving current injection circuit provided by an embodiment of the present invention;
[0029] Figure 6 It is a diagram showing the test results of the current difference calculation unit, the driving current injection unit and the injection driving current effect provided by the embodiment of the present invention;
[0030] Figure 7 This is a diagram showing the effect of the invention on suppressing transient current unevenness when the DC voltage provided by the embodiment of the present invention is 270V. DETAILED DESCRIPTION
[0031] The following specifically illustrates the implementation mode of the present invention in conjunction with the accompanying drawings. The embodiments are provided for illustrative purposes only and cannot be understood as limiting the present invention. The accompanying drawings are provided for reference and illustration only and do not constitute a limitation on the scope of patent protection of the present invention, because many changes can be made to the present invention without departing from the spirit and scope of the present invention.
[0032] The instantaneous current sharing method of parallel power modules provided by the embodiment of the present invention is as follows: Figure 1 As shown, the steps include:
[0033] S1, sample the current of N power modules connected in parallel and convert it into induced voltage, N≥2;
[0034] S2, integrating and restoring the sampled induced voltage of each power module to obtain a corresponding integrated voltage;
[0035] S3, taking the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and taking the N integrated voltages as the comparison current equivalent values;
[0036] S4, calculating the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values;
[0037] S5. Generate corresponding additional driving current according to the N current equivalent differences and inject it into the gate of the corresponding power module.
[0038] This embodiment also provides a parallel power module transient current sharing system to specifically apply the above method. The system includes a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit and a drive current injection unit, which are respectively used to execute steps S1 to S5 in the above method.
[0039] (1) Step S1
[0040] Figure 2The invention relates to a circuit structure of a transient current sharing system for parallel power modules using a transient current sharing method for parallel power modules. In order to reliably and contactlessly sample the current of N parallel power modules, this embodiment uses N PCBRCCS (printed circuit board Rogowski coil current sensors) to be respectively inserted into the current branches of the N power modules to sample the current of the N power modules and convert the sampled current into an induced voltage. The N PCB RCCS constitute a sampling unit.
[0041] like Figure 2 As shown, N PCBs RCCS are arranged in sequence, including PCB RCCS1 to PCB RCCSN, and the currents of the current branches of the corresponding N power modules are represented as device currents i1 to i N .
[0042] The equivalent model of PCB RCCS is as follows Figure 3 As shown in the left part, it includes the equivalent voltage source e(t), the coil self-inductance L s , the distributed capacitance C in the coil s , coil internal resistance R s And the terminal resistance R d , where the equivalent voltage source e(t), self-inductance L s With internal resistance R s After connecting in series with the distributed capacitance C s Parallel, distributed capacitance C s And the terminal resistance R d Parallel connection, terminal resistance R d The two ends are connected to the subsequent circuit.
[0043] Self-inductance L of the entire coil in PCB RCCS s Determined by the number of turns N1 / N2 of the forward / reverse coil. The inner diameter / outer diameter of the forward / reverse coil is r1 / r2, the self-resonant frequency of the forward / reverse coil is ω1 / ω2, and the effective height of the PCB coil is h, then the coil self-inductance L s It can be expressed as:
[0044]
[0045] Among them, μ n is the vacuum permeability, μ r is the relative magnetic permeability of the PCB material.
[0046] The mutual inductance M between the PCB RCCS and the current branch of the corresponding power module affects the amplification of the collected signal. A higher M makes it easier for the subsequent integration circuit or analog-to-digital converter (ADC) to process the RCCS output signal. However, M is limited by the number of coil turns N and the required bandwidth. A lower M will result in a lower signal-to-noise ratio (SNR) of the coil output. M can be expressed as:
[0047]
[0048] In addition, the distributed capacitance C in the coil s The existence of the coil's self-inductance L s A low-pass filter is formed, which significantly affects the high-frequency performance. Its influence on the dynamic characteristics of the coil cannot be ignored. The distributed capacitance along the average circumference of the coil can be expressed as:
[0049]
[0050] where ε0 is the dielectric constant of vacuum and ε r is the relative dielectric constant of the PCB material.
[0051] In addition, considering the dynamic performance and steady-state error of RCCS, the terminal resistance R d The best approach is as follows:
[0052]
[0053] It should be noted that, in other implementations, other non-contact, high-reliability current sampling sensors, such as commercial current Hall sensors and current transformers with magnetic cores, may be used to implement step S1. The advantages of the PCB RCCS used in this embodiment over other feasible solutions are: a wide current measurement range without current saturation; a small measurement device that is easy to use with more modules in parallel.
[0054] (2) Step S2
[0055] In order to integrate and restore the weak induced voltage signal outputted in step S1 into a suitable voltage signal and ensure that it satisfies the effect of matching the ratio of the actual current amplitude and phase following, this embodiment uses N active integrators (active integrator 1 to active integrator N) to be connected to N PCB RCCSs one by one, such as Figure 2 As shown in FIG. N active integrators constitute an active integration unit.
[0056] The equivalent model of each active integrator is as follows: Figure 3 As shown in the right part of Figure 3As shown, the equivalent model of the active integrator includes: integrating resistor R1, integrating capacitor C1, high-bandwidth operational amplifier, integrating capacitor auxiliary reset circuit (Aux), and high-bandwidth follower. R1, C1 and high-bandwidth operational amplifier form an active integration circuit. By adjusting R1 and C1 to match the amplitude and phase requirements required for sampling, the collected weak induction voltage is integrated and restored to the equivalent voltage value of the success module current, and the integrating capacitor is periodically discharged through the Aux circuit to avoid measurement errors caused by capacitor saturation. Finally, the integrated voltage of the active integration circuit is output through the high-bandwidth follower to avoid the influence of the subsequent circuit on the integrated voltage. The output of the active integrator can be simply expressed as:
[0057]
[0058] The measurement effect of a set of PCB RCCS and active integrator proposed by the present invention is as follows Figure 4 shown. Figure 4 In the figure, i1 and i2 represent the original currents of power modules 1 and 2 respectively, and v rog1 、v rog2 They represent the integrated voltage of power module 1 and the integrated voltage of power module 2 after passing through the sampling unit and the integration unit respectively. Figure 4 (a) is an overview of the integrated signal restoration with a time axis of 20us per grid. The details of power device opening and closing are respectively Figure 4 (b) Figure 4 is shown in (c). Figure 4 It shows that the PCB RCCS and its active integrator meet the current measurement requirements of power devices, the amplitude is stable and the phase meets the requirements, providing a reliable current sampling input for subsequent current balance control.
[0059] It should be noted that, in other implementations, other integrators may be used to implement step S2, such as an RC passive integrator, a digital integrator, etc. The active integrator used in this embodiment has the following advantages over other feasible solutions: the active integrator has a large amplitude gain, can be adjusted at any time, has a high signal-to-noise ratio, and does not require a complex logic processing chip for calculation.
[0060] (3) Step S3
[0061] To implement step S3, Figure 2As shown, this embodiment uses a maximum value selection unit connected to the output ends of N active integrators to compare the N integrated voltages output by the N active integrators, determine the maximum value therein, and output the N integrated voltages and the maximum voltage to the corresponding N subsequent circuits. The maximum value selection unit includes N high-bandwidth operational amplifiers and N clamping diodes. By connecting the outputs of the N high-bandwidth operational amplifiers and utilizing the voltage clamping function of the clamping diodes, the N inputs of the high-bandwidth operational amplifiers are screened to obtain the maximum input voltage among the N high-bandwidth operational amplifiers.
[0062] It should be noted that, in other implementations, other maximum value selection units may be used to implement step S3, such as a maximum value selection circuit based on diode clamping. The maximum value selection unit used in this embodiment has the advantages of avoiding the influence on the previous stage circuit through high-bandwidth operational amplifier follower, and eliminating the weakening of the input signal by the diode tube voltage drop, thereby achieving lossless and high-speed maximum value selection.
[0063] (4) Step S4
[0064] In order to implement step S4, this embodiment uses a current difference calculation unit to perform a subtraction operation through a high-speed high-bandwidth differential amplifier, and outputs the current equivalent difference result through the high-speed high-bandwidth amplifier. Figure 2 As shown, the current difference calculation unit includes N differential followers, and the current equivalent difference calculation process is as follows: an integral voltage and a maximum voltage are input into a differential follower as a group of input voltages, thereby obtaining a differential follower corresponding to N groups of input voltages, and the differential follower calculates the difference between the integral voltage and the maximum voltage in the group of input voltages, and obtains the current equivalent difference and inputs it into the subsequent circuit. Figure 2 As shown, the differential follower specifically includes: a high-speed and high-bandwidth differential operational amplifier and a high-bandwidth voltage follower. The high-speed and high-bandwidth differential operational amplifier is used to implement algebraic subtraction of two input signals to obtain a current equivalent difference, which is then output through a high-bandwidth voltage follower to improve the circuit output capability.
[0065] It should be noted that in other implementations, other current difference calculation units, such as instrument amplifier circuits, may be used to implement step S4. This embodiment uses a current difference calculation unit composed of N differential followers, which has the advantages of requiring fewer operational amplifiers, being simple to use, and being convenient for multi-channel signal processing compared to other feasible solutions.
[0066] (5) Step S5
[0067] In order to implement step S5, this embodiment uses a driving current injection unit to generate a corresponding additional driving current according to the N current equivalent difference signals output by the current difference calculation unit. Figure 2The driving current injection unit includes N driving current injection circuits, the front stage of which is connected to N differential followers in a one-to-one correspondence, and the back stage of which is connected to N power modules in a one-to-one correspondence. The input of each driving current injection circuit is the current equivalent difference output by the differential follower of the front stage. The N driving current injection circuits compare the current equivalent difference with their own set reference value (v ref1 、v ref2 、···、v refN In theory, the reference value is 0. If it is not 0, it means there is a gap and needs to be adjusted. But in reality, each pre-stage circuit will generate a voltage bias, and the bias is different and irregular, which is related to the manufacturing process of components and parts, so it is necessary to look at the actual situation to correct the reference value) comparison, after the high-speed hysteresis comparator (U1), the equivalent active drive circuit control pulse of the output power module is output; then, after the signal selection tri-state gate (U2), only the control pulse at the opening time is retained, and the control pulse with GND as the reference ground is isolated to the corresponding power module drive ground through the high-bandwidth digital isolator (U3), and then buffered through the Schmitt buffer (U4, to improve the output current capability); finally, the control pulse is used as the control signal of the current mirror circuit, and the current mirror circuit outputs the drive current to inject additional drive current into the corresponding power module gate.
[0068] Figure 5 This is the circuit diagram of the first drive current injection circuit. The remaining drive current injection circuits use the same Figure 5 The same circuit structure. Figure 5 As shown, the current mirror circuit includes: N MOSFET M1, P MOSFET M2 complementary to N MOSFET, P MOSFET M3 identical to M2, anti-backflow diode D1, M1 pull-down resistor R cm1 , Input branch resistor R cm2 , output branch resistor R cm3 And the driving power supply of the corresponding power module is used as the current mirror power supply V DD . Where R cm1 Coupled between the Schmitt buffer in the front stage of the current mirror circuit and the driving ground GND, R cm2 Coupled between the source of M1 and the driving ground GND, the gate of M1 is connected to the Schmitt buffer before the current mirror circuit, the drain is connected to the drain of M2, the drain of M2 is shorted to its own gate and connected to the gate of M3, the source of M2 is connected to the source of M3 and connected to V DD connected, the drain of M3 is connected to the anode of D1, R cm3 Coupled between the cathode of D1 and the gate of the corresponding power module.
[0069] exist Figure 5 In the current mirror circuit shown in the figure, it is necessary to pre-design and adjust the output branch current sink resistor Rcm3 The value is used to control the intensity of the injected gate current. The value range of the injection current resistor has the following relationship:
[0070]
[0071] Among them, R cm3 is the current mirror output branch current sink resistor, V DD_1 is the driving power supply of power module 1, V gp is the Miller platform voltage corresponding to the controlled power module, V D1 is the conduction voltage drop of diode D1, i LM is the input branch current of the current mirror circuit, R dsonm3 is the on-state voltage drop of the current mirror MOSFET M3, R gint is the gate drive internal resistance of the controlled power module, Δv ge (t) is the driving voltage value required for compensation.
[0072] Through the above steps, the present invention can use the current mirror circuit to inject additional current into the gate during the turn-on transient period to significantly suppress the gate voltage change, thereby greatly reducing the transient current imbalance of the power module.
[0073] Figure 6 The figure shows the test results of the current difference calculation unit, the drive current injection unit, and the injection drive current effect. Figure 6 In the figure, i1 and i2 represent the original currents of power modules 1 and 2 respectively, and v rog1 -v rog2 It represents the current equivalent difference value between power module 1 and power module 2 output by the current difference calculation unit, and PULSE represents the pulse output result after the U1 high-speed hysteresis comparator. Figure 6 (a) is an overview of the integrated signal restoration with a time axis of 40us per grid. The details of power device opening and closing are respectively Figure 6 (b) Figure 6 is shown in (c). Figure 6 This indicates that the signal selection tri-state gate U2 is correctly selected at the opening time, and the v rog1 -v rog2 The correct conversion into current mirror control pulse verifies that the logic signal processing circuit part works correctly.
[0074] Figure 7 The figure is a diagram showing the effect of the invention on suppressing transient current unevenness when the DC voltage is 270V. Figure 7 In the figure, i1 and i2 represent the original currents of power modules 1 and 2 respectively, v1 and v2 represent the operating voltages of power modules 1 and 2 respectively, and v g1 、v g2They are respectively represented as the driving voltage of power modules 1 and 2, t res Indicates the time required to restore the current-sharing state, Δi max represents the maximum current difference, t0 represents the time when the current starts to rise, t1 represents the time when the driving voltage reaches the Miller platform without the effect of the invention, and t1' represents the time when the driving voltage reaches the Miller platform after the effect of the invention. Figure 7 It can be seen that when the DC voltage V dc =270V and parasitic inductance difference ΔL en =8nH, the transient current imbalance between parallel devices is serious, and the maximum current difference Δi max is 17.5A, and it takes about 40us to restore the current balance state. However, after the transient current equalization method of parallel power modules proposed in the present invention, the maximum current difference Δi max When the current is reduced to 12.1A, only 1.3us is needed to suppress the current imbalance. (t1-t0) is reduced from 1270ns to 1072ns, and the switching speed of the controlled power device is increased. After repeated tests at multiple voltage levels, the test results are shown in Table 1.
[0075] Table 1 Experimental verification results
[0076]
[0077] The data in Table 1 show that as the operating voltage gradually increases, the operating current of the device increases, and the average value of the current imbalance also increases. However, the increase in operating voltage and current has a very limited effect on the imbalance, and the transient current sharing method of parallel power modules makes the current imbalance less than 4%. In addition, due to the significant and rapid suppression of current imbalance, the loss difference between parallel devices is greatly reduced, and the consistency of the working state of parallel devices is enhanced.
[0078] In summary, the instantaneous current balancing method and system for parallel power modules provided by the embodiment of the present invention first samples the current of N power modules in parallel and converts it into an induced voltage, N≥2; then integrates and restores the induced voltage of each sampled power module to obtain the corresponding integrated voltage; then uses the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and uses the N integrated voltages as the comparison current equivalent value; then calculates the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values; then generates the corresponding additional drive current according to the N current equivalent difference and injects it into the gate of the corresponding power module. The system respectively sets up the sampling unit, active integration unit, maximum value selection unit, current difference calculation unit and drive current injection unit to implement each step in the method, and these units are built by basic electronic components such as comparators, resistors, diodes, filters, etc. Compared with the existing active drive method, the low cost, compact size and fast response characteristics of the invention provide an efficient and practical solution for current balancing in industrial applications involving multiple parallel modules.
[0079] The above embodiments are preferred implementation modes of the present invention, but the implementation modes of the present invention are not limited to the above embodiments. Any other changes, modifications, substitutions, combinations, and simplifications that do not deviate from the spirit and principles of the present invention should be equivalent replacement methods and are included in the protection scope of the present invention.
Claims
1. A method for transient current sharing of parallel power modules, characterized in that: Includes steps: S1, sample the current of N power modules connected in parallel and convert it into induced voltage, N≥2; S2, integrating and restoring the sampled induced voltage of each power module to obtain a corresponding integrated voltage; S3, taking the largest integrated voltage among the N integrated voltages as the reference current equivalent value, and taking the N integrated voltages as the comparison current equivalent values; S4, calculating the current equivalent difference between the reference current equivalent value and the N comparison current equivalent values; S5. Generate corresponding additional driving current according to the N current equivalent differences and inject it into the gate of the corresponding power module.
2. The method for parallel power modules transient current sharing according to claim 1, characterized in that: The step S5 specifically comprises the following steps: Each current equivalent difference is compared with the corresponding set reference value through a high-speed hysteresis comparator, and the corresponding control pulse is output; After the signal selection tri-state gate, only the control pulse at the opening moment is retained, and then the control pulse is isolated by a high-bandwidth digital isolator and input into the Schmitt buffer for buffering; The buffered control pulse is used as a control signal of a current mirror circuit, and the current mirror circuit outputs a driving current to a gate of a corresponding power module.
3. The method for parallel power modules in transient current sharing according to claim 2, characterized in that: The current mirror circuit includes an N MOSFET M1, a P MOSFET M2 complementary to the N MOSFET, a P MOSFET M3 identical to M2, an anti-backflow diode D1, and an M1 pull-down resistor R cm1 , Input branch resistor R cm2 , output branch resistor R cm3 And the driving power supply of the corresponding power module is used as the current mirror power supply V DD ; where R cm1 Coupled between the Schmitt buffer in the front stage of the current mirror circuit and the driving ground GND, R cm2 Coupled between the source of M1 and the driving ground GND, the gate of M1 is connected to the Schmitt buffer before the current mirror circuit, the drain is connected to the drain of M2, the drain of M2 is shorted to its own gate and connected to the gate of M3, the source of M2 is connected to the source of M3 and connected to V DD connected, the drain of M3 is connected to the anode of D1, R cm3 Coupled between the cathode of D1 and the gate of the corresponding power module.
4. The method for parallel power modules in transient current sharing according to claim 3, characterized in that: V gp is the Miller platform voltage corresponding to the controlled power module, V D1 is the conduction voltage drop of diode D1, i LM is the input branch current of the current mirror circuit, R dsonm3 is the on-state voltage drop of MOSFET M3, R gint is the gate drive internal resistance of the controlled power module, Δv ge (t) is the driving voltage value required for compensation.
5. The method for parallel power modules in transient current sharing according to claim 1, characterized in that: In the step S1, N printed circuit board Rogowski coil current sensors, ie, PCB RCCS, are respectively inserted into the current branches of N power modules to sample the currents of the N power modules, and the sampled currents are converted into induced voltages.
6. The method for parallel power modules in transient current sharing according to claim 5, characterized in that: Each PCB RCCS is equivalent to a voltage source e(t), coil self-inductance L s , the distributed capacitance C in the coil s , coil internal resistance R s And the terminal resistance R d , where the voltage source e(t), self-inductance L s With internal resistance R s After connecting in series with the distributed capacitance C s Parallel, distributed capacitance C s And the terminal resistance R d Parallel connection, terminal resistance R d The two ends are connected to the subsequent circuit.
7. The method for parallel power modules transient current sharing according to claim 6, characterized in that: Terminal resistance R d The values are:
8. The method for parallel power modules transient current sharing according to claim 1, characterized in that: In step S2, N active integrators are used to perform integral restoration; each of the active integrators includes an integral resistor, an integral capacitor, a high-bandwidth operational amplifier, an integral capacitor auxiliary reset circuit, i.e., an Aux circuit, a debiasing zeroing circuit, and a high-bandwidth follower; the integral resistor is coupled between the output of the sampling unit and the inverting input terminal of the high-bandwidth operational amplifier, and is connected to the integral capacitor and the Aux circuit; the integral capacitor is coupled between the inverting input terminal and the output terminal of the high-bandwidth operational amplifier, and is connected in parallel with the Aux circuit; the debiasing zeroing circuit is coupled between the non-inverting input terminal of the high-bandwidth operational amplifier and the ground GND; the high-bandwidth follower is coupled between the output of the high-bandwidth operational amplifier and the maximum value selection unit; the output of the high-bandwidth operational amplifier is equivalent to the corresponding power module current, and the output impedance is increased by the high-bandwidth follower.
9. The method for parallel power modules in transient current sharing according to claim 1, characterized in that: In step S4, N differential followers are used to calculate the current equivalent difference; the calculation process of each differential follower is: taking an integrated voltage and a maximum voltage as a group of input voltages, the differential follower calculates the difference between the integrated voltage and the maximum voltage in the group of input voltages to obtain the corresponding current equivalent difference.
10. Parallel power module transient current sharing system, characterized by: It includes a sampling unit, an active integration unit, a maximum value selection unit, a current difference calculation unit and a drive current injection unit, wherein the sampling unit, the active integration unit, the maximum value selection unit, the current difference calculation unit and the drive current injection unit are respectively used to execute steps S1 to S5 in the transient current sharing method for parallel power modules according to any one of claims 1 to 9.
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