Novel on-chip Class-BJ power amplifier

Abstract

The invention relates to the technical field of radio frequency chips, in particular to a novel on-chip Class-BJ power amplifier which comprises a harmonic generation part, an amplitude and phase control part and a power amplification part. The harmonic generation part generates a second harmonic component by using nonlinearity of a transformer, the amplitude and phase control part controls a phase between a second harmonic and a fundamental wave by using a first power amplification circuit and a matching circuit, and the power amplification part is responsible for realizing a Class-BJ working mode. According to the invention, the efficiency is higher, and the problem of high drain voltage of the traditional Class-BJ is avoided.

Description

Technical Field

[0001] The present invention relates to the technical field of radio frequency chips, and in particular to a novel on-chip Class-BJ power amplifier. Background Art

[0002] The demand for high-speed modern wireless communications, especially the millimeter-wave frequency band of 5G communications, has made the operating frequency of wireless systems higher and higher. CMOS power amplifiers with high output power and high efficiency have become an urgent need at present. Single high-output power, high-efficiency millimeter-wave power amplifiers still have great challenges. In the existing low-voltage silicon-based process, it is difficult for power amplifiers to achieve watt-level output power and high efficiency at the same time, and the high drain voltage brought about by high output power may cause MOS tube breakdown. The existing working modes include Class B power amplifiers and traditional Class J power amplifiers. For example, Class B power amplifiers: its gate bias is equal to the threshold voltage of the tube, and the maximum conduction angle is 180°. The ideal Class B power amplifier can achieve an efficiency of 78.5%, and the maximum output power is

[0003]

[0004] Among them I DC is the DC component of the drain current of the tube, V DD is the drain voltage of the tube. It is not difficult to see that the efficiency of the Class B amplifier still has room for improvement, and the influence of high-frequency harmonics is not considered at all. For example, the Class J amplifier: it shapes the drain voltage waveform on the basis of the Class B amplifier, and the resonant cavity at the drain presents a low resistance at the second harmonic frequency to achieve control of the drain voltage waveform. The efficiency and output power of the ideal Class J are consistent with those of the ideal Class B amplifier. It is not difficult to see that the Class J amplifier still has room for improvement in efficiency, and the drain voltage peak will exceed 2V. DD problem. Summary of the invention

[0005] The present invention provides a novel on-chip Class-BJ power amplifier that can achieve higher efficiency.

[0006] According to a novel on-chip Class-BJ power amplifier of the present invention, it includes a harmonic generation part, an amplitude and phase control part, and a power amplification part; the harmonic generation part uses the nonlinearity of the transformer to generate a second harmonic component, the amplitude and phase control part uses a first power amplifier circuit and a matching circuit to control the phase between the second harmonic and the fundamental wave, and the power amplification part is responsible for realizing the Class-BJ working mode.

[0007] Preferably, the on-chip Class-B / J power amplifier further comprises a power synthesis unit, and the power synthesis unit is used to synthesize the output powers of multiple Class-B / J power amplifiers to output a target signal.

[0008] Preferably, a transformer of the harmonic generating part has a first end connected to an input signal and a second end connected to ground.

[0009] Preferably, the transformer of the harmonic generating part utilizes the imbalance of the layout to generate the required second harmonic component.

[0010] Preferably, the matching circuit uses a symmetrical transformer, which produces different phase shifts for the fundamental wave and the second harmonic, thereby achieving control of the phase difference.

[0011] Preferably, the first power amplifier circuit has different gains for the fundamental wave and the second harmonic, thereby achieving control of the amplitude difference.

[0012] Preferably, the amplitude and phase control part includes a plurality of groups of the first power amplifying circuits and the matching circuits.

[0013] Preferably, the power amplifier part comprises a second power amplifier circuit, a gate of the second power amplifier circuit simultaneously inputs fundamental wave and second harmonic components, and a drain of the second power amplifier circuit uses a resonant cavity to control the fundamental wave and second harmonic components.

[0014] Preferably, both the first power amplifier circuit and the second power amplifier circuit are MOS tubes.

[0015] The technical solution provided by the present invention has the following beneficial effects:

[0016] Through the above technical solution, the fundamental wave and the second harmonic simultaneously input to the gate and the matching circuit of the drain are used to realize the shaping of the drain waveform, thereby achieving higher efficiency. At the same time, when the output power is consistent with that of a Class B power amplifier, there will be no voltage breakdown problem. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic diagram of a novel on-chip Class-BJ power amplifier shown in an embodiment.

[0018] Figure 2 is a schematic diagram of a power amplification part shown in the embodiment.

[0019] Figure 3 FIG. 1 is a schematic diagram of a power amplification portion of a conventional class B power amplifier according to an embodiment.

[0020] Figure 4FIG. 1 is a schematic diagram of a power amplification portion of a conventional class-J power amplifier according to an embodiment.

[0021] Figure 5 FIG. 4 is a layout diagram of a novel on-chip Class-BJ power amplifier shown in an embodiment.

[0022] Figure 6 is a schematic diagram of a novel on-chip Class-BJ power amplifier shown in an embodiment.

[0023] Figure 7 Schematic diagram showing the variation of output saturation power of a novel on-chip Class-BJ power amplifier with frequency according to an embodiment.

[0024] Figure 8 FIG. 4 is a schematic diagram showing how the efficiency of a novel on-chip Class-BJ power amplifier varies with frequency according to an embodiment. DETAILED DESCRIPTION

[0025] In order to further understand the content of the present invention, the present invention is described in detail in conjunction with the accompanying drawings and embodiments. It should be understood that the embodiments are only for explaining the present invention and are not intended to limit it.

[0026] Example

[0027] like Figure 1 As shown, this embodiment provides a novel on-chip Class-BJ power amplifier, which includes a harmonic generation part, an amplitude and phase control part, and a power amplification part; the harmonic generation part utilizes the nonlinearity of the transformer to generate a second harmonic component, the amplitude and phase control part utilizes a first power amplifier circuit and a matching circuit to control the phase between the second harmonic and the fundamental wave, and the power amplification part is responsible for realizing the Class-BJ working mode. Figure 1 In the equation, v represents the voltage amplitude, t represents the time, f represents the frequency, f0 represents the fundamental frequency, V G Represents the gate DC bias voltage, V DD represents the drain DC bias voltage, and θ represents the phase difference between the fundamental and second harmonic.

[0028] The on-chip Class-B / J power amplifier further includes a power synthesis unit, which is used to synthesize the output powers of multiple Class-B / J power amplifiers to output a target signal.

[0029] The transformer of the harmonic generating part has a first end connected to the input signal and a second end connected to the ground.

[0030] The transformer of the harmonic generating part generates the required second harmonic component by utilizing the unbalance of the layout.

[0031] The matching circuit uses a symmetrical transformer, which generates different phase shifts for the fundamental wave and the second harmonic, thereby achieving control of the phase difference.

[0032] The first power amplifier circuit has different gains for the fundamental wave and the second harmonic, thereby achieving control of the amplitude difference.

[0033] The amplitude and phase control part includes a plurality of groups of the first power amplifying circuits and the matching circuits.

[0034] The power amplifier part includes a second power amplifier circuit, a gate of the second power amplifier circuit simultaneously inputs fundamental wave and second harmonic components, and a drain of the second power amplifier circuit uses a resonant cavity to control the fundamental wave and second harmonic components.

[0035] The first power amplifier circuit and the second power amplifier circuit are both MOS tubes.

[0036] It can be understood that the input signal generates a differential fundamental wave and a second harmonic through an unbalanced transformer; the generated fundamental wave and second harmonic pass through the first power amplifier circuit and the matching circuit to control the amplitude and phase difference of the two by utilizing their different amplification and phase shift of different frequencies; finally, the adjusted fundamental wave and second harmonic are input to the gate of the second power amplifier circuit, and at the same time, the output impedance of the second power amplifier circuit is controlled to realize the shaping of the voltage and current waveforms, thereby achieving high-power and high-efficiency output.

[0037] Figure 2 This is a schematic diagram of the power amplification section of the new on-chip Class-BJ power amplifier. in is the voltage waveform of the gate of the second power amplifier circuit (MOS tube), V TH is the threshold voltage of the second power amplifier circuit (MOS tube), Z L is the load impedance, P out is the output power. In this part, the drain current i of the second power amplifier circuit (MOS tube) d The waveform can be written as:

[0038]

[0039] Where I1 and I2 are the maximum currents generated by the fundamental wave and the second harmonic at the drain, respectively; w is the angular velocity of the fundamental wave signal; and t is the time.

[0040] At the same time, the drain voltage waveform v of the MOS tube d can be written as:

[0041] v d =V DD (1-coswt)(1-αsinwt)

[0042] =V DD (1-coswt-αsinwt+αsinwtcoswt)

[0043] Where α is the phase difference coefficient of voltage and current.

[0044] According to the above formula, the drain efficiency η of the new Class-B / J power amplifier can be calculated D for:

[0045]

[0046] In the proposed new Class-BJ power amplifier, in order to ensure that the above formula is valid, that is, the conduction angle is 180°, the condition for the equation to be valid is:

[0047]

[0048] According to the above analysis, the efficiency of this new on-chip Class-BJ power amplifier can reach 95.2% under ideal conditions.

[0049] Figure 3 It is a schematic diagram of the power amplification part of a traditional Class B power amplifier, which has no resonant cavity at the drain of the MOS tube; it does not take into account the nonlinearity of the device and the high-order harmonic interference at high frequencies. Figure 4 This is a schematic diagram of the power amplification part of a traditional Class-J power amplifier. It only adds a resonant cavity to the drain for impedance tuning, and does not control the harmonics of the gate. Its drain voltage peak is too high, and the MOS tube is at risk of breakdown. It can be seen that the efficiency and reliability of this new on-chip Class-BJ power amplifier are far superior to traditional solutions.

[0050] Figure 5 This is the layout of the new on-chip Class-BJ power amplifier. Figure 6 This is a schematic diagram of a novel on-chip Class-B / J power amplifier. In this embodiment, the input is divided into two paths and input into the first-stage on-chip transformer to generate the second harmonic component by utilizing the unbalanced characteristics of the layout. The fundamental wave and the second harmonic component are then input into the amplitude and phase control part consisting of the first-stage power amplifier circuit, the second-stage on-chip transformer, the second-stage power amplifier circuit and the third-stage on-chip transformer. The fundamental wave and the second harmonic component after amplitude and phase adjustment are input into the on-chip Class-BJ power amplifier circuit and finally output after power synthesis.

[0051] Figure 7 This is a schematic diagram showing how the output saturation power of the new on-chip Class-BJ power amplifier varies with frequency. Figure 8Schematic diagram of the change of efficiency of the new on-chip Class-BJ power amplifier with frequency. In this embodiment, the new on-chip Class-BJ power amplifier is designed with a 40nm CMO process 25-40GHz sixteen-way power synthesis new Class-J power amplifier, and the output power reaches 30.8dBm at 32GHz, and the power added efficiency reaches 32.7%.

[0052] It is worth mentioning that when realizing the new on-chip Class-BJ power amplifier, the resonant cavity circuit of the power amplification part is completed by the power synthesis transformer and the output matching inductor and capacitor at the same time, which can save area. The overall area of ​​the power amplifier in this embodiment is 2.8mm 2 .

[0053] The present invention and its embodiments are described schematically above, and the description is not restrictive. The drawings show only one embodiment of the present invention, and the actual structure is not limited thereto. Therefore, if a person skilled in the art is inspired by it and designs a structural method and an embodiment similar to the technical solution without creativity without departing from the purpose of the invention, they shall all fall within the protection scope of the present invention.

Claims

1. A novel on-chip Class-BJ power amplifier, characterized by: It includes a harmonic generation part, an amplitude and phase control part, and a power amplifier part; the harmonic generation part uses the nonlinearity of the transformer to generate a second harmonic component, the amplitude and phase control part uses a first power amplifier circuit and a matching circuit to control the phase between the second harmonic and the fundamental wave, and the power amplifier part is responsible for realizing the Class-BJ working mode.

2. The novel on-chip Class-BJ power amplifier according to claim 1, characterized in that: The on-chip Class-B / J power amplifier further includes a power synthesis unit, which is used to synthesize the output powers of multiple Class-B / J power amplifiers to output a target signal.

3. The novel on-chip Class-BJ power amplifier according to claim 2, characterized in that: The transformer of the harmonic generating part has a first end connected to the input signal and a second end connected to the ground.

4. The novel on-chip Class-BJ power amplifier according to claim 3, characterized in that: The transformer of the harmonic generating part generates the required second harmonic component by utilizing the unbalance of the layout.

5. The novel on-chip Class-BJ power amplifier according to claim 4, characterized in that: The matching circuit uses a symmetrical transformer, which generates different phase shifts for the fundamental wave and the second harmonic, thereby achieving control of the phase difference.

6. The novel on-chip Class-BJ power amplifier according to claim 5, characterized in that: The first power amplifier circuit has different gains for the fundamental wave and the second harmonic, thereby achieving control of the amplitude difference.

7. The novel on-chip Class-BJ power amplifier according to claim 6, characterized in that: The amplitude and phase control part includes a plurality of groups of the first power amplifying circuits and the matching circuits.

8. The novel on-chip Class-BJ power amplifier according to claim 7, characterized in that: The power amplifier part includes a second power amplifier circuit, a gate of the second power amplifier circuit simultaneously inputs fundamental wave and second harmonic components, and a drain of the second power amplifier circuit uses a resonant cavity to control the fundamental wave and second harmonic components.

9. The novel on-chip Class-BJ power amplifier according to claim 8, characterized in that: The first power amplifier circuit and the second power amplifier circuit are both MOS tubes.

Images