An on-chip Class-BJ power amplifier

Abstract

This invention relates to the field of radio frequency chip technology, specifically to an on-chip Class-BJ power amplifier, comprising a harmonic generation section, an amplitude and phase control section, and a power amplification section. The harmonic generation section utilizes the nonlinearity of a transformer to generate a second harmonic component. The amplitude and phase control section uses a first power amplification circuit and a matching circuit to control the phase between the second harmonic and the fundamental frequency. The power amplification section is responsible for implementing the Class-BJ operating mode. This invention offers higher efficiency while avoiding the high drain voltage problem of traditional Class-BJ amplifiers.

Description

Technical Field

[0001] This invention relates to the field of radio frequency chip technology, and more specifically, to an on-chip Class-BJ power amplifier. Background Technology

[0002] The high-speed requirements of modern wireless communication, especially the millimeter-wave band of 5G communication, have led to increasingly higher operating frequencies for wireless systems. High-output-power, high-efficiency CMOS power amplifiers have become an urgent need. However, achieving high output power and high efficiency in millimeter-wave power amplifiers remains a significant challenge. In existing low-voltage silicon-based processes, power amplifiers struggle to simultaneously achieve watt-level output power and high efficiency, and the high drain voltage resulting from achieving high output power can potentially cause MOSFET breakdown. Existing operating modes include Class B power amplifiers and traditional Class J power amplifiers. For example, a Class B power amplifier has a gate bias equal to the transistor's threshold voltage, a maximum conduction angle of 180°, and an ideal Class B power amplifier can achieve 78.5% efficiency while maintaining a maximum output power of [missing information].

[0003]

[0004] Among them I DC V is the DC component of the drain current of the tube. DD Considering the drain voltage of the transistor, it's clear that Class B amplifiers still have room for efficiency improvement and completely fail to consider the impact of high-frequency harmonics. For example, Class J amplifiers, based on Class B amplifiers, shape the drain voltage waveform. The drain resonant cavity exhibits low impedance at the second harmonic frequency, thus controlling the drain voltage waveform. Ideally, Class J amplifiers achieve the same efficiency and output power as ideal Class B amplifiers. It's evident that Class J amplifiers still face challenges in efficiency improvement, as the peak drain voltage can exceed 2V. DD The problem. Summary of the Invention

[0005] The present invention provides an on-chip Class-BJ power amplifier that can achieve higher efficiency.

[0006] According to the present invention, an on-chip Class-BJ power amplifier includes a harmonic generation section, an amplitude and phase control section, and a power amplification section; the harmonic generation section generates a second harmonic component using the nonlinearity of a transformer; the amplitude and phase control section controls the phase between the second harmonic and the fundamental frequency using a first power amplification circuit and a matching circuit; and the power amplification section is responsible for implementing the Class-BJ operating mode.

[0007] Preferably, the on-chip Class-B / J power amplifier also includes a power combining unit, which is used to combine the output power of multiple Class-B / J power amplifiers to output the target signal.

[0008] Preferably, the transformer of the harmonic generation section has its first terminal connected to the input signal and its second terminal grounded.

[0009] Preferably, the transformer in the harmonic generation section utilizes the layout imbalance to generate the required second harmonic components.

[0010] Preferably, the matching circuit uses a symmetrical transformer that produces different phase shifts for the fundamental and second harmonic waves, thereby controlling the phase difference.

[0011] Preferably, the first power amplifier circuit has different gains for the fundamental wave and the second harmonic, thereby achieving amplitude difference control.

[0012] Preferably, the amplitude and phase control section includes multiple sets of the first power amplifier circuits and the matching circuit.

[0013] Preferably, the power amplification section includes a second power amplifier circuit, the gate of which simultaneously receives the fundamental frequency and the second harmonic component, and the drain of the second power amplifier circuit uses a resonant cavity to control the fundamental frequency and the second harmonic component.

[0014] Preferably, both the first power amplifier circuit and the second power amplifier circuit are MOSFETs.

[0015] The technical solution provided by this invention has the following beneficial effects:

[0016] The above technical solution utilizes the fundamental and second harmonic waves simultaneously input to the gate and the matching circuit of the drain to shape the drain waveform, thereby achieving higher efficiency. At the same time, the voltage breakdown problem will not occur when the output power is the same as that of a Class B power amplifier. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of an on-chip Class-BJ power amplifier shown in an embodiment.

[0018] Figure 2 This is a schematic diagram of the power amplification section shown in the embodiment.

[0019] Figure 3 This is a schematic diagram of the power amplification section of a conventional Class B power amplifier, as shown in the embodiment.

[0020] Figure 4This is a schematic diagram of the power amplification section of a conventional Class J power amplifier, as shown in the embodiment.

[0021] Figure 5 This is a layout of an on-chip Class-BJ power amplifier shown in an embodiment.

[0022] Figure 6 This is a schematic diagram of an on-chip Class-BJ power amplifier shown in an embodiment.

[0023] Figure 7 This is a schematic diagram illustrating the output saturation power of an on-chip Class-BJ power amplifier as a function of frequency, as shown in the embodiment.

[0024] Figure 8 This is a schematic diagram illustrating the efficiency of an on-chip Class-BJ power amplifier as a function of frequency, as shown in the embodiment. Detailed Implementation

[0025] To further understand the content of this invention, a detailed description of the invention will be provided in conjunction with the accompanying drawings and embodiments. It should be understood that the embodiments are merely illustrative and not limiting of the invention.

[0026] Example

[0027] like Figure 1 As shown, this embodiment provides an on-chip Class-BJ power amplifier, which includes a harmonic generation section, an amplitude and phase control section, and a power amplification section. The harmonic generation section uses the nonlinearity of the transformer to generate the second harmonic component. The amplitude and phase control section uses a first power amplification circuit and a matching circuit to control the phase between the second harmonic and the fundamental frequency. The power amplification section is responsible for realizing the Class-BJ operating mode. Figure 1 In this context, v represents voltage amplitude, t represents time, f represents frequency, f0 is the fundamental frequency, and V G V represents the gate DC bias voltage. DD θ represents the drain DC bias voltage, and θ represents the phase difference between the fundamental frequency and the second harmonic.

[0028] The on-chip Class-B / J power amplifier also includes a power combining unit, which is used to combine the output power of multiple Class-B / J power amplifiers to output the target signal.

[0029] The transformer in the harmonic generation section has its first terminal connected to the input signal and its second terminal grounded.

[0030] The transformer in the harmonic generation section utilizes the layout imbalance to generate the required second harmonic components.

[0031] The matching circuit uses a symmetrical transformer that produces different phase shifts for the fundamental and second harmonic waves, thereby controlling the phase difference.

[0032] The first power amplifier circuit has different gains for the fundamental wave and the second harmonic, thereby controlling the amplitude difference.

[0033] The amplitude and phase control section includes multiple sets of the first power amplifier circuits and the matching circuit.

[0034] The power amplification section includes a second power amplifier circuit, the gate of which simultaneously receives the fundamental frequency and the second harmonic component, and the drain of the second power amplifier circuit uses a resonant cavity to control the fundamental frequency and the second harmonic component.

[0035] Both the first power amplifier circuit and the second power amplifier circuit use MOSFETs.

[0036] Understandably, the input signal passes through an unbalanced transformer to generate differential fundamental and second harmonic waves. These generated fundamental and second harmonic waves are then amplified by a first power amplifier circuit and a matching circuit, which utilize the different amplification and phase shift of different frequencies to control their amplitude and phase difference. Finally, the adjusted fundamental and second harmonic waves are input to the gate of a second power amplifier circuit, while the output impedance of the second power amplifier circuit is controlled to shape the voltage and current waveforms, achieving high power and high efficiency output.

[0037] Figure 2 This is a schematic diagram of the power amplification section of the on-chip Class-BJ power amplifier. RF in This is the voltage waveform at the gate of the second power amplifier circuit (MOS transistor), V TH It is the threshold voltage of the second power amplifier circuit (MOSFET), Z L It is the load impedance, P out This refers to the output power, specifically the drain current i of the second power amplifier circuit (MOSFET). d The waveform can be written as:

[0038]

[0039] Where I1 and I2 are the maximum values ​​of the fundamental and second harmonic currents generated at the drain, respectively, w is the angular velocity of the fundamental signal, and t is time.

[0040] Meanwhile, the drain voltage waveform of the MOSFET is v d It can be written as:

[0041] v d =V DD (1-coswt)(1-αsinwt)

[0042] =V DD (1-coswt-αsinwt+αsinwtcoswt)

[0043] Where α is the phase difference coefficient between voltage and current.

[0044] The drain efficiency η of this Class-B / J power amplifier can be calculated using the above formula. D for:

[0045]

[0046] In the proposed Class-BJ power amplifier, to ensure the above formula holds true, i.e., the conduction angle is 180°, the equality condition is:

[0047]

[0048] Based on the above analysis, the on-chip Class-BJ power amplifier can achieve an efficiency of 95.2% under ideal conditions.

[0049] Figure 3 This is a schematic diagram of the power amplification section of a traditional Class B power amplifier, which does not have a resonant cavity at the drain of the MOSFET; it does not consider the nonlinearity of the device, resulting in high-order harmonic interference at high frequencies. Figure 4 This is a schematic diagram of the power amplification section of a traditional Class J power amplifier. It only adds a resonant cavity to the drain for impedance tuning, without any harmonic control of the gate. Its drain voltage peak is too high, posing a risk of MOSFET breakdown. It can be seen that the efficiency and reliability of this on-chip Class-BJ power amplifier are far superior to traditional solutions.

[0050] Figure 5 This is the layout of the on-chip Class-BJ power amplifier. Figure 6 This is the schematic diagram of an on-chip Class-B / J power amplifier. In this embodiment, the input is split into two paths and fed into the first-stage on-chip transformer to generate a second harmonic component by utilizing the layout imbalance. The fundamental and second harmonic components are then input to the amplitude and phase control section, which consists of the first-stage power amplifier circuit, the second-stage on-chip transformer, the second-stage power amplifier circuit, and the third-stage on-chip transformer. After amplitude and phase adjustment, the fundamental and second harmonic components are input to the on-chip Class-BJ power amplifier circuit and finally output after power combining.

[0051] Figure 7 This is a schematic diagram showing the output saturation power of the on-chip Class-BJ power amplifier as a function of frequency. Figure 8This is a schematic diagram showing the efficiency of an on-chip Class-BJ power amplifier as a function of frequency. In this embodiment, the on-chip Class-BJ power amplifier, designed using a 40nm CMOS process, is a 25-40GHz 16-channel power combining Class-J power amplifier that achieves an output power of 30.8dBm at 32GHz and a power-added efficiency of 32.7%.

[0052] It is worth mentioning that when implementing the on-chip Class-BJ power amplifier, the resonant cavity circuit of the power amplification section is simultaneously completed by the power combining transformer and the output matching inductor and capacitor, which can save area. The overall area of ​​the power amplifier in this embodiment is 2.8mm². 2 .

[0053] The present invention and its embodiments have been described above illustratively. This description is not restrictive, and the figures shown are only one embodiment of the present invention; the actual structure is not limited thereto. Therefore, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the spirit of the present invention, such designs should fall within the protection scope of the present invention.

Claims

1. An on-chip Class-BJ power amplifier, characterized in that: The system includes a harmonic generation section, an amplitude and phase control section, and a power amplification section. The harmonic generation section utilizes the nonlinearity of a transformer to generate a second harmonic component. The transformer in the harmonic generation section utilizes layout imbalance to generate the required second harmonic component. The input signal passes through the unbalanced transformer to generate a differential fundamental and second harmonic. The amplitude and phase control section uses a first power amplifier circuit and a matching circuit to control the phase between the second harmonic and the fundamental. The amplitude and phase control section includes multiple sets of the first power amplifier circuits and the matching circuit. The matching circuit uses symmetrical transformers, which generate different phase shifts for the fundamental and second harmonics, thereby controlling the phase difference. The first power amplifier circuits have different gains for the fundamental and second harmonics, thereby controlling the amplitude difference. The power amplification section is responsible for implementing the Class-BJ operating mode. The power amplification section includes a second power amplifier circuit. The gate of the second power amplifier circuit simultaneously receives the fundamental and second harmonic components, and the drain of the second power amplifier circuit uses a resonant cavity to control the fundamental and second harmonic components.

2. The on-chip Class-BJ power amplifier according to claim 1, characterized in that: The on-chip Class-B / J power amplifier also includes a power combining unit, which is used to combine the output power of multiple Class-B / J power amplifiers to output the target signal.

3. An on-chip Class-BJ power amplifier according to claim 2, characterized in that: The transformer in the harmonic generation section has its first terminal connected to the input signal and its second terminal grounded.

4. An on-chip Class-BJ power amplifier according to claim 3, characterized in that: Both the first power amplifier circuit and the second power amplifier circuit use MOSFETs.

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