Signal conditioning circuit

Abstract

The invention discloses a signal conditioning circuit which comprises a C1, an R1, an R5, an R2, an R4, a UA, an R3, an R6, a UB, an R8, an R7, a Q2 and an R9, one end of the R1 is electrically connected to one end of the C1, the other end of the R1 is grounded, one end of the R5 is electrically connected to the other end of the C1, the other end of the R5 is externally connected with a Vref1, one end of the R2 is electrically connected to the Vref1, one end of the R4 is electrically connected to one end of the R5, a pin 6 of the UA is electrically connected to the other end of the R2, a pin 5 of the UA is electrically connected to the other end of the R4, and a pin 6 of the UA is electrically connected to the other end of the R4. The two ends of the R3 are electrically connected between the pin 6 and the pin 7 of the UA respectively, one end of the R6 is electrically connected to the pin 7 of the UA, the pin 10 of the UB is electrically connected to the other end of the R6, one end of the R8 is electrically connected to the pin 9 of the UB, the two ends of the R7 are electrically connected to the pin 9 of the UB and the pin 8 of the UB respectively, the D pole of the Q2 is electrically connected to the other end of the R8, the S pole of the Q2 is grounded, one end of the R9 is electrically connected to the D pole of the Q2, and the other end of the R9 is externally connected with the Vref2. The invention relates to the field of signal cleaning circuit design, in particular to a signal conditioning circuit.

Description

Technical Field

[0001] The invention relates to the field of signal cleaning circuit design, and in particular to a signal conditioning circuit. Background Art

[0002] In touch screen design, photodiodes can generally receive infrared light (effective light) emitted by phototransmitting tubes, and can also receive external ambient light, such as sunlight, light, etc., collectively referred to as interference light. Interference light has a relatively low frequency and can be approximately regarded as direct current, while effective infrared light generally has a frequency of more than several hundred kHz.

[0003] As the instruction manual Figure 1 As shown, the photoelectric signal sensed by the photodiode filters out the interfering light signal after passing through the capacitor. In order to prevent the signal from being overwhelmed by the offset voltage of the operational amplifier, the current common practice is to add a bias voltage Vref to the second-stage amplifier input. The consequence of this is that the signal also contains a DC component Vref. Therefore, before the post-amplification, a high-pass filter is required to remove the DC signal before amplification again.

[0004] At present, the two high-pass filters in the signal processing circuit make the signal phase serious, especially the inconsistency of the rising speed of the strong and weak signals, which will directly affect the controller's acquisition of the effective signal. In addition, the impact of high-pass filtering means that the mutual influence between the two signals is difficult to eliminate, and in order to reduce the influence between the signals, it is necessary to extend the light-off time. This practice will directly affect the scanning speed of the entire infrared matrix, and ultimately affect the performance of the touch screen. Summary of the invention

[0005] The technical problem to be solved by the present invention is that the two high-pass filtering in the signal processing circuit makes the signal phase serious, especially the inconsistency of the rising speed of the strong and weak signals, which directly affects the controller's acquisition of effective signals. In addition, the influence of high-pass filtering means that the mutual influence between the two signals is difficult to eliminate, and in order to reduce the influence between the signals, it is necessary to extend the light-off time. This practice will directly affect the scanning speed of the entire infrared matrix, and ultimately affect the performance of the touch screen.

[0006] In order to solve the above problems, the technical solution adopted by the present invention is as follows: The present invention is a signal conditioning circuit, including C1, R1, R5, R2, R4, UA, R3, R6, UB, R8, R7, Q2 and R9, one end of R1 is electrically connected to one end of C1, the other end of R1 is grounded, one end of R5 is electrically connected to the other end of C1, the other end of R5 is externally connected to Vref1, one end of R2 is electrically connected to Vref1, one end of R4 is electrically connected to one end of R5, pin6 of UA is electrically connected to the other end of R2, and pin7 of U1 is electrically connected to the other end of R1. Pin5 of A is electrically connected to the other end of R4, the two ends of R3 are respectively electrically connected between pin6 and pin7 of UA, one end of R6 is electrically connected to pin7 of UA, pin10 of UB is electrically connected to the other end of R6, one end of R8 is electrically connected to pin9 of UB, the two ends of R7 are respectively electrically connected to pin9 of UB and pin8 of UB, the D pole of Q2 is electrically connected to the other end of R8, the S pole of Q2 is grounded, one end of R9 is electrically connected to the D pole of Q2, and the other end of R9 is externally connected to Vref2.

[0007] Furthermore, Q2 is selected from MOSFET.

[0008] Furthermore, the G pole of Q2 inputs a DAC signal.

[0009] Furthermore, an operational amplifier buffer may be added between the D pole of Q2 and R8.

[0010] The beneficial effects achieved by the present invention using the above structure are as follows: the previous and next stage amplification are changed from the original AC coupling to DC coupling, the inverting reference point of the next stage amplification is variable, and the signal influence caused by the DC signal of the previous stage and the offset voltage of the operational amplifier is eliminated by the next stage differential method. In this way, even if the offset voltage changes or the DC signal of the previous stage changes, it can be eliminated by this circuit, and the signal phase shift can be effectively reduced, the influence between signals can be reduced, and the stability of signal acquisition can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 It is a circuit module diagram of the existing method;

[0012] Figure 2 A circuit diagram of embodiment 1 of the present invention is provided;

[0013] Figure 3 The circuit diagram of Embodiment 2 of the present invention is provided. DETAILED DESCRIPTION

[0014] Embodiment 1:

[0015] As the instruction manual Figure 2-Figure 3As shown, the present invention is a signal conditioning circuit, including C1, R1, R5, R2, R4, UA, R3, R6, UB, R8, R7, Q2 and R9, one end of R1 is electrically connected to one end of C1, the other end of R1 is grounded, one end of R5 is electrically connected to the other end of C1, the other end of R5 is externally connected to Vref1, one end of R2 is electrically connected to Vref1, one end of R4 is electrically connected to one end of R5, pin6 of UA is electrically connected to the other end of R2, and pin5 of UA is electrically connected to Connected to the other end of R4, both ends of R3 are electrically connected between pin6 and pin7 of UA, one end of R6 is electrically connected to pin7 of UA, pin10 of UB is electrically connected to the other end of R6, one end of R8 is electrically connected to pin9 of UB, both ends of R7 are electrically connected to pin9 of UB and pin8 of UB respectively, the D pole of Q2 is electrically connected to the other end of R8, the S pole of Q2 is grounded, one end of R9 is electrically connected to the D pole of Q2, and the other end of R9 is externally connected to Vref2.

[0016] Q2 uses MOSFET. The G pole of Q2 inputs the DAC signal. An op amp buffer can be added between the D pole of Q2 and R8.

[0017] Change the AC coupling between the front and rear amplifiers to DC coupling, and apply an adjustable reference voltage to the inverting end of the rear amplifier. Figures 2-3 The adjustable reference voltage is obtained by controlling the on-resistance Ron of the MOSFET through DAC, and then dividing the voltage Vref2 by Ron and R9 to obtain the adjustable reference voltage. Of course, other adjustable voltage sources can also be used in practical applications.

[0018] Embodiment 2:

[0019] As the instruction manual Figure 2-Figure 3 As shown, the present invention is a signal conditioning circuit, including C1, R1, R5, R2, R4, UA, R3, R6, UB, R8, R7, Q2 and R9, one end of R1 is electrically connected to one end of C1, the other end of R1 is grounded, one end of R5 is electrically connected to the other end of C1, the other end of R5 is externally connected to Vref1, one end of R2 is electrically connected to Vref1, one end of R4 is electrically connected to one end of R5, pin6 of UA is electrically connected to the other end of R2, and pin5 of UA is electrically connected to Connected to the other end of R4, both ends of R3 are electrically connected between pin6 and pin7 of UA, one end of R6 is electrically connected to pin7 of UA, pin10 of UB is electrically connected to the other end of R6, one end of R8 is electrically connected to pin9 of UB, both ends of R7 are electrically connected to pin9 of UB and pin8 of UB respectively, the D pole of Q2 is electrically connected to the other end of R8, the S pole of Q2 is grounded, one end of R9 is electrically connected to the D pole of Q2, and the other end of R9 is externally connected to Vref2.

[0020] Q2 uses MOSFET. The G pole of Q2 inputs the DAC signal.

[0021] The D pole of Q2 is disconnected from the other end of R8, the D pole of Q2 is externally connected to pin12 of UC, pin13 of UC is connected to pin14, and pin13 and pin14 of UC are electrically connected to the other end of R8.

[0022] Specific use: When the infrared screen is powered on and initialized, turn off all infrared lights first. At this time, let the controller collect signals from each channel, and control the reference voltage of the subsequent amplification by adjusting the DAC signal, from small to large, until the collected AIN2 signal is zero or close to zero (that is, let VS be equal to the DC signal in AIN1), record the DAC signal value at this time, and let this value be used as the reference voltage for the subsequent signal amplification processing when the touch screen works normally in the future.

[0023] It should be understood that although this specification is described according to implementation methods, not every implementation method contains only one independent technical solution. This narrative method of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment can also be appropriately combined to form other implementation methods that can be understood by those skilled in the art.

Claims

1. A signal conditioning circuit, characterized in that: The circuit comprises C1, R1, R5, R2, R4, UA, R3, R6, UB, R8, R7, Q2 and R9, wherein one end of R1 is electrically connected to one end of C1, the other end of R1 is grounded, one end of R5 is electrically connected to the other end of C1, the other end of R5 is externally connected to Vref1, one end of R2 is electrically connected to Vref1, one end of R4 is electrically connected to one end of R5, pin6 of UA is electrically connected to the other end of R2, and pin5 of UA is electrically connected to the other end of R4 , the two ends of R3 are electrically connected between pin6 and pin7 of UA, one end of R6 is electrically connected to pin7 of UA, pin10 of UB is electrically connected to the other end of R6, one end of R8 is electrically connected to pin9 of UB, the two ends of R7 are electrically connected to pin9 of UB and pin8 of UB respectively, the D pole of Q2 is electrically connected to the other end of R8, the S pole of Q2 is grounded, one end of R9 is electrically connected to the D pole of Q2, and the other end of R9 is externally connected to Vref2.

2. A signal conditioning circuit according to claim 1, characterized in that: The Q2 is a MOSFET.

3. A signal conditioning circuit according to claim 2, characterized in that: The G pole of Q2 inputs the DAC signal.

4. A signal conditioning circuit according to claim 3, characterized in that: An operational amplifier buffer may be added between the D pole of Q2 and R8.

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