VHF frequency band frequency agility frequency source control device and method

Abstract

According to the VHF frequency band frequency agility frequency source control device and method provided by the embodiment of the invention, through continuous adjustment of the output signal, the first control current signal output by the decimal phase-locked loop tends to be stable so as to realize high-frequency locking, and the precision of the first control current signal is improved. Correspondingly, when the first frequency hopping signal from the power divider is input to the eight-frequency-division prescaler of the frequency division module, the eight-frequency-division prescaler carries out frequency division processing on the first frequency hopping signal in the UHF frequency band to obtain a signal in the VHF frequency band and reduce phase noise in the output signal. Therefore, the device can realize rapid frequency hopping of the output signal under the condition of ensuring low phase noise and high precision of the signal. The phase noise of the output signal of the phase-locked loop frequency synthesizer is reduced, so that the fast frequency switching of the phase-locked loop frequency synthesizer is realized under the condition of ensuring that the output signal of the phase-locked loop frequency synthesizer has a low phase noise characteristic.

Description

Technical Field

[0001] The present application relates to the field of data communication technology, and in particular to a frequency agile source control device and method for a VHF frequency band. Background Art

[0002] Frequency hopping communication has been widely used due to its good anti-interference and anti-interception capabilities. In recent years, with the development of wireless communication technology, ultra-short wave band wireless communication systems represented by VHF (Very High Frequency) have developed in the direction of wide frequency band and high hopping speed. As an important component of communication transceivers, the frequency source of agile frequency directly affects the core performance of communication equipment in terms of bandwidth, phase noise, spurious, frequency switching time and other indicators.

[0003] Agile frequency synthesis technology is generally implemented through DDS. Although DDS technology has the advantages of fast frequency switching speed and high frequency resolution, it is affected by the nonlinear factors of the DAC inside the device, and its spurious suppression is not high. If a higher frequency signal needs to be output by using a frequency multiplier, the spurious performance of the output signal will be further deteriorated. The loop bandwidth supported by the agile frequency synthesizer based on the phase-locked loop is usually narrow, and the response speed of the frequency synthesizer is slow during frequency switching, and it is often impossible to achieve fast frequency hopping of the signal. At the same time, when the traditional agile frequency synthesizer uses a 100MHz crystal oscillator as a reference signal, it is difficult to suppress the spurious signals in the output signal because its low-order harmonics easily fall into the output frequency band, resulting in poor signal quality of the frequency hopping signal.

[0004] Therefore, how to ensure fast frequency hopping of the output signal of the frequency synthesizer with low phase noise has become a technical problem that needs to be solved urgently by those skilled in the art. Summary of the invention

[0005] Based on the above problems, in order to solve the problem that the existing phase-locked loop frequency synthesizer cannot achieve fast frequency hopping while ensuring low phase noise of the output signal, the present application provides a VHF band agile frequency source control device and method.

[0006] The embodiments of the present application disclose the following technical solutions:

[0007] In a first aspect, an embodiment of the present application provides a VHF frequency band agile frequency source control device, comprising: a main control processing module, a phase-locked loop frequency synthesizer and a reference frequency source; the phase-locked loop frequency synthesizer comprises: a fractional phase-locked loop, a loop filter, a voltage-controlled oscillator and a power divider; the reference frequency source is used to provide a reference frequency signal to the fractional phase-locked loop; the fractional phase-locked loop comprises: a frequency hopping control module, a signal receiving module and a noise processing module;

[0008] The frequency hopping control module is used to perform frequency hopping control on the reference frequency signal according to the frequency hopping control parameters from the main control processing module to obtain a first control current signal, and send the first control current signal to the loop filter; the frequency hopping control parameters are obtained by the main control processing module based on a preset frequency hopping data set;

[0009] The signal receiving module is used to receive the first frequency hopping feedback signal from the power divider;

[0010] The noise processing module is used to perform phase noise processing on the frequency hopping control signal according to the phase difference between the first frequency hopping feedback signal and the reference frequency signal to obtain a second control current signal;

[0011] The loop filter is used to perform noise filtering on the first control current signal to obtain a first control voltage signal, and send the first control voltage signal to the voltage-controlled oscillator;

[0012] The voltage-controlled oscillator is used to generate a first frequency hopping signal according to the first control voltage signal;

[0013] The power divider is used to perform signal frequency division processing on the first frequency hopping signal to obtain the first frequency hopping feedback signal and the first frequency hopping signal; the frequency agile frequency source control device also includes: a frequency division module; the frequency division module includes: an input frequency selection filter, an eight-frequency pre-divider and an output frequency selection filter; one end of the input frequency selection filter is connected to the power divider, and the other end is connected to the eight-frequency pre-divider; the other end of the eight-frequency pre-divider is connected to the output frequency selection filter;

[0014] The frequency division module is used to perform signal low spurious processing on the first frequency hopping signal to obtain a first frequency division signal.

[0015] In a possible implementation manner, the frequency hopping control module is specifically configured to:

[0016] Determining an integer frequency division value and a fractional frequency division value according to the frequency hopping control parameter;

[0017] The reference frequency signal is frequency-hopped according to the integer frequency division value and the fractional frequency division value to obtain the first control current signal.

[0018] In a possible implementation, the operating modes of the phase-locked loop frequency synthesizer include: an open-loop mode and a closed-loop mode;

[0019] When the operating mode of the phase-locked loop frequency synthesizer is the open-loop mode, the second control current signal is not affected by the first frequency hopping feedback signal and the reference frequency signal;

[0020] When the operation mode of the phase-locked loop frequency synthesizer is the closed-loop mode, the second control current signal is obtained based on the first frequency hopping feedback signal and the reference frequency signal.

[0021] In a possible implementation, the main control processing module is used to:

[0022] Acquiring operation status data of the fractional phase-locked loop; the operation status data is stored in a status register of the fractional phase-locked loop;

[0023] Determining the operating state of the fractional phase-locked loop according to the operating state data;

[0024] When the operation state of the fractional phase-locked loop is abnormal, an alarm signal is output.

[0025] In a second aspect, an embodiment of the present application provides a VHF frequency band agile frequency source control method, which is applied to a fractional phase-locked loop; the fractional phase-locked loop is included in an agile frequency source control device; the agile frequency source device includes: a main control processing module, a phase-locked loop frequency synthesizer and a reference frequency source; the phase-locked loop frequency synthesizer includes: a fractional phase-locked loop, a loop filter, a voltage-controlled oscillator and a power divider; the reference frequency source is used to provide a reference frequency signal to the fractional phase-locked loop; the fractional phase-locked loop includes: a frequency hopping control module, a signal receiving module and a noise processing module; the method includes:

[0026] According to the frequency hopping control parameters from the main control processing module, the reference frequency signal is frequency-hopped to obtain a first control current signal, and the first control current signal is sent to the loop filter; the frequency hopping control parameters are obtained by the main control processing module based on a preset frequency hopping data set;

[0027] receiving a first frequency hopping feedback signal from the power divider;

[0028] According to the phase difference between the first frequency hopping feedback signal and the reference frequency signal, performing phase noise processing on the frequency hopping control signal to obtain a second control current signal;

[0029] The loop filter is used to perform noise filtering on the first control current signal to obtain a first control voltage signal, and send the first control voltage signal to the voltage-controlled oscillator;

[0030] The voltage-controlled oscillator is used to generate a first frequency hopping signal according to the first control voltage signal;

[0031] The power divider is used to perform signal frequency division processing on the first frequency hopping signal to obtain the first frequency hopping feedback signal and the first frequency hopping signal; the device also includes: a frequency division module; the frequency division module includes: an input frequency selection filter, an eight-frequency pre-divider and an output frequency selection filter; one end of the input frequency selection filter is connected to the power divider, and the other end is connected to the eight-frequency pre-divider; the other end of the eight-frequency pre-divider is connected to the output frequency selection filter;

[0032] The frequency division module is used to perform signal low spurious processing on the first frequency hopping signal to obtain a first frequency division signal.

[0033] In a possible implementation, performing frequency hopping control on the reference frequency signal according to the frequency hopping control parameter from the main control processing module to obtain the first control current signal includes:

[0034] Determining an integer frequency division value and a fractional frequency division value according to the frequency hopping control parameter;

[0035] The reference frequency signal is frequency-hopped according to the integer frequency division value and the fractional frequency division value to obtain the first control current signal.

[0036] In a possible implementation, the operating modes of the phase-locked loop frequency synthesizer include: an open-loop mode and a closed-loop mode;

[0037] When the operating mode of the phase-locked loop frequency synthesizer is the open-loop mode, the second control current signal is not affected by the first frequency hopping feedback signal and the reference frequency signal;

[0038] When the operation mode of the phase-locked loop frequency synthesizer is the closed-loop mode, the second control current signal is obtained based on the first frequency hopping feedback signal and the reference frequency signal.

[0039] In a possible implementation, the phase-locked loop frequency synthesizer further includes: a loop filter and a voltage-controlled oscillator;

[0040] The loop filter is used to perform noise filtering on the first control current signal to obtain a first control voltage signal, and send the first control voltage signal to the voltage-controlled oscillator;

[0041] The voltage-controlled oscillator is used to generate a first frequency hopping signal according to the first control voltage signal.

[0042] In a possible implementation, the main control processing module is used to:

[0043] Acquiring operation status data of the fractional phase-locked loop; the operation status data is stored in a status register of the fractional phase-locked loop;

[0044] Determining the operating state of the fractional phase-locked loop according to the operating state data;

[0045] When the operation state of the fractional phase-locked loop is abnormal, an alarm signal is output.

[0046] Compared with the prior art, the present application has the following beneficial effects: the embodiment of the present application provides a VHF frequency band agile frequency source control device and method, in which the setting of the preset frequency hopping data set can ensure that the fractional phase-locked loop can generate a first control current signal according to the corresponding frequency hopping control parameters, thereby realizing fast frequency hopping between different frequency signals. At the same time, the fractional phase-locked loop needs to further receive the first frequency hopping feedback signal transmitted by the power divider, and adjust the first control current signal to be output based on the phase difference between the first frequency hopping feedback signal and the reference frequency signal, so as to stabilize the output frequency of the output signal. In this way, after repeated adjustments of the output signal for many times, the first control current signal output by the fractional phase-locked loop will tend to be stable and realize high-frequency locking, and the accuracy of the first control current signal is improved. Accordingly, when the first frequency hopping signal from the power divider is input to the eight-frequency pre-divider of the frequency division module, the eight-frequency pre-divider will perform signal frequency division processing on the first frequency hopping signal in the UHF frequency band, obtain the signal in the VHF frequency band and reduce the phase noise in the output signal. In this way, the device can realize fast frequency hopping of the output signal under the condition of ensuring low phase noise and high signal precision. The phase noise of the output signal of the phase-locked loop frequency synthesizer is reduced, thereby realizing the fast frequency hopping function of the phase-locked loop frequency synthesizer under the condition of ensuring that the output signal of the phase-locked loop frequency synthesizer has low phase noise characteristics. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0048] Figure 1 A schematic structural diagram of a VHF frequency band agile frequency source control device provided in an embodiment of the present application;

[0049] Figure 2 A schematic structural diagram of another VHF frequency band agile frequency source device provided in an embodiment of the present application;

[0050] Figure 3 A schematic diagram of a circuit structure of a loop filter provided in an embodiment of the present application;

[0051] Figure 4 A flow chart of a method for controlling a frequency agile source in a VHF band provided in an embodiment of the present application. DETAILED DESCRIPTION

[0052] As described above, in the current traditional agile frequency synthesizer, the loop bandwidth supported by the frequency synthesizer is relatively narrow, resulting in a slow response speed of the frequency synthesizer during signal frequency hopping, and the inability to achieve fast signal frequency hopping. At the same time, when the traditional agile frequency synthesizer uses a 100MHz crystal oscillator as a reference signal, it is difficult to suppress the stray signals in the output signal because its low-order harmonics easily fall into the output frequency band, resulting in poor signal quality of the frequency hopping signal.

[0053] At the same time, traditional VHF frequency synthesizers usually use LTCC filters, which have low suppression capabilities for clutter signals and are difficult to meet the requirements of high-frequency signals without signal spuriousness.

[0054] In order to solve the above problems, the embodiment of the present application provides a VHF frequency band agile frequency source control device and method, in which the setting of the preset frequency hopping data set can ensure that the fractional phase-locked loop can generate a first control current signal according to the corresponding frequency hopping control parameters, thereby realizing fast frequency hopping between different frequency signals. At the same time, the fractional phase-locked loop needs to further receive the first frequency hopping feedback signal transmitted by the power divider, and adjust the first control current signal to be output based on the phase difference between the first frequency hopping feedback signal and the reference frequency signal, so as to stabilize the output frequency of the output signal. In this way, after repeated adjustment of the output signal for many times, the first control current signal output by the fractional phase-locked loop will tend to be stable and realize high-frequency locking, and the accuracy of the first control current signal is improved. Correspondingly, when the first frequency hopping signal from the power divider is input to the eight-frequency pre-divider of the frequency division module, the eight-frequency pre-divider will perform signal division processing on the first frequency hopping signal in the UHF frequency band, obtain the signal in the VHF frequency band and reduce the phase noise in the output signal. In this way, the device can realize fast frequency hopping of the output signal under the condition of ensuring low phase noise and high signal precision. The phase noise of the output signal of the phase-locked loop frequency synthesizer is reduced, thereby realizing the fast frequency hopping function of the phase-locked loop frequency synthesizer under the condition of ensuring that the output signal of the phase-locked loop frequency synthesizer has low phase noise characteristics.

[0055] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0056] Next, a frequency agile frequency source control device provided in an embodiment of the present application will be introduced in conjunction with a specific device structure schematic diagram.

[0057] See also Figure 1 , which is a schematic diagram of the structure of a VHF frequency band agile frequency source control device provided by an embodiment of the present application. As shown in the figure, in this VHF frequency band agile frequency source control device, a main control processing module 100, a phase-locked loop frequency synthesizer 200, a reference frequency source 300 and a frequency division module 400 are included. Among them, the phase-locked loop frequency synthesizer 200 includes: a fractional phase-locked loop 500, a loop filter 600, a voltage-controlled oscillator 700 and a power divider 800, and the fractional phase-locked loop 500 includes a frequency hopping control module 511, a signal receiving module 512 and a noise processing module 513. In addition, in the frequency division module 400, an input frequency selection filter 411, an eight-frequency pre-divider 412 and an output frequency selection filter 413 are included.

[0058] Among them, the frequency hopping control module 600 is used to perform frequency hopping control on the reference frequency signal according to the frequency hopping control parameters from the main control processing module, obtain a first control current signal, and send the first control current signal to the loop filter; the frequency hopping control parameters are obtained by the main control processing module based on a preset frequency hopping data set.

[0059] The frequency hopping control module in the fractional phase-locked loop is used to receive the frequency hopping control parameters of the main control processing module and the reference frequency control signal of the reference frequency source, and perform frequency hopping control on the reference frequency control signal based on the frequency hopping control parameters of the main control processing module to achieve fast frequency hopping of the signal.

[0060] Furthermore, the preset frequency hopping data set is stored in the main control processing module. The main control processing module can generate corresponding frequency hopping control parameters through the pre-stored frequency hopping data set, and send it to the fractional phase-locked loop, so that the frequency hopping control module can implement frequency hopping control through the frequency hopping control parameters. Through the frequency hopping control parameters, a first control current signal with different frequencies can be generated based on the reference frequency signal and the frequency hopping control parameters to achieve rapid frequency switching of the input signal. Specifically, the frequency hopping control parameters may include the frequency range of the frequency hopping, the frequency hopping step length, the frequency hopping time interval, etc.

[0061] In some examples, in the process of the frequency hopping control module generating the first control current signal through the frequency hopping control parameter, the frequency hopping control parameter can be divided by a 19-bit pre-divider integrated in the fractional phase-locked loop to obtain the corresponding integer division value and fractional division value, and the first control current signal is generated based on the integer division value and the fractional division value. int Set to the integer division value of the divider, N frc Set to the fractional divider value, F out is the frequency of the first control current signal, F ref is the frequency of the reference frequency signal. The construction formula of the first control current signal is as follows:

[0062] F out =F ref (N int +N frc )

[0063] Thus, after the frequency hopping control module obtains the frequency hopping control parameters from the main control processing module, the integer frequency division value and the fractional frequency division value can be determined by the frequency hopping control parameters to generate the first control current signal, thereby achieving precise signal control and fast frequency hopping.

[0064] In one possible implementation, the frequency hopping control parameters from the main control processing module are stored in the control register of the fractional phase-locked loop. When the frequency hopping control module needs to perform frequency hopping control through the frequency hopping control parameters, the frequency hopping control can be performed through the frequency hopping control parameters stored in the control register.

[0065] Furthermore, the signal receiving module 700 is used to receive a first frequency hopping feedback signal from the power divider.

[0066] After the frequency hopping control module completes the frequency hopping processing of the reference frequency signal and obtains the first control current signal, the first control current signal needs to be sent to the loop filter to output the first control voltage signal. After the first control voltage signal is input to the voltage-controlled oscillator, the voltage-controlled oscillator generates the first frequency hopping signal and sends it to the power divider, so that the power divider performs signal frequency division processing on the first frequency hopping signal.

[0067] After receiving the first frequency hopping signal, the power divider divides the first frequency hopping signal into a first frequency hopping feedback signal that needs to be fed back to the fractional phase-locked loop and a first frequency hopping signal that actually needs to be sent to the frequency division module. The power divider distributes the first control current signal, and feeds the distributed first frequency hopping feedback signal back to the fractional phase-locked loop, so that the fractional phase-locked loop can determine the signal difference between the feedback control signal and the reference frequency signal based on the first frequency hopping feedback signal, and determine the phase noise in the output first control current signal.

[0068] Correspondingly, the noise processing module 800 is used to perform phase noise processing on the frequency hopping control signal according to the phase difference between the first frequency hopping feedback signal and the reference frequency signal to obtain a second control current signal.

[0069] When the fractional phase-locked loop receives the first frequency hopping feedback signal transmitted by the power divider, the first frequency hopping feedback signal transmitted back by the power divider can determine the phase difference between the first frequency hopping feedback signal and the reference frequency signal, and the phase difference reflects the synchronization of the two signals in time. Through the phase difference between the two, the corresponding error control current is output to reduce the phase noise of the fractional phase-locked loop when outputting the frequency modulation control signal. At the same time, with repeated adjustments based on the first frequency hopping feedback signal, the frequency hopping control signal output by the fractional phase-locked loop gradually tends to be stable, and high-frequency locking is achieved, so that the frequency hopping control signal output by the fractional phase-locked loop also has a higher accuracy, thereby achieving the function of fast frequency hopping under the conditions of ensuring low phase noise and high signal accuracy.

[0070] Furthermore, after the phase-locked loop frequency synthesizer achieves high frequency locking, the first frequency hopping signal output by the power divider is further received by the frequency division module 900. The frequency division module is used to divide and filter the first frequency hopping signal after high frequency locking to reduce the low spurious components in the first frequency hopping signal.

[0071] As shown in the figure, when the first frequency hopping signal from the power divider is input to the input frequency selection filter in the frequency division module, the input frequency selection filter can filter out unnecessary frequency components in the signal before the signal enters the eight-way pre-divider, reducing unnecessary interference in the subsequent processing process. The eight-way pre-divider can divide the first frequency hopping signal to a lower frequency, because the phase noise is more stable and smooth in the lower frequency band. Therefore, the frequency division processing of the signal by the eight-way pre-divider can effectively reduce the phase noise in the first frequency hopping signal. Finally, the control signal output by the eight-way pre-divider passes through the output frequency selection filter to ensure that only the signal of the required frequency band is output, which greatly reduces the stray components of the output signal, realizes the low-stray processing of the output signal, and obtains the first frequency division signal with low stray.

[0072] In particular, in the embodiment of the present application, the reason why the frequency is down-converted to the VHF band through the eight-frequency pre-divider after the fractional phase-locked loop achieves high-frequency locking is to effectively improve the accuracy of the signal and reduce the phase noise in the signal. This is because when the frequency is locked in the high-frequency band, the performance of the loop filter is better and the phase noise can be suppressed more effectively. After down-converting, the phase noise will also be reduced according to the frequency division ratio, so as to obtain lower phase noise in the final VHF output band.

[0073] At the same time, if the frequency is locked directly in the UHF band, it may be limited by the performance of the device. For example, the voltage-controlled oscillator may not be able to achieve the required high-frequency stability and low phase noise performance at a lower frequency band. However, by locking the frequency at a higher frequency band, using a high-frequency voltage-controlled oscillator with better performance, and then reducing it to the target frequency band through an eight-frequency pre-divider, these limitations can be circumvented to obtain better system performance.

[0074] In addition, phase-locked loops in different frequency bands have different loop filter parameters, resulting in different loop delays. By locking the frequency in a higher frequency band, the loop delay characteristics can be optimized, and the locking speed and frequency stability of the phase-locked loop can be improved. Especially in applications that implement fast frequency hopping, smaller loop delay can significantly improve system response speed.

[0075] In some examples, the model of the eight-frequency predivider can be HMC434E, the model of the input frequency selection filter can be LFCN-1575+, and the model of the output frequency selection filter can be LFCN-180+. This embodiment does not limit the specific models of the devices.

[0076] In a possible implementation, in the VHF frequency band agile frequency source control device provided in the embodiment of the present application, in order to further reduce the phase noise in the frequency hopping control signal, a loop filter, a voltage-controlled oscillator, a filter and other components may be provided in the phase-locked loop frequency synthesizer, and an additional frequency division module and a power amplifier module may be provided in the frequency source control device to further reduce the spuriousness of the output signal. Next, another agile frequency source device provided in the embodiment of the present application will be specifically introduced in conjunction with the drawings of the specific embodiments.

[0077] See also Figure 2 , the figure is a schematic structural diagram of another VHF frequency band agile frequency source device provided in an embodiment of the present application, which includes a main control processing module 1, a phase-locked loop frequency synthesizer 2, a reference frequency source 3, a frequency division module 4, a power amplifier module 5, a fractional phase-locked loop 21, a loop filter 22, a voltage-controlled oscillator 23, a filter 24, a power divider 25, an input frequency selection filter 41, an eight-frequency pre-divider 42, an output frequency selection filter 43, a power amplifier 51 and a sound surface filter 52.

[0078] As can be seen in the figure, a loop filter and a voltage-controlled oscillator can also be provided in the phase-locked loop frequency synthesizer. Among them, one end of the loop filter is connected to the fractional phase-locked loop, which is used to receive the first control current signal from the fractional phase-locked loop and filter out the high-frequency noise part in the first control current signal. In an actual application scenario, when the fractional phase-locked loop outputs the first control current signal according to the frequency hopping control parameter, the fractional phase-locked loop outputs the charge pump current, and after the charge pump current passes through the loop filter, the loop filter filters out the high-frequency noise part in the current, and converts the pulsed current signal into a smooth control voltage, that is, the first control voltage signal.

[0079] After the loop filter outputs a stable first control voltage signal, the voltage signal will enter the voltage-controlled oscillator connected to the other end of the loop filter. The voltage-controlled oscillator can output the first frequency-hopping signal of the corresponding frequency according to the input voltage control signal. Therefore, the change of the first control voltage can directly affect the first frequency-hopping signal output by the voltage-controlled oscillator. Through the continuous adjustment of the first control voltage signal, the first frequency-hopping signal output by the voltage-controlled oscillator will continue to stabilize, and finally achieve frequency locking synthesis. By connecting the loop filter and the voltage-controlled oscillator, the phase noise in the first control current signal output by the fractional phase-locked loop can be further reduced. Among them, the loop filter is used to smooth and optimize the first control voltage signal, and the voltage-controlled oscillator is used to generate the first frequency-hopping signal of the corresponding frequency according to the first control voltage signal. The two work together to achieve accurate control and stable output of the frequency, further reduce the phase noise of the output signal and improve the stability of the frequency hopping.

[0080] Specifically, the loop filter in the embodiment of the present application can be further understood in conjunction with a specific circuit structure schematic diagram, see Figure 3 , which is a schematic diagram of the circuit structure of a loop filter provided in an embodiment of the present application. As shown in the figure, the amplifier uses AD797ARZ. Capacitor C1 = 0.033uf, resistor R1 = 120 ohms, capacitor C2 = 0.033uf, resistor R3 = 1000 ohms, capacitor C3 = 82pf, resistor R3 = 510 ohms, capacitor C3 = 820pf.

[0081] For example, the loop filter can be implemented by a fourth-order active loop filter composed of an operational amplifier AD797, the voltage-controlled oscillator can be UMS-2000-A16, and the fractional phase-locked loop can be HMC704LP4E. The model type of the device can be determined by actual needs, and this embodiment does not specifically limit this.

[0082] In an example, a filter 24 may be further provided at the other end of the voltage-controlled oscillator 23 to further reduce the phase noise of the output signal.

[0083] In one possible implementation, Figure 2 It can be seen that the other end of the frequency division module can also be connected to the power amplifier module, which includes a power amplifier and an acoustic surface filter. The power amplifier can amplify the signal power of the first frequency division signal to ensure that the signal has sufficient strength during transmission. At the same time, the acoustic surface filter can also be used to filter the signal after the signal amplification process to filter out unnecessary frequency components in the output signal, thereby ensuring the purity and stability of the signal.

[0084] In another possible implementation, in order to monitor the operating status of the fractional phase-locked loop in a timely manner, the main control processing module can also be used to perform the following three steps:

[0085] Step 1: acquiring the operating status data of the fractional phase-locked loop; the operating status data is stored in the status register of the fractional phase-locked loop;

[0086] The master control processing module can establish data communication with the fractional phase-locked loop through the SPI serial interface, thereby reading the data in the status register of the fractional phase-locked loop. The status register of the fractional phase-locked loop contains the operating status data of the fractional phase-locked loop, such as the locking state of the phase-locked loop, phase error, and charge pump current.

[0087] Step 2: determining the operating state of the fractional phase-locked loop according to the operating state data;

[0088] After acquiring the status data in the status register of the fractional phase-locked loop, the main control processing module performs data analysis on the read operation status data to determine the operation status of the fractional phase-locked loop. During the data analysis process, the main control processing module can use built-in algorithms or rules to analyze the operation status of the fractional phase-locked loop. For example, the analysis method can be to determine whether the fractional phase-locked loop is working properly by comparing the expected current value with the actual value, or checking whether the phase error is within the allowable range.

[0089] Step three: when the operation state of the fractional phase-locked loop is abnormal, output an alarm signal.

[0090] When the main control processing module detects that the state of the fractional phase-locked loop is abnormal (such as phase lock failure, signal instability, etc.), it will trigger the alarm mechanism and output an alarm signal. Among them, the output of the alarm signal is realized in a variety of ways, such as lighting a warning light, sending an error signal, triggering an alarm sound, or reporting the abnormal state to the outside through a communication interface.

[0091] Through the above steps, the main control processing module can effectively monitor the working status of the fractional phase-locked loop and issue an alarm in time when an abnormality occurs, thereby ensuring that the system can quickly locate faults.

[0092] In another possible implementation, the operating mode of the phase-locked loop frequency synthesizer includes an open-loop mode and a closed-loop mode. When the operating mode of the phase-locked loop frequency synthesizer is the open-loop mode, the second control current signal is not affected by the first frequency hopping feedback signal and the reference frequency signal.

[0093] When the operation mode of the phase-locked loop frequency synthesizer is the closed-loop mode, the second control current signal is obtained based on the first frequency hopping feedback signal and the reference frequency signal.

[0094] When the operating mode of the phase-locked loop frequency synthesizer is open-loop mode, the signal at the input end of the power divider will not affect the output of the loop filter, that is, the first frequency hopping feedback signal divided by the power divider will not be transmitted back to the fractional phase-locked loop, which means that the feedback loop of the phase-locked loop is disconnected and the phase-locked loop frequency synthesizer is in a state not affected by external signals.

[0095] In this mode, the phase-locked loop frequency synthesizer can output three specific frequencies: the highest frequency, the middle frequency, and the lowest frequency. These frequencies are pre-set and do not rely on the feedback loop for adjustment or stability. Therefore, this mode is mainly used for testing and debugging to ensure that the basic functions of the device are normal at different frequencies.

[0096] When the phase-locked loop frequency synthesizer works in closed-loop mode, the phase-locked loop frequency synthesizer controls the output frequency of the voltage-controlled oscillator through a feedback loop. The feedback loop can monitor and adjust the output signal of the voltage-controlled oscillator in real time to ensure the stability and accuracy of the output frequency.

[0097] In this mode, the phase-locked loop frequency synthesizer can output any signal within its frequency range. The main control processor can accurately control the first control current signal output by the fractional phase-locked loop according to the pre-stored frequency data set and calculation formula to meet various application requirements.

[0098] The embodiment of the present application provides a VHF frequency band agile frequency source control device, in which the setting of the preset frequency hopping data set can ensure that the fractional phase-locked loop can generate a first control current signal according to the corresponding frequency hopping control parameters, thereby realizing fast frequency hopping between different frequency signals. At the same time, the fractional phase-locked loop needs to further receive the first frequency hopping feedback signal transmitted by the power divider, and adjust the first control current signal to be output based on the phase difference between the first frequency hopping feedback signal and the reference frequency signal, so as to stabilize the output frequency of the output signal. In this way, after repeated adjustment of the output signal for many times, the first control current signal output by the fractional phase-locked loop will tend to be stable and realize high-frequency locking, and the accuracy of the first control current signal is improved. Correspondingly, when the first frequency hopping signal from the power divider is input to the eight-frequency pre-divider of the frequency division module, the eight-frequency pre-divider will perform signal division processing on the first frequency hopping signal in the UHF frequency band, obtain the signal in the VHF frequency band and reduce the phase noise in the output signal. In this way, the device can realize fast frequency hopping of the output signal under the condition of ensuring low phase noise and high signal accuracy. The phase noise of the output signal of the phase-locked loop frequency synthesizer is reduced, thereby realizing the fast frequency hopping function of the phase-locked loop frequency synthesizer while ensuring that the output signal of the phase-locked loop frequency synthesizer has a low phase noise characteristic.

[0099] A frequency agile source control method for a VHF band provided in an embodiment of the present application is introduced below. The frequency agile source control method for a VHF band described below and the frequency agile source control device for a VHF band described above can be referred to each other.

[0100] See also Figure 4 , the figure is a flow chart of a VHF band agile frequency source control method provided by an embodiment of the present application, which is applied to a fractional phase-locked loop; the fractional phase-locked loop is included in an agile frequency source control device; the agile frequency source device includes: a main control processing module, a phase-locked loop frequency synthesizer and a reference frequency source; the phase-locked loop frequency synthesizer includes: the fractional phase-locked loop and a power divider; the reference frequency source is used to provide a reference frequency signal to the fractional phase-locked loop; the method includes the following steps:

[0101] S101: performing frequency hopping control on the reference frequency signal according to the frequency hopping control parameter from the main control processing module to obtain a first control current signal, and sending the first control current signal to the loop filter; the frequency hopping control parameter is obtained by the main control processing module based on a preset frequency hopping data set;

[0102] S102: receiving a first frequency hopping feedback signal from the power divider;

[0103] S103: performing phase noise processing on the frequency hopping control signal according to a phase difference between the first frequency hopping feedback signal and the reference frequency signal to obtain a second control current signal;

[0104] The power divider is used to perform signal frequency division processing on the first control current signal to obtain the first frequency hopping feedback signal and the first frequency hopping signal; the device also includes: a frequency division module; the frequency division module includes: an input frequency selection filter, an eight-frequency pre-divider and an output frequency selection filter; one end of the input frequency selection filter is connected to the power divider, and the other end is connected to the eight-frequency pre-divider; the other end of the eight-frequency pre-divider is connected to the output frequency selection filter;

[0105] The frequency division module is used to perform signal low spurious processing on the first frequency hopping signal to obtain a first frequency division signal.

[0106] In a possible implementation, performing frequency hopping control on the reference frequency signal according to the frequency hopping control parameter from the main control processing module to obtain the first control current signal includes:

[0107] Determining an integer frequency division value and a fractional frequency division value according to the frequency hopping control parameter;

[0108] The reference frequency signal is frequency-hopped according to the integer frequency division value and the fractional frequency division value to obtain the first control current signal.

[0109] In a possible implementation, the operating modes of the phase-locked loop frequency synthesizer include: an open-loop mode and a closed-loop mode;

[0110] When the operating mode of the phase-locked loop frequency synthesizer is the open-loop mode, the second control current signal is not affected by the first frequency hopping feedback signal and the reference frequency signal;

[0111] When the operation mode of the phase-locked loop frequency synthesizer is the closed-loop mode, the second control current signal is obtained based on the first frequency hopping feedback signal and the reference frequency signal.

[0112] In a possible implementation, the phase-locked loop frequency synthesizer further includes: a loop filter and a voltage-controlled oscillator;

[0113] The loop filter is used to perform noise filtering on the first control current signal to obtain a first control voltage signal, and send the first control voltage signal to the voltage-controlled oscillator;

[0114] The voltage-controlled oscillator is used to generate a first frequency hopping signal according to the first control voltage signal.

[0115] In a possible implementation, the main control processing module is used to:

[0116] Acquiring operation status data of the fractional phase-locked loop; the operation status data is stored in a status register of the fractional phase-locked loop;

[0117] Determining the operating state of the fractional phase-locked loop according to the operating state data;

[0118] When the operation state of the fractional phase-locked loop is abnormal, an alarm signal is output.

[0119] It should be noted that each embodiment in this specification is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the method and the device, since they are basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment. The method and the device described above are merely schematic, wherein the units described as separate components may or may not be physically separated, and the components indicated as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. A person of ordinary skill in the art can understand and implement it without creative work.

[0120] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A VHF frequency band agile frequency source control device, characterized in that: include: Main control processing module, phase-locked loop frequency synthesizer and reference frequency source; The phase-locked loop frequency synthesizer comprises: a fractional phase-locked loop, a loop filter, a voltage-controlled oscillator and a power divider; the reference frequency source is used to provide a reference frequency signal to the fractional phase-locked loop; the fractional phase-locked loop comprises: a frequency hopping control module, a signal receiving module and a noise processing module; The frequency hopping control module is used to perform frequency hopping control on the reference frequency signal according to the frequency hopping control parameters from the main control processing module to obtain a first control current signal, and send the first control current signal to the loop filter; the frequency hopping control parameters are obtained by the main control processing module based on a preset frequency hopping data set; The signal receiving module is used to receive the first frequency hopping feedback signal from the power divider; The noise processing module is used to perform phase noise processing on the frequency hopping control signal according to the phase difference between the first frequency hopping feedback signal and the reference frequency signal to obtain a second control current signal; The loop filter is used to perform noise filtering on the first control current signal to obtain a first control voltage signal, and send the first control voltage signal to the voltage controlled oscillator; The voltage-controlled oscillator is used to generate a first frequency hopping signal according to the first control voltage signal; The power divider is used to perform signal frequency division processing on the first frequency hopping signal to obtain the first frequency hopping feedback signal and the first frequency hopping signal; the frequency agile frequency source control device also includes: a frequency division module; the frequency division module includes: an input frequency selection filter, an eight-frequency pre-divider and an output frequency selection filter; one end of the input frequency selection filter is connected to the power divider, and the other end is connected to the eight-frequency pre-divider; the other end of the eight-frequency pre-divider is connected to the output frequency selection filter; The frequency division module is used to perform signal low spurious processing on the first frequency hopping signal to obtain a first frequency division signal.

2. The device according to claim 1, characterized in that The frequency hopping control module is specifically used for: Determining an integer frequency division value and a fractional frequency division value according to the frequency hopping control parameter; The reference frequency signal is frequency-hopped according to the integer frequency division value and the fractional frequency division value to obtain the first control current signal.

3. The device according to claim 1, characterized in that The working modes of the phase-locked loop frequency synthesizer include: open-loop mode and closed-loop mode; When the operating mode of the phase-locked loop frequency synthesizer is the open-loop mode, the second control current signal is not affected by the first frequency hopping feedback signal and the reference frequency signal; When the operation mode of the phase-locked loop frequency synthesizer is the closed-loop mode, the second control current signal is obtained based on the first frequency hopping feedback signal and the reference frequency signal.

4. The device according to claim 1, characterized in that The main control processing module is used to: Acquiring operation status data of the fractional phase-locked loop; the operation status data is stored in a status register of the fractional phase-locked loop; Determining the operating state of the fractional phase-locked loop according to the operating state data; When the operation state of the fractional phase-locked loop is abnormal, an alarm signal is output.

5. A method for controlling a frequency source of VHF frequency band, characterized in that: Applied in fractional phase-locked loops; The fractional phase-locked loop is included in an agile frequency source control device; The agile frequency source device comprises: a main control processing module, a phase-locked loop frequency synthesizer and a reference frequency source; the phase-locked loop frequency synthesizer comprises: a fractional phase-locked loop, a loop filter, a voltage-controlled oscillator and a power divider; the reference frequency source is used to provide a reference frequency signal to the fractional phase-locked loop; the fractional phase-locked loop comprises: a frequency hopping control module, a signal receiving module and a noise processing module; the method comprises: According to the frequency hopping control parameters from the main control processing module, the reference frequency signal is frequency-hopped to obtain a first control current signal, and the first control current signal is sent to the loop filter; the frequency hopping control parameters are obtained by the main control processing module based on a preset frequency hopping data set; receiving a first frequency hopping feedback signal from the power divider; According to the phase difference between the first frequency hopping feedback signal and the reference frequency signal, performing phase noise processing on the frequency hopping control signal to obtain a second control current signal; The loop filter is used to perform noise filtering on the first control current signal to obtain a first control voltage signal, and send the first control voltage signal to the voltage controlled oscillator; The voltage-controlled oscillator is used to generate a first frequency hopping signal according to the first control voltage signal; The power divider is used to perform signal frequency division processing on the first frequency hopping signal to obtain the first frequency hopping feedback signal and the first frequency hopping signal; the device also includes: a frequency division module; the frequency division module includes: an input frequency selection filter, an eight-frequency pre-divider and an output frequency selection filter; one end of the input frequency selection filter is connected to the power divider, and the other end is connected to the eight-frequency pre-divider; the other end of the eight-frequency pre-divider is connected to the output frequency selection filter; The frequency division module is used to perform signal low spurious processing on the first frequency hopping signal to obtain a first frequency division signal.

6. The method according to claim 5, characterized in that The step of performing frequency hopping control on the reference frequency signal according to the frequency hopping control parameter from the main control processing module to obtain a first control current signal includes: Determining an integer frequency division value and a fractional frequency division value according to the frequency hopping control parameter; The reference frequency signal is frequency-hopped according to the integer frequency division value and the fractional frequency division value to obtain the first control current signal.

7. The method according to claim 5, characterized in that The working modes of the phase-locked loop frequency synthesizer include: open-loop mode and closed-loop mode; When the operating mode of the phase-locked loop frequency synthesizer is the open-loop mode, the second control current signal is not affected by the first frequency hopping feedback signal and the reference frequency signal; When the operation mode of the phase-locked loop frequency synthesizer is the closed-loop mode, the second control current signal is obtained based on the first frequency hopping feedback signal and the reference frequency signal.

8. The method according to claim 5, characterized in that The phase-locked loop frequency synthesizer also includes: a loop filter and a voltage-controlled oscillator; The loop filter is used to perform noise filtering on the first control current signal to obtain a first control voltage signal, and send the first control voltage signal to the voltage controlled oscillator; The voltage-controlled oscillator is used to generate a first frequency hopping signal according to the first control voltage signal.

9. The method according to claim 5, characterized in that The main control processing module is used to: Acquiring operation status data of the fractional phase-locked loop; the operation status data is stored in a status register of the fractional phase-locked loop; Determining the operating state of the fractional phase-locked loop according to the operating state data; When the operation state of the fractional phase-locked loop is abnormal, an alarm signal is output.

Images