A multi-channel multi-frequency-band universal intermediate frequency receiving and processing device

Abstract

The application discloses a kind of multi-channel multi-frequency band general intermediate frequency receiving processing device, it is related to communication field, the device is by switch, shunt, variable gain amplifier, temperature compensation attenuator, amplifier, filter, frequency synthesizer, frequency mixer, numerical control attenuator, FPGA processor and the like component composition, with miniaturization, low power consumption, low cost, high jump speed, multi-channel, multi-frequency band, nationalization, environmental adaptability is strong and the like advantage, can satisfy fixed station, vehicle-mounted station, airborne station, portable station and the like multiple working scene application requirement.Fast frequency hopping, multi-frequency band, multi-channel, 100% nationalization are the key of the present application.The application can realize multiple independent receiving channels by multi-channel, multi-frequency band design, while supporting 70MHz, 140MHz and multiple intermediate frequency operating frequency bands such as extended L frequency band, significantly improve the versatility and integration of intermediate frequency receiving channel.

Description

TECHNICAL FIELD

[0001] The present application relates to a multi-channel, multi-band general intermediate frequency receiving processing technology in the field of communication, supporting multiple satellite communication working frequency bands such as 70MHz, 140MHz, extended L band, etc., and can simultaneously process up to three independent intermediate frequency receiving signals, with the characteristics of miniaturization, low cost, high integration, and nationalization, etc., and is particularly suitable for use as a receiving intermediate frequency of a multi-channel general satellite communication terminal device. BACKGROUND

[0002] With the daily increase in the total amount of satellite communication channel devices, the space resources are becoming increasingly strained, which seriously affects the communication quality of existing satellite communication devices. In order to cope with the increasingly severe space environment and improve the communication quality of the satellite communication system, the satellite communication channel device needs to support multiple working frequency bands and have strong frequency hopping capability. In addition, with the increasing requirement for integration of satellite communication channel devices, the single device not only supports the expansion of working frequency bands from single band to multi-band, but also requires higher support for the number of channels.

[0003] Since the currently used multi-channel, multi-band modems in domestic satellite communication systems do not have fast frequency hopping capability, they not only have high cost and cannot adapt to some harsh environments, but also have poor electromagnetic compatibility, poor anti-shock and vibration capability, and narrow temperature adaptation range, etc., which brings a lot of inconvenience to users. The receiving intermediate frequency units in the current satellite communication channel devices cannot simultaneously meet the requirements of multi-channel, multi-band, fast frequency hopping, and nationalization. SUMMARY

[0004] The purpose of the present application is to avoid the shortcomings in the background art and provide a multi-channel, multi-band general intermediate frequency receiving processing device that can be used as a receiving intermediate frequency of a general satellite communication channel device. The present application can operate in a relatively harsh environment (-40℃ to +65℃), is designed with high integration and nationalization, the size of each intermediate frequency processing device is only 150mm*70mm*15mm, can realize three independent receiving channels, supports multiple satellite communication working frequency bands such as 70MHz, 140MHz, and extended L band, supports frequency hopping, and has the characteristics of simple control mode, low power consumption, and nationalization, etc.

[0005] The technical solution adopted by the present application is as follows:

[0006] A multi-channel, multi-band general intermediate frequency receiving processing device, comprising a first switch 1, a fourth filter 16, a third amplifier 17, a first digital attenuator 18, a third variable incremental amplifier 19, an FPGA processor 24, and a multi-stage multi-band general intermediate frequency receiving channel.

[0007] The switching ports of the first switch are connected to the input end of the multi-band universal intermediate frequency receiving channel and the fourth filter respectively, and the externally input intermediate frequency signal is switched and transmitted to the processing channel of the extended L frequency band and the 70M / 140M respectively.

[0008] The FPGA processor 24 is used to realize the control of the multi-band universal intermediate frequency receiving channel, the first digital controlled attenuator 18, the third variable incremental amplifier 19 and the first switch 1.

[0009] The fourth filter 16 works in the 70M / 140M frequency band, and is used to perform low-pass filtering on the input intermediate frequency signal and filter out the out-of-band stray signals; the third amplifier 17 amplifies the level of the filtered signal, and outputs the amplified intermediate frequency signal to the first digital controlled attenuator 18; the first digital controlled attenuator 18 adjusts the level of the intermediate frequency signal in a controllable attenuation manner, and then outputs to the third variable gain amplifier 19; the third variable gain amplifier 19 adjusts the level of the 70M / 140M intermediate frequency signal input from the previous stage, so that the output level meets the use requirements of the subsequent AD processor.

[0010] Further, each multi-band universal intermediate frequency receiving channel includes a first shunt 2, a first variable gain amplifier 4, a first temperature compensation attenuator 5, a first amplifier 6, a first frequency synthesizer 8, a first filter 9, a second frequency synthesizer 11, a second amplifier 12, a second filter 13, a second variable gain amplifier 14, a third filter 15, a third shunt 20 and a second switch 22, and a fourth amplifier 23.

[0011] The first shunt 2 works in the extended L frequency band, and is used for shunting the intermediate frequency signal, one of which is used for the next stage multi-band general intermediate frequency receiving channel; the other is input to the first variable gain amplifier 4, the first variable gain amplifier 4 adjusts the level of the shunted signal, and the level-adjusted signal is output to the temperature compensation attenuator 5; the temperature compensation attenuator 5 performs temperature compensation on the gain of the intermediate frequency link; the first amplifier 6 amplifies the level of the temperature-compensated signal, and outputs the amplified intermediate frequency signal to the first frequency synthesizer 8; the first frequency synthesizer 8 mixes the amplified intermediate frequency signal with the local oscillator to generate an X frequency band fixed frequency intermediate frequency signal, and outputs the X frequency band fixed frequency intermediate frequency signal to the first filter 9; the first filter 9 performs band-pass filtering on the fixed frequency intermediate frequency signal, and outputs the filtered signal to the second mixer 10; the second mixer 10 mixes the filtered intermediate frequency fixed frequency signal with the local oscillator generated by the second frequency synthesizer 11 to generate an S frequency band fixed frequency intermediate frequency signal, and outputs the S frequency band fixed frequency intermediate frequency signal to the second amplifier 12; the second amplifier 12 amplifies the level of the second mixing signal, and outputs the amplified signal to the second filter 13; the second filter 13 performs low-pass filtering on the S frequency band fixed frequency intermediate frequency signal, and outputs the filtered signal to the second variable gain amplifier 14; the second variable gain amplifier 14 adjusts the level of the filtered low intermediate frequency signal, so that the output level meets the use requirements of the subsequent AD processor; the third filter 15 performs band-pass filtering on the S frequency band fixed frequency intermediate frequency signal, and outputs the filtered signal to the second switch 22.

[0012] The output end of the third variable gain amplifier 19 is connected with the second switch 22 through the third shunt 20; the second switch 22 is used for switching and selecting the 70M / 140M intermediate frequency signal and the S frequency band fixed frequency intermediate frequency signal, and the selected signal is output to the fourth amplifier 23; the fourth amplifier 23 amplifies the level of the selected intermediate frequency signal, and finally outputs the signal for the subsequent AD processing;

[0013] The FPGA processor 24 is used for controlling the first variable gain amplifier 4, the first frequency synthesizer 8, the second frequency synthesizer 11, the second variable gain amplifier 14, and the second switch 22.

[0014] Further, the processing channels of the extended L frequency band of the next stage multi-band general intermediate frequency receiving channel and the 70M / 140M are respectively shunted from the first shunt and the third shunt of the previous stage.

[0015] Compared with the background art, the present application has the following advantages:

[0016] 1. The present application can support multiple frequency bands such as 70MHz, 140MHz and extended L frequency band, and realize multi-band compatibility.

[0017] 2, The application has high integration, integrates three completely independent receiving intermediate frequency channels, and the size of the three-channel product is only 150mm*70mm*15mm.

[0018] 3, The application supports frequency hopping, and the highest frequency hopping speed is 5000 hops / s.

[0019] 4, The application is completely self-controllable, and 100% domesticization of components is realized.

[0020] 5, The application has good environmental applicability and can normally work under a relatively harsh environment temperature (-40℃ ~ +65℃). BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 It is a principle block diagram of the multi-channel multi-frequency band general intermediate frequency receiving processing device. DETAILED DESCRIPTION

[0022] The application will be further described in detail in combination with the drawings and specific embodiments.

[0023] Referring to Figure 1 , the multi-channel multi-frequency band general intermediate frequency receiving processing device comprises a first switch 1, a next-stage first shunt 3, a next-stage third shunt 21, an FPGA processor 24, a fourth filter 16, a third amplifier 17, a first digital control attenuator 18, a third variable gain amplifier 19, and a plurality of multi-frequency band general intermediate frequency receiving channels.

[0024] Each multi-frequency band general intermediate frequency receiving channel comprises a first shunt 2, a first variable gain amplifier 4, a first temperature compensation attenuator 5, a first amplifier 6, a first frequency synthesizer 8, a first filter 9, a second frequency synthesizer 11, a second amplifier 12, a second filter 13, a second variable gain amplifier 14, a third filter 15, a third shunt 20, a second switch 22, and a fourth amplifier 23. In the embodiment, the next-stage first shunt 3 and the next-stage third shunt 21 are part of the second-stage multi-frequency band general intermediate frequency receiving channel.

[0025] Figure 1 It is an electrical principle block diagram of the embodiment of the application, and the embodiment is according to Figure 1Connection line. Wherein the first switch 1 can be outside the input of the intermediate frequency signal channel switching, respectively, to 70M / 140M or extended L frequency band processing channel, the first switch 1 embodiment using the commercially available dedicated switch SIS252SP3; The first shunt 2, the next level of the first shunt 3 work in the extended L frequency band, for the intermediate frequency signal is shunted, for multiple multi-band general intermediate frequency receiving channel use, the first shunt 2, the next level of the first shunt 3 using the commercially available dedicated shunt GR1210; The first variable gain amplifier 4 to the signal after shunting level adjustment, the first variable gain amplifier 4 embodiment using the commercially available dedicated variable gain amplifier BR9603; The first warm compensation attenuator 5 to the gain of the intermediate frequency link temperature compensation, the first warm compensation attenuator 5 using the commercially available dedicated warm compensation attenuator HTCA1803N9W3; The first amplifier 6 to the signal after temperature compensation level amplification, the first amplifier 6 using the commercially available dedicated amplifier ZDH9019; The first mixer 7 after the amplification of the intermediate frequency signal and the first frequency synthesizer 8 generated by the wideband local oscillator signal mixing, produce X frequency band fixed frequency intermediate frequency signal, the first mixer 7 using the commercially available dedicated mixer YMC8002-Q1P; The first frequency synthesizer 8 generates X frequency band local oscillator signal, the first frequency synthesizer 8 using the commercially available dedicated frequency synthesizer CAPV0728C32; The first filter 9 to the fixed frequency intermediate frequency signal band pass filter processing, filter out the out-of-band spurious signal, the first filter 9 using the commercially available dedicated custom dielectric filter; The second mixer 10 after the filtering of the intermediate frequency fixed frequency signal and the second frequency synthesizer 11 generated by the fixed frequency local oscillator mixing, produce S frequency band fixed frequency intermediate frequency signal, the second mixer 10 using the commercially available dedicated mixer YMC8002-Q1P, the second frequency synthesizer 11 using the commercially available dedicated frequency synthesizer CAPV0728C32; The second amplifier 12 to the signal after the second mixing level amplification, the second amplifier 12 using the commercially available dedicated amplifier ZDH9019; The second filter 13 to the S frequency band fixed frequency intermediate frequency signal low pass filter processing, the second filter 13 using the commercially available dedicated filter XECLFCN3216-1000; The second variable gain amplifier 14 to the low intermediate frequency signal after filtering level adjustment, so that the output level to meet the use requirements of the latter AD processor, the second variable gain amplifier 14 using the commercially available dedicated variable gain amplifier YDC6401-QP4; The third filter 15 to the S frequency band fixed frequency intermediate frequency signal band pass filter processing, filter out the out-of-band spurious signal, the third filter 15 using the commercially available dedicated LTCC band pass filter;The fourth filter 16 works in 70M / 140M frequency band, and is used for low-pass filtering the input intermediate frequency signal and filtering out the out-of-band stray signal. The fourth filter 16 in the embodiment adopts a commercially available special LTCC filter XECLFCN3216-180. The third amplifier 17 amplifies the level of the filtered signal. The third amplifier 17 in the embodiment adopts a commercially available special amplifier ZDH9019. The first digital controlled attenuator 18 is used for controllable attenuation adjustment of the level of the intermediate frequency signal. The first digital controlled attenuator 18 in the embodiment adopts a commercially available special digital controlled attenuator SIAT082SP4. The third variable gain amplifier 19 is used for level adjustment of the 70M / 140M intermediate frequency signal input from the previous stage, so that the output level meets the use requirement of the subsequent AD processor. The third variable gain amplifier 19 in the embodiment adopts a commercially available special variable gain amplifier YDC6401-QP4. The third shunt 20 and the next-stage third shunt 21 work in 70M / 140M frequency band, and are used for shunting the processed intermediate frequency signal for use by multiple AD processors in the subsequent stage. The third shunt 20 and the next-stage third shunt 21 in the embodiment adopt a commercially available special shunt SPD-2-10+. The switch 22 is used for switching and selecting the 70M / 140M intermediate frequency signal and the L-band fixed frequency intermediate frequency signal. The switch 22 in the embodiment adopts a commercially available special switch SIS252SP3. The fourth amplifier 23 is used for level amplification of the intermediate frequency signal selected by the switch. The fourth amplifier 23 in the embodiment adopts a commercially available special amplifier ZDH9019. The FPGA processor 24 is used for controlling the first switch 1, the first variable gain amplifier 4, the first frequency synthesizer 8, the second frequency synthesizer 11, the second variable gain amplifier 14, the first digital controlled attenuator 18, the third variable gain amplifier 19, and the second switch 22. The FPGA processor 24 in the embodiment adopts a commercially available special FPGA chip EF2L45UG132B.

[0026] The basic working principle of this invention is as follows: The input port of the first switch 1 is connected to the external intermediate frequency input signal of input port A, which is selected to enter the processing channel of 70M / 140M or extended L band. When the first switch 1 selects the extended L band processing channel, the multi-band universal intermediate frequency receiving channel 1 obtains the required low intermediate frequency fixed intermediate frequency signal through the combined action of the first splitter 2, the first variable gain amplifier 4, the temperature-compensated attenuator 5, the first amplifier 6, the first mixer 7, the first frequency synthesizer 8, the first filter 9, the second mixer 10, the second frequency synthesizer 11, the second amplifier 12, the second filter 13, the second variable gain amplifier 14, the third filter 15, the second switch 22, and the fourth amplifier 23, and outputs it to the output port B. When the first switch 1 selects the 70M / 140M processing channel, the multi-band universal intermediate frequency receiving channel 1, through the combined action of the fourth filter 16, the third amplifier 17, the first digitally controlled attenuator 18, the third variable gain amplifier 19, the third splitter 20, the second switch 22, and the fourth amplifier 23, obtains the required low intermediate frequency fixed intermediate frequency signal and outputs it to output port B. This invention is controlled by an internally integrated FPGA processor 24, which controls the first switch 1, the first variable gain amplifier 4, the first frequency synthesizer 8, the second frequency synthesizer 11, the second variable gain amplifier 14, the first digitally controlled attenuator 18, the third variable gain amplifier 19, and the second switch 22. The external interface of this invention uses LVDS, and data is transmitted with the external FPGA through port C according to the specified transmission protocol.

[0027] The installation structure of this invention is as follows: [The following text appears to be a separate, unrelated section:] ... Figure 1 All circuit components are mounted on both sides of two 8-layer printed circuit boards, each 140mm x 60mm in length. The printed circuit boards are then installed inside a shielding box, and the structure is sealed using upper and lower cover plates. Input port A and output port B are connected using two SMP cable sockets, and input port C is connected using a 1.27mm pitch low-frequency socket. This assembly constitutes the present invention.

[0028] This technical solution enables the development of a multi-channel, multi-band general-purpose intermediate frequency receiving and processing device that meets the application requirements of various scenarios such as fixed stations, vehicle-mounted stations, airborne stations, and portable stations. This invention can simultaneously meet the technical requirements of miniaturization, low power consumption, high hopping speed, low cost, multi-channel, and multi-band.

Claims

1. A multi-channel, multi-band universal intermediate frequency receiving and processing device, comprising a first switch (1), a fourth filter (16), a third amplifier (17), a first digitally controlled attenuator (18), a third variable incremental amplifier (19), an FPGA processor (24), and a multi-level, multi-band universal intermediate frequency receiving channel; The switching ports of the first switch are respectively connected to the input of the multi-band general intermediate frequency receiving channel and the fourth filter, and the channel of the externally input intermediate frequency signal is switched and sent to the extended L-band processing channel and 70M / 140M respectively. The FPGA processor (24) is used to control the multi-band general intermediate frequency receiving channel, the first digitally controlled attenuator (18), the third variable incremental amplifier (19), and the first switch (1); The fourth filter (16) operates in the 70M / 140M frequency band and is used to perform low-pass filtering on the input intermediate frequency signal and filter out out-of-band spurious signals. The third amplifier (17) amplifies the level of the filtered signal and outputs the amplified intermediate frequency signal to the first digitally controlled attenuator (18). The first digitally controlled attenuator (18) adjusts the level of the intermediate frequency signal in a controllable manner and outputs it to the third variable gain amplifier (19). The third variable gain amplifier (19) adjusts the level of the 70M / 140M intermediate frequency signal input from the previous stage so that the output level meets the requirements of the subsequent AD processor.

2. The multi-channel, multi-band universal intermediate frequency receiver processing device according to claim 1, characterized in that, Each multi-band general intermediate frequency receiving channel includes a first splitter (2), a first variable gain amplifier (4), a first temperature-compensated attenuator (5), a first amplifier (6), a first mixer (7), a first frequency synthesizer (8), a first filter (9), a second mixer (10), a second frequency synthesizer (11), a second amplifier (12), a second filter (13), a second variable gain amplifier (14), a third filter (15), a third splitter (20), a second switch (22), and a fourth amplifier (23). The first splitter (2) operates in the extended L-band and is used to split the intermediate frequency (IF) signal. One branch is used for the next-level multi-band general-purpose IF receiving channel; the other branch is input to the first variable gain amplifier (4). The first variable gain amplifier (4) adjusts the level of the split signal and outputs the adjusted signal to the temperature-compensated attenuator (5). The temperature-compensated attenuator (5) performs temperature compensation on the gain of the IF link. The first amplifier (6) amplifies the level of the temperature-compensated signal and outputs the amplified IF signal to the first mixer (7). The first mixer (7) mixes the amplified IF signal with the local oscillator generated by the first frequency synthesizer (8) to generate a fixed-frequency IF signal in the X-band and outputs it to the first filter (9). The first filter (9) performs bandpass filtering on the fixed-frequency IF signal and filters out out-of-band spurious signals before outputting it to the first filter (9). The second mixer (10) mixes the filtered intermediate frequency fixed-frequency signal with the local oscillator generated by the second frequency synthesizer (11) to generate an intermediate frequency signal with a fixed frequency in the S-band, which is then output to the second amplifier (12). The second amplifier (12) amplifies the level of the signal after the second mixing and outputs the amplified signal to the second filter (13). The second filter (13) performs low-pass filtering on the intermediate frequency signal with a fixed frequency in the S-band, filters out out-of-band spurious signals, and outputs the signal to the second variable gain amplifier (14). The second variable gain amplifier (14) adjusts the level of the filtered low intermediate frequency signal so that the output level meets the requirements of the subsequent AD processor. The third filter (15) performs band-pass filtering on the intermediate frequency signal with a fixed frequency in the S-band, filters out out-of-band spurious signals, and outputs the signal to the second switch (22). The output of the third variable gain amplifier (19) is connected to the second switch (22) through the third splitter (20); the second switch (22) is used to switch between the 70M / 140M intermediate frequency signal and the S-band fixed frequency intermediate frequency signal, and outputs the selected signal to the fourth amplifier (23); the fourth amplifier (23) amplifies the intermediate frequency signal after the switch selection and finally outputs it for processing by the subsequent AD stage; The FPGA processor (24) is used to control the first variable gain amplifier (4), the first frequency synthesizer (8), the second frequency synthesizer (11), the second variable gain amplifier (14), and the second switch (22).

3. The multi-channel, multi-band universal intermediate frequency receiving and processing device according to claim 2, characterized in that, The extended L-band processing channel and the 70M / 140M signal of the next-level multi-band general intermediate frequency receiving channel are obtained from the first and third splitters of the previous level, respectively.

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