A digital circuit demodulation and decoding method, device, equipment and storage medium

Abstract

The application discloses a digital circuit demodulation and decoding method, device and equipment and a storage medium. The method is applied to a tag receiver and comprises the following steps: acquiring a downlink signal of a digital circuit, wherein the downlink signal comprises a pilot sequence and an effective signal; performing frame synchronization detection on the pilot sequence to determine a pilot end position, thereby indirectly determining the start and end of the effective data; acquiring a symbol length, performing symbol synchronization detection on a pilot position sequence interval according to the symbol length to determine a best decision time sequence; and determining a decoding value of the effective signal according to the best decision time sequence. The pilot position sequence interval is acquired by performing frame synchronization detection on the pilot sequence, and then the best decision time sequence is determined by combining the symbol length to perform symbol synchronization detection, so that the tag receiver can accurately locate the signal, the decoding error caused by synchronization deviation is reduced, the tag receiver can adapt to complex working conditions, and the anti-interference capability is enhanced. By locating the best decision time, the decoding value can be quickly determined, and redundant operation is reduced.

Description

Technical Field

[0001] This invention relates to the field of Internet of Things (IoT) technology, and in particular to a digital circuit demodulation and decoding method, apparatus, device, and storage medium. Background Technology

[0002] In today's communications field, with the gradual saturation of traditional wireless communication services, the Internet of Things (IoT) market is showing enormous potential. However, existing IoT technologies face challenges in many aspects. For example, in large-scale deployment applications, limitations imposed by environmental, cost, and energy conservation factors make traditional power supply methods insufficient to meet the demands, making passive IoT a highly anticipated and effective solution.

[0003] Among them, Radio Frequency Identification (RFID), as a mature passive IoT technology, has significant limitations in practical applications. Its communication distance is constrained by the power supply method and energy conversion efficiency, often only able to obtain energy from the reader's radio frequency field within a range of about twenty meters. Furthermore, because RFID tags require low-power design, the digital demodulation and decoding algorithms used in their receivers are relatively simple. Typically, the tag uses envelope detection as an analog demodulation circuit. Although the circuit is simple and low in complexity, the envelope detector is a nonlinear device, resulting in weak anti-aliasing and anti-interference capabilities. When the communication environment has strong interference or the channel is poor with a low signal-to-noise ratio, the demodulated signal output by the detection circuit may exhibit glitches and distortions, and the symbol period and duty cycle may also change, leading to decoding abnormalities and weak anti-interference capabilities. Summary of the Invention

[0004] This invention provides a digital circuit demodulation and decoding method, apparatus, device, and storage medium to improve the anti-interference capability and receiving sensitivity of tag receivers.

[0005] According to one aspect of the present invention, a digital circuit demodulation and decoding method is provided, applied to a tag receiver, the method comprising:

[0006] Acquire the downlink signal of the digital circuit, wherein the downlink signal includes a preamble sequence and a valid signal;

[0007] Perform frame synchronization detection on the precode sequence to obtain the precode position sequence interval;

[0008] Obtain the symbol length, and perform symbol synchronization detection on the precode position sequence interval based on the symbol length to determine the optimal decision time sequence;

[0009] The decoded value of the valid signal is determined based on the optimal decision time sequence.

[0010] Optionally, frame synchronization detection is performed on the precode sequence to obtain the precode position sequence interval, including: performing a convolution operation on the precode sequence through a matched filter to generate a precode convolution result; performing peak detection on the precode convolution result to determine the peak position; and locating the end position of the preceding and following precodes based on the peak position to generate the precode position sequence interval.

[0011] Optionally, symbol synchronization detection is performed on the precode position sequence interval based on the symbol length to determine the optimal decision time sequence, including: determining the sampling start and end interval and the total number of symbols based on the precode position sequence interval and the symbol length, and determining the current number of symbols; determining whether the current number of symbols exceeds the total number of symbols; if so, summarizing each optimal decision time to generate the optimal decision time sequence; otherwise, taking the first position value in the precode position sequence interval as the initial symbol position value, determining the sampling point corresponding to the theoretical peak based on the initial symbol position value and the symbol length, and determining the optimal decision time based on the sampling point corresponding to the theoretical peak and the precode position sequence interval.

[0012] Optionally, the total number of symbols is determined based on the precode position sequence interval and the symbol length, including: subtracting the last position value and the first position value in the precode position sequence interval to determine the sampling start and end interval; calculating the ratio of the sampling start and end interval to the symbol length, and determining the total number of symbols based on the ratio.

[0013] Optionally, the sampling point corresponding to the theoretical peak value is determined based on the initial symbol position value and the symbol length, including: calculating the product of the symbol length and the current number of symbols; and adding the product to the initial symbol position value to obtain the sampling point corresponding to the theoretical peak value.

[0014] Optionally, the optimal decision time is determined based on the sampling point corresponding to the theoretical peak and the precode position sequence interval, including: matching the sampling point corresponding to the theoretical peak through the precode sequence to determine the target position value in the precode sequence that is closest to the sampling point corresponding to the theoretical peak; and taking the target position value as the optimal decision time.

[0015] Optionally, determining the decoded value of the valid signal based on the optimal decision time sequence includes: convolving the valid signal with specified symbols respectively to generate a first convolution result and a second convolution result; sequentially taking each optimal decision time in the optimal decision time sequence as a target decision time; determining the first convolution value in the first convolution result and the second convolution value in the second convolution result based on the target decision time; taking the larger value between the first convolution value and the second convolution value as the target convolution value; and summing the target convolution values ​​at each optimal decision time to generate the decoded value.

[0016] According to another aspect of the present invention, a digital circuit demodulation and decoding apparatus is provided, the apparatus comprising:

[0017] The downlink signal acquisition module is used to acquire the downlink signal of the digital circuit, wherein the downlink signal includes a preamble sequence and a valid signal;

[0018] The precode position sequence interval acquisition module is used to perform frame synchronization detection on the precode sequence to obtain the precode position sequence interval;

[0019] The optimal decision time sequence determination module is used to obtain the symbol length and perform symbol synchronization detection on the precode position sequence interval based on the symbol length to determine the optimal decision time sequence.

[0020] The decoding value determination module is used to determine the decoding value of the valid signal based on the optimal decision time sequence.

[0021] According to another aspect of the present invention, an electronic device is provided, the electronic device comprising:

[0022] At least one processor;

[0023] and a memory communicatively connected to the at least one processor;

[0024] The memory stores a computer program that can be executed by the at least one processor, which is then executed by the at least one processor to enable the at least one processor to perform a digital circuit demodulation and decoding method according to any embodiment of the present invention.

[0025] According to another aspect of the present invention, a computer-readable storage medium is provided, the computer-readable storage medium storing computer instructions, the computer instructions being configured to cause a processor to execute and implement a digital circuit demodulation and decoding method according to any embodiment of the present invention.

[0026] The technical solution of this invention, by first performing frame synchronization detection on the preamble sequence to obtain the preamble position sequence interval, and then combining this with symbol length to perform symbol synchronization detection to determine the optimal decision time sequence, enables the tag receiver to accurately locate the signal, greatly reducing decoding errors caused by synchronization deviations, adapting to complex operating conditions of tag receivers, and enhancing anti-interference capabilities. By locating the optimal decision time sequence, the decoded value can be quickly determined, reducing redundant calculations, improving real-time performance, and accelerating information extraction.

[0027] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a flowchart of a digital circuit demodulation and decoding method according to Embodiment 1 of the present invention;

[0030] Figure 2 This is a flowchart of another digital circuit demodulation and decoding method provided in Embodiment 1 of the present invention;

[0031] Figure 3 This is a flowchart of another digital circuit demodulation and decoding method provided in Embodiment 2 of the present invention;

[0032] Figure 4 This is a schematic diagram of the structure of a digital circuit demodulation and decoding device according to Embodiment 3 of the present invention;

[0033] Figure 5 This is a schematic diagram of the structure of an electronic device that implements a digital circuit demodulation and decoding method according to an embodiment of the present invention. Detailed Implementation

[0034] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0035] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0036] Example 1

[0037] Figure 1 The flowchart below provides a digital circuit demodulation and decoding method according to Embodiment 1 of the present invention. This method can be executed by a digital circuit demodulation and decoding device, which can be implemented in hardware and / or software and can be configured in a tag receiver. Figure 1 As shown, the method includes:

[0038] S110. Acquire the downlink signal of the digital circuit, wherein the downlink signal includes a preamble sequence and a valid signal.

[0039] A tag receiver is used to receive signals containing specific tag information. Commonly found in Radio Frequency Identification (RFID) systems, it captures radio frequency signals carrying tag data from the outside world and then performs demodulation and decoding processes. In a communication link, signal transmission has a direction; downlink signals are signals transmitted from the central node to the terminal node. A preamble sequence is a signal sequence containing specific codes, sent before the transmitted data. It assists the receiving end in achieving synchronization, timing, and other functions, helping the receiving device locate the subsequent valid signal. This includes preambles and postambles. The valid signal refers to the signal content that actually carries the data and information the user needs to transmit, excluding the preamble sequence.

[0040] S120. Perform frame synchronization detection on the precode sequence to obtain the precode position sequence interval.

[0041] Frame synchronization detection refers to the process of finding the start position of each frame of data, enabling the receiver to accurately locate the data and avoid misreading or missing data. The preamble position sequence interval refers to the position sequence information obtained through frame synchronization detection.

[0042] Optionally, frame synchronization detection is performed on the precode sequence to obtain the precode position sequence interval, including: performing a convolution operation on the precode sequence through a matched filter to generate a precode convolution result; performing peak detection on the precode convolution result to determine the peak position; and locating the end position of the preceding and following precodes based on the peak position to generate the precode position sequence interval.

[0043] A matched filter is a linear filter used in digital communication. The impulse response of a matched filter is designed to match the preamble sequence. When the received preamble sequence passes through the matched filter, a convolution operation is performed. This convolution operation maximizes the signal-to-noise power ratio, enhancing the characteristics of the preamble sequence in the received signal. The resulting preamble convolution highlights the positional information of the preamble sequence in the received signal, making it easier to detect the preamble sequence's location subsequently.

[0044] Specifically, after the convolution operation of the matched filter, the precode convolution result will show a peak at the position where the precode sequence appears. Peak detection can be achieved by setting a peak threshold; when the precode convolution result exceeds the peak threshold, a peak position can be considered to have been found. Knowing the peak position, and since the precode sequence has a fixed length, the end positions of the preceding and following precodes can be determined based on this fixed length, thus generating a precode position sequence interval.

[0045] S130. Obtain the symbol length, and perform symbol synchronization detection on the precode position sequence interval based on the symbol length to determine the optimal decision time sequence.

[0046] In digital communication, a symbol is a basic unit carrying a certain amount of information, and symbol length refers to the size of the signal interval occupied by a single symbol. The purpose of symbol synchronization detection is to precisely align the sampling time at the receiver with the start and end times of the transmitted signal symbols. By detecting the preamble position sequence interval based on the symbol length, it can determine the most accurate moment to process the signal. The optimal decision time sequence refers to multiple optimal time points determined by symbol synchronization detection. Decisioning and interpreting the signal at these moments minimizes the risk of misjudgment and accurately reconstructs the original signal.

[0047] Figure 2 This invention provides a flowchart of a digital circuit demodulation and decoding method according to Embodiment 1. Step S130 mainly includes the following steps S131 to S134:

[0048] S131. Obtain the symbol length. Determine the sampling start and end intervals and the total number of symbols based on the precode position sequence interval and the symbol length, and determine the current number of symbols.

[0049] The precode position sequence interval marks the end positions of the preceding and following precodes, while the symbol length specifies the size of the signal interval occupied by each symbol. The total number of symbols is used to traverse all possible symbol positions between the precode position sequence intervals. By considering the range of the precode position sequence interval and the symbol length, the total number of samples required can be calculated. For example, if the span of the precode position sequence interval is a certain interval, dividing the interval length by the symbol length and rounding up gives the total number of symbols. Determining the total number of symbols allows for planning the entire symbol synchronization detection process framework, knowing the total number of detection operations to be performed. The current symbol count is a counter variable used to track which round of sampling is currently in progress.

[0050] Optionally, the sampling start and end intervals and the total number of symbols are determined based on the precode position sequence interval and the symbol length, including: subtracting the last position value and the first position value in the precode position sequence interval to determine the sampling start and end intervals; calculating the ratio of the sampling start and end intervals to the symbol length, and determining the total number of symbols based on the ratio.

[0051] The precode position sequence interval marks the range of positions of the preceding and following precode ends within the signal. Subtracting the first position value from the last position value yields the position span of the precode sequence. The symbol length defines the size of the signal interval occupied by each symbol. Dividing the sampling start and end interval by the symbol length determines how many complete symbol lengths the precode's position span can accommodate; theoretically, it calculates how many sampling iterations are needed to traverse the entire precode position sequence interval. Since the total number of symbols must be an integer in practice, rounding up is used to determine the final number of symbols. This embodiment accurately quantifies the number of complete symbols within the entire precode interval, thereby determining the total number of symbols and setting the overall operation cycle for subsequent step-by-step symbol synchronization detection and finding the optimal decision moment.

[0052] S132. Determine if the current number of symbols exceeds the total number of symbols. If yes, execute S133; otherwise, execute S134.

[0053] S133. Summarize the best decision times to generate a sequence of best decision times.

[0054] When the current number of symbols exceeds the total number of symbols, it indicates that the traversal and detection of all symbol positions have been completed. Previously found optimal decision moments were stored separately; now, the tag receiver can aggregate and integrate these moments to form a complete sequence of optimal decision moments. This sequence of optimal decision moments corresponds to the subsequent decoding points for valid signals.

[0055] S134. Take the first position value in the precode position sequence interval as the initial symbol position value, determine the sampling point corresponding to the theoretical peak value based on the initial symbol position value and the symbol length, and determine the optimal decision time based on the sampling point corresponding to the theoretical peak value and the precode position sequence interval.

[0056] Before all sampling is completed, the tag receiver can first take the first position of the preamble position sequence interval as the initial symbol position value. Then, based on the initial symbol position value and the symbol length, it can calculate the theoretical position where the signal peak will occur, because symbols have their own patterns during transmission, corresponding to the theoretical peak time. Finally, the sampling point corresponding to the theoretical peak is compared with the peak sequence of the actual received symbol matched filter to locate the optimal decision time.

[0057] Optionally, the sampling point corresponding to the theoretical peak value is determined based on the initial symbol position value and the symbol length, including: calculating the product of the symbol length and the current number of symbols; and adding the product to the initial symbol position value to obtain the sampling point corresponding to the theoretical peak value.

[0058] Specifically, the current symbol count records which symbol detection cycle is currently in. Multiplying the symbol length by the current symbol count yields the cumulative offset, calculated by symbol length, after the current symbol count cycles from the initial symbol position. This offset reflects the relative distance the symbol should have advanced to based on the current progress. The initial symbol position marks the reference point for the first symbol's starting position. Adding the calculated offset to the initial symbol position gives the sampling point corresponding to the theoretical peak value.

[0059] Optionally, the optimal decision time is determined based on the sampling point corresponding to the theoretical peak and the precode position sequence interval, including: matching the sampling point corresponding to the theoretical peak through the precode sequence to determine the target position value in the precode sequence that is closest to the sampling point corresponding to the theoretical peak; and taking the target position value as the optimal decision time.

[0060] It should be noted that the sampling point corresponding to the theoretical peak value is the ideal signal peak position calculated based on the symbol length and initial position. Due to factors such as noise and interference, the actual signal peak value will fluctuate around the theoretical value. The tag receiver can compare the sampling point corresponding to the theoretical peak value with each position in the preamble sequence, calculate the distance difference between them, and the preamble sequence position with the smallest distance difference is the target position value closest to the sampling point corresponding to the theoretical peak value. By screening out the preamble position that best matches the sampling point corresponding to the theoretical peak value, the range for finding the optimal decision time can be narrowed, improving accuracy.

[0061] Specifically, after determining the target position value that is closest to the sampling point corresponding to the theoretical peak, based on the signal decoding principle, the target position value is the point where the signal characteristics best match the expected peak value. Making a decision on the signal at this moment can minimize the probability of misjudgment, so the tag receiver can ultimately set it as the optimal decision time.

[0062] In one specific implementation, the symbol length is 43, and the precode position sequence interval includes [620, 640, 667, 701, 759, 776]. In this case, the first position value 620 in the precode position sequence interval can be used as the initial symbol position value. When the current symbol number is 1, the sampling point corresponding to the theoretical peak is 620 + 1 * 43 = 663. In the precode position sequence interval, the closest value to 663 is 667, which can be recorded as the optimal decision time.

[0063] S140. Determine the decoded value of the valid signal based on the optimal decision time sequence.

[0064] The decoded value refers to the original data content that is finally obtained after performing a decoding operation on the valid signal, which can be understood by the user or further used by the system. In digital communication, because signals may be affected by noise, multipath, etc. during transmission, the receiving end needs to make a decision at the optimal time for each symbol, such as determining whether it is 0 or 1, in order to minimize the bit error rate. Obtaining the decoded value of the valid signal ultimately realizes the demodulation and decoding of the downlink signal of the digital circuit, thereby allowing the acquisition of the actual data content sent by the transmitting end. This ensures that the tag receiver can accurately extract valid information from the received downlink signal.

[0065] The technical solution of this invention, by first performing frame synchronization detection on the preamble sequence to obtain the preamble position sequence interval, and then combining this with symbol length to perform symbol synchronization detection to determine the optimal decision time sequence, enables the tag receiver to accurately locate the signal, greatly reducing decoding errors caused by synchronization deviations, adapting to complex operating conditions of tag receivers, and enhancing anti-interference capabilities. By locating the optimal decision time sequence, the decoded value can be quickly determined, reducing redundant calculations, improving real-time performance, and accelerating information extraction.

[0066] Example 2

[0067] Figure 3 This is a flowchart of a digital circuit demodulation and decoding method provided in Embodiment 2 of the present invention. This embodiment adds a specific process for determining the decoded value of the valid signal based on the optimal decision time sequence, building upon Embodiment 1. The specific content of steps S210-S230 is largely the same as steps S110-S130 in Embodiment 1, and therefore will not be repeated in this embodiment. Figure 3 As shown, the method includes:

[0068] S210. Acquire the downlink signal of the digital circuit, wherein the downlink signal includes a preamble sequence and a valid signal.

[0069] S220. Perform frame synchronization detection on the precode sequence to obtain the precode position sequence interval.

[0070] Optionally, frame synchronization detection is performed on the precode sequence to obtain the precode position sequence interval, including: performing a convolution operation on the precode sequence through a matched filter to generate a precode convolution result; performing peak detection on the precode convolution result to determine the peak position; and locating the end position of the preceding and following precodes based on the peak position to generate the precode position sequence interval.

[0071] S230. Obtain the symbol length, and perform symbol synchronization detection on the precode position sequence interval based on the symbol length to determine the optimal decision time sequence.

[0072] Optionally, symbol synchronization detection is performed on the precode position sequence interval based on the symbol length to determine the optimal decision time sequence, including: determining the sampling start and end interval and the total number of symbols based on the precode position sequence interval and the symbol length, and determining the current number of symbols; determining whether the current number of symbols exceeds the total number of symbols; if so, summarizing each optimal decision time to generate the optimal decision time sequence; otherwise, taking the first position value in the precode position sequence interval as the initial symbol position value, determining the sampling point corresponding to the theoretical peak based on the initial symbol position value and the symbol length, and determining the optimal decision time based on the sampling point corresponding to the theoretical peak and the precode position sequence interval.

[0073] Optionally, the sampling start and end intervals and the total number of symbols are determined based on the precode position sequence interval and the symbol length, including: subtracting the last position value and the first position value in the precode position sequence interval to determine the sampling start and end intervals; calculating the ratio of the sampling start and end intervals to the symbol length, and determining the total number of symbols based on the ratio.

[0074] Optionally, the sampling point corresponding to the theoretical peak value is determined based on the initial symbol position value and the symbol length, including: calculating the product of the symbol length and the current number of symbols; and adding the product to the initial symbol position value to obtain the sampling point corresponding to the theoretical peak value.

[0075] Optionally, the optimal decision time is determined based on the sampling point corresponding to the theoretical peak and the precode position sequence interval, including: matching the sampling point corresponding to the theoretical peak through the precode sequence to determine the target position value in the precode sequence that is closest to the sampling point corresponding to the theoretical peak; and taking the target position value as the optimal decision time.

[0076] S240. Convolve the valid signal with the specified symbol respectively to generate the first convolution result and the second convolution result.

[0077] Here, the designated symbols refer to two pre-defined signal waveforms representing different data states. The designated symbols can be symbol 0 and symbol 1. Convolving the valid signal with each of these symbols is to measure the similarity between the valid signal and the two symbols. The first and second convolution results each reflect the matching situation between the valid signal and the corresponding designated symbols, and different convolution values ​​reflect different degrees of matching.

[0078] S250. Sequentially select each optimal decision time in the optimal decision time sequence as the target decision time.

[0079] The optimal decision time sequence marks the ideal sampling time in signal processing. Taking these times one by one ensures that the judgment is made at the most recognizable position of the signal, minimizes the influence of noise and other interference factors, accurately captures signal characteristics, and prepares for subsequent accurate value acquisition and decoding.

[0080] S260. Determine the first convolution value in the first convolution result and the second convolution value in the second convolution result based on the target decision time.

[0081] It is known that knowing the target decision time is equivalent to locking the key sampling point of the signal. By directly corresponding to the specific position in the previous convolution result, the values ​​corresponding to the first and second convolution results at that time can be extracted. The first and second convolution values ​​reflect the degree of matching between the effective signal and the two specified symbols at the optimal moment.

[0082] S270. Use the larger of the first and second convolution values ​​as the target convolution value.

[0083] Specifically, the larger of the first and second convolution values ​​means that the effective signal is more similar to the corresponding specified symbol at the optimal decision time, and is more likely to represent the true symbol state corresponding to the effective signal at this time. Therefore, the larger value is selected as the target convolution value.

[0084] S280. Summarize the target convolution values ​​at each optimal decision time to generate the decoded values.

[0085] Ultimately, the tag receiver can integrate the target convolution values ​​corresponding to each optimal decision moment, arrange and combine them in sequence to form complete decoding information, restore the original data encoding corresponding to the valid signal, and complete the decoding process.

[0086] The technical solution of this invention utilizes convolution with a specified symbol and multiple rounds of value comparison to refine the analysis of the effective signal, reduce misjudgments, and accurately restore the original information. By comparing the results of the first and second convolutions, the larger value is selected, which can filter out some interference noise, ensure decoding stability, and adapt to complex electromagnetic environments. Each optimal decision moment is processed sequentially as the target decision moment, resulting in a standardized process that is easy to implement in digital circuits, reducing implementation costs and error probability, and laying a solid foundation for efficient and stable decoding.

[0087] Example 3

[0088] Figure 4 This is a schematic diagram of a digital circuit demodulation and decoding device provided in Embodiment 3 of the present invention. Figure 4 As shown, the device includes: a downlink signal acquisition module 310, used to acquire downlink signals from digital circuits, wherein the downlink signal includes a preamble sequence and a valid signal;

[0089] The precode position sequence interval acquisition module 320 is used to perform frame synchronization detection on the precode sequence to obtain the precode position sequence interval;

[0090] The optimal decision time sequence determination module 330 is used to obtain the symbol length and perform symbol synchronization detection on the precode position sequence interval based on the symbol length to determine the optimal decision time sequence.

[0091] The decoding value determination module 340 is used to determine the decoding value of the valid signal based on the optimal decision time sequence.

[0092] Optionally, the precode position sequence interval acquisition module 320 is specifically used for: performing a convolution operation on the precode sequence through a matched filter to generate a precode convolution result; performing peak detection on the precode convolution result to determine the peak position; and locating the end position of the preceding and following precodes based on the peak position to generate a precode position sequence interval.

[0093] Optionally, the optimal decision time sequence determination module 330 is specifically used to: determine the sampling start and end interval and the total number of symbols based on the precode position sequence interval and the symbol length, and determine the current number of symbols; determine whether the current number of symbols exceeds the total number of symbols; if so, summarize the optimal decision times to generate the optimal decision time sequence; otherwise, take the first position value in the precode position sequence interval as the initial symbol position value, determine the sampling point corresponding to the theoretical peak based on the initial symbol position value and the symbol length, and determine the optimal decision time based on the sampling point corresponding to the theoretical peak and the precode position sequence interval.

[0094] Optionally, the optimal decision time sequence determination module 330 specifically includes: a symbol total number determination unit, used to: subtract the last position value and the first position value in the precode position sequence interval to determine the sampling start and end interval; calculate the ratio of the sampling start and end interval to the symbol length, and determine the total number of symbols based on the ratio.

[0095] Optionally, the optimal decision time sequence determination module 330 specifically includes: a sampling point determination unit corresponding to the theoretical peak, used to: calculate the product of the symbol length and the current number of symbols; and add the product to the initial symbol position value to obtain the sampling point corresponding to the theoretical peak.

[0096] Optionally, the optimal decision time sequence determination module 330 specifically includes: an optimal decision time determination unit, used to: match the sampling points corresponding to the theoretical peak through the precode sequence to determine the target position value in the precode sequence that is closest to the sampling point corresponding to the theoretical peak; and use the target position value as the optimal decision time.

[0097] Optionally, the decoding value determination module 340 is specifically used for: convolving the valid signal with specified symbols to generate a first convolution result and a second convolution result; sequentially taking each best decision time in the best decision time sequence as a target decision time; determining the first convolution value in the first convolution result and the second convolution value in the second convolution result based on the target decision time; taking the larger value between the first convolution value and the second convolution value as the target convolution value; and summing the target convolution values ​​of each best decision time to generate a decoding value.

[0098] The technical solution of this invention, by first performing frame synchronization detection on the preamble sequence to obtain the preamble position sequence interval, and then combining this with symbol length to perform symbol synchronization detection to determine the optimal decision time sequence, enables the tag receiver to accurately locate the signal, greatly reducing decoding errors caused by synchronization deviations, adapting to complex operating conditions of tag receivers, and enhancing anti-interference capabilities. By locating the optimal decision time sequence, the decoded value can be quickly determined, reducing redundant calculations, improving real-time performance, and accelerating information extraction.

[0099] The digital circuit demodulation and decoding device provided in this embodiment of the invention can execute a digital circuit demodulation and decoding method provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0100] Example 4

[0101] Figure 5 A schematic diagram of an electronic device 10 that can be used to implement embodiments of the present invention is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital assistants, cellular phones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0102] like Figure 5As shown, the electronic device 10 includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer program stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 may also store various programs and data required for the operation of the electronic device 10. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0103] Multiple components in electronic device 10 are connected to I / O interface 15, including: input unit 16, such as keyboard, mouse, etc.; output unit 17, such as various types of displays, speakers, etc.; storage unit 18, such as disk, optical disk, etc.; and communication unit 19, such as network card, modem, wireless transceiver, etc. Communication unit 19 allows electronic device 10 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0104] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as a digital circuit demodulation and decoding method.

[0105] In some embodiments, a digital circuit demodulation / decoding method may be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program may be loaded and / or installed on electronic device 10 via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the digital circuit demodulation / decoding method described above may be performed. Alternatively, in other embodiments, processor 11 may be configured to perform a digital circuit demodulation / decoding method by any other suitable means (e.g., by means of firmware).

[0106] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0107] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0108] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0109] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0110] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or computing systems that include middleware components (e.g., application servers), or computing systems that include frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0111] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0112] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0113] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for demodulating and decoding a digital circuit, applied to a tag receiver, characterized in that, The method comprises the following steps: acquiring a downlink signal of a digital circuit, wherein the downlink signal comprises a pilot sequence and a valid signal; performing frame synchronization detection on the pilot sequence to acquire a pilot position sequence interval; acquiring a symbol length, determining a sampling start-stop interval and a total number of symbols according to the pilot position sequence interval and the symbol length, and determining a current symbol number; determining whether the current symbol number exceeds the total number of symbols, if yes, collecting each optimal decision time to generate an optimal decision time sequence; otherwise, taking a first position value in the pilot position sequence interval as an initial symbol position value, determining a sampling point corresponding to a theoretical peak value according to the initial symbol position value and the symbol length, and determining an optimal decision time according to the sampling point corresponding to the theoretical peak value and the pilot position sequence interval; determining a decoding value of the valid signal according to the optimal decision time sequence.

2. The method of claim 1, wherein, The frame synchronization detection on the pilot sequence to acquire a pilot position sequence interval comprises the following steps: performing convolution operation on the pilot sequence by a matched filter to generate a pilot convolution result; performing peak value detection on the pilot convolution result to determine a peak position; locating the end positions of the pilots before and after the peak position to generate a pilot position sequence interval.

3. The method of claim 1, wherein, The determination of the total number of symbols according to the pilot position sequence interval and the symbol length comprises the following steps: subtracting the first position value from the last position value in the pilot position sequence interval to determine a sampling start-stop interval; calculating a ratio of the sampling start-stop interval to the symbol length, and determining the total number of symbols according to the ratio.

4. The method of claim 1, wherein, The determination of the sampling point corresponding to the theoretical peak value according to the initial symbol position value and the symbol length comprises the following steps: calculating a product of the symbol length and the current symbol number; adding the product and the initial symbol position value to obtain the sampling point corresponding to the theoretical peak value.

5. The method of claim 1, wherein, The determination of the optimal decision time according to the sampling point corresponding to the theoretical peak value and the pilot position sequence interval comprises the following steps: matching the sampling point corresponding to the theoretical peak value with the pilot sequence to determine a target position value in the pilot sequence closest to the sampling point corresponding to the theoretical peak value; taking the target position value as the optimal decision time.

6. The method of claim 1, wherein, The determination of the decoding value of the valid signal according to the optimal decision time sequence comprises the following steps: convolving the valid signal with designated symbols to generate a first convolution result and a second convolution result; sequentially taking each optimal decision time in the optimal decision time sequence as a target decision time; determining a first convolution value in the first convolution result and a second convolution value in the second convolution result based on the target decision time; taking a larger value between the first convolution value and the second convolution value as a target convolution value; collecting the target convolution values of each optimal decision time to generate a decoding value.

7. A digital circuit demodulation decoding apparatus characterized by comprising: The method comprises the following steps: a downlink signal acquisition module, configured to acquire a downlink signal of a digital circuit, wherein the downlink signal comprises a pilot sequence and a valid signal; a pilot position sequence interval acquisition module, configured to perform frame synchronization detection on the pilot sequence to acquire a pilot position sequence interval; The optimal decision moment sequence determination module is configured to acquire a symbol length, determine a sampling start-stop interval and a total number of symbols according to the pilot position sequence interval and the symbol length, and determine a current symbol number; determine whether the current symbol number exceeds the total number of symbols; if yes, aggregate each optimal decision moment to generate an optimal decision moment sequence; otherwise, take a first position value in the pilot position sequence interval as an initial symbol position value, determine a sampling point corresponding to a theoretical peak value according to the initial symbol position value and the symbol length, and determine an optimal decision moment according to the sampling point corresponding to the theoretical peak value and the pilot position sequence interval; The decoding value determination module is configured to determine a decoding value of the effective signal according to the optimal decision moment sequence.

8. An electronic device, comprising: The electronic device comprises: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores a computer program capable of being executed by the at least one processor, and the computer program is executed by the at least one processor to enable the at least one processor to execute the method in any one of claims 1-6.

9. A computer storage medium, characterized in that The computer storage medium stores computer instructions, and the computer instructions are used to enable the processor to implement the method in any one of claims 1-6 when executed.

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