Semiconductor device and manufacturing method thereof
By opening a multi-layer trench structure on the substrate, controlling the growth direction of the epitaxial structure and the distribution of process gas, the performance deterioration caused by transverse coating of the epitaxial structure is solved, and the effect of improving the threshold voltage and reliability of semiconductor devices is achieved.
Patent Information
- Application Number
- CN202411947471.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-27
- Publication Date
- 2025-03-28
AI Technical Summary
The epitaxial structures in existing semiconductor devices are easily coated horizontally during growth, resulting in performance deterioration, threshold voltage reduction and leakage problems.
By opening the first trench and the second trench on the substrate, the first epitaxial structure is first grown on the side wall of the first trench, and then the second epitaxial structure is grown at one end of the first epitaxial structure away from the bottom wall of the trench. The side wall of the second trench suppresses the migration of process gas and reduces the coverage of the side surface of the first epitaxial structure by the second epitaxial structure.
It effectively reduces leakage caused by the growth of the cladding on the side of the epitaxial structure, improves the threshold voltage of the semiconductor device, optimizes the internal electric field distribution, and improves the reliable performance of the device.
Smart Images
Figure CN119730287A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for manufacturing the same. Background Art
[0002] Group III nitrides such as GaN, InN, AlN and their ternary or quaternary compounds are the core of the third generation of semiconductor technology. They have the advantages of large bandgap, high temperature resistance, high voltage resistance and high electron saturation velocity. The high electron mobility transistor (HEMT) prepared by using the spontaneous polarization and piezoelectric polarization effects of these materials has huge application advantages in high-frequency power devices and wireless communications. The production of semiconductor wafers includes the production of substrates and epitaxial growth. Most of the current epitaxial layers are basically grown on the surface of a flat substrate layer, and their integration per unit area is not high enough. This type of substrate limits the design and application of semiconductor devices. In the related art, the epitaxial layer is grown from the trench of the substrate, and multiple epitaxial structures are grown and arranged in sequence along the depth direction of the trench. However, in the actual growth process, the epitaxial material does not only grow vertically upward, but also has lateral growth. In this way, the epitaxial structure grown laterally will be coated on the side of the epitaxial structure grown previously. This lateral coating structure will cause the performance of semiconductor devices to deteriorate, the threshold voltage to decrease, and leakage problems to occur easily. It is difficult to remove the excess material on the side wall later. Summary of the invention
[0003] The present application provides a semiconductor device and a method for manufacturing the same, which can improve the problem of epitaxial structure encapsulation, thereby improving the performance of the semiconductor device.
[0004] The embodiments of the present application can be implemented as follows:
[0005] In a first aspect, the present application provides a method for manufacturing a semiconductor device, comprising:
[0006] Obtaining a substrate, wherein a first groove is formed on a first surface of the substrate, a second groove is formed on a bottom wall of the first groove, a first insulating layer is formed on the first surface of the substrate, and a second insulating layer is formed on the bottom wall of the first groove, the sidewalls of the second groove, and the bottom wall of the second groove;
[0007] growing a first epitaxial structure on the sidewall of the first trench, wherein a projection of the first epitaxial structure on the bottom wall of the first trench does not fall into the second trench;
[0008] A second epitaxial structure is grown on an end of the first epitaxial structure away from the bottom wall of the first trench.
[0009] In an optional embodiment, the second trench is opened in the middle of the bottom wall of the first trench, and the method for manufacturing the semiconductor device includes growing the first epitaxial structure on two opposite side walls of the first trench, and growing the second epitaxial structure on the two first epitaxial structures.
[0010] In an optional embodiment, at least two first grooves are provided on the substrate, and a third groove is further provided on the first surface of the substrate, wherein the third groove is located between two adjacent first grooves;
[0011] The method for manufacturing the semiconductor device further includes:
[0012] A third epitaxial structure is grown at an end of the second epitaxial structure away from the first epitaxial structure.
[0013] In an optional embodiment, the step of obtaining a substrate includes:
[0014] forming a first insulating layer on a first surface of the substrate;
[0015] Etching the first insulating layer and a portion of the substrate to form a first trench;
[0016] forming a sacrificial layer on the sidewalls and the bottom wall of the first trench, and removing the sacrificial layer on the bottom wall of the first trench;
[0017] Etching a second trench on the bottom wall of the first trench, and forming a second insulating layer on the bottom wall of the first trench, the sidewalls of the second trench, and the bottom wall of the second trench;
[0018] removing the sacrificial layer on the sidewall of the first trench and forming a nucleation layer on the sidewall of the first trench;
[0019] The step of growing a first epitaxial structure on the sidewall of the first trench comprises:
[0020] The first epitaxial structure is grown on the nucleation layer.
[0021] In an optional embodiment, the nucleation layer is made of AlN or GaN.
[0022] In an optional embodiment, surfaces of two side walls of the first trench have a hexagonal symmetrical lattice structure.
[0023] In an optional embodiment, the first insulating layer and the second insulating layer are made of silicon dioxide or SiN x .
[0024] In an optional embodiment, the material of the substrate is Si, sapphire, SiC or GaN, and the material of the first epitaxial structure and the second epitaxial structure is GaN, InN or AlN.
[0025] In an optional embodiment, the two opposite side walls of the first trench have a (111) surface of Si, a (0001) surface of Al2O3, a (0001) surface of SiC, a (111) surface of Al2O3, a (0001) surface of SiC, a (0001) surface of SiC, a (0001) surface of Al2O3, a (0001) surface of SiC, a (0001) surface of SiC, a surface, GaN (0001) surface or GaN noodle.
[0026] In a second aspect, the present application provides a semiconductor device manufactured by the semiconductor device manufacturing method described in any one of the aforementioned embodiments.
[0027] The beneficial effects of the semiconductor device manufacturing method and the semiconductor device provided by the embodiments of the present application include:
[0028] The substrate used in the method for manufacturing the semiconductor device of the embodiment of the present application is provided with a first groove, and the bottom wall of the first groove is provided with a second groove. When growing the epitaxial structure, the first epitaxial structure is first grown on the side wall of the first groove, and then the second epitaxial structure is grown at one end of the first epitaxial structure away from the bottom wall of the first groove, so that the epitaxial structure can be grown sequentially in a direction perpendicular to the substrate. When growing the second epitaxial structure, the side wall of the second groove can inhibit the migration of the process gas located in the first groove and the second groove, so that the process gas used to grow the second epitaxial structure is confined in the second groove and the area directly above the second groove, and less diffused to the side of the first epitaxial structure. Therefore, the concentration of the process gas at the side of the first epitaxial structure can be reduced, thereby reducing or eliminating the coating of the side of the first epitaxial structure by the second epitaxial structure. Therefore, the leakage caused by the growth of the coating layer on the side of the first epitaxial structure can be reduced, and the threshold voltage of the semiconductor device can be increased; at the same time, the electric field distribution inside the semiconductor device can be optimized to make its distribution more uniform, which is conducive to reducing the specific on-resistance and ensuring the reliability of the semiconductor device.
[0029] The method for manufacturing a semiconductor device provided in the embodiment of the present application can be used to manufacture the above-mentioned semiconductor device, and a semiconductor device with reliable performance can be obtained. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.
[0031] Figure 1 It is a schematic diagram of a semiconductor device manufacturing process in the related art;
[0032] Figure 2 A flowchart of a method for manufacturing a semiconductor device in an embodiment of the present application;
[0033] Figure 3 This is a schematic structural diagram of a substrate and each film layer on the substrate in an embodiment of the present application;
[0034] Figures 4 to 7 Schematic diagram of different stages in the process of manufacturing a substrate in an embodiment of the present application;
[0035] Figure 8 This is a schematic diagram of a first epitaxial structure being manufactured in an embodiment of the present application;
[0036] Fig. 9 A schematic diagram of a second epitaxial structure manufacturing process in one embodiment of the present application;
[0037] Fig.10 FIG. 1 is a schematic diagram of a semiconductor device in another embodiment of the present application.
[0038] Icon: 100 - substrate; 101 - first trench; 102 - second trench; 103 - third trench; 110 - first insulating layer; 120 - second insulating layer; 130 - nucleation layer; 140 - sacrificial layer; 200 - first epitaxial structure; 300 - second epitaxial structure; 400 - third epitaxial structure. DETAILED DESCRIPTION
[0039] Figure 1 FIG. 1 is a schematic diagram of the semiconductor device manufacturing process in the related art. Figure 1 As shown, in the related art, the first epitaxial structure 200 and the second epitaxial structure 300 are sequentially grown from the trench of the substrate 100. What is needed is to grow the second epitaxial structure 300 at the end of the first epitaxial structure 200 away from the bottom of the trench, so that the epitaxial structure can grow in a direction perpendicular to the substrate 100 (that is, the depth direction of the trench). However, the second epitaxial structure 300 grows not only in the vertical direction, but also in the lateral direction, which leads to Figure 1 The second epitaxial structure 300 shown in FIG. 2 covers the side surface of the first epitaxial structure 200 , which may cause the performance of the semiconductor device to deteriorate.
[0040] In order to improve the deficiencies of the above-mentioned related technologies, an embodiment of the present application provides a method for manufacturing a semiconductor device, by adding a groove at the bottom of the groove for growing the epitaxial structure, so that the process gas for growing the second epitaxial structure can diffuse as little as possible to the side of the first epitaxial structure under the inhibitory effect of the groove, thereby reducing the coverage of the second epitaxial structure on the side of the first epitaxial structure.
[0041] Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.
[0042] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application for protection, but merely represents selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present application.
[0043] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.
[0044] In the description of the present application, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. appear to indicate an orientation or position relationship, it is based on the orientation or position relationship shown in the drawings, or is the orientation or position relationship in which the product of the invention is usually placed when used. It is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application.
[0045] In addition, the terms “first”, “second”, etc., if used, are merely used to distinguish between the descriptions and should not be understood as indicating or implying relative importance.
[0046] It should be noted that, in the absence of conflict, the features in the embodiments of the present application may be combined with each other.
[0047] Figure 2 FIG. 1 is a flow chart of a method for manufacturing a semiconductor device in one embodiment of the present application. Figure 2 As shown, the method for manufacturing a semiconductor device provided in an embodiment of the present application includes:
[0048] In step S100, a substrate 100 is obtained, a first groove 101 is opened on the first surface of the substrate 100, a second groove 102 is opened on the bottom wall of the first groove 101, a first insulating layer 110 is formed on the first surface of the substrate 100, and a second insulating layer 120 is formed on the bottom wall of the first groove 101, the side walls of the second groove 102 and the bottom wall of the second groove 102.
[0049] Figure 3 FIG. 1 is a schematic diagram of the structure of a substrate 100 and each film layer on the substrate 100 in one embodiment of the present application. Figure 3 As shown, in this embodiment, the material of the substrate 100 can be Si, sapphire, SiC or GaN, etc. In this embodiment, the surfaces of the two side walls of the first trench 101 have a hexagonal symmetrical lattice structure, which is conducive to the selective growth of the nitride epitaxial layer.
[0050] Furthermore, the two opposite side walls of the first trench 101 have a (111) surface of Si, a (0001) surface of Al2O3, a (0001) surface of SiC, and a (111) surface of Al2O3. surface, GaN (0001) surface or GaN noodle.
[0051] In this embodiment, the first insulating layer 110 and the second insulating layer 120 are made of silicon dioxide or SiN x .
[0052] Furthermore, a nucleation layer 130 is provided on both side walls of the first trench 101, and the nucleation layer 130 is conducive to the growth of the first epitaxial structure 200. The material of the nucleation layer 130 can be selected from AlN or GaN. Taking the substrate 100 as a silicon-based substrate 100 and the epitaxial structure to be grown as GaN as an example, due to the melt-back effect between the silicon-based substrate 100 and gallium, GaN cannot be directly deposited on the silicon substrate 100, so it is necessary to first deposit the nucleation layer 130 of AlN, and then form the subsequent nitride epitaxial layer structure on this basis.
[0053] Figures 4 to 7 Schematic diagram of different stages in the process of manufacturing the substrate 100 in the embodiment of the present application.
[0054] like Figures 4 to 7 As shown, specifically, the step of obtaining the substrate 100 includes:
[0055] Step S110 , forming a first insulating layer 110 on the first surface of the substrate 100 .
[0056] like Figure 4 As shown, the first surface of the substrate 100 is the surface of one side in the thickness direction, that is, Figure 4The second surface of the substrate 100 is the surface on the other side opposite to the first surface, that is, Figure 4 The lower surface of the substrate 100. The first insulating layer 110 can be formed by thermal oxidation or vapor deposition process. The thickness of the first insulating layer 110 can be 0.1-1 micrometer, for example, 0.5 micrometer.
[0057] In step S120 , the first insulating layer 110 and a portion of the substrate 100 are etched to form a first trench 101 .
[0058] like Figure 5 As shown, the two side walls of the first trench 101 are parallel to each other and parallel to the thickness direction of the substrate 100. The bottom wall of the first trench 101 is parallel to the first surface of the substrate 100 and perpendicular to the two side walls of the first trench 101.
[0059] In step S130 , a sacrificial layer 140 is formed on the sidewalls and the bottom wall of the first trench 101 , and the sacrificial layer 140 on the bottom wall of the first trench 101 is removed.
[0060] like Figure 6 As shown, the formed sacrificial layer 140 can protect the sidewall of the first trench 101. The sacrificial layer 140 can be made of silicon nitride, and its thickness is about 100 nanometers.
[0061] In step S140 , a second trench 102 is formed by etching on the bottom wall of the first trench 101 , and a second insulating layer 120 is formed on the bottom wall of the first trench 101 , the sidewalls of the second trench 102 , and the bottom wall of the second trench 102 .
[0062] like Figure 7 As shown, the second insulating layer 120 covers the bottom wall of the first trench 101, the sidewalls of the second trench 102 and the bottom wall of the second trench 102. In this embodiment, the extension direction of the second trench 102 is consistent with that of the first trench 101, and the two sidewalls of the second trench 102 can be parallel to the two sidewalls of the first trench 101. Optionally, the second trench 102 is centered at the bottom of the first trench 101, that is, the bottom wall of the first trench 101 is divided into two parts of equal width by the opening of the second trench 102, and the two parts of the bottom wall of the first trench 101 on both sides of the second trench 102 are symmetrical to each other. The thickness of the second insulating layer 120 can be consistent with the thickness of the first insulating layer 110, which is also 0.1 to 1 micron, such as 0.5 micron.
[0063] The second insulating layer 120 may be formed by an oxidation process. Since both sidewalls of the first trench 101 are protected by the sacrificial layer 140 , both sidewalls of the first trench 101 will not be oxidized.
[0064] Step S150 , removing the sacrificial layer 140 on the sidewall of the first trench 101 , and forming a nucleation layer 130 on the sidewall of the first trench 101 .
[0065] After forming the nucleation layer 130, the Figure 3 The nucleation layer 130 is formed to prepare for the subsequent growth of the epitaxial structure. In this embodiment, when the sacrificial layer 140 is etched with an etchant, it should be ensured that the first insulating layer 110 and the second insulating layer 120 are basically not etched, or the first insulating layer 110 and the second insulating layer 120 are etched extremely slowly.
[0066] It should be noted that the material of the nucleation layer 130 (such as AlN) has a very low selectivity, and under normal process conditions, the nucleation layer 130 is easily generated on the first insulating layer 110 and / or the second insulating layer 120, which is not conducive to forming the desired semiconductor device. Therefore, it is necessary to remove the nucleation layer 130 material on the first insulating layer 110 and the second insulating layer 120 after the nucleation layer 130 is formed; or introduce chlorine-containing gas when growing the nucleation layer 130 to ensure that it grows only on the sidewall of the first trench 101 and not on the insulating layer.
[0067] In this embodiment, the nucleation layer 130 may only cover a local area of the sidewall of the first trench 101 , or may cover the entire sidewall of the first trench 101 .
[0068] In step S200 , a first epitaxial structure 200 is grown on the sidewall of the first trench 101 , and a projection of the first epitaxial structure 200 on the bottom wall of the first trench 101 does not fall into the second trench 102 .
[0069] Figure 8 FIG. 2 is a schematic diagram showing the first epitaxial structure 200 being manufactured in an embodiment of the present application. Figure 8 As shown, the first epitaxial structure 200 grows on the nucleation layer 130, both in the lateral direction (parallel to the first surface of the substrate 100) and in the vertical direction (perpendicular to the first surface of the substrate 100). The projection of the first epitaxial structure 200 on the bottom wall of the first trench 101 does not fall into the second trench 102, which means that the side of the first epitaxial structure 200 (specifically, the side away from the nucleation layer 130) is not located in the area directly above the second trench 102, which can reduce the contact with the process gas for the subsequent production of the second epitaxial structure 300.
[0070] In this embodiment, the sidewall of the first epitaxial structure 200 may be flush with the sidewall of the second trench. When the sidewall of the first epitaxial structure 200 is flush with or close to the sidewall of the second trench 102, the morphology of the grown epitaxial structure is better. Specifically, the width of the second trench 102 may be adjusted according to the width of the first epitaxial structure 200 to be grown.
[0071] In the embodiment of the present application, the material of the first epitaxial structure 200 and the second epitaxial structure 300 is GaN, InN or AlN. In some embodiments, the first epitaxial structure 200 is an undoped or unintentionally doped A-oriented or M-oriented GaN layer, or a GaN layer doped with one or more impurities.
[0072] In step S300 , a second epitaxial structure 300 is grown on an end of the first epitaxial structure 200 away from the bottom wall of the first trench 101 .
[0073] Fig. 9 FIG. 1 is a schematic diagram of a manufacturing process of the second epitaxial structure 300 in an embodiment of the present application. Fig. 9 As shown, the migration of the process gas in the first trench 101 can be suppressed by the second trench 102. When the atoms at the bottom of the first trench 101 migrate on the surface of the second insulating layer 120, they will be restricted by the sidewalls of the second trench 102 and it is difficult to approach the first epitaxial structure 200. In this way, the distribution of the process gas used to grow the second epitaxial structure 300 in the first trench 101 is suppressed within the width range of the second trench 102, that is, the process gas is more distributed in the second trench 102 or in the area directly above the second trench 102. In addition, the second trench 102 is opened at the bottom of the first trench 101. The combination of the two increases the total space of the trench and reduces the concentration of the process gas in the trench. Based on the above reasons, the process gas used to grow the second epitaxial structure 300 has less contact with the side of the first epitaxial structure 200, and the concentration on the side of the first epitaxial structure 200 is low, and it is not easy to grow a coating layer on the side of the first epitaxial structure 200.
[0074] In this embodiment, the two side surfaces of the first epitaxial structure 200 and the second epitaxial structure 300 in the width direction of the first trench 101 are respectively the (0001) plane and noodle.
[0075] Fig.10 FIG. 1 is a schematic diagram of a semiconductor device in another embodiment of the present application. Fig.10As shown, a third groove 103 may be further provided on the substrate 100 used in the method for manufacturing a semiconductor device provided in an embodiment of the present application. Specifically, at least two first grooves 101 are provided on the substrate 100, and a third groove 103 is further provided on the first surface of the substrate 100, and the third groove 103 is located between two adjacent first grooves 101. It can be understood that in the embodiment of the present application, the method for manufacturing a semiconductor device may further include growing a third epitaxial structure 400 at one end of the second epitaxial structure 300 away from the first epitaxial structure 200. By providing the third groove 103, in the process of growing the second epitaxial structure 300 or the third epitaxial structure 400, the concentration of the process gas on the side of the epitaxial structure (the first epitaxial structure 200 or the second epitaxial structure 300) that is grown first is reduced, thereby reducing the coating of the side of the inner epitaxial structure (the first epitaxial structure 200 or the second epitaxial structure 300) by the outer epitaxial structure (the second epitaxial structure 300 or the third epitaxial structure 400). The function of the third groove 103 is similar to that of the second groove 102 , and will not be described in detail here.
[0076] In summary, the substrate 100 used in the method for manufacturing a semiconductor device according to the embodiment of the present application is provided with a first trench 101, and the bottom wall of the first trench 101 is provided with a second trench 102. When growing an epitaxial structure, the first epitaxial structure 200 is first grown on the side wall of the first trench 101, and then the second epitaxial structure 300 is grown at one end of the first epitaxial structure 200 away from the bottom wall of the first trench 101, so that the epitaxial structures can be sequentially grown in a direction perpendicular to the substrate 100. When growing the second epitaxial structure 300, the side wall of the second trench 102 can inhibit the migration of the process gas located in the first trench 101 and the second trench 102, so that the process gas used to grow the second epitaxial structure 300 is more maintained in the second trench 102 and in the area directly above the second trench 102, and less diffused to the side of the first epitaxial structure 200. Therefore, the concentration of the process gas at the side of the first epitaxial structure 200 can be reduced, thereby reducing or eliminating the coating of the second epitaxial structure 300 on the side of the first epitaxial structure 200. Therefore, the leakage caused by the growth of the coating layer on the side of the first epitaxial structure 200 can be reduced, and the threshold voltage of the semiconductor device can be increased; at the same time, the electric field distribution inside the semiconductor device can be optimized to make it more uniform, which is conducive to reducing the specific on-resistance and ensuring the reliability of the semiconductor device.
[0077] The method for manufacturing a semiconductor device provided in the embodiment of the present application can be used to manufacture the above-mentioned semiconductor device, and a semiconductor device with reliable performance can be obtained.
[0078] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by any technician familiar with the technical field within the technical scope disclosed in the present application should be covered within the protection scope of the present application.
Claims
1. A method for manufacturing a semiconductor device, characterized in that: include: Obtaining a substrate, wherein a first groove is formed on a first surface of the substrate, a second groove is formed on a bottom wall of the first groove, a first insulating layer is formed on the first surface of the substrate, and a second insulating layer is formed on the bottom wall of the first groove, the sidewalls of the second groove, and the bottom wall of the second groove; growing a first epitaxial structure on the sidewall of the first trench, wherein a projection of the first epitaxial structure on the bottom wall of the first trench does not fall into the second trench; A second epitaxial structure is grown on an end of the first epitaxial structure away from the bottom wall of the first trench.
2. The method for manufacturing a semiconductor device according to claim 1, wherein: The second trench is opened in the middle of the bottom wall of the first trench. The method for manufacturing the semiconductor device includes growing the first epitaxial structure on two opposite side walls of the first trench respectively, and growing the second epitaxial structure on two first epitaxial structures respectively.
3. The method for manufacturing a semiconductor device according to claim 1, wherein: At least two first grooves are provided on the substrate, and a third groove is further provided on the first surface of the substrate, wherein the third groove is located between two adjacent first grooves; The method for manufacturing the semiconductor device further includes: A third epitaxial structure is grown at an end of the second epitaxial structure away from the first epitaxial structure.
4. The method for manufacturing a semiconductor device according to claim 1, wherein: The step of obtaining a substrate comprises: forming a first insulating layer on a first surface of the substrate; Etching the first insulating layer and a portion of the substrate to form a first trench; forming a sacrificial layer on the sidewalls and the bottom wall of the first trench, and removing the sacrificial layer on the bottom wall of the first trench; Etching a second trench on the bottom wall of the first trench, and forming a second insulating layer on the bottom wall of the first trench, the sidewalls of the second trench, and the bottom wall of the second trench; removing the sacrificial layer on the sidewall of the first trench and forming a nucleation layer on the sidewall of the first trench; The step of growing a first epitaxial structure on the sidewall of the first trench comprises: The first epitaxial structure is grown on the nucleation layer.
5. The method for manufacturing a semiconductor device according to claim 4, characterized in that: The material of the nucleation layer is AlN or GaN.
6. The method for manufacturing a semiconductor device according to claim 1, wherein: Surfaces of two side walls of the first trench have a hexagonal symmetrical lattice structure.
7. The method for manufacturing a semiconductor device according to claim 1, wherein: The first insulating layer and the second insulating layer are made of silicon dioxide or SiN x .
8. The method for manufacturing a semiconductor device according to claim 1, wherein: The material of the substrate is Si, sapphire, SiC or GaN, and the material of the first epitaxial structure and the second epitaxial structure is GaN, InN or AlN.
9. The method for manufacturing a semiconductor device according to claim 7, wherein: The two opposite side walls of the first trench have a (111) surface of Si, a (0001) surface of Al2O3, a (0001) surface of SiC, and a (111) surface of Al2O3. surface, GaN (0001) surface or GaN noodle.
10. A semiconductor device, characterized in that: The semiconductor device is manufactured by the method for manufacturing the semiconductor device according to any one of claims 1 to 9.