Display panel and preparation method thereof

Abstract

The invention provides a display panel and a preparation method thereof. The display panel is provided with the insulation filling layer, the insulation filling layer is arranged in the via hole, the common electrode layer is arranged on the insulation filling layer, and the insulation filling layer can fill the via hole between the adjacent miniature light emitting diode devices. The section difference between the part, located between the adjacent miniature light-emitting diode devices, of the common electrode layer and other parts is small, the thicknesses of all the parts of the common electrode layer are similar or even consistent, virtual connection or breakage of the common electrode layer is avoided, the yield of the display panel is improved, the adjacent independent electrodes can be separated through the insulation filling layer, and the display effect is improved. And signal crosstalk caused by contact of adjacent independent electrodes is avoided.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and a method for manufacturing the same. Background Technology

[0002] With the development of Augmented Reality (AR) and Virtual Reality (VR) technologies, silicon-based light-emitting diode (LED) microdisplay technology is the best solution to improve display effects. Silicon-based LEDs achieve full-color display through micro-LEDs of different colors. Therefore, during the fabrication of silicon-based LEDs, it is necessary to disconnect each micro-LED. However, this results in a large step difference between adjacent micro-LEDs, leading to poor conductive film coating ability, and consequently, degraded display device performance and lower yield.

[0003] Therefore, existing silicon-based light-emitting diode display devices have a technical problem: the large step difference between adjacent micro light-emitting diodes leads to poor connection or breakage of the conductive film. Summary of the Invention

[0004] This application provides a display panel and its manufacturing method to solve the technical problem that existing silicon-based light-emitting diode display devices have a large step difference between adjacent micro light-emitting diodes, which leads to poor connection or breakage of the conductive film.

[0005] This application embodiment provides a display panel, the display panel including:

[0006] A driving backplane includes a substrate and a first bonding layer, wherein the first bonding layer is disposed on one side of the substrate;

[0007] Multiple miniature light-emitting diode devices, each miniature light-emitting diode device comprising a second bonding layer, an independent electrode layer, a light-emitting layer, and a common electrode layer, wherein the second bonding layer is disposed on the side of the first bonding layer away from the substrate, the independent electrode layer is disposed on the side of the second bonding layer away from the first bonding layer, the light-emitting layer is disposed on the side of the independent electrode layer away from the second bonding layer, and the common electrode layer is disposed on the side of the light-emitting layer away from the independent electrode layer;

[0008] The display panel includes a via between adjacent micro LED devices, the via passing through the light-emitting layer, the independent electrode layer, the second bonding layer, and the first bonding layer. The display panel also includes an insulating filler layer disposed within the via, and the common electrode layer disposed on the insulating filler layer.

[0009] In some embodiments, the via includes a first via and a second via, the first via passing through the light-emitting layer and the independent electrode layer, the second via passing through the second bonding layer and the first bonding layer, and the display panel further includes a sidewall protection layer disposed within the first via, the sidewall protection layer being located between the light-emitting layer and the insulating filler layer, and the sidewall protection layer being disposed on the sidewall of the light-emitting layer.

[0010] In some embodiments, the width of the first via is greater than the width of the second via, the sidewall protection layer is disposed in the region of the first via that extends beyond the second via, the sidewall protection layer overlaps the portion of the second bonding layer that extends beyond the independent electrode layer, and the sidewall protection layer overlaps the upper surface of the light-emitting layer.

[0011] In some embodiments, the sidewall protective layer is in direct contact with the common electrode layer, the insulating filler layer is in direct contact with the common electrode layer, and the surfaces of the insulating filler layer and the common electrode layer that are in contact with each other are located on the same plane.

[0012] In some embodiments, the portion of the insulating filler layer located within the first via overlaps the sidewall protective layer, the portion of the insulating filler layer located within the second via directly contacts the sidewall of the first bonding layer, and the portion of the insulating filler layer located within the second via directly contacts the sidewall of the second bonding layer.

[0013] In some embodiments, sidewall protective layers are provided on both sides of the light-emitting layer, and the sidewall protective layers on both sides of the light-emitting layer have openings on the upper surface of the light-emitting layer. The common electrode layer is disposed in the openings and is in contact with the light-emitting layer.

[0014] In some embodiments, the material of the sidewall protective layer includes one of silicon oxide, aluminum oxide, and titanium dioxide.

[0015] In some embodiments, the angle between the sidewall of the light-emitting layer and the upper surface of the independent electrode layer is greater than or equal to 80 degrees and less than or equal to 90 degrees.

[0016] Meanwhile, this application provides a method for manufacturing a display panel, which manufactures a display panel as described in any of the above embodiments.

[0017] In some embodiments, the method for manufacturing the display panel includes:

[0018] A driving substrate and a micro light-emitting diode device are provided; the driving substrate includes a substrate and a first bonding layer, the first bonding layer being disposed on one side of the substrate, and the micro light-emitting diode device includes a second bonding layer, an independent electrode layer and a light-emitting layer, the second bonding layer being disposed on the side of the first bonding layer away from the substrate, the independent electrode layer being disposed on the side of the second bonding layer away from the first bonding layer, and the light-emitting layer being disposed on the side of the independent electrode layer away from the second bonding layer;

[0019] A first dielectric layer is formed on a micro light-emitting diode device, and the first dielectric layer is patterned.

[0020] The light-emitting layer and the independent electrode layer are etched to form a second via;

[0021] The first dielectric layer is removed, and a second dielectric layer is formed on the light-emitting layer; the second dielectric layer is disposed on the sidewall of the light-emitting layer;

[0022] The second dielectric layer, the first bonding layer, and the second bonding layer located between adjacent light-emitting layers are etched to form a first via;

[0023] A third dielectric layer is filled in the first and second vias between adjacent micro LED devices;

[0024] The third dielectric layer is etched to obtain an insulating filling layer; the upper surface of the insulating filling layer is flush with the upper surface of the second dielectric layer.

[0025] The second dielectric layer on the light-emitting layer is etched to obtain the sidewall protective layer;

[0026] A common electrode layer is formed on the light-emitting layer to obtain the display panel.

[0027] Beneficial Effects: This application provides a display panel and a method for fabricating the same. The display panel includes a driving backplane and a plurality of micro-light-emitting diode devices. The driving backplane includes a substrate and a first bonding layer. The first bonding layer is disposed on one side of the substrate. The micro-light-emitting diode devices include a second bonding layer, an independent electrode layer, a light-emitting layer, and a common electrode layer. The second bonding layer is disposed on the side of the first bonding layer away from the substrate. The independent electrode layer is disposed on the side of the second bonding layer away from the first bonding layer. The light-emitting layer is disposed on the side of the independent electrode layer away from the second bonding layer. The common electrode layer is disposed on the side of the light-emitting layer away from the independent electrode layer. Vias are provided between adjacent micro-light-emitting diode devices. The vias pass through the light-emitting layer, the independent electrode layer, the second bonding layer, and the first bonding layer. The display panel also includes an insulating filler layer disposed within the vias. The common electrode layer is disposed on the insulating filler layer. This application incorporates an insulating filler layer, which is positioned within a via and a common electrode layer is disposed on top of the insulating filler layer. This allows the insulating filler layer to fill the vias between adjacent micro-LED devices, minimizing the step difference between the portion of the common electrode layer located between adjacent micro-LED devices and other portions. The thickness of each portion of the common electrode layer is similar or even uniform, preventing loose connections or breaks in the common electrode layer and improving the yield of the display panel. Furthermore, the insulating filler layer can separate adjacent independent electrodes, preventing signal crosstalk caused by contact between adjacent independent electrodes. Attached Figure Description

[0028] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.

[0029] Figure 1 This is a schematic diagram of a display panel provided in an embodiment of this application.

[0030] Figure 2 This is a schematic diagram of a substrate provided in an embodiment of this application.

[0031] Figure 3 A flowchart illustrating a method for fabricating a display panel according to an embodiment of this application.

[0032] Figure 4 This is a schematic diagram of the first structure of the display panel corresponding to each step of the manufacturing method of the display panel provided in the embodiments of this application.

[0033] Figure 5 This is a schematic diagram of a second structure of the display panel corresponding to each step of the method for preparing the display panel provided in the embodiments of this application. Detailed Implementation

[0034] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0035] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0036] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication between two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0037] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0038] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure, specific examples of components and arrangements are described below. Of course, these are merely examples and are not intended to limit the scope of this application. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this application, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0039] This application addresses the technical problem in existing silicon-based light-emitting diode display devices where a large step difference between adjacent micro-light-emitting diodes leads to incomplete or broken conductive films. It provides a display panel and its fabrication method to solve the aforementioned technical problem.

[0040] Figure 1 This is a schematic diagram of a display panel provided in an embodiment of this application. Figure 2 This is a schematic diagram of a substrate provided in an embodiment of this application. Figure 3 A flowchart illustrating a method for fabricating a display panel according to an embodiment of this application. Figure 4 This is a schematic diagram of the first structure of the display panel corresponding to each step of the manufacturing method of the display panel provided in the embodiments of this application. Figure 5 This is a schematic diagram of a second structure of the display panel corresponding to each step of the method for preparing the display panel provided in the embodiments of this application.

[0041] like Figure 1 As shown, this application embodiment provides a display panel, the display panel 1 including:

[0042] The driving backplane 11 includes a substrate 111 and a first bonding layer 112, wherein the first bonding layer 112 is disposed on one side of the substrate 111.

[0043] A plurality of miniature light-emitting diode devices 12, each miniature light-emitting diode device 12 including a second bonding layer 121, an independent electrode layer 122, a light-emitting layer 123, and a common electrode layer 124. The second bonding layer 121 is disposed on the side of the first bonding layer 112 away from the substrate 111. The independent electrode layer 122 is disposed on the side of the second bonding layer 121 away from the first bonding layer 112. The light-emitting layer 123 is disposed on the side of the independent electrode layer 122 away from the second bonding layer 121. The common electrode layer 124 is disposed on the side of the light-emitting layer 123 away from the independent electrode layer 122.

[0044] Among them, a via 13 is provided between adjacent micro light-emitting diode devices 12, the via 13 passing through the light-emitting layer 123, the independent electrode layer 122, the second bonding layer 121 and the first bonding layer 112. The display panel 1 also includes an insulating fill layer 14, which is disposed in the via 13, and the common electrode layer 124 is disposed on the insulating fill layer 14.

[0045] This application provides a display panel. By setting an insulating filler layer inside a via and a common electrode layer on top of the insulating filler layer, the insulating filler layer can fill the vias between adjacent micro-light-emitting diode devices. This results in a smaller step difference between the portion of the common electrode layer between adjacent micro-light-emitting diode devices and other portions. The thickness of each portion of the common electrode layer is similar or even consistent, preventing loose connections or breaks in the common electrode layer, thus improving the yield of the display panel. Furthermore, the insulating filler layer can separate adjacent independent electrodes, preventing signal crosstalk caused by contact between adjacent independent electrodes.

[0046] Specifically, the display panel in this application embodiment can be applied to AR devices or VR devices. In AR and VR devices, multiple micro LEDs are set to achieve full-color display. In order to achieve individual control of the micro LEDs, vias need to be set between adjacent micro LED devices. The step difference of the vias is large. When the common electrode layer is set in the via, it will cause the common electrode layer to have a loose connection or breakage. This application embodiment avoids the problem of loose connection or breakage when the common electrode layer is set in the via by setting the insulating filling layer in the via, thereby improving the yield of the display panel.

[0047] Specifically, compared to OLED (Organic Light-Emitting Diode) display panels which have pixel definition layers between adjacent light-emitting pixels, the arrangement of the micro-light-emitting diode devices in this application embodiment is different. When forming the micro-light-emitting diode devices, the light-emitting layer and the independent electrode layer are first etched to cut off the connection between adjacent micro-light-emitting diode devices, so as to realize the independent display of a single micro-light-emitting diode device. Then, a common electrode layer is set on each micro-light-emitting diode device. Therefore, in the prior art, the common electrode layer is set in the via, and there is no pixel definition layer in the via. The design of the insulating filling layer in this application is different from the design of the pixel definition layer in the existing OLED.

[0048] It should be noted that, as Figure 1 As shown, since the insulating filler layer 14 is disposed within the via 13, therefore, Figure 1 The via 13 is not shown in the diagram. The insulating filler layer 14 is located in the area where the via 13 is located.

[0049] Specifically, all the micro LED devices emit the same color.

[0050] Specifically, the thickness of the light-emitting layer of each micro LED device is equal.

[0051] Specifically, as can be seen from the structure and fabrication method of the display panel in this application embodiment, this application embodiment targets a display panel where each micro-LED device emits the same color. When forming the micro-LED devices, the light-emitting layer is formed over the entire surface of the display panel. Therefore, it is impossible to achieve different light-emitting colors for different micro-LED devices. Thus, this display panel requires cutting the light-emitting layer and the independent electrode layer after forming the light-emitting layer to form multiple light-emitting units and multiple independent electrodes, thereby achieving independent display for each micro-LED device. This differs from the existing structure and formation process of multiple micro-LED devices with different light-emitting colors, and is also the reason why this application requires protection of the sidewalls. Specifically, the independent electrode layer includes multiple spaced independent electrodes, and the common electrode layer is located on multiple connected portions of each micro-LED device, with the common electrode layer covering the entire surface.

[0052] The etching process of display panels causes significant damage to the sidewalls of micro-LED devices, leading to a decrease in their luminous efficiency. In some embodiments, such as... Figure 1 As shown, the via 13 includes a first via 131 and a second via 132. The first via 131 passes through the light-emitting layer 123 and the independent electrode layer 122, and the second via 132 passes through the second bonding layer 121 and the first bonding layer 112. The display panel 1 also includes a sidewall protection layer 15. The sidewall protection layer 15 is disposed within the first via 131 and is located between the light-emitting layer 123 and the insulating filler layer 14. The sidewall protection layer 15 is disposed on the sidewall of the light-emitting layer 123. By providing a sidewall protection layer, which is disposed within the first via and located between the light-emitting layer and the insulating filler layer, the sidewall of the micro-LED device can be protected, preventing damage to the sidewall of the micro-LED device and improving the luminous efficiency of the micro-LED device.

[0053] Specifically, the first via passes through the light-emitting layer and the independent electrode layer, and the sidewall protection layer is disposed in the first via. Therefore, the via can be formed in two stages when forming the via, which shortens the time for the light-emitting layer and the independent electrode layer of the micro LED device to be etched. When etching the first bonding layer and the second bonding layer, the sidewalls of the light-emitting layer and the independent electrode layer are provided with sidewall protection layers, which can prevent damage to the sidewalls of the light-emitting layer and the common electrode layer and improve the luminous efficiency of the micro LED device.

[0054] Specifically, compared to the approach of depositing an insulating layer to protect the sidewalls of the etched trench after etching the micro-LED device and bonding metal, there is a risk of over-etching and damage to the sidewalls of the light-emitting layer. The insulating layer may also fail to fill the etched stepped trench, causing the common electrode layer to thin or break at the step, resulting in incomplete connections or breakage. In this embodiment, the sidewall protection layer is disposed within the first via, and the insulating filling layer is disposed within the via. This allows the sidewall protection layer to protect the sidewalls of both the light-emitting layer and the independent electrode layer, preventing damage. Furthermore, the insulating filling layer flattens the stepped trench, avoiding the incomplete connections or breakage issues caused by placing the common electrode layer within the via. This improves the yield of the display panel, increases the luminous efficiency of the micro-LED device, and reduces power consumption.

[0055] In some embodiments, such as Figure 1 As shown, the width L1 of the first via 131 is greater than the width L2 of the second via 132. The sidewall protection layer 15 is disposed in the area of ​​the first via 131 that extends beyond the second via 132. The sidewall protection layer 15 overlaps the portion of the second bonding layer 121 that extends beyond the independent electrode layer 122, and the sidewall protection layer 15 overlaps the upper surface of the light-emitting layer 123. By making the width of the second via greater than the width of the first via, a sidewall protective layer is disposed in the area where the first via extends beyond the second via. The sidewall protective layer overlaps the portion of the second bonding layer that extends beyond the independent electrode layer. This allows the first via to be formed first, with the sidewall protective layer disposed on the sidewalls of the light-emitting layer and the independent electrode layer to protect them. Then, the second via is formed. This ensures that the sidewall protective layer protects the sidewalls of the light-emitting layer and the independent electrode layer during the formation of the second via, thus preventing damage to the sidewalls of the light-emitting layer and the independent electrode layer that could lead to a decrease in the luminous efficiency of the micro LED device. Furthermore, by making the sidewall protective layer overlap the upper surface of the light-emitting layer, the stability of the sidewall protective layer can be improved, preventing it from slipping off and failing to protect the light-emitting layer. It also prevents damage to the light-emitting layer when removing the portion of the sidewall protective layer that is located on the light-emitting layer, thereby improving the luminous efficiency of the micro LED device.

[0056] Specifically, such as Figure 1 As shown, the width of the first via 131 is greater than the width of the second via 132. The sidewall protection layer 15 is disposed on the sidewall of the light-emitting layer 123 and overlaps the portion of the second bonding layer 121 that extends beyond the independent electrode layer 122. This allows the sidewall protection layer to protect the light-emitting layer and the independent electrode layer. When etching the first bonding layer and the second bonding layer, the sidewalls of the light-emitting layer and the independent electrode layer will not be damaged, thereby improving the luminous efficiency of the micro light-emitting diode device.

[0057] Specifically, such as Figure 1 As shown, the sidewall protective layer 15 overlaps the upper surface of the light-emitting layer 123, so that the sidewall protective layer can be stably set on the sidewall of the light-emitting layer 123, avoiding the sidewall protective layer from slipping off or damaging the sidewall of the light-emitting layer when removing the sidewall protective layer.

[0058] Specifically, considering that the first and second vias may be inverted trapezoidal in shape, and that the widths of different areas of the first via are unequal, the width of the first via can be its maximum width, its minimum width, or the width of its center line. Similarly, the width of the second via can be its maximum width, its minimum width, or the width of its center line. Figure 1 The example below uses the width of the first via as the minimum width of the first via and the width of the second via as the minimum width of the second via. It can be understood that the width of the first via and the width of the second via are defined by the same standard. For example, if the width of the first via is the minimum width of the first via, then the width of the second via is the minimum width of the second via.

[0059] This addresses the issue of a common electrode layer being partially connected or broken due to step differences within a via. In some embodiments, such as... Figure 1 As shown, the sidewall protective layer 15 is in direct contact with the common electrode layer 124, and the insulating filler layer 14 is also in direct contact with the common electrode layer 124. The surfaces of the insulating filler layer 14 and the common electrode layer 124 that are in contact with each other are on the same plane. By making the surfaces of the insulating filler layer and the common electrode layer, and the surfaces of the sidewall protective layer and the common electrode layer, that are on the same plane, the common electrode layer is placed on a flat surface. This avoids the problem of large step differences in various parts of the common electrode layer caused by placing the common electrode layer inside a via, which could lead to problems such as poor connection or breakage of the common electrode layer, thus improving the yield of the display panel.

[0060] In some embodiments, such as Figure 1As shown, the portion of the insulating filler layer 14 located within the first via 131 overlaps the sidewall protective layer 15, the portion of the insulating filler layer 14 located within the second via 132 directly contacts the sidewall of the first bonding layer 112, and the portion of the insulating filler layer 14 located within the second via 132 directly contacts the sidewall of the second bonding layer 121. By having the portion of the insulating filler layer located within the first via overlap the sidewall protective layer, and the portion of the insulating filler layer located within the second via directly contact the sidewalls of the first and second bonding layers, the sidewall protective layer protects the sidewalls of the light-emitting layer and the first conductive layer during the formation of the second via, preventing damage to these sidewalls. This allows the insulating filler layer to fill both the first and second vias, thereby preventing issues such as loose connections or breaks caused by the common electrode layer being located within the vias, and improving the yield rate of the display panel.

[0061] In some embodiments, such as Figure 1 As shown, sidewall protective layers 15 are provided on both sides of the light-emitting layer 123. The sidewall protective layers 15 on both sides of the light-emitting layer 123 have openings on the upper surface of the light-emitting layer 123. The common electrode layer 124 is disposed within the openings and is in contact with the light-emitting layer 123. By providing openings on the upper surface of the light-emitting layer through the sidewall protective layers on both sides, and placing the common electrode layer within the openings, the common electrode layer can contact the light-emitting layer, thereby driving the light-emitting layer and enabling the micro-light-emitting diode device to operate normally.

[0062] Specifically, when the sidewall protective layer is set around the light-emitting layer, the sidewall protective layer located around the perimeter has an opening on the upper surface of the light-emitting layer, so that the common electrode layer can contact the light-emitting layer within the opening, enabling the micro light-emitting diode device to work normally.

[0063] In some embodiments, the sidewall protective layer is made of one of silicon oxide, aluminum oxide, and titanium dioxide. By including one of silicon oxide, aluminum oxide, and titanium dioxide in the material of the sidewall protective layer, the density of the sidewall protective layer can be improved, thereby enhancing its protective capability.

[0064] In some embodiments, the insulating filler layer is made of one of silicon oxide, silicon nitride, and tetraethyl orthosilicate. By using an insulating material to form the insulating filler layer, the insulating material can avoid signal crosstalk between adjacent independent electrodes, thereby improving the yield of the display panel. Compared to using organic non-insulating materials to fill the vias, which may cause signal crosstalk between adjacent micro-light-emitting diode devices, the insulating filler layer used in this application embodiment can balance filling and insulation effects.

[0065] To address the issue that etching the light-emitting layer can cause significant damage to the sidewalls of the light-emitting layer, in some embodiments, such as... Figure 1 As shown, the angle A between the sidewall of the light-emitting layer 123 and the upper surface of the independent electrode layer 122 is greater than or equal to 80 degrees and less than or equal to 90 degrees. By making the angle between the sidewall of the light-emitting layer and the upper surface of the independent electrode layer greater than or equal to 80 degrees and less than or equal to 90 degrees, less material is etched from the sidewall of the light-emitting layer during etching, thus improving the problem of decreased luminous efficiency caused by damage to the sidewall of the light-emitting layer.

[0066] Specifically, the angle between the sidewall of the light-emitting layer and the upper surface of the independent electrode layer includes two angles. In this embodiment, the acute angle or right angle between the sidewall of the light-emitting layer and the upper surface of the independent electrode layer is used as the reference. The angle between the light-emitting layer and the upper surface of the independent electrode layer is greater than or equal to 80 degrees and less than or equal to 90 degrees. This results in a larger etching angle for the sidewall of the light-emitting layer, reduces the amount of sidewall etching during the etching process, improves the problem of reduced luminous efficiency caused by damage to the sidewall of the light-emitting layer, improves the luminous efficiency of the display panel, and reduces the power consumption of the display panel.

[0067] In some embodiments, such as Figure 2 As shown, the substrate 111 includes an n-type region 221 and a p-type region 222. The substrate 111 includes a base 211, a gate layer 212, a gate insulating layer 213, a first metal oxide active layer 214, a second metal oxide active layer 215, a source / drain layer 216, a passivation layer 217, and a connection electrode layer 218.

[0068] Specifically, the use of silicon-based CMOS (Complementary Metal Oxide Semiconductor) reduces the power consumption of the display panel.

[0069] In some embodiments, the light-emitting layer includes an n-type gallium nitride epitaxial layer, a quantum well layer, and a p-type gallium nitride epitaxial layer. The indium content is the same in each portion of the quantum well layer.

[0070] In some embodiments, the independent electrode layer is a P electrode and the common electrode layer is an N electrode.

[0071] Specifically, the light-emitting layer can emit any color of red, blue, or green.

[0072] Specifically, the display panel also includes a quantum dot layer, which is disposed on the side of the common electrode layer away from the light-emitting layer. By setting the quantum dot layer, the light emitted by the micro-light-emitting diode devices can be converted into light of other colors, thereby achieving full-color display.

[0073] Meanwhile, this application provides a method for manufacturing a display panel, which manufactures a display panel as described in any of the above embodiments.

[0074] In some embodiments, such as Figure 3 As shown, the method for manufacturing the display panel includes:

[0075] S1, providing a driving substrate and a micro-light-emitting diode device; the driving substrate includes a substrate and a first bonding layer, the first bonding layer being disposed on one side of the substrate, the micro-light-emitting diode device including a second bonding layer, an independent electrode layer, and a light-emitting layer, the second bonding layer being disposed on the side of the first bonding layer away from the substrate, the independent electrode layer being disposed on the side of the second bonding layer away from the first bonding layer, and the light-emitting layer being disposed on the side of the independent electrode layer away from the second bonding layer; the structure of the display panel corresponding to this step is as follows. Figure 4 As shown in (a) in the text;

[0076] S2, A first dielectric layer is formed on the micro light-emitting diode device, and the first dielectric layer is patterned; the structure of the display panel corresponding to this step is as follows. Figure 4 As shown in (a) in the text;

[0077] S3, etching the light-emitting layer and the independent electrode layer to form a first via; the structure of the display panel corresponding to this step is as follows: Figure 4 As shown in (b) in the image;

[0078] S4, remove the first dielectric layer and form a second dielectric layer on the light-emitting layer; the second dielectric layer is disposed on the sidewall of the light-emitting layer; the structure of the display panel corresponding to this step is as follows. Figure 4 As shown in (c);

[0079] S5, etching is performed on the second dielectric layer, the first bonding layer, and the second bonding layer located between adjacent light-emitting layers to form a second via; the structure of the display panel corresponding to this step is as follows: Figure 4 As shown in (d);

[0080] S6, fill the first and second vias between adjacent micro-light-emitting diode devices with a third dielectric layer; the structure of the display panel corresponding to this step is as follows: Figure 5 As shown in (a) in the text;

[0081] S7, etch the third dielectric layer to obtain the insulating fill layer; the upper surface of the insulating fill layer is flush with the upper surface of the second dielectric layer; the structure of the display panel corresponding to this step is as follows. Figure 5 As shown in (b) in the image;

[0082] S8, the second dielectric layer on the light-emitting layer is etched to obtain the sidewall protective layer; the structure of the display panel corresponding to this step is as follows. Figure 5 As shown in (c);

[0083] S9, a common electrode layer is formed on the light-emitting layer to obtain the display panel; the structure of the display panel corresponding to this step is as follows. Figure 1 As shown.

[0084] Specifically, such as Figure 4 (a) and Figure 4 As shown in (b), by setting a first dielectric layer 31 on the light-emitting layer 123, the first dielectric layer 31 replaces the photoresist as the etching mask layer, thereby increasing the etching angle of the sidewall of the light-emitting layer, reducing the etching amount of the sidewall of the light-emitting layer, and improving the problem of reduced luminous efficiency caused by damage to the sidewall of the light-emitting layer.

[0085] Specifically, compared to the current practice of using photoresist as the etching mask layer, photoresist has a relatively small etching selectivity and a fast etching rate, resulting in a large amount of sidewall etching, significant damage to the light-emitting area, and low efficiency of the micro-LED device. This application's embodiment uses a dielectric layer instead of photoresist as the etching mask layer. The dielectric layer has a large selectivity and a slow etching rate, resulting in less sidewall etching, increasing the etching angle of the sidewalls of the light-emitting layer, and improving the luminous efficiency of the micro-LED device.

[0086] Specifically, the materials of the first dielectric layer include silicon oxide and silicon nitride.

[0087] Specifically, the first dielectric layer can be formed using chemical vapor deposition.

[0088] Specifically, such as Figure 4 As shown in (c), a second dielectric layer 32 is provided on the surface of the light-emitting layer 123 and inside the first via 131, so that the second dielectric layer 32 protects the light-emitting layer and the independent electrode layer, and avoids damage to the sidewalls of the light-emitting layer during subsequent etching.

[0089] Specifically, a second dielectric layer can be formed through atomic layer deposition, resulting in better compactness and sidewall protection.

[0090] Specifically, such as Figure 4 (c) Figure 4 As shown in (d), when forming the second via 132, since the second dielectric layer 32 is disposed on the sidewalls of the light-emitting layer and the independent electrode layer, the sidewalls of the light-emitting layer and the independent electrode layer will not be damaged.

[0091] Specifically, such as Figure 5As shown in (a), by depositing a third dielectric layer 33 within the via 13 between adjacent micro-LED devices, the third dielectric layer fills the step difference within the via and planarizes the third dielectric layer 33, as shown in Figure (a). Figure 5 As shown in (b), this design avoids problems such as poor connection or breakage of the common electrode layer when it is subsequently formed, thus improving the yield of the display panel.

[0092] Specifically, a third dielectric layer can be formed by chemical vapor deposition, and then planarized by chemical mechanical polishing.

[0093] Specifically, prior to the steps of providing the driving substrate and the micro-light-emitting diode device, the method includes: aligning the driving substrate and the micro-light-emitting diode device to connect the first bonding layer and the second bonding layer.

[0094] Meanwhile, this application provides a display device, which includes a display panel as described in any of the above embodiments.

[0095] Specifically, the display devices include AR display devices and VR display devices.

[0096] As can be seen from the above embodiments:

[0097] This application provides a display panel and a method for fabricating the same. The display panel includes a driving backplane and a plurality of micro-light-emitting diode devices. The driving backplane includes a substrate and a first bonding layer. The first bonding layer is disposed on one side of the substrate. Each micro-light-emitting diode device includes a second bonding layer, an independent electrode layer, a light-emitting layer, and a common electrode layer. The second bonding layer is disposed on the side of the first bonding layer away from the substrate. The independent electrode layer is disposed on the side of the second bonding layer away from the first bonding layer. The light-emitting layer is disposed on the side of the independent electrode layer away from the second bonding layer. The common electrode layer is disposed on the side of the light-emitting layer away from the independent electrode layer. Vias are provided between adjacent micro-light-emitting diode devices, and the vias pass through the light-emitting layer, the independent electrode layer, the second bonding layer, and the first bonding layer. The display panel also includes an insulating filler layer disposed within the vias, and the common electrode layer is disposed on the insulating filler layer. This application incorporates an insulating filler layer, which is positioned within a via and a common electrode layer is disposed on top of the insulating filler layer. This allows the insulating filler layer to fill the vias between adjacent micro-LED devices, minimizing the step difference between the portion of the common electrode layer located between adjacent micro-LED devices and other portions. The thickness of each portion of the common electrode layer is similar or even uniform, preventing loose connections or breaks in the common electrode layer and improving the yield of the display panel. Furthermore, the insulating filler layer can separate adjacent independent electrodes, preventing signal crosstalk caused by contact between adjacent independent electrodes.

[0098] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0099] The above provides a detailed description of a display panel and its manufacturing method according to the embodiments of this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A display panel, characterized in that: include: A driving backplane, comprising a substrate and a first bonding layer, wherein the first bonding layer is arranged on one side of the substrate; A plurality of micro-light emitting diode devices, wherein the micro-light emitting diode devices include a second bonding layer, an independent electrode layer, a light emitting layer and a common electrode layer, wherein the second bonding layer is arranged on a side of the first bonding layer away from the substrate, the independent electrode layer is arranged on a side of the second bonding layer away from the first bonding layer, the light emitting layer is arranged on a side of the independent electrode layer away from the second bonding layer, and the common electrode layer is arranged on a side of the light emitting layer away from the independent electrode layer; There are via holes between adjacent micro-light emitting diode devices, and the via holes pass through the light emitting layer, the independent electrode layer, the second bonding layer and the first bonding layer. The display panel also includes an insulating filling layer, and the insulating filling layer is arranged in the via holes. The common electrode layer is arranged on the insulating filling layer.

2. The display panel according to claim 1, wherein: The via hole includes a first via hole and a second via hole, the first via hole passes through the light-emitting layer and the independent electrode layer, the second via hole passes through the second bonding layer and the first bonding layer, the display panel also includes a side wall protection layer, the side wall protection layer is arranged in the first via hole, the side wall protection layer is located between the light-emitting layer and the insulating filling layer, and the side wall protection layer is arranged on the side wall of the light-emitting layer.

3. The display panel according to claim 2, wherein: The width of the first via hole is greater than that of the second via hole, the side wall protection layer is arranged in the area where the first via hole exceeds the second via hole, the side wall protection layer overlaps the part of the second bonding layer that exceeds the independent electrode layer, and the side wall protection layer overlaps the upper surface of the light-emitting layer.

4. The display panel according to claim 3, wherein: The sidewall protection layer is in direct contact with the common electrode layer, the insulating filling layer is in direct contact with the common electrode layer, and the surface of the insulating filling layer in contact with the common electrode layer and the surface of the sidewall protection layer in contact with the common electrode layer are located on the same plane.

5. The display panel according to claim 3, wherein: The portion of the insulating filling layer located in the first via hole overlaps the sidewall protection layer, the portion of the insulating filling layer located in the second via hole directly contacts the sidewall of the first bonding layer, and the portion of the insulating filling layer located in the second via hole directly contacts the sidewall of the second bonding layer.

6. The display panel according to claim 3, wherein: Side wall protection layers are arranged on both sides of the light emitting layer. The side wall protection layers on both sides of the light emitting layer are provided with openings on the upper surface of the light emitting layer. The common electrode layer is arranged in the openings, and the common electrode layer contacts the light emitting layer.

7. The display panel according to claim 2, wherein: The material of the sidewall protection layer includes one of silicon oxide, aluminum oxide and titanium dioxide.

8. The display panel according to claim 1, wherein: An angle between a side wall of the light-emitting layer and an upper surface of the independent electrode layer is greater than or equal to 80 degrees and less than or equal to 90 degrees.

9. A method for preparing a display panel, characterized in that: Prepare a display panel as claimed in any one of claims 1 to 8.

10. The method for manufacturing a display panel according to claim 9, wherein: include: A driving substrate and a micro-light emitting diode device are provided; the driving substrate comprises a substrate and a first bonding layer, the first bonding layer is arranged on one side of the substrate, the micro-light emitting diode device comprises a second bonding layer, an independent electrode layer and a light emitting layer, the second bonding layer is arranged on a side of the first bonding layer away from the substrate, the independent electrode layer is arranged on a side of the second bonding layer away from the first bonding layer, and the light emitting layer is arranged on a side of the independent electrode layer away from the second bonding layer; forming a first dielectric layer on the micro light emitting diode device, and patterning the first dielectric layer; Etching the light-emitting layer and the independent electrode layer to form a second via hole; removing the first dielectric layer and forming a second dielectric layer on the light-emitting layer; The second dielectric layer is disposed on the side wall of the light emitting layer; Etching the second dielectric layer, the first bonding layer and the second bonding layer located between adjacent light-emitting layers to form a first via hole; Filling a third dielectric layer in the first via hole and the second via hole between adjacent micro light emitting diode devices; The third dielectric layer is etched to obtain an insulating filling layer; the upper surface of the insulating filling layer is flush with the upper surface of the second dielectric layer; Etching the second dielectric layer on the light-emitting layer to obtain a sidewall protection layer; A common electrode layer is formed on the light emitting layer to obtain a display panel.

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