Display device

Abstract

A display device includes a substrate including first and second substrates and first and second barrier layers; and a pad unit disposed in the non-display area of the substrate and including a pad connected to the driver board connection under the first substrate. Each of the pads includes: an inorganic layer and a pad electrode in a pad contact hole defined by the second substrate and the second barrier layer; a rear pad line on the first barrier layer and connected to the pad electrode through an intermediate hole defined through the inorganic layer; and a rear pad electrode extending from the rear pad line and connected to the driver board through a rear contact hole defined through the first substrate. A pad defining layer including a laser absorbing layer and a first barrier layer and a protrusion pattern covering the pad defining layer are disposed between adjacent rear pad electrodes.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to Korean Patent Application No. 10-2023-0131099, filed on September 27, 2023, and all benefits obtained from the application, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] With the development of the information society, the demand for display devices for displaying images is increasing in various forms. The display device may be a flat panel display device such as a liquid crystal display device, a field emission display device, and a light-emitting display device. The light-emitting display device may include an organic light-emitting display device including an organic light-emitting diode element as a light-emitting element or a light-emitting diode display device including an inorganic light-emitting diode element (such as a light-emitting diode) as a light-emitting element.

[0005] The display panel of the display device generally includes a display area provided with pixels for displaying an image and a non-display area (or frame area) provided around the display area. Lines for driving pixels may be provided in the non-display area. The non-display area of ​​the display panel is an area where no image is displayed. As the area of ​​the non-display area decreases, the area of ​​the display area may increase relatively. Summary of the invention

[0006] Embodiments of the present disclosure provide a display device that increases the area of ​​a display region by reducing the area of ​​a non-display region.

[0007] According to an embodiment of the present disclosure, a display device includes: a substrate, including a first substrate, a first barrier layer, a second barrier layer, and a second substrate sequentially stacked in the substrate; a thin film transistor layer, a light emitting element layer, an encapsulation layer, and a touch sensing unit sequentially stacked on the second substrate; and a pad unit, which is arranged in a non-display area of ​​the substrate and includes a plurality of pads connected to a driving board arranged on the first substrate. In such an embodiment, each of the plurality of pads includes: an inorganic layer and a pad electrode, which are sequentially stacked on the inner circumferential surface of a pad contact hole defined by the second substrate and the second barrier layer; a rear pad line, which is arranged on the first barrier layer and connected to the pad electrode by passing through a middle hole defined by the inorganic layer inside the pad contact hole; and a rear pad electrode, which extends from the rear pad line and is connected to the driving board under the substrate by passing through the rear contact hole defined by the first substrate. In such an embodiment, a pad defining layer and a protrusion pattern covering the pad defining layer from under the substrate are arranged between adjacent rear pad electrodes, wherein the pad defining layer includes a laser absorption layer and the first barrier layer.

[0008] In an embodiment, the laser absorption layer may be disposed between the first substrate and the first barrier layer.

[0009] In an embodiment, a plurality of first openings and a second opening disposed between adjacent first openings may be defined by a pad defining layer, and the rear pad electrode may be disposed in the first opening.

[0010] In an embodiment, the laser absorption layer of the pad defining layer may be disconnected in the second opening.

[0011] In an embodiment, the second opening of the pad defining layer may be covered by the second barrier layer.

[0012] In an embodiment, the laser absorption layer may include a semiconductor layer. The semiconductor layer of the laser absorption layer may include amorphous silicon.

[0013] In an embodiment, a depth of the protrusion pattern in a thickness direction of the substrate may be lower than a depth of the rear contact hole in the thickness direction of the substrate.

[0014] In an embodiment, the protrusion pattern has a tapered shape having a width that decreases toward a bottom surface of the substrate.

[0015] In an embodiment, the protrusion pattern has a dome shape having a bent surface facing a bottom surface of the substrate.

[0016] In an embodiment, a groove may be defined in the protrusion pattern to be connected to the second opening of the pad defining layer, and the groove of the protrusion pattern may be covered by the second barrier layer.

[0017] According to an embodiment of the present disclosure, a display device may include: a substrate including a first substrate, a first barrier layer, a second barrier layer, and a second substrate sequentially stacked in the substrate; a thin film transistor layer, a light emitting element layer, an encapsulation layer, and a touch sensing unit sequentially stacked on the second substrate; and a pad unit disposed in a non-display area of ​​the substrate and including a plurality of pads connected to a driving board disposed on the first substrate. In such an embodiment, each of the plurality of pads includes: an inorganic layer and a pad electrode sequentially stacked on an inner peripheral surface of a pad contact hole defined by the second substrate and the second barrier layer; a rear pad line disposed on the first barrier layer and connected to the pad electrode by passing through a middle hole defined by the inorganic layer inside the pad contact hole; and a rear pad electrode extending from the rear pad line and connected to the driving board under the substrate by passing through the rear contact hole defined by the first substrate. In such an embodiment, a pad defining layer defined by a patterned portion of the first barrier layer, a laser absorption layer disposed on the second barrier layer to overlap the pad defining layer, and a protrusion pattern covering the pad defining layer from under the substrate are disposed between adjacent rear pad electrodes.

[0018] In an embodiment, a plurality of first openings and a second opening disposed between adjacent first openings may be defined by a pad defining layer, and the rear pad electrode may be disposed in the first opening.

[0019] In an embodiment, the laser absorption layer may include a semiconductor layer.

[0020] In an embodiment, the semiconductor layer of the laser absorption layer may include amorphous silicon.

[0021] In an embodiment, a depth of the protrusion pattern in a thickness direction of the substrate may be lower than a depth of the rear contact hole in the thickness direction of the substrate.

[0022] In an embodiment, the protrusion pattern has a tapered shape having a width that decreases toward a bottom surface of the substrate.

[0023] In an embodiment, the inorganic layer may be disposed at the same layer as at least one selected from the inorganic layers included in the thin film transistor layer.

[0024] In an embodiment, the pad electrode may be disposed at the same layer as a source electrode or a drain electrode of the thin film transistor layer.

[0025] In an embodiment, the pad unit may be disposed in an outermost area of ​​the non-display area where the encapsulation layer may not be disposed.

[0026] However, the embodiments of the present disclosure are not limited to the embodiments set forth herein. The above and other features of the embodiments of the present disclosure will become more apparent to those skilled in the art to which the present disclosure belongs by referring to the detailed description of the embodiments of the present disclosure given below. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] These and / or other features of the embodiments will become apparent and more easily understood from the following description of the embodiments in conjunction with the accompanying drawings, in which:

[0028] Figure 1 is a plan view of a display device according to a comparative example;

[0029] Figure 2 is a cross-sectional view of a display device according to a comparative example;

[0030] Figure 3 is a plan view of a display device according to an embodiment;

[0031] Figure 4 is a cross-sectional view of a display device according to an embodiment;

[0032] Figure 5 FIG. 1 illustrates a cross-sectional structure of a portion of a display area of ​​a display panel according to an embodiment;

[0033] Fig. 6A is a front plan view of a portion of a non-display area of ​​a display panel according to an embodiment;

[0034] Figure 6B and Figure 6C is a rear plan view of a portion of a non-display area of ​​a display panel according to an embodiment;

[0035] Figure 7 illustrates a cross-sectional structure of a portion of a non-display area of ​​a display panel according to an embodiment;

[0036] Figure 8 is a cross-sectional view of a portion of a display panel, specifically Figure 7 The pad unit;

[0037] Fig. 9 is a flowchart illustrating a method of manufacturing a display device according to an embodiment;

[0038] Figures 10 to 15 is a process cross-sectional view illustrating a method of manufacturing a display device according to an embodiment;

[0039] Fig.16 is a cross-sectional view of a pad unit according to an embodiment in which a groove is formed in each protrusion pattern;

[0040] Fig.17 is a cross-sectional view of a pad unit according to an embodiment in which a protrusion pattern has a dome shape;

[0041] Fig.18 is a cross-sectional view of a pad unit according to an embodiment in which a laser absorption layer is disposed on a second barrier layer; and

[0042] Fig.19 is a cross-sectional view of a pad unit according to an embodiment in which each protrusion pattern is coated with a protection layer. DETAILED DESCRIPTION

[0043] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which various embodiments of the present invention are shown. However, the present invention may be embodied in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the present disclosure will be thorough and complete, and will fully convey the scope of the present invention to those skilled in the art. The same reference numerals indicate the same elements throughout.

[0044] It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present between the layer and the other layer or substrate. In contrast, when an element is referred to as being "directly on" another element, there are no intervening elements present.

[0045] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, the first element discussed below may be referred to as the second element without departing from the teachings of the present invention. Similarly, the second element may also be referred to as the first element.

[0046] The terms used herein are only used for the purpose of describing specific embodiments, and are not intended to be limited. As used herein, "one", "the" and "at least one" do not represent the limitation of quantity, and are intended to include both the singular and the plural, unless the context clearly indicates otherwise. Therefore, the reference to "the" element after the reference to "one" element in the claim includes one element and multiple elements. For example, "an element" has the same meaning as "at least one element", unless the context clearly indicates otherwise. "At least one" should not be interpreted as being limited to "one". "Or" means "and / or". As used herein, the term "and / or" includes any and all combinations of one or more of the items listed in the association. It will be further understood that when used in this specification, the term "includes" and / or "comprising" indicates the existence of stated features, regions, entireties, steps, operations, elements and / or parts, but does not exclude the existence or addition of one or more other features, regions, entireties, steps, operations, elements, parts and / or their groups.

[0047] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element relative to another element as illustrated in the accompanying drawings. It will be understood that relative terms are intended to cover different orientations of the device in addition to the orientation depicted in the accompanying drawings. For example, if the device in one of the figures in the accompanying drawings is turned over, the element described as being on the "lower" side of the other elements will then be oriented on the "upper" side of the other elements. Therefore, depending on the specific orientation of the drawings, the term "lower" can cover both "lower" and "upper" orientations. Similarly, if the device in one of the figures in the accompanying drawings is turned over, the element described as being "below" or "below" the other elements will then be oriented to be "above" the other elements. Therefore, the terms "below" and "below" can cover both upper and lower orientations.

[0048] The features of each of the various embodiments of the present disclosure may be partially or completely combined with each other and may technically interact with each other in various ways, and the various embodiments may be implemented independently of each other or may be implemented together in association with each other.

[0049] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an idealized or overly formal sense, unless explicitly so defined herein.

[0050] In this article, embodiments are described with reference to schematically illustrated cross-sectional diagrams of idealized embodiments. In this way, variations in the shapes of the diagrams due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, the embodiments described herein should not be interpreted as being limited to the specific shapes of the zones illustrated herein, but should include deviations in shapes due to, for example, manufacturing. For example, a zone illustrated or described as flat may generally have rough and / or nonlinear features. In addition, the illustrated sharp corners may be rounded. Therefore, the zones illustrated in the accompanying drawings are schematic in nature, and the shapes of the zones illustrated in the accompanying drawings are not intended to illustrate the precise shapes of the zones and are not intended to limit the scope of the invention.

[0051] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings.

[0052] Figure 1 is a plan view of a display device 1 according to a comparative example. Figure 2 is a cross-sectional view of a display device 1 according to a comparative example.

[0053] exist Figure 1 In the plan view of , for the convenience of description, an upper direction, a lower direction, a left direction, and a right direction are defined. The upper and lower directions are defined as a first direction DR1 which is a longitudinal direction or a column direction, the left and right directions are defined as a second direction DR2 which is a transverse direction or a row direction, and the vertical direction is defined as a third direction DR3. The third direction DR3 may be a thickness direction of the display device 1.

[0054] refer to Figure 1 and Figure 2 , the display device 1 according to the comparative example may include a display panel 10. The display panel 10 may include a substrate SUB including a flexible polymer material such as polyimide. Accordingly, the display panel 10 may be bent, curved, folded, or rolled.

[0055] The display panel 10 may include a main region MR, a bending region BR extending from one side of the main region MR, and a sub-region SR extending from one side of the bending region BR. The bending region BR is a region disposed between the main region MR and the sub-region SR and may be bent at a specific curvature. As the bending region BR is bent, the sub-region SR may overlap the main region MR in a thickness direction (e.g., a third direction DR3).

[0056] In the display panel 10, a display area DA where a picture is displayed is provided in the main region MR. In the display panel 10, a non-display area NDA where a picture is not displayed may be an area other than the display area DA. In a plan view, the main region MR may have a shape substantially similar to the outer shape of the display device 1. The main region MR may be a flat area located in one plane.

[0057] The display area DA of the display panel 10 may be located in a central portion of the main region MR. The display area DA may include a plurality of pixels. The display area DA may have a rectangular shape or a rectangular shape with rounded corners.

[0058] In the main region MR, the non-display area NDA may be located around the display area DA. The non-display area NDA in the main region MR may be located in a region from an outer boundary of the display area DA to an edge of the display panel 10. A signal line or a driving circuit for transmitting a signal to the display area DA may be provided in the non-display area NDA in the main region MR.

[0059] The bending region BR may be connected to an end of the main region MR. The width of the bending region BR may be smaller than the width of the main region MR (the width of each short side). The bending region BR of the display panel 10 may bend downward in the thickness direction (eg, in the direction opposite to the display surface) with a curvature.

[0060] The sub-region SR may extend from an end of the bending region BR in a direction parallel to the main region MR. The sub-region SR may overlap the main region MR in the thickness direction of the display panel 10. The sub-region SR may overlap the non-display area NDA at an edge of the main region MR, and may further overlap the display area DA in the main region MR.

[0061] According to a comparative example, the driving chip 20 may be disposed on the sub-region SR of the display panel 10. The driving chip 20 may include an integrated circuit driving the display panel 10. The driving chip 20 may be mounted on the display panel 10 in the sub-region SR.

[0062] The driving chip 20 may be attached to the display panel 10 through an anisotropic conductive film, or may be attached to the display panel 10 through ultrasonic bonding.

[0063] A pad unit (not shown) may be provided at an end of the sub region SR of the display panel 10. The display panel 10 may be connected to the display driving board 30 through the pad unit. The display driving board 30 may be a flexible printed circuit board or film.

[0064] A plurality of signal lines may be disposed in the sub-region SR, the bending region BR, and the main region MR. The signal line may extend from the main region MR to a pad unit of the sub-region SR via the bending region BR.

[0065] As described above, according to Figure 1 and Figure 2 In the display device 1 of the comparative example illustrated in , when the bending area BR of the display panel 10 is bent, the sub-area SR in which the pad unit and the driving chip 20 are provided is placed facing downward in the thickness direction. In the display device 1 according to the comparative example, it is desirable to increase the curvature of the bending area BR to reduce the width of the non-display area NDA other than the display area DA (i.e., the border width or the dead zone width). However, in the comparative example, as the curvature of the bending area BR increases, the possibility of wiring defects also increases. Therefore, there is a limitation on reducing the width of the non-display area NDA (i.e., the border width or the dead zone width) by increasing the curvature of the bending area BR.

[0066] In an embodiment of the present disclosure, the display panel 10 does not include a bent region, and the pad unit 430 is connected to a driving circuit unit such as the driving board 410 through the rear surface of the display panel 10. Figure 1 and Figure 2 Compared with the comparative example shown in FIG. 1 , the width of the non-display area NDA (ie, the border width or the dead zone width) can be reduced. Figures 3 to 19 The display device 1 according to an embodiment of the present disclosure will be described in detail.

[0067] Figure 3 is a plan view of a display device 1 according to the embodiment. Figure 4 is a cross-sectional view of a display device 1 according to the embodiment.

[0068] refer to Figure 3 and Figure 4, an embodiment of the display device 1 may be a device for displaying moving images or still images. The display device 1 may be applied to portable electronic devices such as mobile phones, smart phones, tablet personal computers (PCs), smart watches, watch phones, mobile communication terminals, electronic notebooks, electronic books, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs), as well as various products such as televisions, notebook computers, monitors, billboards, and Internet of Things (IoT) devices. For example, the display device 1 may be an organic light-emitting display device, a liquid crystal display device, a plasma display device, a field emission display device, an electrophoretic display device, an electrowetting display device, a quantum dot light-emitting display device, or a micro light-emitting diode display device. For ease of description, an embodiment in which the display device 1 is an organic light-emitting display device will be described below as an example, but the embodiment is not limited thereto.

[0069] The display device 1 may include a display panel 10. The display panel 10 may include a substrate SUB including a flexible polymer material such as polyimide. Accordingly, the display panel 10 may be bent, curved, folded, or rolled.

[0070] The display panel 10 includes a display area DA and a non-display area NDA. The non-display area NDA may be an area other than the display area DA. A pad unit 430 exposed toward the rear surface of the display panel 10 is disposed in the non-display area NDA. The pad unit 430 is exposed through a portion of the rear surface of the display panel 10 corresponding to the non-display area NDA. The pad unit 430 may be connected to a driving board 410 disposed on the rear surface of the display panel 10 (positioned to face the rear surface of the display panel 10). The pad unit 430 of the display panel 10 may include a pad electrode (e.g., Figure 7 721), and the pad electrode (eg, Figure 7 721) can be electrically connected to the pads (e.g., bumps) of the driving board 410 through a conductive member such as conductive ink (e.g., metal ink).

[0071] A signal line or a driving circuit for transmitting a signal to the display area DA may be provided in the non-display area NDA. The signal line may extend from the display area DA to the pad unit 430 via the non-display area NDA.

[0072] In an embodiment of the present disclosure, a driving chip 411 may be disposed on a driving board 410. The driving chip 411 may include an integrated circuit that drives the display panel 10. In an embodiment, the driving chip 411 may be a chip on plastic (COP) type integrated circuit. In such an embodiment, the driving board 410 may include a plastic board (or a flexible board) containing a flexible polymer material such as polyimide. In an embodiment, the driving chip 411 may be a chip on film (COF) type integrated circuit. In such an embodiment, the driving board 410 may be a film-type board such as a flexible printed circuit board (FPCB). That is, the driving board 410 of the display device 1 according to the embodiment mentioned herein may be a plastic board (or a flexible board) containing a flexible polymer material such as polyimide, or may be a film-type board such as an FPCB.

[0073] A lead pad unit (not shown) connected to the main board 420 may be provided at the end of the driving board 410. The driving board 410 may be connected to the main board 420 through the lead pad unit provided at the end of the driving board 410. A processor (i.e., a host or controller) that controls the overall operation of the display device 1, a memory, a touch driving circuit, or a power circuit may be provided on the main board 420.

[0074] As described above, in the display device 1 according to the embodiment, the display panel 10 does not include a curved area, and is connected to a driving circuit unit such as the driving board 410 through the rear surface of the display panel 10. In such an embodiment of the display device 1, Figure 1 and Figure 2 Compared with the comparative example illustrated in , the width of the non-display area NDA (ie, the border width or the dead zone width) can be reduced.

[0075] Figure 5 A cross-sectional structure of a portion of a display area DA of a display panel 10 according to an embodiment is illustrated.

[0076] exist Figure 5 In the description of FIG. 1 , the expression “up” may refer to a third direction DR3 to which the front surface of the display panel 10 faces. The front surface of the display panel 10 may refer to a direction in which a light emitting element included in the display panel 10 emits light to display an image.

[0077] refer to Figure 5, the display panel 10 uses a flexible plastic substrate as a base substrate. The substrate SUB may include an insulating material such as a polymer resin or be made of an insulating material such as a polymer resin. In an embodiment, for example, the substrate SUB may include polyimide or be made of polyimide. Therefore, the substrate SUB may be bent, folded, curled, etc. The substrate SUB may include a multilayer including a first substrate SUB1, a second substrate SUB2, and a barrier layer BR disposed between the first substrate SUB1 and the second substrate SUB2. In an embodiment, for example, the substrate SUB of the display panel 10 includes a first substrate SUB1, a barrier layer BR disposed on the first substrate SUB1, and a second substrate SUB2 disposed on the barrier layer BR. The first substrate SUB1 and the second substrate SUB2 may include a flexible material such as polyimide.

[0078] The barrier layer BR is used to protect the transistors of the thin film transistor layer TFTL and the light emitting layer 172 of the light emitting element layer EML from the influence of the introduced moisture. The barrier layer BR may be defined by a plurality of inorganic layers stacked alternately or may be composed of a plurality of inorganic layers stacked alternately. In an embodiment, for example, the barrier layer BR may be a multilayer in which at least one inorganic layer selected from a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer is alternately stacked.

[0079] A thin film transistor layer TFTL including a thin film transistor, a light emitting element layer EML including a light emitting element LEL, an encapsulation layer TFEL for encapsulating the light emitting element LEL, and a touch sensing unit TDU may be sequentially stacked on the second substrate SUB2. Although not shown, Figure 5 At least some of the layers illustrated in the figure may not be provided in the non-display area NDA of the display panel 10. Since the thin film transistor layer TFTL, the light emitting element layer EML and the encapsulation layer TFEL perform a function to display an image, the thin film transistor layer TFTL, the light emitting element layer EML and the encapsulation layer TFEL may be referred to as, but not limited to, a display unit DU.

[0080] The thin film transistor of the pixel driving circuit for driving each pixel is disposed on the second substrate SUB2. Figure 5 Only the first thin film transistor TFT1 among the thin film transistors of the pixel driving circuit is illustrated. In the embodiment, for example, each of the first thin film transistors TFT1 may be used as a driving transistor in the pixel driving circuit.

[0081] Each of the first thin film transistors TFT1 may include a first active layer ACT1 and a first gate electrode G1. The first active layer ACT1 may include polysilicon (eg, low temperature polysilicon), single crystal silicon, amorphous silicon, or an oxide semiconductor.

[0082] The first active layer ACT1 may include a first channel region CHA1, a first source region S1, and a first drain region D1. The first channel region CHA1 may be a region overlapping with the first gate electrode G1 in a third direction DR3 (being a thickness direction of the substrate SUB). The first source region S1 may be disposed on one side of the first active layer ACT1, and the first drain region D1 may be disposed on the other side of the first active layer ACT1. The first source region S1 and the first drain region D1 may be regions that do not overlap with the first gate electrode G1 in the third direction DR3. The first source region S1 and the first drain region D1 may be regions formed to have conductivity by doping a silicon semiconductor or an oxide semiconductor with ions or impurities.

[0083] The gate insulating layer 130 may be disposed on the first active layer ACT1 of the first thin film transistor TFT1. The gate insulating layer 130 may include or be made of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0084] The first gate electrode G1 of the first thin film transistor TFT1 and the first capacitor electrode CAE1 may be disposed on the gate insulating layer 130. The first gate electrode G1 may overlap the first active layer ACT1 in the third direction DR3. Figure 5 The first gate electrode G1 and the first capacitor electrode CAE1 are spaced apart from each other, but they may also be connected to each other. Each of the first gate electrode G1 and the first capacitor electrode CAE1 may be a single layer or a multilayer, each of which includes at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0085] The interlayer insulating layer 140 may be disposed on the first gate electrode G1 of the first thin film transistor TFT1 and the first capacitor electrode CAE1. Specifically, the first interlayer insulating layer 141 may be disposed on the first gate electrode G1 of the first thin film transistor TFT1 and the first capacitor electrode CAE1. The first interlayer insulating layer 141 may include an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer or may be made of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The first interlayer insulating layer 141 may be defined by a plurality of inorganic layers or may be composed of a plurality of inorganic layers.

[0086] The second capacitor electrode CAE2 may be disposed on the first interlayer insulating layer 141. The second capacitor electrode CAE2 may overlap the first capacitor electrode CAE1 in the third direction DR3. In an embodiment, the first capacitor electrode CAE1 is connected to the first gate electrode G1, and the second capacitor electrode CAE2 may overlap the first gate electrode G1 in the third direction DR3. Since the first interlayer insulating layer 141 has a predetermined dielectric constant, a capacitor may be formed by the first capacitor electrode CAE1, the second capacitor electrode CAE2, and the first interlayer insulating layer 141 disposed therebetween. Each of the second capacitor electrodes CAE2 may be a single layer or a multilayer, each of which includes at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof, or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0087] The second interlayer insulating layer 142 may be disposed on the second capacitor electrode CAE2. The second interlayer insulating layer 142 may include or be made of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. The second interlayer insulating layer 142 may be defined by or composed of a plurality of inorganic layers.

[0088] The first anode connection electrode ANDE1 may be disposed on the second interlayer insulating layer 142. The first anode connection electrode ANDE1 may be connected to the first drain region D1 of the first thin film transistor TFT1 through a first connection contact hole ANCT1 defined or formed through the gate insulating layer 130, the first interlayer insulating layer 141, and the second interlayer insulating layer 142. Each of the first anode connection electrodes ANDE1 may be a single layer or a multilayer, each of which includes or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0089] The first planarization layer 160 may be disposed on the first anode connection electrode ANDE1 to planarize a step formed by the first thin film transistor TFT1. The first planarization layer 160 may include or be made of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0090] The second anode connection electrode ANDE2 may be disposed on the first planarization layer 160. The second anode connection electrode ANDE2 may be connected to the first anode connection electrode ANDE1 through a second connection contact hole ANCT2 defined or formed through the first planarization layer 160. Each of the second anode connection electrodes ANDE2 may be a single layer or a multilayer, each of which includes at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0091] The second planarization layer 180 may be disposed on the second anode connection electrode ANDE2. The second planarization layer 180 may include or be made of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0092] The light emitting element LEL and the bank 190 may be disposed on the second planarization layer 180. Each of the light emitting elements LEL includes a pixel electrode 171, a light emitting layer 172, and a common electrode 173.

[0093] The pixel electrode 171 may be disposed on the second planarization layer 180 . The pixel electrode 171 may be connected to each of the second anode connection electrodes ANDE2 through a third connection contact hole ANCT3 defined or formed through the second planarization layer 180 .

[0094] In an embodiment having a top emission structure in which light is emitted from the light emitting layer 172 toward the common electrode 173, the pixel electrode 171 may include or be made of a metal material having high reflectivity, such as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and indium tin oxide (ITO / Al / ITO), an APC alloy, or a stacked structure of an APC alloy and indium tin oxide (ITO / APC / ITO). The APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0095] The bank 190 may be disposed on the second planarization layer 180 to separate the pixel electrode 171, thereby defining an emission region (e.g., a light emitting portion) of each pixel. The light emitting portion (e.g., EA1, EA2) is a region in which the pixel electrode 171, the light emitting layer 172, and the common electrode 173 are sequentially stacked so that holes from the pixel electrode 171 and electrons from the common electrode 173 are combined in the light emitting layer 172 to emit light.

[0096] In an embodiment, Figure 5 As shown in , the embankment 190 defines a first light emitting portion EA1 of a first pixel and a second light emitting portion EA2 of a second pixel adjacent to each other. The embankment 190 may cover the edge of the pixel electrode 171. The embankment 190 may include an organic layer such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin or be made of an organic layer such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. The embankment 190 may be referred to as a pixel defining layer (PDL). Although not shown, the display panel 10 includes a plurality of pixels including a first pixel, a second pixel, and a third pixel. In an embodiment, for example, each of the first pixels may include a first light emitting portion emitting light of a first color, each of the second pixels may include a second light emitting portion emitting light of a second color, and each of the third pixels may include a third light emitting portion emitting light of a third color. According to an embodiment, the pixel may further include a fourth pixel, and each of the fourth pixels may include a fourth light emitting portion emitting light of a fourth color.

[0097] The light emitting layer 172 may be disposed on the pixel electrode 171. The light emitting layer 172 may include an organic material for emitting light of a predetermined color. In an embodiment, for example, the light emitting layer 172 includes a hole transport layer, an organic material layer, and an electron transport layer.

[0098] The common electrode 173 may be disposed on the light emitting layer 172. The common electrode 173 may cover the light emitting layer 172. The common electrode 173 may be a common layer commonly disposed in the first light emitting portion EA1, the second light emitting portion EA2, and the third light emitting portion (not shown). A capping layer may be disposed on the common electrode 173.

[0099] In an embodiment with a top emission structure, the common electrode 173 may be made of a light-transmitting transparent conductive material (TCO) such as indium tin oxide (ITO) or indium zinc oxide (IZO) or a semi-transmissive conductive material such as magnesium (Mg), silver (Ag) or an alloy of magnesium and silver. In such an embodiment, the common electrode 173 includes or is made of a semi-transmissive conductive material, thereby improving light output efficiency through a microcavity effect.

[0100] The spacer 191 may be disposed on the bank 190. The spacer 191 may support a mask during a process of manufacturing the light emitting layer 172. The spacer 191 may include or be made of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0101] The encapsulation layer TFEL may be disposed on the common electrode 173. The encapsulation layer TFEL may include at least one inorganic layer to prevent oxygen or moisture from penetrating into the light emitting element layer EML. In addition, the encapsulation layer TFEL may include at least one organic layer to protect the light emitting element layer EML from foreign matter such as dust. In an embodiment, for example, the encapsulation layer TFEL may include a first encapsulation inorganic layer TFE1, an encapsulation organic layer TFE2, and a second encapsulation inorganic layer TFE3.

[0102] The first encapsulation inorganic layer TFE1 may be disposed on the common electrode 173, the encapsulation organic layer TFE2 may be disposed on the first encapsulation inorganic layer TFE1, and the second encapsulation inorganic layer TFE3 may be disposed on the encapsulation organic layer TFE2. Each of the first encapsulation inorganic layer TFE1 and the second encapsulation inorganic layer TFE3 may be a multilayer in which at least one inorganic layer selected from silicon nitride layers, silicon oxynitride layers, silicon oxide layers, titanium oxide layers, and aluminum oxide layers are alternately stacked. The encapsulation organic layer TFE2 may be an organic layer including an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0103] The touch sensing unit TDU may be disposed on the encapsulation layer TFEL. The touch sensing unit TDU may be a mutual capacitance touch sensor or a self capacitance touch sensor. Figure 5 The touch sensing unit TDU includes an embodiment of a mutual capacitance touch sensor, but the present disclosure is not limited thereto. The touch sensing unit TDU includes a first touch insulating layer TINS1, a connecting electrode BE1, a second touch insulating layer TINS2, a driving electrode TE, a sensing electrode RE, and a third touch insulating layer TINS3.

[0104] The first touch insulating layer TINS1 may include or be made of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0105] The connection electrode BE1 may be disposed on the first touch insulating layer TINS1. Each of the connection electrodes BE1 may be a single layer or a multilayer, each of which includes at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0106] The second touch insulating layer TINS2 is disposed on the connection electrode BE1. In an embodiment, the second touch insulating layer TINS2 may include an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, or may be made of an inorganic layer such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer. Alternatively, the second touch insulating layer TINS2 may include an organic layer such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin, or may be made of an organic layer such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0107] The driving electrode TE and the sensing electrode RE may be disposed on the second touch insulating layer TINS2. Each of the driving electrode TE and the sensing electrode RE may be a single layer or a multilayer, each of which includes at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0108] The driving electrodes TE and the sensing electrodes RE may overlap the connection electrode BE1 in the third direction DR3. Each of the driving electrodes TE may be connected to the connection electrode BE1 through a touch contact hole TCNT1 defined or formed through the second touch insulating layer TINS2.

[0109] The third touch insulating layer TINS3 may be disposed on the driving electrode TE and the sensing electrode RE. The third touch insulating layer TINS3 may flatten the step formed by the driving electrode TE, the sensing electrode RE, and the connecting electrode BE1. The third touch insulating layer TINS3 may include or be made of an organic layer such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin.

[0110] Fig. 6Ais a front plan view of a portion of a non-display area NDA of a display panel 10 according to an embodiment. Figure 6B and Figure 6C is a rear plan view of a portion of the non-display area NDA of the display panel 10 according to the embodiment. For example, Fig. 6A It can be in Figure 4 An example of a non-display area NDA around the pad unit 430 seen in the third direction DR3. Figure 6B and Figure 6C It can be in Figure 4 An example of the non-display area NDA around the pad unit 430 seen in a fourth direction DR4 opposite to the third direction DR3.

[0111] refer to Fig. 6A According to an embodiment, a signal line 611 and a power line 612 for driving pixels in the display area DA may be disposed in the non-display area NDA of the display panel 10. In addition, a touch connection line 613 for driving the touch sensing unit TDU may be disposed in the non-display area NDA. The touch connection line 613 may be a touch electrode (e.g., Figure 5 The signal line 611, the power line 612, and the touch connection line 613 may extend to the pad unit 430, and the pad unit 430 may be connected to a driving circuit unit such as the driving board 410 through the rear surface of the display panel 10.

[0112] According to an embodiment, a static electricity line 614 for preventing static electricity may be further provided in the non-display area NDA The static electricity line 614 may extend to the pad unit 430 .

[0113] In an embodiment, the pad unit 430 of the display panel 10 includes a plurality of pads PD connected to the driving board 410 through the rear surface of the display panel 10. The pads PD include a signal pad electrically connected to the signal line 611, a power pad electrically connected to the power line 612, an electrostatic pad electrically connected to the electrostatic line 614, and a touch driving pad electrically connected to the touch connection line 613.

[0114] According to an embodiment, the signal line 611 may include a gate fan-out line connected to a gate line of the display area DA, a data fan-out line connected to a data line of the display area DA, or an emission fan-out line connected to an emission signal line of the display area DA. The signal line 611 may be disposed in the same layer (or directly on the same layer) as the first anode connection electrode ANDE1 or the second anode connection electrode ANDE2 of the display area DA.

[0115] According to an embodiment, the power line 612 may be a line for supplying driving power to the pixels of the display area DA, and may include a high potential voltage supply line ELVDD and a low potential voltage supply line ELVSS. The power line 612 may be disposed in the same layer (or directly on the same layer) as the first anode connection electrode ANDE1 or the second anode connection electrode ANDE2 of the display area DA.

[0116] refer to Figure 6B and Figure 6C When the display panel 10 is viewed from the rear side (ie, in the fourth direction DR4 ), a plurality of rear contact holes RCT are defined or formed in the non-display area NDA.

[0117] Each of the rear contact holes RCT may be formed by sequentially stacking a first substrate SUB1, a first barrier layer BR1 (refer to Figure 8 ), the second barrier layer BR2 (refer to Figure 8 ) is formed by etching a portion of the first substrate SUB1 at the bottom (or bottom surface) of the substrate SUB of the second substrate SUB2. In an embodiment, for example, each of the rear contact holes RCT may be a region where the first substrate SUB1 is removed in a substrate SUB in which the first substrate SUB1, the first barrier layer BR1, the second barrier layer BR2, and the second substrate SUB2 are sequentially stacked.

[0118] A rear pad electrode 723 electrically connected to the pad unit 430 is disposed in each of the rear contact holes RCT. In an embodiment, for example, the rear pad electrode 723 is exposed toward the rear surface of the display panel 10 (i.e., in the fourth direction DR4) through the rear contact hole RCT. The rear pad electrode 723 is electrically connected to the pad PD of the pad unit 430 through the rear pad line 722. In an embodiment, for example, the rear pad electrode 723 and the pad PD may be connected to each other one-to-one.

[0119] The rear pad electrode 723 exposed through the rear contact hole RCT is bonded to the driving board 410, as will be described later. Figure 7 and Figure 8 Therefore, the driving board 410 may be electrically connected to the pad PD of the pad unit 430 through the rear pad electrode 723 from the rear side of the display panel 10 (ie, in the fourth direction DR4).

[0120] According to the embodiment, Figure 6B As shown in FIG. 1 , each of the rear pad electrodes 723 may extend in the longitudinal direction of the display panel 10 (eg, in the first direction DR1). In addition, the rear pad electrodes 723 may be arranged at intervals in the width direction of the display panel 10 (eg, in the second direction DR2). Figure 6CAs shown in FIG. 1 , each of the rear pad electrodes 723 may extend in an oblique direction inclined at a certain angle from the longitudinal direction (e.g., the first direction DR1) of the display panel 10. In addition, the rear pad electrodes 723 may be arranged at intervals in the width direction (e.g., in the second direction DR2) of the display panel 10. The direction in which each of the rear pad electrodes 723 extends is not limited to Figure 6C The example is shown in the figure and can also be changed into various directions.

[0121] exist Figure 6B and Figure 6C , the length and width of each of the rear pad electrodes 723 are not limited to the illustrated example and may also be changed to various lengths and widths.

[0122] exist FIG. 6A to FIG. 6C In FIG. 6 , a solid line 601 indicates a boundary of the display panel 10 corresponding to any corner of the display panel 10 . FIG. 6A to FIG. 6C In FIG. 6 , a dotted line 602 is an imaginary line indicating a boundary between the non-display area NDA and the display area DA of the display panel 10. FIG. 6A to FIG. 6C In the figure, the dotted line 603 indicates the inorganic layers TFE1 and TFE3 of the encapsulation layer TFEL of the display panel 10 (see Figure 5 ) is set to the line of the boundary. As illustrated, the signal line 611 and the power line 612 for driving the pixels in the display area DA may be located in the inorganic layers TFE1 and TFE3 (see Figure 5 ) is disposed inside the boundary of the non-display area NDA and may extend to the pad unit 430 along the non-display area NDA. That is, the signal line 611 and the power line 612 for driving the pixels in the display area DA are not disposed in the inorganic layers TFE1 and TFE3 (see FIG. Figure 5 ) outside the inorganic packaging area.

[0123] Figure 7 A cross-sectional structure of a portion of a non-display area NDA of a display panel 10 according to an embodiment is illustrated. Figure 8 is a cross-sectional view of a portion of the display panel 10, specifically illustrating Figure 7 The pad unit 430. For example, Figure 7 is along FIG. 6A to FIG. 6C 2 is a cross-sectional view of the non-display area NDA of the display panel 10 taken along line AA′. Figure 8 is along FIG. 6A to FIG. 6C 1 is a cross-sectional view of the non-display area NDA of the display panel 10 taken along line BB′.

[0124] refer to Figure 7 and Figure 8, the display panel 10 according to the embodiment may include a substrate SUB, and the substrate SUB may be a flexible substrate in which a first substrate SUB1, a barrier layer BR, and a second substrate SUB2 are sequentially stacked. In an embodiment, the barrier layer BR may include a first barrier layer BR1 and a second barrier layer BR2, such as Figure 8 As shown in the figure.

[0125] According to an embodiment, the display panel 10 includes a display area DA and a non-display area NDA. In such an embodiment, the substrate SUB may also be divided into the display area DA and the non-display area NDA.

[0126] In the display area DA, the thin film transistor layer TFTL, the light emitting element layer EML, the encapsulation layer TFEL and the touch sensing unit TDU are sequentially disposed, as described above with reference to FIG. Figure 5 In an embodiment, a polarization layer POL may be further disposed on the touch sensing unit TDU.

[0127] The non-display area NDA may include a fan-out wiring area 711 in which a signal line 611 and a power line 612 are arranged, a dam area 712 located outside the fan-out wiring area 711 and including at least one dam DM, an inorganic encapsulation area 713 in which only an inorganic encapsulation layer is formed, and an outermost area 714 located outside the inorganic encapsulation area 713.

[0128] According to an embodiment, the pad unit 430 may be disposed or defined in the outermost region 714. The signal line 611 and the power line 612 disposed in the fan-out wiring region 711 may extend to the pad unit 430 disposed in the outermost region 714 via the dam region 712 and the inorganic encapsulation region 713. Since the encapsulation layer TFEL is not formed in the outermost region 714 of the non-display area NDA, the outermost region 714 may be referred to as, but not limited to, an "unencapsulated region".

[0129] The outermost area 714 is an area where the encapsulation layer TFEL and the polarization layer POL are not disposed, and may be provided with a pad unit 430. The pad unit 430 may be electrically connected to the driving board 410 located on the back side (or rear surface) of the display panel 10 through a rear pad line 722 and a rear pad electrode 723 disposed or built into the display panel 10.

[0130] Now refer to Figure 8 The characteristics of the pad unit 430 are described in more detail.

[0131] refer to Figure 8In an embodiment, each of the pads PD included in the pad unit 430 includes an inorganic layer 820 and a pad electrode 721, which are sequentially stacked on the inner circumferential surface of the pad contact hole PCT defined through the second substrate SUB2 and the second barrier layer BR2 (e.g., formed by etching). Each of the inorganic layers 820 covering the inner circumferential surface of the pad contact hole PCT may be aligned with the inorganic layer (e.g., Figure 5 The corresponding one of the inorganic layers 130 and 140 in the thin film transistor layer TFTL is formed by the same process. That is, the inorganic layer 820 covering the inner peripheral surface of the pad contact hole PCT may be selected from the inorganic layer included in the thin film transistor layer TFTL (for example, Figure 5 At least one of the inorganic layers 130 and 140 in the pad contact hole PCT is disposed in the same layer (or directly on the same layer). In an embodiment, the pad electrode 721 covering the inorganic layer 820 in the pad contact hole PCT may be connected to the thin film transistor (e.g., Figure 5 The source electrode or drain electrode of the first thin film transistor TFT1 in the pad contact hole PCT is formed by the same process. That is, the pad electrode 721 covering the inorganic layer 820 in the pad contact hole PCT can be arranged in the same layer (or directly on the same layer) as the source electrode or drain electrode of the thin film transistor included in the thin film transistor layer TFTL. In another embodiment, for example, the pad electrode 721 can be arranged in the same layer as the reference electrode TFT1. Figure 5 The described first anode connection electrode ANDE1 or the second anode connection electrode ANDE2 is formed by the same process.

[0132] According to an embodiment, pad electrode 721 may be connected to pad connection line 811 extending from fan-out wiring region 711 to the vicinity of pad unit 430. For example, pad connection line 811 may be connected to a gate electrode (eg, Figure 5 The pad connection line 811 is a line disposed in the same layer (or directly disposed on the same layer) as the gate electrode G1 in the thin film transistor layer TFTL. The pad connection line 811 can be electrically connected to the end of the pad electrode 721 through the contact hole CT811 penetrating the inorganic layer 820. In an embodiment, for example, the pad connection line 811 is a line disposed in the same layer (or directly disposed on the same layer) as the gate electrode. However, the present disclosure is not limited thereto. In another embodiment, for example, the pad connection line 811 can be disposed in the same layer (or directly disposed on the same layer) as the source electrode or the drain electrode of the thin film transistor included in the thin film transistor layer TFTL.

[0133] According to an embodiment, each of the pads PD further includes a rear pad line 722 and a rear pad electrode 723, which are connected to the pad electrode 721 and are built into the display panel 10. The rear pad line 722 and the rear pad electrode 723 may be disposed in the same layer as each other (or directly disposed on the same layer as each other). Each of the rear pad line 722 and the rear pad electrode 723 may be a single layer or a multilayer, each of which includes at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof or is made of at least one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0134] A portion of each inorganic layer 820 covering the inner peripheral surface of the pad contact hole PCT is removed from the bottom surface of the pad contact hole PCT to form a middle hole MH. In an embodiment, for example, the middle hole MH may be defined at the center of the pad contact hole PCT. The width of the middle hole MH may be less than the width of the pad contact hole PCT. According to an embodiment, during the process of forming the middle hole MH, the rear pad line 722 may be exposed, and the pad electrode 721 may be placed to cover the rear pad line 722 exposed through the middle hole MH and contact the rear pad line 722 exposed through the middle hole MH. The rear pad line 722 may extend to the rear pad electrode 723. The rear pad electrode 723 may be connected to the driving board 410 under the substrate SUB by passing through (e.g., by etching through) the first substrate SUB1 and defining or forming the rear contact hole RCT. Therefore, the pad electrode 721 disposed in the pad contact hole PCT may be electrically connected to the pad 4101 of the driving board 410 via the rear pad line 722 and the rear pad electrode 723 .

[0135] According to an embodiment, each of the pads PD further includes a protrusion pattern GP disposed between the rear contact hole RCT and the pad defining layer 830 covered by the protrusion pattern GP. The protrusion pattern GP and the pad defining layer 830 can effectively prevent accidental damage to the second substrate SUB2 and lifting of the barrier layer BR from the second substrate SUB2 during the process of forming the rear contact hole RCT and the process of bonding the driving board 410.

[0136] In an embodiment, a process of forming the rear contact hole RCT may include a process of etching the first substrate SUB1 using an ultraviolet laser. In an embodiment, for example, the laser may be irradiated from below the substrate SUB in which the first substrate SUB1, the first barrier layer BR1, the second barrier layer BR2, and the second substrate SUB2 are sequentially stacked, and the laser-irradiated portion of the first substrate SUB1 may be etched. However, a portion of the laser may damage the second substrate SUB2 by passing through an area between adjacent rear pad electrodes 723, or may damage a signal line (e.g., a pad connection line 811) disposed on the second substrate SUB2.

[0137] In an embodiment, the process of bonding the driving board 410 may include a process of bonding the pad 4101 of the driving board 410 to the rear pad electrode 723 using metal ink or an anisotropic conductive film 850. The bonding process using the anisotropic conductive film 850 may include a photocuring process using an infrared laser, and accidental damage to the second substrate SUB2 may occur during the photocuring process.

[0138] In an embodiment of the present disclosure, the pad unit 430 includes a protrusion pattern GP and a pad defining layer 830 to prevent accidental damage to the second substrate SUB2 and lifting of the barrier layer from the second substrate SUB2 during the process of forming the rear contact hole RCT and the process of bonding the driving board 410 .

[0139] According to an embodiment, the pad defining layer 830 is provided to separate the plurality of rear pad electrodes 723 from each other. In an embodiment, for example, the pad defining layer 830 is provided between adjacent rear pad electrodes 723. The pad defining layer 830 includes a laser absorption layer LAL provided on the first substrate SUB1 and a first barrier layer BR1 provided on the laser absorption layer LAL. The pad defining layer 830 defines or is provided with a plurality of first openings OP1 and a second opening OP2 provided between adjacent first openings OP1. The rear pad electrode 723 is provided in the first opening OP1 of the pad defining layer 830. The second opening OP2 of the pad defining layer 830 is aligned with the protrusion pattern GP.

[0140] According to an embodiment, the laser absorption layer LAL included in the pad defining layer 830 may be disconnected in the second opening OP2. The laser absorption layer LAL is disconnected to prevent a short circuit between adjacent rear pad electrodes 723. In an embodiment, the laser absorption layer LAL may include a semiconductor layer, and the semiconductor layer may include amorphous silicon. The amorphous silicon included in the laser absorption layer LAL may be changed to polycrystalline silicon as the laser absorption layer LAL absorbs ultraviolet laser light. Therefore, during the process of etching the first substrate SUB1 to form the rear pad contact hole RCT, the amorphous silicon included in the laser absorption layer LAL may be changed to polycrystalline silicon by ultraviolet laser light. Since polycrystalline silicon has a higher conductivity than amorphous silicon, the laser absorption layer LAL disposed between adjacent rear pad electrodes 723 may need to be disconnected. Therefore, the laser absorption layer LAL may be disconnected in the second opening OP2 of the pad defining layer 830, and the second opening OP2 may be covered by the second barrier layer BR2.

[0141] According to an embodiment, the protrusion pattern GP may be a pattern remaining after a portion of the first substrate SUB1 is etched to expose the rear pad electrode 723. The height (or depth) of the protrusion pattern GP may be lower than the height of the rear contact hole RCT. That is, the height of the protrusion pattern GP along the thickness direction of the substrate SUB may be lower than the height of the rear contact hole RCT along the thickness direction of the substrate SUB.

[0142] According to an embodiment, the protrusion pattern GP may have a tapered shape having a width that decreases toward the bottom (or bottom surface) of the substrate SUB. However, the present disclosure may not be limited to the tapered shape of the protrusion pattern GP. In an embodiment, for example, the shape of the protrusion pattern GP may also be changed, such as referring to Figures 16 to 19 Descriptive.

[0143] Fig. 9 is a flowchart illustrating a method of manufacturing the display device 1 according to the embodiment. Figures 10 to 15 1 is a process cross-sectional view illustrating a method of manufacturing the display device 1 according to the embodiment.

[0144] Fig. 9 At least some of the operations of the manufacturing process illustrated in FIG. 1 may be omitted. Fig. 9 Before or after each of the operations of the manufacturing process illustrated in FIG. 1 , a process of manufacturing the display device 1 described herein or known in the art may be additionally performed.

[0145] Now refer to Figures 9 to 15 A method of manufacturing the display device 1 according to the embodiment is described.

[0146] refer to Fig. 9In an embodiment of the method for manufacturing the display device 1, a laser absorption layer LAL and a first barrier layer BR1 may be deposited on a first substrate SUB1 (operation 911). The first substrate SUB1 may include a flexible material such as polyimide. The laser absorption layer LAL may be a semiconductor layer including amorphous silicon. The first barrier layer BR1 may be an inorganic layer including at least one selected from a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0147] refer to Fig. 9 and Fig.10 In an embodiment of the method for manufacturing the display device 1, the laser absorption layer LAL and the first barrier layer BR1 may be patterned to form a plurality of first openings OP1 and second openings OP2 between the first openings OP1 (operation 912). Accordingly, a pad defining layer 830 including the laser absorption layer LAL and the first barrier layer BR1 may be formed. The pad defining layer 830 may define the first opening OP1 and the second opening OP2. The pad defining layer 830 may be disconnected in the second opening OP2.

[0148] refer to Fig. 9 and Fig.11 In an embodiment of the method of manufacturing the display device 1, the rear pad electrode 723 and the rear pad line 722 may be formed to cover the first opening OP1 (operation 913). In an embodiment, for example, a metal layer may be deposited on the first substrate SUB1 and the pad defining layer 830, and may be partially etched. Accordingly, the rear pad electrode 723 may be placed to cover the first opening OP1 of the pad defining layer 830 and the pad defining layer 830 adjacent to the first opening OP1, and the rear pad line 722 may extend from the rear pad electrode 723.

[0149] refer to Fig. 9 and Fig.12 In an embodiment of the method for manufacturing the display device 1, a second barrier layer BR2 and a second substrate SUB2 may be formed on the rear pad electrode 723, the rear pad line 722, and the first barrier layer BR1 provided with the second opening OP2 (operation 914). The second barrier layer BR2 may be an inorganic layer including at least one selected from a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer. The second substrate SUB2 may include a flexible material such as polyimide.

[0150] refer to Fig. 9 and Fig.13In an embodiment of the method for manufacturing the display device 1, a backplane process and a process for depositing a light-emitting element layer EML may be performed on the second substrate SUB2, and a pad contact hole PCT may be formed during the backplane process (operation 915). The process for forming the pad contact hole PCT may also be performed before the backplane process. The process for forming the pad contact hole PCT may be as follows. A patterned hard mask (not shown) may be formed on the second substrate SUB2, and the hard mask may be used as an etching mask to form the pad contact hole PCT of the pad unit 430 in a portion of the non-display area NDA. The backplane process may be a process for forming a thin film transistor layer TFTL. In the backplane process, a signal line 611, a power line 612, and a pad electrode 721 for driving a pixel in the display area may be formed. In addition, in the backplane process, an inorganic layer 820 covering the inner peripheral surface of the pad contact hole PCT and a middle hole MH in which a portion of each inorganic layer 820 is etched may be formed.

[0151] According to an embodiment, the pad electrode 721 may be connected to a pad connection line 811 extending from the fan-out wiring region 711 to the vicinity of the pad unit 430. For example, the pad connection line 811 may be a line disposed in the same layer (or directly disposed on the same layer) as the gate electrode of the thin film transistor included in the thin film transistor layer TFTL. The pad connection line 811 may be electrically connected to the end of the pad electrode 721 through a contact hole CT811 formed by passing through the inorganic layer 820. In the illustrated embodiment, the pad connection line 811 is a line disposed in the same layer (or directly disposed on the same layer) as the gate electrode. However, the present disclosure is not limited thereto. For example, the pad connection line 811 may also be disposed in the same layer (or directly disposed on the same layer) as the source electrode or the drain electrode of the thin film transistor included in the thin film transistor layer TFTL.

[0152] According to an embodiment, the pad electrode 721 may be formed to cover the back pad line 722 exposed through the middle hole MH during the backplane process.

[0153] refer to Fig. 9 and Fig.14 In an embodiment of the method for manufacturing the display device 1, a rear contact hole RCT exposing the rear pad electrode 723 and a protrusion pattern GP covering the laser absorption layer LAL may be formed by etching the first substrate SUB1 (operation 916). The process of forming the protrusion pattern GP may be as follows. A patterned hard mask (not shown) is formed on the first substrate SUB1, and the rear contact hole RCT exposing the rear pad electrode 723 is formed in a portion of the non-display area NDA using the hard mask (not shown) as an etching mask. Here, the portion of the first substrate SUB1 that is not etched by the hard mask (not shown) may become the protrusion pattern GP.

[0154] According to an embodiment, each of the protrusion patterns GP may correspond to a region between adjacent back pad electrodes 723 and may cover the entirety or at least a portion of the laser absorption layer LAL of the pad defining layer 830 disposed between adjacent back pad electrodes 723 .

[0155] refer to Fig. 9 and Fig.15 In an embodiment of the method for manufacturing the display device 1, the rear pad electrode 723 and the driving board 410 may be combined through the rear contact hole RCT (operation 917). In an embodiment, for example, the driving board 410 may be a film-type board 410 such as an FPCB. In such an embodiment, the bump (i.e., pad 4101) of the driving board 410 may be attached to the rear contact hole RCT using an adhesive (not shown) such as a pressure sensitive adhesive (PSA) or an optically clear adhesive (OCA). The driving board 410 is not limited to a film-type board such as an FPCB, and may also be a flexible board for mounting a COP-type integrated circuit. In another embodiment, for example, the flexible board may be a substrate formed by the same process as the substrate SUB of the display panel 10. In an embodiment, for example, the pad 4101 of the driving board 410 is bonded to the rear pad electrode 723 using an anisotropic conductive film 850, such as Fig.15 However, the present disclosure is not limited thereto. In another embodiment, for example, the pad 4101 of the driving board 410 may be electrically connected to the rear pad electrode 723 using conductive ink or solder.

[0156] In the display device 1 according to the embodiment, since a plurality of protrusion patterns GP are formed between the rear contact holes RCT, a short circuit between adjacent rear pad electrodes 723 can be effectively prevented during a process of bonding the driving board 410. In the embodiment of the present disclosure, since a short circuit can be prevented while reducing a gap (i.e., a spacing) between the rear pad electrodes 723, the integration of the pad unit 430 can be increased.

[0157] Fig.16 4 is a cross-sectional view of the pad unit 430 according to an embodiment in which a groove 1611 is formed in each protrusion pattern GP.

[0158] In addition to the groove 1611 defined or formed in each protrusion pattern GP, Fig.16 Examples and Figure 8 The embodiments are basically the same. Fig.16 In the description of the embodiment of Figure 8 Elements and Features of the Embodiments Any repeated detailed description of the same elements and features will be omitted.

[0159] refer to Fig.16In an embodiment, each protrusion pattern GP may include a groove 1611 connected to the second opening OP2 of the pad defining layer 830. In an embodiment, for example, the groove 1611 may be formed by etching each protrusion pattern GP to a predetermined depth. In such an embodiment, a second barrier layer BR2 may be disposed in the groove 1611 of each protrusion pattern GP to cover the groove 1611.

[0160] exist Fig.16 In the embodiment of FIG. 5 , since the groove 1611 is formed inside each protrusion pattern GP and the second barrier layer BR2 covers the inner circumferential surface of the groove 1611 , the protrusion pattern GP may be designed to be more robust.

[0161] Fig.17 is a cross-sectional view of the pad unit 430 according to an embodiment in which the protrusion pattern GP has a dome shape.

[0162] In addition to the protrusion pattern GP having a dome shape, Fig.17 Examples and Figure 8 The embodiments are basically the same. Fig.17 In the description of the embodiment of Figure 8 Elements and Features of the Embodiments Any repeated detailed description of the same elements and features will be omitted.

[0163] refer to Fig.17 In an embodiment, the protrusion pattern GP may have a dome shape instead of a cone shape. In an embodiment, for example, the protrusion pattern GP may have a dome shape having a bent surface facing the bottom (or bottom surface) of the substrate SUB.

[0164] Fig.18 is a cross-sectional view of a pad unit 430 according to an embodiment in which the laser absorption layer LAL is disposed on the second barrier layer BR2.

[0165] In addition to the laser absorption layer LAL being disposed on the second barrier layer BR2, Fig.18 Examples and Figure 8 The embodiments are basically the same. Fig.18 In the description of the embodiment of Figure 8 Elements and Features of the Embodiments Any repeated detailed description of the same elements and features will be omitted.

[0166] refer to Fig.18 In an embodiment, the laser absorption layer LAL may be disposed on the second barrier layer BR2 and may overlap with the protrusion pattern GP. Fig.18As shown in FIG. 1 , since the laser absorption layer LAL is disposed on the second barrier layer BR2 , a short circuit caused by the adjacent rear pad electrodes 723 being electrically connected to each other through the laser absorption layer LAL can be prevented.

[0167] According to the embodiment, Fig.18 As shown in , the laser absorption layer LAL may overlap the protrusion pattern GP but may not be disconnected between adjacent rear pad electrodes 723. That is, the laser absorption layer LAL may be positioned to correspond to the area between adjacent rear pad electrodes 723 but may be continuous without being disconnected.

[0168] Fig.19 is a cross-sectional view of the pad unit 430 according to an embodiment in which each protrusion pattern GP is coated with a protection layer 1911 .

[0169] In addition to the protective layer 1911 being coated on the surface of each protrusion pattern GP, Fig.19 Examples and Figure 8 The embodiments are basically the same. Fig.19 In the description of the embodiment of Figure 8 Elements and Features of the Embodiments Any repeated detailed description of the same elements and features will be omitted.

[0170] refer to Fig.19 In an embodiment, a protective layer 1911 may be coated on the surface of each protrusion pattern GP. The protective layer 1911 may protect, for example, the protrusion pattern GP and the laser absorption layer LAL, the first barrier layer BR1, the second barrier layer BR2, and the second substrate SUB2 overlapping the protrusion pattern GP from the influence of laser. The protective layer 1911 may include, for example, a material that absorbs or reflects infrared laser.

[0171] In the display device according to the embodiment, the area of ​​the display region can be increased by reducing the area of ​​the non-display region.

[0172] The present invention should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art.

[0173] While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made in embodiments of the invention without departing from the spirit or scope of the invention as defined by the claims.

Claims

1. A display device, comprising: A substrate, comprising a first substrate, a first barrier layer, a second barrier layer, and a second substrate sequentially stacked in the substrate; A thin film transistor layer, a light emitting element layer, a packaging layer and a touch sensing unit are sequentially stacked on the second substrate; as well as a pad unit disposed in a non-display area of ​​the substrate and including a plurality of pads connected to a driving board disposed on the first substrate, Each of the plurality of pads comprises: an inorganic layer and a pad electrode, sequentially stacked on an inner peripheral surface of a pad contact hole defined by the second substrate and the second barrier layer; a rear pad line disposed on the first barrier layer and connected to the pad electrode through a middle hole defined by the inorganic layer passing through an interior of the pad contact hole; and a rear pad electrode extending from the rear pad line and connected to the driving board under the substrate through a rear contact hole defined through the first substrate, A pad defining layer and a protrusion pattern covering the pad defining layer from below the substrate are disposed between adjacent rear pad electrodes, wherein the pad defining layer includes a laser absorbing layer and the first blocking layer.

2. The display device according to claim 1, wherein: The laser absorption layer is disposed between the first substrate and the first blocking layer.

3. The display device according to claim 1, wherein: A plurality of first openings and second openings disposed between adjacent first openings are defined by the pad defining layer, and The rear pad electrode is disposed in the first opening.

4. The display device according to claim 3, wherein: The laser absorption layer of the pad defining layer is disconnected in the second opening.

5. The display device according to claim 4, wherein: The second opening of the pad defining layer is covered by the second barrier layer.

6. The display device according to claim 1, wherein: The laser absorption layer includes a semiconductor layer.

7. The display device according to claim 6, wherein: The semiconductor layer of the laser absorption layer includes amorphous silicon.

8. The display device according to claim 1, wherein: A depth of the protrusion pattern in a thickness direction of the substrate is lower than a depth of the rear contact hole in the thickness direction of the substrate.

9. The display device according to claim 1, wherein: The protrusion pattern has a tapered shape having a width that decreases toward a bottom surface of the substrate.

10. The display device according to claim 1, wherein: The protrusion pattern has a dome shape having a bent surface facing a bottom surface of the substrate.

11. The display device according to claim 3, wherein: A groove is defined in the protrusion pattern to be connected to the second opening of the pad defining layer, and The grooves of the protrusion pattern are covered by the second barrier layer.

12. A display device, comprising: A substrate, comprising a first substrate, a first barrier layer, a second barrier layer, and a second substrate sequentially stacked in the substrate; A thin film transistor layer, a light emitting element layer, a packaging layer and a touch sensing unit are sequentially stacked on the second substrate; as well as a pad unit disposed in a non-display area of ​​the substrate and including a plurality of pads connected to a driving board disposed on the first substrate, Each of the plurality of pads comprises: an inorganic layer and a pad electrode, sequentially stacked on an inner peripheral surface of a pad contact hole defined by the second substrate and the second barrier layer; a rear pad line disposed on the first barrier layer and connected to the pad electrode through a middle hole defined by the inorganic layer passing through an interior of the pad contact hole; and a rear pad electrode extending from the rear pad line and connected to the driving board under the substrate through a rear contact hole defined through the first substrate, A pad defining layer defined by the patterned portion of the first barrier layer, a laser absorbing layer disposed on the second barrier layer to overlap the pad defining layer, and a protrusion pattern covering the pad defining layer from below the substrate are disposed between adjacent rear pad electrodes.

13. The display device according to claim 12, wherein: A plurality of first openings and second openings disposed between adjacent first openings are defined by the pad defining layer, and The rear pad electrode is disposed in the first opening.

14. The display device according to claim 12, wherein: The laser absorption layer includes a semiconductor layer.

15. The display device according to claim 14, wherein: The semiconductor layer of the laser absorption layer includes amorphous silicon.

16. The display device according to claim 12, wherein: A depth of the protrusion pattern in a thickness direction of the substrate is lower than a depth of the rear contact hole in the thickness direction of the substrate.

17. The display device according to claim 12, wherein: The protrusion pattern has a tapered shape having a width that decreases toward a bottom surface of the substrate.

18. The display device according to claim 12, wherein: The inorganic layer is provided on the same layer as at least one selected from the inorganic layers included in the thin film transistor layer.

19. The display device according to claim 12, wherein: The pad electrode is arranged on the same layer as the source electrode or the drain electrode of the thin film transistor layer.

20. The display device according to claim 12, wherein: The pad unit is disposed in an outermost area of ​​the non-display area where the encapsulation layer is not disposed.

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