Display panel, manufacturing method thereof and display device

Abstract

The invention is suitable for the technical field of display equipment, and provides a display panel and a manufacturing method thereof and a display device.The display panel comprises a substrate, a first metal layer, a second metal layer and a first electrode layer, the first metal layer is arranged on one side of the substrate and comprises a plurality of first wires, and the second metal layer is arranged on the other side of the substrate; the second metal layer is arranged on the side, away from the substrate, of the first metal layer and comprises a second wire, the first electrode layer is arranged on the side, away from the substrate, of the second metal layer and comprises a plurality of electrode blocks, the electrode blocks are electrically connected with the first wire, and the orthographic projection of the second wire on the surface of the substrate is larger than the orthographic projection of the second wire on the surface of the substrate. Orthographic projections of the electrode blocks on the surface of the substrate are arranged at intervals. The display panel is relatively simple in overall structure and convenient to process, the production efficiency of the display panel is improved, and the production cost is reduced.

Description

Technical Field

[0001] The present application belongs to the technical field of display devices, and in particular, relates to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] With the development of display technology, OLED (Organic Light Emitting Diode) display panels have been widely used due to their advantages such as lighter weight, higher brightness, lower power consumption, faster response and higher definition.

[0003] In the OLED display panel of the related art, in order to further reduce the thickness of the display panel, a COE (Color Filter On Encapsulation) architecture can be adopted, that is, a color filter film is set on the encapsulation layer to replace the polarizer. However, in the display panel adopting the COE architecture, it requires a higher degree of flatness, which is easy to reduce production efficiency and increase production costs. Summary of the invention

[0004] In view of this, the embodiments of the present application provide a display panel and a manufacturing method thereof, and a display device to solve the problem that the current display panel using a COE architecture requires a higher degree of flatness, which easily reduces production efficiency and increases production costs.

[0005] A first aspect of an embodiment of the present application provides a display panel, comprising: a substrate, a first metal layer, a second metal layer and a first electrode layer, wherein the first metal layer is arranged on one side of the substrate, the first metal layer comprises a plurality of first routing lines, the second metal layer is arranged on a side of the first metal layer away from the substrate, the second metal layer comprises a second routing line, the first electrode layer is arranged on a side of the second metal layer away from the substrate, the first electrode layer comprises a plurality of electrode blocks, each of the electrode blocks is electrically connected to the first routing line, and an orthographic projection of the second routing line on the surface of the substrate is spaced apart from an orthographic projection of the electrode block on the surface of the substrate.

[0006] The above-mentioned display panel, by making the electrode block in the first electrode layer electrically connected to the first wiring in the first metal layer relatively far from the first electrode layer, and the orthographic projection of the second wiring in the second metal layer relatively close to the first electrode layer on the substrate surface is arranged at intervals from the orthographic projection of the electrode block on the substrate surface, can avoid the problem of unevenness or tilt of the electrode block caused by the second wiring being arranged below the electrode block, improve the flatness of the first electrode layer, and thus enhance the display effect of the display panel. The overall structure of the display panel is relatively simple and easy to process, which improves the production efficiency of the display panel and reduces the production cost. Moreover, compared with the solution of adding a flat layer below the first electrode layer in the related art, the thickness of the display panel is reduced, which is conducive to miniaturization, and can also reduce the influence of the flat layer on the light transmittance, and the requirements for the wiring opening inside the display panel are reduced, which is conducive to increasing the wiring space to improve the pixel density in the display panel.

[0007] In one embodiment, the display panel further includes a first insulating layer, the first insulating layer is disposed between the first metal layer and the second metal layer, the first insulating layer is provided with a first via hole, and at least one of the second traces is electrically connected to the first trace through the first via hole. By providing the first via hole on the first insulating layer, the second trace is electrically connected to the first trace through the first via hole, thereby ensuring the insulation performance between the second metal layer and the first metal layer and facilitating the mutual connection between the second trace and the first trace.

[0008] In one embodiment, the orthographic projection of the first via hole on the substrate surface is spaced apart from the orthographic projection of the electrode block on the substrate surface. Since the orthographic projection of the second wiring in the second metal layer on the substrate surface is spaced apart from the orthographic projection of the electrode block on the substrate surface, such a setting enables the position of the first via hole to be set corresponding to the second wiring, without affecting the electrical connection between the second wiring and the first wiring, and also without affecting the flatness of the first electrode layer.

[0009] In one embodiment, the display panel further includes a second insulating layer, the second insulating layer is provided between the second metal layer and the first electrode layer, a plurality of second vias are provided on the second insulating layer, a third via correspondingly connected to the second via is provided on the first insulating layer, the third via and the first via are spaced apart from each other, and each of the electrode blocks is electrically connected to the first wiring through the second via and the third via. By providing the second via on the second insulating layer and the third via correspondingly connected to the second via on the first insulating layer, the electrode block can be electrically connected to the first wiring through the second via and the third via, so that the insulation performance between the first electrode layer and the second metal layer can be ensured, and the mutual connection between the electrode block and the first wiring is facilitated, and the setting position of the second wiring is not affected.

[0010] In one embodiment, the second wiring has a mesh structure and includes a plurality of grid patterns, and the grid patterns are at least partially arranged around the electrode block. In this way, the plurality of grid patterns in the second wiring can reduce the circuit load, thereby reducing the power consumption of the display panel when in use, improving the heating problem, and enhancing the user experience.

[0011] In one embodiment, the second line is a first signal line, and the first signal line is used to provide a first power signal to the electrode block. The second line can be used as a first signal line in a display panel to provide a first power signal to the electrode block, and can be flexibly set according to actual use requirements.

[0012] In one embodiment, the second wiring includes a plurality of first signal lines and a plurality of second signal lines, the first signal lines and the second signal lines transmit different signals, and the first signal lines and the second signal lines are spaced apart from each other and arranged in an interlaced manner in the row direction. The first signal lines and the second signal lines are spaced apart from each other and arranged in an interlaced manner in the row direction, which can reduce the circuit load between the two signal lines, thereby reducing the power consumption of the display panel when in use, improving the heating problem, and enhancing the user experience.

[0013] In one embodiment, the first signal line is a working voltage signal line, and the second signal line is a common voltage signal line; or the first signal line is a common voltage signal line, and the second signal line is a working voltage signal line; wherein the display panel further comprises a light-emitting element, the electrode block is an anode of the light-emitting element, the working voltage signal line is used to provide a first power signal to the electrode block, and the common voltage signal line is used to provide a second power signal to a cathode of the light-emitting element. The first signal line and the second signal line in the second routing can be used as a working voltage signal line and a common voltage signal line in the display panel, respectively, and can be flexibly set according to different usage requirements.

[0014] The second aspect of the embodiments of the present application provides a method for manufacturing a display panel as described in the first aspect, including: forming a first metal layer on one side of a substrate; patterning the first metal layer to form a plurality of first wirings; forming a second metal layer on a side of the first metal layer away from the substrate; patterning the second metal layer to form a second wiring; forming a first electrode layer on a side of the second metal layer away from the substrate; patterning the first electrode layer to form a plurality of electrode blocks, each of the electrode blocks being electrically connected to the first wiring, and an orthographic projection of the second wiring on the surface of the substrate being spaced apart from the orthographic projection of the electrode block on the surface of the substrate.

[0015] The display panel manufactured by the above manufacturing method can avoid the problem of unevenness or tilt of the electrode block caused by the second wiring being arranged under the electrode block, improve the flatness of the first electrode layer, and thus enhance the display effect of the display panel. The overall structure of the display panel is relatively simple and easy to process, which improves the production efficiency of the display panel and reduces the production cost. Moreover, compared with the solution of adding a flat layer under the first electrode layer in the related art, the thickness of the display panel is reduced, which is conducive to miniaturization, and can also reduce the influence of the flat layer on the light transmittance, and reduce the requirements for the wiring opening inside the display panel, which is conducive to increasing the wiring space to improve the pixel density in the display panel.

[0016] A third aspect of the embodiments of the present application provides a display device, comprising the display panel as described in the first aspect.

[0017] It can be understood that the beneficial effects of the third aspect can be found in the relevant descriptions of the first and second aspects, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0019] Figure 1 is a schematic diagram of a cross-sectional structure of a display panel in the related art;

[0020] Figure 2 is a schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present application;

[0021] Figure 3 is a schematic cross-sectional structure diagram of a display panel provided in another embodiment of the present application;

[0022] Figure 4is a schematic diagram of the relative relationship between the second wiring and the electrode block in the display panel provided by the embodiment of the present application;

[0023] Figure 5 is a schematic diagram of the relative relationship between the second wiring and the electrode block in the display panel provided by another embodiment of the present application;

[0024] Figure 6 is a flow chart of a method for manufacturing a display panel provided in an embodiment of the present application;

[0025] Figure 7 It is a schematic diagram of the overall structure of the display device provided in an embodiment of the present application.

[0026] Figure Number:

[0027] 10. Display device;

[0028] 100. Display panel;

[0029] 110: substrate, 111: semiconductor layer, 112: gate, 113: source and drain, 114: interlayer insulating layer;

[0030] 120, a first metal layer, 121, a first routing line;

[0031] 130, a second metal layer, 131, a second routing line, 1311, a grid pattern, 1311a, a first grid line, 1311b, a second grid line, 1312, a first signal line, 1313, a second signal line;

[0032] 140, a first electrode layer, 141, an electrode block;

[0033] 150, a first insulating layer, 151, a first via hole, 152, a third via hole;

[0034] 160, a second insulating layer, 161, a second via hole;

[0035] 170, pixel definition layer;

[0036] 180, light emitting element, 181, light emitting portion, 182, second electrode;

[0037] x, first direction, y, second direction. DETAILED DESCRIPTION

[0038] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0039] It should also be understood that the term “and / or” used in the specification and appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0040] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0041] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0042] In addition, in the description of the present application specification and the appended claims, the terms "first", "second", "third", etc. are only used to distinguish the descriptions and cannot be understood as indicating or implying relative importance.

[0043] References to "one embodiment" or "some embodiments" etc. described in the specification of this application mean that one or more embodiments of the present application include specific features, structures or characteristics described in conjunction with the embodiment. Therefore, the statements "in one embodiment", "in some embodiments", "in some other embodiments", "in some other embodiments", etc. that appear in different places in this specification do not necessarily refer to the same embodiment, but mean "one or more but not all embodiments", unless otherwise specifically emphasized in other ways. The terms "including", "comprising", "having" and their variations all mean "including but not limited to", unless otherwise specifically emphasized in other ways. "Multiple" means two or more.

[0044] like Figure 1As shown, the display panel 1 in the related art includes a substrate 11, a first metal layer 12, a second metal layer 13 and a first electrode layer 14 stacked on the substrate 11 in sequence, wherein a first flat layer 15 is provided between the first metal layer 12 and the second metal layer 13, the second metal layer 13 is electrically connected to the first metal layer 12 through the first flat layer 15, a second flat layer 16 and a third flat layer 17 are provided between the second metal layer 13 and the first electrode layer 14, and the first electrode layer 14 is electrically connected to the second metal layer 13 through the second flat layer 16 and the third flat layer 17. In the display panel 1, due to the existence of the second metal layer 13, the second metal layer 13 disposed below the first electrode layer 14 will affect the flatness of the first electrode layer 14, therefore, at least two flat layers such as the second flat layer 16 and the third flat layer 17 need to be provided between the second metal layer 13 and the first electrode layer 14 to ensure the flatness of the first electrode layer 14. However, this may cause problems such as film peeling and cracking in the display panel 1, resulting in a low product yield. In addition, the product is also thick, which is not conducive to miniaturization.

[0045] To at least partially address the above issues, see Figures 2 to 5 An embodiment of the present application provides a display panel 100 , which includes: a substrate 110 , a first metal layer 120 , a second metal layer 130 and a first electrode layer 140 .

[0046] Specifically, the substrate 110 is used to support and carry other film layers in the display panel 100. For example, the substrate 110 can be made of materials such as glass and polyimide (PI). In some embodiments, the substrate 110 can also include an array substrate, on which a driving circuit for driving the light-emitting elements in the display panel 100 to emit light is provided. Under the drive of the driving circuit, different light-emitting elements in the display area of ​​the display panel 100 can be excited to emit light of different colors, so that the display panel 100 can achieve a colorful display effect.

[0047] Specifically, Figure 3 As shown, the array substrate includes a semiconductor layer 111, a gate 12, and a source-drain electrode 113. The semiconductor layer 111 includes an active layer, the gate 112 is located on one side of the semiconductor layer 111, and the orthographic projection of the gate 112 on the surface of the semiconductor layer 111 overlaps with the orthographic projection of the active layer on the surface of the semiconductor layer 111. An interlayer insulating layer 114 is provided between the semiconductor layer 111 and the gate 112. The source-drain electrode 113 includes a source electrode and a drain electrode arranged at intervals, and the source electrode and the drain electrode are connected to the active layer through a via hole penetrating the interlayer insulating layer 114.

[0048] The first metal layer 120 is arranged on one side of the substrate 110, and the second metal layer 130 is arranged on the side of the first metal layer 120 away from the substrate 110, wherein the first metal layer 120 and the second metal layer 130 may include a variety of different types of signal lines to be electrically connected to the driving circuit in the display panel respectively, so as to transmit various different signals, for example, the gate signal line is used to transmit the scanning signal Gate to the driving circuit, the data signal line is used to transmit the data signal Data to the driving circuit, the voltage signal line is used to provide the working voltage for the light-emitting element, etc.

[0049] The first metal layer 120 includes a plurality of first wirings 121 , and the plurality of first wirings 121 may be spaced apart from each other. The specific number of the first wirings 121 , the extension direction, the arrangement of the plurality of first wirings 121 , etc. are not limited herein.

[0050] The second metal layer 130 is disposed on the side of the first metal layer 120 away from the substrate 110, and a spacer layer may be disposed between the second metal layer 130 and the first metal layer 120 to prevent the two from directly contacting each other. The second metal layer 130 includes second traces 131, and the specific number, extension direction, and arrangement of the second traces 131 are not limited herein.

[0051] The light-emitting element 180 in the display panel 100 may be a red light-emitting element, a green light-emitting element, a blue light-emitting element or a white light-emitting element, etc., which is not limited here. Specifically, the light-emitting element 180 may include a multilayer structure. For example, the light-emitting element 180 may include a stacked hole injection part, a hole transport part, a light-emitting part, an electron transport part, an electron injection part (not shown in the figure), etc., which realize light emission under the action of an electric field. The first electrode layer 140 can cooperate with other electrode layers in the display panel to provide the light-emitting element with the electric field required for its light emission. The first electrode layer 140 may include a positive electrode or a negative electrode. Correspondingly, the electrode layer cooperating with the first electrode layer 140 may include a negative electrode or a positive electrode. In this way, an electric field can be generated between the positive electrode and the negative electrode, thereby driving the light-emitting element to emit light.

[0052] The first electrode layer 140 is disposed on the side of the second metal layer 130 away from the substrate 110, and a spacer layer can be disposed between the first electrode layer 140 and the second metal layer 130 to prevent the two from directly contacting each other. The first electrode layer 140 includes a plurality of electrode blocks 141, and the plurality of electrode blocks 141 can be spaced apart from each other to drive different light-emitting elements to emit light respectively. The specific number of electrode blocks 141, the setting position, the arrangement of the plurality of electrode blocks 141, etc. are not limited here. Each electrode block 141 is electrically connected to the first wiring 121 respectively, so that signal transmission can be realized between the first electrode layer 140 and the first metal layer 120, and the electrode block 141 can be electrically connected to the first wiring 121 by means of wires or other conductive elements.

[0053] In order to reduce the influence of the second metal layer 130 which is relatively close to the first electrode layer 140 on the flatness of the first electrode layer 140, the orthographic projection of the second wiring 131 on the surface of the substrate 110 is spaced apart from the orthographic projection of the electrode block 141 on the surface of the substrate 110. The orthographic projection of the second wiring 131 on the surface of the substrate 110, i.e., the projection of the second wiring 131 on the surface of the substrate 110 in a direction perpendicular to the surface of the substrate 110, and the orthographic projection of the electrode block 141 on the surface of the substrate 110, i.e., the projection of the electrode block 141 on the surface of the substrate 110 in a direction perpendicular to the surface of the substrate 110, are spaced apart from each other and do not intersect or overlap. That is, the second wiring 131 is arranged to avoid the electrode block 141. In this way, the problem of unevenness or tilt of the electrode block 141 caused by the second wiring 131 being arranged below the electrode block 141 can be avoided, thereby improving the flatness of the first electrode layer 140.

[0054] The display panel 100 of the embodiment of the present application electrically connects the electrode block 141 in the first electrode layer 140 to the first wiring 121 in the first metal layer 120 which is relatively far from the first electrode layer 140, and the orthographic projection of the second wiring 131 in the second metal layer 130 which is relatively close to the first electrode layer 140 on the surface of the substrate 110 is spaced apart from the orthographic projection of the electrode block 141 on the surface of the substrate 110. In this way, the problem of unevenness or tilt of the electrode block 141 due to the second wiring 131 being arranged below the electrode block 141 can be avoided, the flatness of the first electrode layer 140 is improved, and the display effect of the display panel 100 is enhanced. The overall structure of the display panel 100 is relatively simple and easy to process, thereby improving the production efficiency of the display panel 100 and reducing the production cost. Moreover, compared with the solution of adding a plurality of flat layers under the first electrode layer 140 in the related art, the thickness of the display panel 100 is reduced, which is conducive to miniaturization. It can also reduce the influence of the flat layer on the light transmittance, and reduce the requirements for the internal wiring openings of the display panel 100, which is conducive to increasing the wiring space, so as to improve the pixel density in the display panel 100.

[0055] As described above, a spacer layer may be provided between the second metal layer 130 and the first metal layer 120 so that the two are not in direct contact. Figure 2 As shown, in some embodiments, optionally, the display panel 100 also includes a first insulating layer 150, the first insulating layer 150 is arranged between the first metal layer 120 and the second metal layer 130, and a first via hole 151 is provided on the first insulating layer 150, and at least one second wiring 131 is electrically connected to the first wiring 121 through the first via hole 151.

[0056] The first insulating layer 150 may be a single-layer structure made of inorganic materials, a single-layer structure made of organic materials, or a multi-layer structure made of organic materials and inorganic materials, which is not limited here. The first via holes 151 on the first insulating layer 150 are used for the second wiring 131 to pass through. The shape, size, number, and location of the first via holes 151 are not limited. By providing the first via holes 151 on the first insulating layer 150, the second wiring 131 is electrically connected to the first wiring 121 through the first via holes 151, so that the second metal layer 130 and the first metal layer 120 can be isolated from each other, and the second wiring 131 and the first wiring 121 can be easily connected to each other.

[0057] Since the orthographic projection of the second routing line 131 on the surface of the substrate 110 is spaced apart from the orthographic projection of the electrode block 141 on the surface of the substrate 110, in order to facilitate the second routing line 131 to pass through the first via 131, in some embodiments, optionally, the orthographic projection of the first via 151 on the surface of the substrate 110 is spaced apart from the orthographic projection of the electrode block 141 on the surface of the substrate 110.

[0058] Since the orthographic projection of the second wiring 131 in the second metal layer 130 on the surface of the substrate 110 is spaced apart from the orthographic projection of the electrode block 141 on the surface of the substrate 110, such a configuration enables the position of the first via 151 to be configured corresponding to the second wiring 131, without affecting the electrical connection between the second wiring 131 and the first wiring 121, and without affecting the flatness of the first electrode layer 140.

[0059] As described above, a spacer layer may be provided between the first electrode layer 140 and the second metal layer 130 so that the two are not in direct contact. Figure 2 As shown, in some embodiments, optionally, the display panel 100 also includes a second insulating layer 160, the second insulating layer 160 is arranged between the second metal layer 130 and the first electrode layer 140, a plurality of second vias 161 are provided on the second insulating layer 160, and a third via 152 corresponding to and connected to the second via 161 is also provided on the first insulating layer 150, the third via 152 and the first via 151 are spaced apart from each other, and each electrode block 141 is electrically connected to the first trace 121 through the second via 161 and the third via 152.

[0060] The second insulating layer 160 may be a single-layer structure made of an inorganic material, a single-layer structure made of an organic material, or a multi-layer structure made of an organic material and an inorganic material, which is not limited here. The second via 161 on the second insulating layer 160 and the third via 152 on the first insulating layer 150 are used for the connection line of the electrode block 141 to pass through. The shape, size, number, setting position, etc. of the second via 161 are not limited. The shape, size, number, setting position, etc. of the third via 152 are all set corresponding to the second via 161. By setting the second via 161 on the second insulating layer 160 and setting the third via 152 on the first insulating layer 150 that is connected to the second via 161, the electrode block 141 can be electrically connected to the first wiring 121 through the second via 161 and the third via 152. In this way, the insulation performance between the first electrode layer 140 and the second metal layer 130 can be ensured, and the mutual connection between the electrode block 141 and the first wiring 121 is facilitated, and the setting position of the second wiring 131 is not affected.

[0061] The specific number, extension direction, and arrangement of the second wiring 131 are not limited. Figure 2 Also see Figure 4 In some embodiments, optionally, the second routing line 131 has a mesh structure and includes a plurality of grid patterns 1311, each grid pattern 1311 includes a first grid line 1311a and a second grid line 1311b, the first grid line 1311a is arranged along a first direction x parallel to the surface of the substrate 110, the second grid line 1311b is arranged along a second direction y parallel to the surface of the substrate 110, the first direction x intersects with the second direction y, the first grid line 1311a and the second grid line 1311b are connected and enclose a grid pattern 1311, and the grid pattern 1311 is arranged at least partially around the electrode block 141.

[0062] The first grid lines 1311a arranged along the first direction x and the second grid lines 1311b arranged along the second direction y are staggered and connected to each other, enclosing a plurality of grid patterns 1311 connected to each other, and the grid patterns 1311 are at least partially arranged around the electrode block 141 so as not to affect the flatness of the electrode block 141. With such an arrangement, the plurality of grid patterns 1311 connected to each other in the second routing 131 can reduce the circuit load, thereby reducing the power consumption of the display panel 100 when in use, improving the heating problem, and enhancing the user experience.

[0063] Based on the above embodiment, optionally, the second wiring 131 is a first signal line 1312, and the first signal line 1312 is used to provide a first power signal to the electrode block 141. The second wiring 131 can be used as the first signal line 1312 in the display panel 100 to provide a first power signal to the electrode block 141, and can be flexibly set according to actual use requirements.

[0064] Please combine Figure 2 Also see Figure 5 In some other embodiments, optionally, the second wiring 131 includes a plurality of first signal lines 1312 and a plurality of second signal lines 1313, the first signal lines 1312 and the second signal lines 1313 transmit different signals, and the first signal lines 1312 and the second signal lines 1313 are spaced apart from each other and arranged in an interlaced manner in the row direction. At this time, the first signal lines 1312 and the second signal lines 1313 are not connected to each other, but are spaced apart from each other, and are arranged in an interlaced manner in the form of one first signal line 1312, one second signal line 1313, one first signal line 1312, and one second signal line 1313. The first signal lines 1312 and the second signal lines 1313 are spaced apart from each other and arranged in an interlaced manner in the row direction, which can reduce the circuit load between the two signal lines, thereby reducing the power consumption of the display panel 100 when in use, improving the heating problem, and enhancing the user experience.

[0065] On the basis of the above embodiments, optionally, in some embodiments, optionally, the first signal line 1312 is a working voltage signal line (VDD), and the second signal line 1313 is a common voltage signal line (VSS); or the first signal line 1312 is a common voltage signal line (VSS), and the second signal line 1313 is a working voltage signal line (VDD). The first signal line 1312 and the second signal line 1313 in the second wiring 131 can be used as a working voltage signal line and a common voltage signal line in the display panel 100, respectively, and can be flexibly set according to different usage requirements.

[0066] Among them, the display panel 100 also includes a pixel definition layer 170 and a light-emitting element 180, the light-emitting element 180 includes a light-emitting portion 181 and a second electrode 182, wherein the electrode block 141 is the anode of the light-emitting element 180, the second electrode 182 is the cathode of the light-emitting element 180, the working voltage signal line is used to provide a first power signal to the electrode block 141, and the common voltage signal line is used to provide a second power signal to the cathode of the light-emitting element 180.

[0067] Based on the same invention concept, please combine Figures 2 to 5 Also see Figure 6 The present application also provides a method for manufacturing the display panel 100 in any one of the above embodiments, the manufacturing method comprising the following steps:

[0068] S102 , forming a first metal layer 120 on one side of the substrate 110 .

[0069] S104 , patterning the first metal layer 120 to form a plurality of first wirings 121 .

[0070] S106 , forming a second metal layer 130 on a side of the first metal layer 120 facing away from the substrate 110 .

[0071] S108 , patterning the second metal layer 130 to form a second wiring 131 .

[0072] S110 , forming a first electrode layer 140 on a side of the second metal layer 130 facing away from the substrate 110 .

[0073] S112 , patterning the first electrode layer 140 to form a plurality of electrode blocks 141 , each electrode block 141 being electrically connected to the first wiring 121 , and an orthographic projection of the second wiring 131 on the surface of the substrate 110 being spaced apart from an orthographic projection of the electrode block 141 on the surface of the substrate 110 .

[0074] The display panel 100 manufactured by the above manufacturing method can avoid the problem of unevenness or tilt of the electrode block 141 caused by the second wiring 131 being arranged under the electrode block 141, improve the flatness of the first electrode layer 140, and enhance the display effect of the display panel 100. The overall structure of the display panel 100 is relatively simple and easy to process, which improves the production efficiency of the display panel 100 and reduces the production cost. In addition, compared with the solution of adding a flat layer under the first electrode layer 140 in the related art, the thickness of the display panel 100 is reduced, which is conducive to miniaturization, and can also reduce the influence of the flat layer on the light transmittance, and the requirements for the wiring opening inside the display panel 100 are reduced, which is conducive to increasing the wiring space to improve the pixel density in the display panel 100.

[0075] See also Figure 7 The embodiment of the present application further provides a display device 10, which includes a display panel 100 as in any one of the above embodiments.

[0076] The display panel 100 disclosed in the embodiment of the present application is applied to the display device 10 to provide the function of displaying a picture. The display device 10 can be any product or component with a display function, including but not limited to a mobile phone, a tablet computer, a laptop computer, an e-reader, a wearable device, a remote control, a television, a desktop computer, a vehicle-mounted device, etc. Due to the use of the display panel 100 in any of the above embodiments, the problem of unevenness or tilt of the electrode block 141 caused by the second wiring 131 being arranged below the electrode block 141 can be avoided, the flattening degree of the first electrode layer 140 is improved, and the display effect of the display panel 100 is enhanced. The overall structure of the display panel 100 is relatively simple and easy to process, which improves the production efficiency of the display panel 100 and reduces the production cost. In addition, compared with the solution of adding a flat layer below the first electrode layer 140 in the related art, the thickness of the display panel 100 is reduced, which is conducive to miniaturization, and the influence of the flat layer on the light transmittance can also be reduced. The requirements for the wiring opening inside the display panel 100 are reduced, which is conducive to increasing the wiring space to improve the pixel density in the display panel 100.

[0077] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0078] The embodiments described above are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features may be replaced by equivalents. Such modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A display panel, characterized in that: include: A substrate, a first metal layer, a second metal layer and a first electrode layer, wherein the first metal layer is arranged on one side of the substrate, the first metal layer includes a plurality of first traces, the second metal layer is arranged on a side of the first metal layer away from the substrate, the second metal layer includes a second trace, the first electrode layer is arranged on a side of the second metal layer away from the substrate, the first electrode layer includes a plurality of electrode blocks, each of the electrode blocks is electrically connected to the first trace, and an orthographic projection of the second trace on the surface of the substrate is spaced apart from an orthographic projection of the electrode block on the surface of the substrate.

2. The display panel according to claim 1, wherein: The display panel further includes a first insulating layer, which is disposed between the first metal layer and the second metal layer. A first via hole is disposed on the first insulating layer, and the second wiring is electrically connected to the first wiring through the first via hole.

3. The display panel according to claim 2, wherein: The orthographic projection of the first via hole on the surface of the substrate is spaced apart from the orthographic projection of the electrode block on the surface of the substrate.

4. The display panel according to claim 2, wherein: The display panel also includes a second insulating layer, which is arranged between the second metal layer and the first electrode layer. The second insulating layer is provided with a plurality of second vias. The first insulating layer is also provided with third vias corresponding to the second vias. The third vias and the first vias are spaced apart from each other, and each of the electrode blocks is electrically connected to the first trace through the second vias and the third vias.

5. The display panel according to claim 1, wherein: The second wiring has a mesh structure and includes a plurality of grid patterns, and the grid patterns are at least partially arranged around the electrode block.

6. The display panel according to claim 5, wherein: The second wiring is a first signal line, and the first signal line is used to provide a first power signal to the electrode block.

7. The display panel according to claim 1, wherein: The second routing lines include a plurality of first signal lines and a plurality of second signal lines. The first signal lines and the second signal lines transmit different signals. The first signal lines and the second signal lines are spaced apart from each other and arranged in an alternating manner in a row direction.

8. The display panel according to claim 7, wherein: The first signal line is a working voltage signal line, and the second signal line is a common voltage signal line; or The first signal line is a common voltage signal line, and the second signal line is a working voltage signal line; The display panel further comprises a light emitting element, the electrode block is an anode of the light emitting element, the working voltage signal line is used to provide a first power signal to the electrode block, and the common voltage signal line is used to provide a second power signal to a cathode of the light emitting element.

9. A method for manufacturing a display panel, characterized in that: include: forming a first metal layer on one side of the substrate; Patterning the first metal layer to form a plurality of first traces; forming a second metal layer on a side of the first metal layer facing away from the substrate; Patterning the second metal layer to form a second trace; forming a first electrode layer on a side of the second metal layer facing away from the substrate; The first electrode layer is patterned to form a plurality of electrode blocks, each of the electrode blocks is electrically connected to the first wiring respectively, and the orthographic projection of the second wiring on the substrate surface is spaced apart from the orthographic projection of the electrode block on the substrate surface.

10. A display device, characterized in that: A display panel according to any one of claims 1 to 8.

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