Display panel and display device

Abstract

The invention provides a display panel and a display device. The display panel comprises a substrate; the buffer layer is located on one side of the substrate, and a first type of grooves and a second type of grooves are formed in the buffer layer; the first signal line is located in the first type of groove; the first insulating layer is located on the side, away from the substrate, of the buffer layer and covers the first signal line; and the second signal line is positioned on one side, far away from the substrate, of the first insulating layer and is positioned in the second-type groove. According to the scheme, the first signal line and the second signal line are formed in the first type of groove and the second type of groove of the buffer layer respectively, so that the shape segment difference of the array substrate packaged into a film is small, film layer weak points of the display panel at some more complex terrains are avoided, and the display quality is improved. Therefore, the problem of wire breakage caused by corrosion of metal wires due to water vapor invasion is avoided.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] In a display panel, the light-emitting device is generally sealed by wrapping it in a middle encapsulation inorganic layer and a backplane inorganic layer to isolate it from water and oxygen. The bottom of the display panel is usually where the signal source of the entire panel is located. All external connecting lines need to pass through the backplane inorganic layer to enter the display area. When the inorganic layer is deposited on the signal line, thickness differences will inevitably occur, resulting in weak points in the film layer in certain complex terrains, ultimately leading to problems of water vapor intrusion and corrosion of metal wiring in the display area. Summary of the invention

[0003] Embodiments of the present application provide a display panel and a display device to solve the problem of weak points in an effective packaging area of ​​a display panel causing water vapor intrusion.

[0004] To solve the above problems, the technical solutions provided by this application are as follows:

[0005] In a first aspect, the present application provides a display panel, comprising: a substrate; a buffer layer located on one side of the substrate, the buffer layer being provided with a first type of groove and a second type of groove; a first signal line located in the first type of groove; a first insulating layer located on a side of the buffer layer away from the substrate and covering the first signal line; and a second signal line located on a side of the first insulating layer away from the substrate and located in the second type of groove.

[0006] In one embodiment, the width of the first signal line is the same as the width of the second signal line.

[0007] In one embodiment, the width of the first type of groove is smaller than the width of the second type of groove.

[0008] In one embodiment, the thickness of the first signal line is the same as the thickness of the second signal line.

[0009] In one embodiment, the depth of the first type of grooves is the same as the depth of the second type of grooves.

[0010] In one embodiment, the depth of the first type of groove is equal to the thickness of the first signal line.

[0011] In one embodiment, the cross-sectional shapes of the first type of grooves and the second type of grooves are both inverted trapezoidal.

[0012] In one embodiment, the display panel includes a display area and a non-display area;

[0013] The effective encapsulation area is located between the display area and the non-display area and forms a sealed connection with the display area.

[0014] In one embodiment, the display panel further includes:

[0015] a second insulating layer, located on a side of the first insulating layer away from the substrate and covering the second signal line;

[0016] A planar layer located on a side of the second insulating layer away from the substrate in the display area and the non-display area;

[0017] The packaging layer is located on a side of the second insulating layer away from the substrate and covers the planar layer.

[0018] In a second aspect, the present application provides a display device, comprising the aforementioned display panel.

[0019] The display panel of the present application includes a substrate; a buffer layer, located on one side of the substrate, and provided with a first type of groove and a second type of groove on the buffer layer; a first signal line, located in the first type of groove; a first insulating layer, located on the side of the buffer layer away from the substrate and covering the first signal line; and a second signal line, located on the side of the first insulating layer away from the substrate and located in the second type of groove. Through the above scheme, the present application forms the first signal line and the second signal line in the first type of groove and the second type of groove of the buffer layer respectively, so that the morphological step difference of the array substrate packaged into a film is small, thereby avoiding the display panel from having film layer weak points in some more complex terrains, and thus preventing the problem of water vapor intrusion corroding the metal routing and causing wire breakage. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0021] Attached Figure 1 This is a schematic diagram of the packaging structure of the display panel in the embodiment of the present application;

[0022] Attached Figure 2 It is a structural schematic diagram of a display panel in the related art;

[0023] Attached Figure 3 This is a schematic diagram of the structure of an optional display panel in an embodiment of the present application;

[0024] Attached Figure 4 Schematic diagram of the structure of an optional display device in an embodiment of the present application.

[0025] Description of reference numerals in the figures:

[0026] 1. Display device;

[0027] 100, display panel; 101, display area; 102, effective packaging area; 103, non-display area;

[0028] 110, buffer layer; 120, first signal line; 130, first insulating layer; 140, second signal line; 150, second insulating layer; 160, planarization layer; 170, packaging layer. DETAILED DESCRIPTION

[0029] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0030] Reference Figure 1 As shown, according to the first aspect of the present application, a display panel 100 is provided, and the entire display panel 100 is roughly divided into a backplane, a light-emitting device, a package, a touch screen and a module from bottom to top, and is further divided into a display area 101 and a non-display area 103 from the display point of view. The light-emitting device needs to be isolated from water and oxygen, so the package inorganic layer covering the entire display area 101 and the backplane inorganic layer below wrap the light-emitting device, and the upper and lower inorganic layers are connected and sealed around the display area 101, and the connection is called an effective packaging area 102.

[0031] The bottom of the display panel 100 is the signal source of the entire display panel 100 , and all the connection lines with the outside are connected from the backplane across the effective packaging area 102 into the display area 101 .

[0032] Therefore, refer to Figure 2 As shown, it is inevitable that the signal line will cause uneven morphology. After the insulating inorganic film layer is deposited on this morphology, not only will there be differences in thickness performance, but also weak points in the film layer will easily appear in some more complex terrains, which will easily lead to water vapor intrusion and corrosion of metal routing, resulting in broken wires and other problems during subsequent use.

[0033] Reference Figure 3 As shown, the display panel 100 of the present application includes, in an array structure:

[0034] The substrate (not shown in the figure) may be made of an organic material having insulating properties and being flexible so as to be heat-treated at a temperature equal to or greater than about 450°C, and the substrate may be formed as a single layer, for example, formed of polyimide or may be formed as a plurality of layers formed by repeatedly stacking polyimide by coating and curing. The substrate may be a flexible substrate formed by coating a polymeric material such as polyimide on a supporting substrate (not shown) and curing the polymeric material. In this case, the substrate may be formed into a plurality of layers by repeatedly coating and curing the polymeric material. The supporting substrate may be formed of glass, metal, or ceramic, and the polyimide may be coated on the supporting substrate by coating processes such as spin coating, slit coating, inkjet coating, etc. The supporting substrate may be removed in a subsequent process.

[0035] A barrier layer (not shown in the figure) is formed on the substrate. The barrier layer may include various insulating materials (e.g., silicon oxide or silicon nitride) and may be a single layer or a multilayer structure, which is not limited here. The barrier layer may provide a planarization layer on the upper surface of the substrate and may block or prevent impurities and moisture from penetrating from the substrate into the display unit (i.e., the organic light emitting element).

[0036] Wherein, the barrier layer may include a first barrier layer and a second barrier layer. The second barrier layer is formed on the first barrier layer, for example, the first barrier layer may be formed between the second barrier layer and between the substrate. In practical applications, the first sub-barrier layer may be formed by depositing silicon oxide, and then, the second sub-barrier layer is formed by depositing silicon nitride by an in-situ process. In this case, the first sub-barrier layer may be formed of SiOx or SiON (the interface bonding performance between the barrier layer and the substrate may be enhanced), and the first sub-barrier layer may be formed to have a thickness of about 100nm to about 600nm. The second sub-barrier layer may be formed of SiNx or SiON (the interface bonding performance between the barrier layer and the buffer layer 110 disposed subsequently may be enhanced), and the second sub-barrier layer may be formed to have a thickness of about 50nm to about 200nm.

[0037] The buffer layer 110 is located on one side of the substrate and is formed on the barrier layer; the buffer layer 110 may include one or more inorganic insulating layers, which include materials such as silicon oxide or silicon nitride. The buffer layer 110 may provide a planarization layer on the upper surface of the substrate, and may block or prevent impurities and moisture from penetrating from the substrate into the display unit (i.e., the organic light-emitting element). More specifically, in some embodiments of the present application, the buffer layer 110 is provided with a first type of groove and a second type of groove, and both the first type of groove and the second type of groove are formed by exposure and etching after the buffer layer 110 is deposited.

[0038] The first signal line 120 is located in the first type of groove.

[0039] The first insulating layer 130 is located on a side of the buffer layer 110 away from the substrate and covers the first signal line 120. The first insulating layer 130 may be a plurality of layers or a single layer including at least one of tetraethyl orthosilicate (TEOS), silicon nitride, and silicon oxide.

[0040] The second signal line 140 is located on the side of the first insulating layer 130 away from the substrate and in the second type of groove. It should be noted that although the first signal line 120 and the second signal line 140 are formed in a different order, in order to meet the production requirements of the display panel, the first signal line 120 and the second signal line 140 are both made at the process limit, and there is not much difference between the two.

[0041] The second insulating layer 150 is located at a side of the first insulating layer 130 away from the substrate and covers the second signal line 140 .

[0042] The planar layer 160 is located on the side of the second insulating layer 150 away from the substrate in the display area 101 and the non-display area 103. The planar layer 160 may be formed as a plurality of layers or a single layer, for example, of tetraethylorthosilicate (TEOS), silicon nitride or silicon oxide, and may be formed of an organic material with a low dielectric constant (for example, polyimide).

[0043] The encapsulation layer is located on the side of the second insulating layer 150 away from the substrate and covers the flat layer 160. The encapsulation layer can be formed by alternately laminating one or more organic layers and one or more inorganic layers. Multiple inorganic layers or organic layers can be provided. The organic layer is formed by a polymer, and can be, for example, a monomer composition that can also include a monomer based on a monoacrylate. In addition, the monomer composition can also include a well-known photoinitiator such as TPO, but the monomer composition is not limited thereto. The inorganic layer can be a laminated layer or a single layer including a metal oxide or a metal nitride. For example, the inorganic layer can include any one of SiNx, Al2O3, SiO2, and TiO2. The uppermost layer of the encapsulation layer exposed to the outside can be formed by an inorganic layer to prevent moisture from being transmitted to the inside of the organic light emitting diode display. The encapsulation layer may include at least one sandwich structure, in which at least one organic layer is interposed between at least two inorganic layers. In addition, the encapsulation layer may include at least one sandwich structure, in which at least one inorganic layer is interposed between at least two organic layers. The encapsulation layer may sequentially include a first inorganic layer, a first organic layer, and a second inorganic layer. In addition, the encapsulation layer may sequentially include a first inorganic layer, a first organic layer, a second inorganic layer, a second organic layer, and a third inorganic layer. In addition, the encapsulation layer may sequentially include a first inorganic layer, a first organic layer, a second inorganic layer, a second organic layer, a third inorganic layer, a third organic layer, and a fourth inorganic layer.

[0044] It should be noted that the structure of the above-mentioned display panel 100 is mainly the effective packaging area 102 structure, so the thin film transistor and other structures are not specified. In the display area 101 of the display panel 100, the buffer layer 110, the first signal line 120, the first insulating layer 130, the second insulating layer 150 and other structures can also be arranged in the same way or in different ways, and the present application does not impose any restrictions on this.

[0045] Specifically, in some embodiments of the present application, the first signal line 120 and the second signal line 140 are formed by sputtering of metal molybdenum, and the first insulating layer 130 is deposited and grown as a SiON or SiN inorganic film layer by plasma enhanced chemical vapor deposition (PECVD) using gases such as SiH4, N2O, NH3, etc. in a plasma state, and its growth morphology is determined by the morphology of the carrier substrate. The growth rate and film properties of the inorganic film layer in a flat area and a more complex and steep morphology will be significantly different, and this rate is called step coverage. Therefore, the present application arranges a first type of groove and a second type of groove to accommodate the first signal line 120 and the second signal line 140 respectively, so that the step coverage of the display panel 100 of the present application is close to 1.

[0046] It should be noted that the step coverage is an indicator to measure the deposition efficiency of the film during the deposition process, especially on uneven surfaces (such as steps or uneven areas). It represents the ratio of the thickness of the film across the step (bottom or sidewall) to the thickness of the film layer in the flat area. The closer the step coverage is to 1, the smaller the difference between the thickness of the film at the step and the thickness in the flat area, which means that the deposition process is more uniform and efficient. Conversely, if the step coverage is much less than 1, it means that the thickness of the film at the step is much thinner than the thickness of the film in the flat area, which may affect the overall deposition effect and device performance. In order to avoid affecting the device performance, especially the packaging performance, the morphology step difference of the substrate for packaging film formation should be kept as small as possible.

[0047] In the above embodiment, referring to Figure 3 As shown, the width of the first signal line 120 is the same as the width of the second signal line 140. Since the thickness of the first insulating layer 130 needs to be consistent whether on a flat ground or on a slope, the width of the first type of groove is smaller than the width of the second type of groove on the basis that the widths of the first signal line 120 and the second signal line 140 are the same. It should be noted that since the shapes of the first signal line 120 and the second signal line 140 are both inverted trapezoids, the slope angles of their sides may vary according to specific production requirements, but the maximum widths of the first signal line 120 and the second signal line 140 are basically unchanged, and the width of the first signal line 120, the width of the second signal line 140, the width of the first type of groove, and the width of the second type of groove here can all refer to the maximum width.

[0048] In addition, the thickness of the first signal line 120 is the same as that of the second signal line 140 , and accordingly, the depth of the first type of groove is the same as that of the second type of groove, and the depth of the first type of groove is equal to the thickness of the first signal line 120 .

[0049] In some embodiments of the present application, the cross-sectional shapes of the first type of groove and the second type of groove are both inverted trapezoids. It should be noted that the cross-sectional shapes of the first type of groove and the second type of groove are inverted trapezoids, which can make the cross-sectional shapes of the first type of signal line and the second type of signal line also be inverted trapezoids. In some other embodiments, the cross-sectional shapes of the first type of signal line and the second type of signal line can also be rectangular or square. These shapes help to provide better current transmission and stability. The cross-sectional shapes of inverted trapezoids, rectangles or squares can provide a larger contact area, thereby reducing resistance and current loss. In addition, the cross-sectional shapes of inverted trapezoids, rectangles or squares can also be more easily docked and connected with other components (such as source and pixel electrodes) to ensure good electron transmission and signal transfer.

[0050] It should be noted that, in the above embodiments, the shape or size of the first signal line 120 or the second signal line 140 is defined based on the cross section of the display panel 100. In fact, in the horizontal direction of the display panel 100, the first signal line 120 and the second signal line 140 may be straight, curved or twisted, to adapt to the specific design and pixel layout of the display panel 100, and the shapes of the first signal line 120 and the second signal line 140 may be different. In the display area 101 of the display panel 100, the size and shape of the first signal line 120 and the second signal line 140 may also be different to meet specific display requirements. For example, the first signal line 120 may have a wider line width to meet the stability of current transmission, and the second signal line 140 may have a thinner line width to meet the display panel 100's higher resolution and more delicate image display requirements.

[0051] Reference Figure 4 According to the second aspect of the present application, a display device 1 is provided. The display device 1 has all the beneficial effects of the aforementioned display panel 100, which will not be described in detail in the present application.

[0052] In summary, although the present application has been disclosed as above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined in the claims.

Claims

1. A display panel, characterized in that: include: substrate; A buffer layer, located on one side of the substrate, the buffer layer being provided with a first type of groove and a second type of groove; A first signal line, located in the first type of groove; A first insulating layer, located on a side of the buffer layer away from the substrate and covering the first signal line; as well as The second signal line is located at a side of the first insulating layer away from the substrate and in the second-type groove.

2. The display panel according to claim 1, characterized in that: The width of the first signal line is the same as the width of the second signal line.

3. The display panel according to claim 2, characterized in that: The width of the first type of groove is smaller than the width of the second type of groove.

4. The display panel according to claim 1, characterized in that: The thickness of the first signal line is the same as the thickness of the second signal line.

5. The display panel according to claim 4, characterized in that: The depth of the first type of grooves is the same as the depth of the second type of grooves.

6. The display panel according to claim 5, characterized in that: The depth of the first type groove is equal to the thickness of the first signal line.

7. The display panel according to any one of claims 1 to 6, characterized in that: The cross-sectional shapes of the first type of groove and the second type of groove are both inverted trapezoidal.

8. The display panel according to any one of claims 1 to 6, characterized in that: The display panel includes a display area and a non-display area; The effective encapsulation area is located between the display area and the non-display area and forms a sealed connection with the display area.

9. The display panel according to claim 8, characterized in that: The display panel further includes: a second insulating layer, located on a side of the first insulating layer away from the substrate and covering the second signal line; a planar layer located on a side of the second insulating layer away from the substrate in the display area and the non-display area; and The packaging layer is located on a side of the second insulating layer away from the substrate and covers the planar layer.

10. A display device, characterized in that: A display panel comprising any one of claims 1 to 9.

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