Light detection element and electronic device

Abstract

There is provided a light detection element including: a photoelectric conversion unit provided on a semiconductor substrate and generating an electric charge according to incident light; a first storage unit that stores the charge generated by the photoelectric conversion unit; an amplification transistor that generates an input signal in accordance with the amount of charge stored in the first accumulation section; a second accumulation portion to which saturation charges are transferred from the photoelectric conversion unit via the first accumulation portion; a conversion efficiency switching transistor that transfers the saturation charge to the second accumulation section and switches conversion efficiency; a reset transistor that resets the charge stored in the first accumulation unit and the saturation charge stored in the second accumulation unit; and a differential input circuit that compares the input signal generated by the amplification transistor with a reference signal to output a comparison result, in which the second accumulation section includes an MIM capacitor having a three-dimensional structure.

Description

Technical Field

[0001] The present disclosure relates to a light detecting element and an electronic device. Background Art

[0002] In recent years, an imaging device has been proposed that has an analog / digital converter (ADC) for each pixel (light detection element) that converts an analog signal from a photodiode into a digital signal. For example, an example of such an imaging device may be an imaging device described in the following Patent Document 1 or Patent Document 2. Citation list Patent Literature

[0003] Patent Document 1: WO 2016 / 136448 A Patent Document 2: WO 2018 / 018215 A Summary of the invention Technical issues

[0004] In the above-mentioned imaging device (photodetection device) in which ADC is provided for each pixel (photodetection element), there is a problem that the saturation signal amount of the pixel is reduced compared with the conventional configuration. If the saturation signal amount of the pixel is low, it is difficult to achieve a high dynamic range of the imaging device.

[0005] The present disclosure has been made in view of such circumstances, and proposes a light detection element and an electronic device capable of increasing the amount of a saturated signal in a configuration in which an ADC is provided for each pixel. Solutions to technical problems

[0006] According to the present disclosure, there is provided a light detection element, including: a photoelectric conversion section, which is provided in a semiconductor substrate and generates a charge corresponding to incident light; a first accumulation section, which accumulates the charge generated by the photoelectric conversion section; an amplifier transistor, which generates an input signal corresponding to the amount of the charge accumulated in the first accumulation section; a second accumulation section, saturated charge is transferred from the photoelectric conversion section to the second accumulation section via the first accumulation section; a conversion efficiency switching transistor, which transfers the saturated charge to the second accumulation section to switch the conversion efficiency; a reset transistor, which resets the charge accumulated in the first accumulation section and the saturated charge accumulated in the second accumulation section; and a differential input circuit, which compares the input signal generated by the amplifier transistor with a reference signal and outputs a comparison result. In the light detection element, the second accumulation section includes a metal-insulator-metal (MIM) capacitor or a metal oxide semiconductor (MOS) capacitor having a three-dimensional structure.

[0007] In addition, according to the present disclosure, an electronic device is provided on which a light detection device including a light detection element is mounted. In the light detection device, the light detection element includes: a photoelectric conversion section, which is arranged in a semiconductor substrate and generates a charge corresponding to incident light; a first accumulation section, which accumulates the charge generated by the photoelectric conversion section; an amplifier transistor, which generates an input signal corresponding to the amount of the charge accumulated in the first accumulation section; a second accumulation section, saturated charge is transferred from the photoelectric conversion section to the second accumulation section via the first accumulation section; a conversion efficiency switching transistor, which transfers the saturated charge to the second accumulation section to switch the conversion efficiency; a reset transistor, which resets the charge accumulated in the first accumulation section and the saturated charge accumulated in the second accumulation section; and a differential input circuit, which compares the input signal generated by the amplifier transistor with a reference signal and outputs a comparison result, and the second accumulation section includes a metal-insulator-metal (MIM) capacitor or a metal oxide semiconductor (MOS) capacitor having a three-dimensional structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a diagram showing a schematic configuration of an image pickup device according to the present disclosure. Figure 2 is a block diagram showing a configuration example of a pixel according to the present disclosure. Figure 3 is a circuit diagram showing an example of a circuit configuration of a pixel according to the present disclosure. Figure 4 is a circuit diagram showing a circuit configuration example of a pixel according to Comparative Example 2. Figure 5 It is an explanatory diagram for explaining the background of the embodiment of the present disclosure. Figure 6 is a diagram showing a cross-sectional configuration example of a pixel according to the first embodiment of the present disclosure. Figure 7 yes Figure 6 A partial enlarged view of . Figure 8 is a diagram showing a cross-sectional configuration example of a pixel according to a second embodiment of the present disclosure. Fig. 9 is a diagram showing a cross-sectional configuration example of a pixel according to a third embodiment of the present disclosure. Fig.10 is a circuit diagram showing an example of a circuit configuration of a pixel according to a fourth embodiment of the present disclosure. Fig.11 : is a diagram showing a cross-sectional configuration example of a pixel according to a fourth embodiment of the present disclosure. Fig.12is an explanatory diagram (Part 1) for explaining the positional relationship between a wiring network and pads according to a fifth embodiment of the present disclosure. Fig.13 is an explanatory diagram (Part 2) for explaining the positional relationship between a wiring network and pads according to a fifth embodiment of the present disclosure. Fig.14 is an explanatory diagram (Part 1) for explaining an example of a wiring network according to a fifth embodiment of the present disclosure. Fig.15 : is an explanatory diagram (Part 2) for explaining an example of a wiring network according to a fifth embodiment of the present disclosure. Fig.16 is an explanatory diagram (Part 3) for explaining the positional relationship between a wiring network and pads according to a fifth embodiment of the present disclosure. Fig.17 is an explanatory diagram (Part 4) for explaining the positional relationship between a wiring network and pads according to a fifth embodiment of the present disclosure. Fig.18 is an explanatory diagram (Part 5 ) for explaining the positional relationship between a wiring network and pads according to a fifth embodiment of the present disclosure. Fig.19 is an explanatory diagram (Part 6) for explaining the positional relationship between the wiring network and the pads according to the fifth embodiment of the present disclosure. Fig. 20 is an explanatory diagram showing an example of a schematic functional configuration of a camera. Fig.21 is a block diagram showing an example of a schematic functional configuration of a smartphone. Fig. 22 is a block diagram showing an example of a schematic configuration of a vehicle control system. Fig.23 It is a diagram for assisting in explaining an example of the installation positions of the vehicle exterior information detection unit and the imaging unit. DETAILED DESCRIPTION

[0009] Hereinafter, preferred embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Note that in this specification and the accompanying drawings, components having substantially the same functional configuration are represented by the same reference numerals, and redundant descriptions are omitted. In addition, in this specification and the accompanying drawings, multiple components having substantially the same or similar functions can be distinguished by appending different letters after the same reference numerals. However, in the case where it is not particularly necessary to distinguish multiple components having substantially the same or similar functional configurations, only the same reference numerals are attached.

[0010] In addition, the drawings referred to in the following description are drawings for facilitating the description of the embodiments of the present disclosure and their understanding, and for the sake of clarity, the shapes, sizes, ratios, etc. shown in the drawings may be different from the actual ones. In addition, considering the following description and known technologies, the components and the like included in the elements and devices shown in the drawings may be appropriately modified in design.

[0011] In addition, in the following description, the case where the embodiment of the present disclosure is applied to a back-illuminated imaging device is described as an example, and therefore, light is incident from the back side of the substrate of the imaging device. In addition, in the description using the cross-sectional view of the imaging device, the vertical direction of the stacked structure of the imaging device corresponds to the relative direction in which the incident light enters the light receiving surface of the imaging device on the lower side, and may be different from the vertical direction according to the actual gravitational acceleration.

[0012] In addition, the statement of a specific shape in the following description does not only mean a geometrically defined shape. Specifically, the statement of a specific shape in the following description includes the case where there are allowable differences (errors / distortions) in the component, its manufacturing process and its use / operation, as well as shapes similar to the described shape. For example, in the following description, the term "substantially rectangular wave shape" refers not only to a rectangular wave, but also to a shape similar to a rectangular wave.

[0013] In addition, in the following description of circuits (electrical connections), unless otherwise specified, "electrical connection" means connecting multiple elements so that electricity (signals) are transmitted between them. In addition, the "electrical connection" in the following description includes not only the case where multiple elements are directly electrically connected, but also the case where multiple elements are indirectly electrically connected via other elements.

[0014] Note that the description will be given in the following order. 1. Background of the Design of the Embodiments of the Present Disclosure 1.1 Schematic Configuration Example of Image Capture Device 1.2 Example of pixel block construction 1.3 Example of pixel circuit structure 1.4 Background 2. First Implementation Method 3. Second Implementation Method 4. Third Implementation Method 5. Fourth Implementation Method 6. Fifth Implementation Method 7. Summary 8. Application examples 8.1 Camera Application Examples 8.2 Application Examples of Smartphones 8.3 Application examples of mobile objects 9. Supplement

[0015] <<1. Background of the Design of the Embodiments of the Present Disclosure>> <1.1 Schematic Configuration Example of Image Capture Device> The background of the present invention will be described. Figure 1 A schematic configuration of an image pickup device (light detection device) 1 according to the present disclosure will be described. Figure 1 is a diagram showing a schematic configuration example of an image pickup device 1 according to the present disclosure.

[0016] like Figure 1 As shown, the imaging device 1 includes a pixel array section 22 in which pixels (light detection elements) 21 are arranged in a matrix form on a semiconductor substrate 11 using, for example, silicon (Si). In addition, on the semiconductor substrate 11, a pixel driving circuit 23, a digital / analog converter (DAC) 24, a vertical driving circuit 25, a sensor amplifier section 26, an output section 27, and a timing generation circuit 28 are formed around the pixel array section 22. Hereinafter, the outline of each component of the imaging device 1 will be described in sequence.

[0017] (Pixel 21) The pixel 21 mainly includes a pixel circuit and an ADC as will be described later. The pixel circuit can generate a charge corresponding to the light incident on the image pickup device 1, and output an analog pixel signal corresponding to the amount of charge to the ADC. In addition, the ADC can convert the analog pixel signal supplied by the pixel circuit into a digital signal. Note that the detailed structure of the pixel 21 will be described later.

[0018] (Pixel driving circuit 23) The pixel driving circuit 23 may drive the pixel circuit in the pixel 21 and the comparator included in the ADC.

[0019] (DAC 24) The DAC 24 may generate a reference signal which is a ramp signal whose level (voltage) decreases monotonically with the passage of time, and output the reference signal to a comparator included in the ADC of each pixel 21 .

[0020] (Vertical drive circuit 25) The vertical driving circuit 25 can output the digital pixel signals generated in the pixels 21 to the sense amplifier section 26 in a predetermined order based on a timing signal supplied from a timing generating circuit 28 to be described later.

[0021] (Sensor amplifier 26) The sense amplifier 26 may amplify a digital pixel signal output from the pixel 21 and output the amplified signal to the output section 27 to be described later.

[0022] (Output unit 27) The output section 27 may perform predetermined digital signal processing such as black level correction processing for correcting a black level or correlated double sampling (CDS) on the pixel signal amplified by the sensor amplifier section 26 as necessary, and output the processed signal to the outside.

[0023] (Timing Generation Circuit 28) The timing generation circuit 28 includes a timing generator that generates various timing signals and the like, and can supply the generated various timing signals to the pixel driving circuit 23 , the DAC 24 , the vertical driving circuit 25 , and the like.

[0024] Note that the configuration of the imaging device 1 according to the present disclosure is not limited to Figure 1 The configuration shown in the figure can be combined with other components, etc., according to the application of the camera device 1, for example. Figure 1 It has been described above that all components constituting the imaging device 1 are formed on one semiconductor substrate 11, but the present disclosure is not limited to this configuration. For example, the imaging device 1 of the present disclosure may be constituted by components provided on a plurality of different semiconductor substrates.

[0025] <1.2-pixel block structure example> Next, we will refer to Figure 2 A block configuration example of the pixel 21 according to the present disclosure is described. Figure 2 2 is a block diagram showing a configuration example of a pixel 21 according to the present disclosure. Figure 2 As shown, the pixel 21 mainly includes a pixel circuit 41 and an ADC 42. That is, in the present disclosure, the ADC 42 is provided for each pixel 21 in the image pickup device 1. Hereinafter, the outline of each component of the pixel 21 will be described in sequence.

[0026] (Pixel circuit 41) The pixel circuit 41 includes a photoelectric conversion section (photodiode) that generates charges corresponding to light incident on the image pickup device 1, and the pixel circuit can output an analog pixel signal SIG corresponding to the amount of charge generated by the photoelectric conversion section to the ADC 42. Specifically, in addition to the photoelectric conversion section, the pixel circuit 41 includes a transfer transistor that transfers the charge, an accumulation section that accumulates the charge, an amplification transistor that converts the charge accumulated in the accumulation section into a voltage, etc. Note that the detailed configuration of the pixel circuit 41 will be described later.

[0027] (ADC 42) As described above, the ADC 42 can convert the analog pixel signal SIG supplied from the pixel circuit 41 into a digital signal. Figure 2 As shown, the ADC 42 mainly includes a comparator (differential input circuit) 61 , a positive feedback circuit (PFB) 62 , and a data storage section (storage section) 52 .

[0028] The comparator 61 has a pair of input terminals, and the analog pixel signal SIG (input signal) output from the pixel circuit 41 is input to one input terminal, and the reference signal REF output from the DAC 24 is input to the other input terminal. Then, the comparator 61 compares the analog pixel signal SIG with the reference signal REF, and inverts the output signal VCO into a comparison result signal showing the comparison result when the pixel signal SIG and the reference signal REF become the same level.

[0029] The positive feedback circuit 62 includes, for example, a positive feedback circuit that feeds back a part of the output and adds feedback to the input. The positive feedback circuit 62 can accelerate the response to the output signal VCO output from the comparator 61.

[0030] The output signal VCO from the comparator 61 is input to the data storage section 52. In addition, signals related to writing and reading of pixel signals and the like can be input to the data storage section 52 from the vertical drive circuit 25 and the like.

[0031] Note that the configuration of the pixel 21 according to the present disclosure is not limited to Figure 2 The configuration shown is not limited to the configuration shown, and for example, it may be configured in combination with other components or the like according to the application or the like of the image pickup device 1 .

[0032] <1.3-Pixel Circuit Configuration Example> Next, we will refer to Figure 3 A circuit configuration example of the pixel 21 according to the present disclosure is described. Figure 3 is a circuit diagram showing an example of a circuit configuration of the pixel 21 according to the present disclosure. Note that Figure 3 Only the circuit of the main part of the pixel 21 is shown.

[0033] First, if Figure 3 As shown, the pixel 21 includes a discharge transistor (OFG) 151, a photodiode (PD) (photoelectric conversion section) 152, a transfer transistor (TRG) 153, a floating diffusion (FD) section (first accumulation section) 154, an amplification transistor 155, a conversion efficiency switching transistor (FDG) 156, a capacitor (second accumulation section) 157, and a reset transistor (RST) 158 as a pixel circuit 41. Note that the above-mentioned various transistors are referred to as pixel transistors, and are composed of, for example, complementary metal oxide semiconductor (CMOS) transistors.

[0034] Specifically, the PD 152 can generate and accumulate charges corresponding to the amount of incident light. The cathode of the PD 152 is electrically connected to the terminal (source or drain) of the discharge transistor 151, and the anode of the PD 152 is electrically connected to a reference potential line (e.g., ground). In addition, the discharge transistor 151 can discharge the charges accumulated in the PD 152 to a power supply line or the like in a conductive state.

[0035] The transfer transistor 153 has one terminal (source or drain) connected to the cathode of the PD 152 and the other terminal connected to the FD portion 154 , and can transfer charges from the PD 152 to the FD portion 154 .

[0036] The FD portion 154 can accumulate charges from the PD 152, and can convert the accumulated charges into a voltage corresponding to the amount thereof in cooperation with the amplifier transistor 155. The gate terminal of the amplifier transistor 155 is connected to the FD portion 154, and a signal (input signal) SIG corresponding to the amount of charges accumulated in the FD portion 154 is input to the amplifier transistor 155.

[0037] One end (source or drain) of the conversion efficiency switching transistor 156 is connected to the FD section 154, and the other end is connected to the capacitor 157 and the reset transistor 158. The conversion efficiency switching transistor 156 can connect the capacitor 157 to the FD section 154, and cooperate with the reset transistor 158 to reset the charge accumulated in the FD section 154 and / or the capacitor 157. In addition, for example, one end of the capacitor 157 is connected to the conversion efficiency switching transistor 156, and the other end is connected to the ground.

[0038] Specifically, the conversion efficiency switching transistor 156 is used to switch the conversion efficiency of the pixel 21. Generally, when shooting in a bright place (high illumination), the amount of charge generated by the PD 152 increases, and the charge exceeding the saturation signal amount overflows from the PD 152. Therefore, in the pixel 21, the conversion efficiency switching transistor 156 is turned on at high illumination, and the overflowing charge (saturation charge) is transferred to the capacitor 157 through the FD section 154. Therefore, the conversion efficiency is reduced at high illumination, so that when the charge amount is converted into a voltage by the amplification transistor 155 according to Q (charge amount) = C (capacitance) × V (voltage), the voltage V does not become too large. That is, by turning on and off the conversion efficiency switching transistor 156, the conversion efficiency can be switched, so that the saturation signal amount can be increased at high illumination, and the PD 152 can be prevented from overflowing.

[0039] The reset transistor 158 can reset the charge accumulated in the FD portion 154 and the charge accumulated in the capacitor 157 by resetting the potential of the FD portion 154 to a predetermined potential.

[0040] Note that the circuit configuration of the pixel circuit 41 of the pixel 21 according to the present disclosure is not limited to Figure 3 The configuration shown, and for example, some pixel transistors may be omitted or pixel transistors may be added.

[0041] In addition, if Figure 3 As shown, the pixel 21 includes transistors 155 , 159 , 160 , 161 , 162 , 163 , and 165 as a comparator 61 .

[0042] An input bias current Vb is supplied to transistor 159, and a reference signal REF is supplied to transistor 160. Transistor 160, together with the above-mentioned amplifier transistor 155 to which an input signal SIG is supplied, constitutes a differential input circuit. The differential input circuit compares the input signal SIG with the reference signal REF. In addition, transistors 161 and 162 constitute a current mirror, are connected to a power supply line (VDDHPX) 167, and supply current to a pair of transistors 155 and 160 constituting the differential input circuit in a balanced manner. Transistor 163 supplies an output signal VCO of the differential input circuit to transistor 165. Transistor 165 functions as a voltage conversion circuit, and outputs the converted signal to the positive feedback circuit 62 (refer to Figure 2 ).

[0043] Note that the circuit configuration of the comparator 61 of the pixel 21 according to the present disclosure is not limited to Figure 3 The circuit configuration shown.

[0044] Note that in the present disclosure, for example, the pixel circuit 41 of the pixel 21 and a part of the comparator 61 (specifically, the components constituting Figure 3 The components of the comparator 61 shown below the node 170 of FIG. 1 may be formed on the image sensor side substrate. In addition, the remaining components of the comparator 61 (specifically, the components constituting Figure 3 The components of the comparator 61 shown above the midpoint 170) can be formed on a logic circuit substrate, which is stacked on the image sensor side substrate. Then, the image sensor side substrate and the logic circuit substrate are bonded and electrically connected through bonding electrodes made of copper (Cu) or the like.

[0045] <1.4 Background> Next, we will refer to Figure 4 and Figure 5 The background in which the inventors devised the embodiments of the present disclosure is described. Figure 4 is a circuit diagram showing an example of a circuit configuration of a pixel according to Comparative Example 2, and Figure 5 is an explanatory diagram for explaining the background of the embodiment of the present disclosure. Note that in the following description, Comparative Example 1 refers to a Figures 1 to 3The imaging device 1 of the structure shown in FIG. 1 is an imaging device in which an ADC 42 (comparator 61) is provided for each pixel 21. In addition, Comparative Example 2 refers to an imaging device having a structure as shown in FIG. Figure 4 The column ADC type imaging device shown has a circuit configuration in which ADC is arranged for each pixel column. Here, the comparative example refers to an imaging device that the inventors have studied before designing the embodiments of the present disclosure.

[0046] Figure 4 The basic circuit structure of the pixel of the comparative example 2 shown is the same as Figure 3 The pixel circuit 41 shown has the same configuration, and Figure 3 and Figure 4 The pixel transistors with the same name in FIG. 1 have the same function. Specifically, Figure 4 PD 101 and Figure 3 Corresponding to PD 152 in Figure 4 The transfer transistor (TRG) 102 in Figure 3 corresponds to the transfer transistor 153 in, and Figure 4 FD section 103 and Figure 3 In addition, Figure 4 The conversion efficiency of the switching transistor (FDG) 201 corresponds to Figure 3 The conversion efficiency of the switching transistor 156, Figure 4 The amplifier transistor (AMP) 202 in the Figure 3 The amplifier transistor 155 in the embodiment of the present invention is Figure 4 The reset transistor (RST) 204 in corresponds to Figure 3 The reset transistor 158 in FIG.

[0047] also, Figure 4 The selection transistor (SEL) 203 shown is connected to a terminal of the amplification transistor 202. When the selection transistor 203 is turned on, the amplification transistor 202 outputs a voltage corresponding to the potential of the FD portion 103 accumulating charges to a column signal processing circuit (not shown) via a vertical signal line 205.

[0048] In addition, Figure 4 In, with Figure 3 Unlike the circuit configuration example, there is no setting Figure 3 However, for example, when the conversion efficiency switching transistor 201 is turned on, the gate capacitance of the conversion efficiency switching transistor 201 increases, and the gate capacitance works similarly to the capacitor 157, so that the conversion efficiency can be switched. Note that the capacitor 157 can be set at Figure 4 in the circuit construction.

[0049] Since the image pickup device 1 of Comparative Example 1 has Figure 3 The circuit configuration shown, therefore, when resetting is performed by the reset transistor 158, the potential of the FD portion 154 is lower than that of the column ADC type imaging device in which the ADC of Comparative Example 2 is arranged for each pixel column.

[0050] Specifically, when turned on, the reset transistor 158 resets the charge accumulated in the FD portion 154 by resetting the potential of the FD portion 154 to the potential VDD (power supply potential) on the power supply line side. In the image pickup device 1 of Comparative Example 1, the transistors 161 and 162 constituting the current mirror circuit of the comparator 61 are connected to the power supply line 167 having the power supply potential VDD (for example, 2.9 V). In addition, the reset transistor 158 is connected to the current mirror circuit of the comparator 61. Therefore, due to the presence of the current mirror circuit, the reset transistor 158, and the like, the reset transistor 158 resets the potential of the FD portion 154 to a potential lower than the power supply potential VDD (for example, 1.8 V).

[0051] On the other hand, since the imaging device of Comparative Example 2 has Figure 4 In the circuit configuration shown, when the reset transistor 204 is turned on, the charge accumulated in the FD portion 103 is reset by resetting the potential of the FD portion 103 to a potential (e.g., 2.7 V) close to the power supply potential VDD (e.g., 2.9 V). Therefore, in the image pickup device 1 of Comparative Example 1, when resetting is performed by the reset transistor 158, the potential of the FD portion 154 is lower than that in the image pickup device of Comparative Example 2.

[0052] Figure 5 The amount of charge accumulated in PD 101 and PD 152 is schematically shown. Figure 5 In the comparative example 2 shown on the left, the reset transistor 204 resets the potential of the FD portion 103 to a value close to the power supply potential VDD. Figure 5 As shown on the left side of , the amount of charge remaining in the FD portion 103 during resetting decreases, and therefore, the FD portion 103 can receive a large amount of charge from the PD 101 .

[0053] On the other hand, Figure 5 In Comparative Example 1 shown on the right, the reset transistor 158 resets the potential of the FD portion 154 to a value lower than the power supply potential VDD. Figure 5 As shown on the right side of , the amount of charge remaining in the FD portion 154 increases during resetting, and therefore, it is difficult for the FD portion 154 to receive a large amount of charge from the PD 152 .

[0054] When the illumination is high, a large amount of charge is generated in the PD 152, but the charge is immediately saturated in the FD section 154 of Comparative Example 1. In this case, for example, overexposed highlights appear in the image obtained by the imaging device 1, or the dynamic range becomes narrow. As described above, in the imaging device 1 of Comparative Example 1, the capacitor 157 is provided, and the conversion efficiency is switched by the conversion efficiency switching transistor 156 at high illumination to suppress charge saturation. However, the capacitance of the capacitor 157 is small, resulting in limitations in avoiding charge saturation. That is, the problem is that, compared with Comparative Example 2, which is a column ADC type imaging device in which ADCs are arranged for each pixel column, in Comparative Example 1, which is an imaging device 1 in which ADC 42 (comparator 61) is provided for each pixel 21, the saturation signal amount of the pixel 21 is low.

[0055] Therefore, in view of this situation, the inventors have designed the following embodiments of the present disclosure. In the embodiments of the present disclosure, in the imaging device 1 in which the ADC 42 (comparator 61) is provided for each pixel 21, more overflow charges can be accumulated by the FD portion 154 by using a high capacitance element of the capacitor 157. By doing so, according to the embodiments of the present disclosure, the conversion efficiency at high illumination can be further reduced, and the saturation signal amount of the pixel 21 can be increased. Hereinafter, the details of the embodiments of the present disclosure designed by the inventors will be described in sequence.

[0056] <<2. First Implementation Method>> First, refer to Figure 6 and Figure 7 A first embodiment of the present disclosure is described. Figure 6 is a diagram showing an example of a cross-sectional configuration of a pixel 21 according to the present embodiment, and Figure 7 yes Figure 6 In the present embodiment, the capacitance can be increased by using a three-dimensional metal-insulator-metal (MIM) capacitor for the capacitor 157. Therefore, according to the present embodiment, the conversion efficiency can be reduced and the saturation signal amount of the pixel 21 can be increased. Hereinafter, the detailed structure of the pixel 21 according to the present embodiment will be described. Note that the pixel 21 of the present embodiment has Figure 3 The circuit configuration shown.

[0057] Specifically, Figure 6 As shown in the left figure of FIG. 1 , the pixel 21 according to the present embodiment mainly includes a semiconductor substrate 300 made of, for example, silicon and a wiring layer 400 provided on the upper surface of the semiconductor substrate 300. Note that Figure 6 Only a main part of the pixel 21 is schematically shown.

[0058] The semiconductor substrate 300 is made of, for example, a silicon substrate. For example, in the semiconductor substrate 300, a PD (photoelectric conversion unit) 304 having an impurity of a first conductivity type (for example, n-type) is provided in a region 302 having an impurity of a second conductivity type (for example, p-type) for each pixel 21. Figure 6 Although not shown in the figure, an FD portion containing an impurity having the same first conductivity type as that of the PD 304 at a higher concentration than that of the PD 304 is provided in the semiconductor substrate 300 .

[0059] Note that in this specification, the pixel 21 in which the first conductivity type is n-type, the second conductivity type is p-type, and electrons are used as signal charges will be described, but the present embodiment is not limited to this example. For example, the present embodiment can also be applied to the pixel 21 in which the first conductivity type is p-type, the second conductivity type is n-type, and holes are used as signal charges.

[0060] In addition, in the present embodiment, adjacent PDs 304 may be physically separated by a pixel separation portion (not shown). The pixel separation portion includes a recess (groove) provided as a penetration-type deep trench isolation (DTI) to penetrate the semiconductor substrate 300 in the film thickness direction of the semiconductor substrate 300 and an insulating film such as silicon oxide (SiO2) embedded in the groove.

[0061] In addition, on the back side of the semiconductor substrate 300 ( Figure 6 A light shielding film 504 that suppresses light leakage to the adjacent PD 304 is formed on the lower side of the left figure in FIG. The light shielding film 504 is made of, for example, a metal film such as tungsten (W). In addition, a planarization film 502 made of silicon oxide or the like is provided on the back side of the semiconductor substrate 300. An on-chip lens (OCL) 506 made of a styrene-based resin, an acrylic-based resin, a styrene-acrylic copolymer-based resin, a siloxane-based resin, or the like is provided on the planarization film 502, and light from the outside is incident on the on-chip lens (OCL) 506.

[0062] In addition, on the front side of the semiconductor substrate 300 ( Figure 6 A pixel transistor 306 such as a transfer transistor (TRG) is provided (specifically, Figure 6 Pixel transistor 306 has a gate electrode made of, for example, a polysilicon (Poly-Si) film or the like, which is provided on the surface of semiconductor substrate 300 via a gate insulating film (not shown).

[0063] In addition, a wiring layer 400 is provided on the front surface side of the semiconductor substrate 300. The wiring layer 400 includes, for example, an insulating film 402 made of silicon oxide or the like and wirings 404 made of aluminum (Al) or the like. In the present embodiment, a three-dimensional MIM capacitor 420 serving as the above-described capacitor 157 is provided in the wiring layer 400.

[0064] Specifically, by enlarging Figure 6 The wiring layer 400 in the left figure is obtained Figure 6 As shown in the right figure of , the three-dimensional MIM capacitor 420 is arranged between the wirings 404a and 404b of the wiring layer 400. Specifically, in the wiring layer 400, a plurality of wirings 404 are arranged throughout the plurality of layers along the stacking direction of the stacked structure, and the wirings 404 are electrically connected to each other through through holes 410 and the like penetrating the insulating film 402. One terminal of the three-dimensional MIM capacitor 420 arranged between the wirings 404a and 404b of the wiring layer 400 is electrically connected to the wiring 404a located on the three-dimensional MIM capacitor 420. The other terminal of the three-dimensional MIM capacitor 420 is electrically connected to the wiring 404b located below the three-dimensional MIM capacitor 420. In addition, the wiring 404b is electrically connected to the diffusion region 308 shared as the source / drain by the reset transistor 306r and the conversion efficiency switching transistor 306f in the semiconductor substrate 300.

[0065] The three-dimensional MIM capacitor 420 has a three-dimensional structure, and thus can increase capacitance compared to a capacitor structure including a pair of parallel plates sandwiching a dielectric. In the present embodiment, the structure of the three-dimensional MIM capacitor 420 is not particularly limited as long as it has a three-dimensional structure. Although the three-dimensional MIM capacitor 420 has a three-dimensional structure, it can be formed by a relatively simple process, so it can be said that the three-dimensional MIM capacitor 420 has a structure that can easily obtain a large-capacity capacitor.

[0066] In this embodiment, for example, Figure 7 As shown, the three-dimensional MIM capacitor 420 has a stacked structure including a pair of metal layers 422 and 426 sandwiching a dielectric layer (insulating layer) 424, and has a substantially rectangular wave cross-sectional shape. The metal layers 422 and 426 can be formed, for example, of titanium nitride (TiN) or the like, and the dielectric layer 424 can be formed, for example, of silicon nitride (Si3N4) or the like. In addition, the contact portion 428 for electrically connecting the wiring 404a and the upper metal layer 422 can be formed, for example, of an aluminum alloy or the like. In addition, the metal layer 422 is electrically connected to a power source, a ground, or a well region of the semiconductor substrate 300 via the wiring 404a (note that Figure 3157 is a circuit diagram in which the capacitor 157 is connected to the ground. In addition, the metal layer 426 is provided in contact with the wiring 404b, thereby being electrically connected to the wiring 404b. In addition, the metal layer 426 is electrically connected to the floating diffusion region 308 shared by the reset transistor 306r and the conversion efficiency switching transistor 306f via the wiring 404b.

[0067] exist Figure 7 In the example, since the three-dimensional MIM capacitor 420 has a substantially rectangular wave cross-sectional shape, the facing area where the pair of metal layers 422 and 426 face each other becomes wider, so that the capacitance can be increased while keeping the volume occupied by the three-dimensional MIM capacitor 420 small.

[0068] As described above, in this embodiment, the capacitance can be increased by using the three-dimensional MIM capacitor 420 for the capacitor 157. Therefore, according to this embodiment, the capacitor 157 has a high capacitance, so the conversion efficiency at high illumination can be reduced and the saturation signal amount of the pixel 21 can be increased.

[0069] <<3. Second Implementation Plan>> Next, we will refer to Figure 8 A second embodiment of the present disclosure is described. Figure 8 is a diagram showing an example of a cross-sectional structure of the pixel 21 of the present embodiment. In the present embodiment, the capacitance can be increased by using a metal oxide semiconductor (MOS) capacitor as the above-mentioned capacitor 157. Therefore, according to the present embodiment, the conversion efficiency at high illumination can be reduced, and the saturation signal amount of the pixel 21 can be increased. Hereinafter, the detailed structure of the pixel 21 according to the present embodiment will be described.

[0070] Specifically, Figure 8 As shown in the left figure of FIG. 1 , the pixel 21 according to the present embodiment mainly includes, as in the first embodiment, a semiconductor substrate 300 made of, for example, silicon and a wiring layer 400 provided on the upper surface of the semiconductor substrate 300. In addition, the pixel 21 of the present embodiment has Figure 3 Note that components other than the MOS capacitor 430 are the same as those of the first embodiment, and thus description thereof is omitted here.

[0071] In this embodiment, by enlarging Figure 8 The wiring layer 400 in the left figure is obtained Figure 8 As shown in the right figure of FIG. 1 , the MOS capacitor 430 used as the capacitor 157 is provided on the surface of the semiconductor substrate 300 ( Figure 8). The MOS capacitor 430 is disposed on a diffusion region 308 shared by a reset transistor (RST) 306r and a conversion efficiency switching transistor (FDG) 306f in a semiconductor substrate 300. Specifically, the MOS capacitor 430 includes an electrode made of a metal film or a polysilicon film (which is the same as the gate electrode of the pixel transistor 306) disposed on the surface of the semiconductor substrate 300, an insulating film (oxide film) made of, for example, a silicon oxide film disposed below the electrode, and a stack of the diffusion region 308. In the MOS capacitor 430, the capacitance can be increased by increasing the area of ​​the interface of the stack. That is, in the present embodiment, the capacitance can be increased by increasing the area of ​​the electrode (the area in contact with the semiconductor substrate 300). In addition, in the present embodiment, the capacitance can be further increased by reducing the film thickness of the insulating film or using a material having a high relative dielectric constant (hafnium oxide (HfO2)) to form the insulating film.

[0072] As described above, in the present embodiment, the capacitance can be increased by using the MOS capacitor 430 for the capacitor 157. Therefore, according to the present embodiment, the capacitor 157 has a high capacitance, so that the conversion efficiency at high illumination can be reduced, and the saturation signal amount of the pixel 21 can be increased. In addition, the MOS capacitor 430 can be formed simultaneously with the pixel transistor 306, so in the present embodiment, even if the capacitor 157 is made of the MOS capacitor 430, it is possible to avoid increasing the manufacturing process of the image pickup device 1.

[0073] <<4. Third Implementation Plan>> Next, we will refer to Fig. 9 A second embodiment of the present disclosure is described. Fig. 9 304 is a diagram showing an example of a cross-sectional configuration of the pixel 21 of the present embodiment. In the present embodiment, a capacitor is added to the configuration of the first embodiment by solid-phase diffusion of impurities to the sidewalls of the PD 304, thereby making it possible to increase the accumulated charge amount of the PD 304 itself and further increase the saturation signal amount of the pixel 21. Hereinafter, the detailed configuration of the pixel 21 according to the present embodiment will be described.

[0074] Specifically, Fig. 9 As shown in FIG. 1 , the pixel 21 according to the present embodiment mainly includes, as in the first embodiment, a semiconductor substrate 300 made of, for example, silicon and a wiring layer 400 provided on the upper surface of the semiconductor substrate 300. In addition, the pixel 21 of the present embodiment has Figure 3 Note that components provided except for the semiconductor substrate 300 are the same as those of the first embodiment, and thus description thereof is omitted here.

[0075] like Fig. 9As shown, also in this embodiment, as in the first embodiment, in the semiconductor substrate 300, the PD 304 having the first conductivity type (e.g., n-type) impurity is disposed in the region 302 having the second conductivity type (e.g., p-type) impurity. In addition, the PD 304 is separated and divided by the pixel separation section 320 for each pixel 21. As described above, as a penetration type DTI, the pixel separation section 320 includes a groove disposed to penetrate the semiconductor substrate 300 along the film thickness direction of the semiconductor substrate 300, a silicon oxide film 314 covering the sidewall of the groove, and a polysilicon film 316 embedded in the groove.

[0076] Furthermore, in the present embodiment, between the PD 304 and the pixel separation section 320, a solid phase diffusion layer (diffusion region) 312 having a second conductivity type (e.g., p-type) impurity and a solid phase diffusion layer 310 having a first conductivity type (e.g., n-type) impurity are sequentially provided from the pixel separation section 320 side toward the PD 304. By providing such solid phase diffusion layers 310 and 312, a strong electric field region is generated in the PN junction portion, and this region can hold the charge generated by the PD 304 as a capacitor. Therefore, according to the present embodiment, since more generated charge can be held, the accumulated charge amount of the PD 304 increases, and therefore, the saturation signal amount of the pixel 21 can be further increased.

[0077] In addition, the solid phase diffusion layers 310 and 312 are layers formed by solid phase diffusion to be described below, and are formed by diffusing impurities from the trenches when forming the pixel separation portion 320. Solid phase diffusion is one of conformal doping methods that can uniformly introduce impurities into a semiconductor, and the impurities can be introduced more uniformly than an ion implantation method.

[0078] For example, a trench is formed to penetrate along the thickness direction of the semiconductor substrate 300. Then, a silicon oxide film containing n-type impurities is formed inside the trench, and heat treatment is performed to dope the impurities from the silicon oxide film to the semiconductor substrate 300 side (solid phase diffusion). Next, the silicon oxide film containing n-type impurities in the trench is removed, and heat treatment is performed again to diffuse the impurities into the semiconductor substrate 300, thereby forming a solid phase diffusion layer 310.

[0079] Furthermore, a silicon oxide film containing p-type impurities is formed inside the trench, and heat treatment is performed to dope the impurities from the silicon oxide film to the semiconductor substrate 300 side (solid phase diffusion), thereby forming a solid phase diffusion layer 312. Furthermore, the silicon oxide film containing n-type impurities in the trench is removed, and a silicon oxide film 314 and a polysilicon film 316 are formed in the trench to form a pixel separation portion 320.

[0080] Note that in this embodiment, the solid phase diffusion layer 310 having the first conductivity type (eg, n type) impurity is not limited to the solid phase diffusion layer formed by the above-described solid phase diffusion, and may be formed by implanting impurities using an ion implantation method.

[0081] In addition, in this embodiment, if Fig. 9 As shown, the gate electrode of the transfer transistor 306t may have a buried electric gate portion buried in the semiconductor substrate 300. The buried gate portion may be formed, for example, by etching a groove from the front side of the semiconductor substrate 300, forming a gate insulating film, and further burying a polysilicon film in the groove. Then, by applying a voltage to the buried gate portion via the gate electrode of the transfer transistor 306t, the potential of the semiconductor region around the buried gate portion can be effectively adjusted. In addition, the charge generated by the PD 304 in the deep part of the semiconductor substrate 300 passes through the area adjusted by the buried electrode portion and is transmitted to the FD portion 154. Therefore, the potential can be effectively adjusted by such a buried electrode portion, and thus the charge can be effectively transmitted.

[0082] As described above, in the present embodiment, capacitors are added to the side walls of the PD 304 by solid phase diffusion of impurities, thereby making it possible to increase the accumulated charge amount of the PD 304 itself and further increase the saturation signal amount of the pixel 21 .

[0083] <<5. Fourth Implementation Plan>> In the embodiment of the present disclosure, the connection destination of the capacitor 157 is not limited to the ground, and may be a power supply or a well region of the semiconductor substrate 300. In addition, in the embodiment of the present disclosure, the capacitor 157 is not limited to one capacitor, and may be made of two or more capacitors. Therefore, as a fourth embodiment of the present disclosure, reference will be made to Fig.10 and Fig.11 Such an embodiment is described. Fig.10 is a circuit diagram showing an example of a circuit configuration of a pixel according to the present embodiment, and Fig.11 : is a diagram showing an example of a cross-sectional structure of a pixel according to the present embodiment.

[0084] exist Figure 3 In the embodiment, one end of capacitor 157 is connected to ground, but in Fig.10 In the example shown, one end of the capacitor 157 is electrically connected to the well region of the semiconductor substrate 300. Note that in this embodiment, the connection destination of one terminal of the capacitor 157 is not limited to the ground or the well region, and one terminal of the capacitor 157 can be electrically connected to a power source, that is, a power supply line 167.

[0085] exist Fig.11In the example of FIG. 1 , two three-dimensional MIM capacitors 420a and 420b are used for capacitor 157, and the two three-dimensional MIM capacitors 420b and 420a can be electrically connected to different parts. Specifically, one three-dimensional MIM capacitor 420a is electrically connected to wiring 404c connected to the ground, and the other three-dimensional MIM capacitor 420b is electrically connected to wiring 404d connected to the well region. In other words, in the present embodiment, more than two three-dimensional MIM capacitors 420 can be used for capacitor 157. In addition, in the present embodiment, a plurality of three-dimensional MIM capacitors 420 can be electrically connected to different destinations selected from a power supply, a ground, or a well region.

[0086] Note that in the present embodiment, the plurality of three-dimensional MIM capacitors 420 constituting the capacitor 157 may be electrically connected to the same one selected from a power supply, a ground, or a well region.

[0087] In addition, Fig.11 In the example of FIG. 1 , two three-dimensional MIM capacitors 420 a and 420 b are used for the capacitor 157, but the present embodiment is not limited thereto, and a plurality of MOS capacitors 430 may be used for the capacitor 157. Also in this case, the plurality of MOS capacitors 430 may be electrically connected to different destinations selected from a power supply, a ground, or a well region, or may be electrically connected to the same destination.

[0088] <<6. Fifth Implementation Plan>> In the embodiment of the present disclosure, a pad (connection pad) provided on the substrate for connecting one terminal of the capacitor 157 to the ground or the like may be provided for each wiring network formed by the circuit for each pixel 21. Alternatively, in the embodiment of the present disclosure, one or more pads may be provided for each wiring network unit. Therefore, as a fifth embodiment of the present disclosure, reference will be made to Fig.12 and Fig.19 This embodiment and its variations are described. Fig.12 , Fig.13 as well as Figures 16 to 19 is an explanatory diagram for explaining the positional relationship between the wiring network and the pads according to the present embodiment, and Fig.14 and Fig.15 : is an explanatory diagram for explaining an example of a wiring network according to the present embodiment.

[0089] First, if Fig.12As shown on the left side of (in the case of one terminal), in the present embodiment, a pad 800 provided on the substrate for connection to the ground or the like may be provided for each wiring network 802 formed by the circuit of the pixel 21. In addition, the pad 800 may be arranged on the substrate so as to be adjacent to the corner of the area where the wiring network 802 is provided, or may be arranged to be adjacent to the center of one side of the area where the wiring network 802 is provided.

[0090] In addition, if Fig.12 As shown in the middle of (in the case of two terminals), in the present embodiment, two pads 800 may be provided for each wiring network 802. In addition, the two pads 800 may be provided at bilaterally symmetrical positions so as to be adjacent to the center of one side of the area of ​​the wiring network 802 and to sandwich the area of ​​the wiring network 802.

[0091] In addition, if Fig.12 As shown on the right side of (in the case of four terminals), in this embodiment, four pads 800 can be provided for each wiring network 802. In addition, as Fig.12 As shown in the upper right side of FIG. , four pads 800 may be disposed at bilaterally symmetrical positions so as to be adjacent to the corners of the area of ​​the wiring network 802 and to sandwich the area of ​​the wiring network 802. Fig.12 As shown in the lower right side of , four pads 800 may be disposed at vertically symmetrical and bilaterally symmetrical positions so as to be adjacent to the center of one side of the area of ​​the wiring network 802 and to vertically and laterally sandwich the area of ​​the wiring network 802 .

[0092] In addition, if Fig.13 As shown, the circuit of a pixel 21 may include multiple (in Fig.13 In the example of FIG. 8 , there are four) wiring networks 802. In this case, a pad 800 may be provided for each wiring network 802.

[0093] In this embodiment, the wiring pattern of the wiring network 802 is not particularly limited. For example, in this embodiment, Fig.14 As shown in the upper left side of FIG. 8 , the wiring network 802 may include a plurality of strip wirings extending in the left-right direction of the substrate, and may be connected to each other at one side of each strip wiring. Alternatively, in this embodiment, as shown in FIG. Fig.14 As shown in the upper right side of FIG. , the wiring network 802 can be connected to each other on both sides of each strip wiring. In addition, in this embodiment, as shown in FIG. Fig.14 As shown on the lower side of FIG. 8 , the wiring network 802 may include a mesh-like wiring.

[0094] In addition, if Fig.15As shown, the wiring network 802 constituting the circuit of the pixel 21 can be arranged across the two stacked substrates 70a and 70b. In this case, the wiring on the two substrates 70a side and the wiring on the substrate 70b side can be electrically connected through a through hole (not shown).

[0095] Furthermore, in the present embodiment, the pads 800a and 800b are not limited to being directly connected to the wiring network 802, and may be connected to the wiring network 802 via a circuit constituting a potential generating device 804 (hereinafter, referred to as a potential generating device), such as Fig.16 Here, pad 800a is a pad connected to a power source, and pad 800b is a pad connected to a ground. In addition, the potential generating device 804 may include, for example, a circuit structure for generating a reference potential and a driving circuit electrically connected to the circuit structure for generating the reference potential and driving the pixel 21.

[0096] In addition, in this embodiment, if Fig.17 As shown, the circuit of one pixel 21 may include a plurality of wiring networks 802. In this case, a potential generating device 804 may be provided for each wiring network 802, and each potential generating device 804 may be connected to a pad 800a connected to a power source and a pad 800b connected to a ground.

[0097] In addition, in this embodiment, the configuration can be modified as Fig.17 The configuration example is set to span the two stacked substrates 70a and 70b. Specifically, in this embodiment, as Fig.18 As shown, a plurality of wiring networks 802 are arranged on one substrate 70a, and pads 800a and 800b and a potential generating device 804 are arranged on another substrate 70b. In this embodiment, the wiring networks 802 and the potential generating device 804 arranged on different substrates 70a and 70b are electrically connected through through holes 806. Note that Fig.18 , the wiring network 802 and the potential generating device 804 are connected through one through hole 806, but the present embodiment is not limited thereto, and the wiring network 802 and the potential generating device 804 may be connected through a plurality of through holes 806. Fig.18 , a plan view of two substrates 70a and 70b is shown side by side in the left-right direction.

[0098] In addition, in this embodiment, Fig.18 In the configuration example of FIG. 8 , a circuit 810 constituting a driving section (hereinafter, referred to as a driving device) for driving the pixel 21 is provided. Specifically, in the present embodiment, Fig.19As shown, a plurality of wiring networks 802 are arranged on one substrate 70a, and pads 800a and 800b, a potential generating device 804 and a driving device 810 are arranged on another substrate 70b. In the present embodiment, the wiring networks 802 and the driving devices 810 arranged on different substrates 70a and 70b are electrically connected through through holes 806. A driving device 810 is arranged for each wiring network 802. In addition, each driving device 810 can be connected to the potential generating device 804, the pad 800a connected to the power supply and the pad 800b connected to the ground.

[0099] <<7. Conclusion>> As described above, according to the embodiment of the present disclosure, the saturation signal amount can be increased in the configuration in which the ADC 42 is provided for each pixel 21 .

[0100] In addition, the image pickup device 1 according to the embodiment of the present disclosure can be manufactured by using a method, equipment, and conditions for manufacturing a conventional semiconductor device. That is, the image pickup device 1 according to the present embodiment can be manufactured using an existing semiconductor device manufacturing process.

[0101] Note that examples of the above methods include physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD). Examples of PVD methods may include vacuum vapor deposition, electron beam (EB) vapor deposition, various sputtering methods (magnetron sputtering, radio frequency (RF)-direct current (DC) coupled bias sputtering, electron cyclotron resonance (ECR) sputtering, counter target sputtering, high frequency sputtering, etc.), ion plating, laser ablation, molecular beam epitaxy (MBE), and laser transfer. Examples of CVD methods may include plasma CVD, thermal CVD, organometallic (MO) CVD, and optical CVD. In addition, other methods may include electrolytic plating, electroless plating and spin coating; immersion; casting; microcontact printing; drop casting; various printing methods (such as screen printing, inkjet printing, offset printing, gravure printing and flexographic printing); stamping; spraying; and various coating methods (such as air blade coating, blade coating, rod coating and knife coating, extrusion coating, reverse roll coating, transfer roll coating, gravure coating, contact coating (kiss coater method), cast coating, spray coating, slit hole coating and calendar coater method). In addition, examples of patterning methods may include chemical etching such as shadow mask, laser transfer and photolithography, and physical etching using ultraviolet rays, lasers, etc. In addition, examples of planarization techniques may include chemical mechanical polishing (CMP) method, laser planarization method, reflow method, etc.

[0102] In addition, the above-mentioned imaging device 1 is an example of a light detection device to which the technology according to the present disclosure can be applied. That is, the technology according to the present disclosure is not limited to the technology applied to the imaging device, and can be applied to a device (light detection device) that detects light, such as a distance measuring device or an inspection device using light, for example.

[0103] <<8. Application Examples>> <8.1 Camera Application Examples> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure can be applied to cameras, etc. Therefore, reference will be made to Fig. 20 A configuration example of a camera 700 as an electronic device to which the present technology is applied is described. Fig. 20 is an explanatory diagram showing an example of a schematic functional configuration of a camera 700 to which the technology according to the present disclosure (the present technology) can be applied.

[0104] like Fig. 20 As shown, the camera 700 includes an image pickup device 1, an optical lens 710, a shutter mechanism 712, a drive circuit unit 714, and a signal processing circuit unit 716. The optical lens 710 forms an image of image light (incident light) from a subject on an image pickup surface of the image pickup device 1. Therefore, signal charge is accumulated in the image pickup element 100 of the image pickup device 1 for a period of time. The shutter mechanism 712 opens and closes to control the light irradiation period and the light shielding period of the image pickup device 1. The drive circuit unit 714 supplies a drive signal for controlling the signal transmission operation of the image pickup device 1, the shutter operation of the shutter mechanism 712, etc. to these devices. That is, the image pickup device 1 performs signal transmission based on the drive signal (timing signal) supplied from the drive circuit unit 714. The signal processing circuit unit 716 performs various types of signal processing. For example, the signal processing circuit unit 716 outputs the signal-processed video signal to a storage medium (not shown) such as a memory or a display unit (not shown).

[0105] <8.2 Examples of smartphone applications> The technology according to the present disclosure (the present technology) can be further applied to various products. For example, the technology according to the present disclosure can be applied to smartphones, etc. Therefore, reference will be made to Fig.21 A configuration example of a smartphone 900 as an electronic device to which the present technology is applied will be described. Fig.21 is a block diagram showing an example of a schematic functional configuration of a smartphone 900 to which the technology according to the present disclosure (the present technology) can be applied.

[0106] like Fig.21As shown, the smartphone 900 includes a central processing unit (CPU) 901, a read-only memory (ROM) 902, and a random access memory (RAM) 903. In addition, the smartphone 900 includes a storage device 904, a communication module 905, and a sensor module 907. In addition, the smartphone 900 includes a camera 1, a display device 910, a speaker 911, a microphone 912, an input device 913, and a bus 914. In addition, the smartphone 900 may include a processing circuit such as a digital signal processor (DSP) instead of the CPU 901 or in addition to the CPU 901.

[0107] The CPU 901 functions as an operation processing device and a control device, and controls the overall operation or a part thereof in the smartphone 900 according to various programs recorded in the ROM 902, the RAM 903, the storage device 904, and the like. The ROM 902 stores programs, operation parameters, and the like used by the CPU 901. The RAM 903 mainly stores programs used by the CPU 901 in execution, parameters that change appropriately in execution, and the like. The CPU 901, the ROM 902, and the RAM 903 are connected to each other via a bus 914. In addition, the storage device 904 is a device for data storage configured as an example of a storage unit of the smartphone 900. The storage device 904 includes, for example, a magnetic storage device such as a hard disk drive (HDD), a semiconductor storage device, an optical storage device, and the like. The storage device 904 stores programs and various data executed by the CPU 901, various data acquired from the outside, and the like.

[0108] The communication module 905 is a communication interface including, for example, a communication device for connecting to a communication network 906. The communication module 905 may be, for example, a communication card for a wired or wireless local area network (LAN), Bluetooth (registered trademark), a wireless USB (WUSB), etc. In addition, the communication module 905 may be a router for optical communication, a router for an asymmetric digital subscriber line (ADSL), a modem for various types of communication, etc. The communication module 905 uses a predetermined protocol such as a transmission control protocol (TCP) / Internet protocol (IP) to send signals to the Internet and other communication devices, etc., and receives signals from the Internet and other communication devices, etc. In addition, the communication network 906 connected to the communication module 905 is a network connected in a wired or wireless manner, and is, for example, the Internet, a home LAN, infrared communication, satellite communication, etc.

[0109] The sensor module 907 includes, for example, various sensors such as motion sensors (e.g., accelerometers, gyroscope sensors, geomagnetic sensors, etc.), biometric information sensors (e.g., pulse sensors, blood pressure sensors, fingerprint sensors, etc.) or position sensors (e.g., global navigation satellite system (GNSS) receivers, etc.).

[0110] The camera device 1 is set on the surface of the smartphone 900, and can take pictures of objects located on the back side or front side of the smartphone 900. Specifically, the camera device 1 may include an image pickup element (not shown) such as a complementary MOS (CMOS) image sensor to which the technology according to the present disclosure (the present technology) can be applied, and a signal processing circuit (not shown) that performs image pickup signal processing on the signal that has undergone photoelectric conversion of the image pickup element. In addition, the camera device 1 may also include an optical system mechanism (not shown), the optical system mechanism including an image pickup lens, a zoom lens, a focus lens, etc.; and a drive system mechanism (not shown) that controls the operation of the optical system mechanism. Then, the image pickup element collects incident light from the object as an optical image, and the signal processing circuit performs photoelectric conversion on the formed optical image in units of pixels, reads the signal of each pixel as an image pickup signal, and performs image processing to obtain the captured image.

[0111] The display device 910 is provided on the surface of the smartphone 900 and may be, for example, a display device such as a liquid crystal display (LCD) or an organic electroluminescent (EL) display. The display device 910 may display an operation screen, a captured image acquired by the above-described camera 1, and the like.

[0112] The speaker 911 can output, for example, a call voice, sound accompanying the video content displayed by the display device 910 , and the like to the user.

[0113] The microphone 912 may collect, for example, a user's call voice, a voice including a command to activate a function of the smartphone 900 , and sounds in the environment surrounding the smartphone 900 .

[0114] The input device 913 is a button, a keyboard, a touch panel, a mouse, or other device operated by a user. The input device 913 includes an input control circuit that generates an input signal based on information input by the user and outputs the input signal to the CPU 901. By operating the input device 913, the user can input various data to the smartphone 900 and give instructions on processing operations.

[0115] The configuration example of the smartphone 900 has been described above. The above-mentioned respective components may be configured using general-purpose members, or may be configured by hardware specialized for the functions of the respective components. Such configuration may be appropriately changed according to the technical level at the time of implementation.

[0116] <8.3 Application examples of mobile objects> The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented as a device installed on any type of mobile body such as a car, an electric car, a hybrid car, a motorcycle, a bicycle, a personal mobile device, an airplane, a drone, a ship, and a robot.

[0117] Fig. 22 : is a block diagram showing an example of a schematic configuration of a vehicle control system as an example of a moving body control system to which the technology according to the embodiment of the present invention can be applied.

[0118] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Fig. 22 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, as a functional configuration of the integrated control unit 12050, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown.

[0119] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various types of programs. For example, the drive system control unit 12010 serves as a control device for the following devices: a drive force generating device such as an internal combustion engine or a drive motor for generating a vehicle drive force, a drive force transmitting mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a vehicle braking force.

[0120] The body system control unit 12020 controls the operation of various types of devices provided on the vehicle body according to various types of programs. For example, the body system control unit 12020 is used as a control device for a keyless entry system, a smart key system, a power window device, or various lights such as a headlight, a reverse light, a brake light, a turn signal light, or a fog light. In this case, a radio wave transmitted from a mobile device that replaces the key or a signal of various types of switches may be input to the body system control unit 12020. The body system control unit 12020 receives input of these radio waves or signals, and controls a door lock device, a power window device, or a light, etc. of the vehicle.

[0121] The vehicle exterior information detection unit 12030 detects information outside the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the vehicle exterior and receives the captured image. Based on the received image, the vehicle exterior information detection unit 12030 can perform detection processing of objects such as people, vehicles, obstacles, signs, or characters on the road surface, or can perform detection processing of the distance to the above-mentioned objects.

[0122] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or can output the electrical signal as distance measurement information. In addition, the light received by the imaging unit 12031 can be visible light, or can be invisible light such as infrared rays.

[0123] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. The in-vehicle information detection unit 12040 is connected to, for example, a driver state detection unit 12041 that detects the driver's state. The driver state detection unit 12041 includes, for example, a camera that takes a picture of the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or can determine whether the driver is dozing off.

[0124] The microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device based on the information outside or inside the vehicle obtained by the vehicle outside information detection unit 12030 or the vehicle inside information detection unit 12040, and output the control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of the advanced driver assistance system (ADAS), including collision avoidance or impact mitigation of the vehicle, following driving based on the vehicle-to-vehicle distance, speed maintenance driving, vehicle collision warning or vehicle lane departure warning, etc.

[0125] In addition, by controlling the driving force generating device, steering mechanism or braking device, etc. based on the information outside or inside the vehicle obtained by the external information detection unit 12030 or the internal information detection unit 12040, the microcomputer 12051 can perform collaborative control aimed at achieving automatic driving, etc., wherein the automatic driving enables the vehicle to drive autonomously without relying on the driver's operation.

[0126] In addition, based on the information outside the vehicle obtained by the vehicle exterior information detection unit 12030, the microcomputer 12051 can output a control command to the body system control unit 12020. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to change from high beam to low beam, for example, according to the position of the preceding vehicle or the oncoming vehicle detected by the vehicle exterior information detection unit 12030.

[0127] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying the vehicle's passengers or the outside of the vehicle of information. Fig. 22In the example of , as the output device, an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown. For example, the display portion 12062 may include at least one of an in-vehicle display and a head-up display.

[0128] Fig.23 12031 is a diagram showing an example of the installation position of the camera unit 12031.

[0129] exist Fig.23 In the figure, the camera unit 12031 includes camera units 12101, 12102, 12103, 12104 and 12105.

[0130] The camera units 12101, 12102, 12103, 12104 and 12105 are, for example, arranged at the front nose, rearview mirror, rear bumper and rear door of the vehicle 12100 and at the upper part of the windshield in the vehicle compartment. The camera unit 12101 arranged at the front nose and the camera unit 12105 arranged at the upper part of the windshield in the vehicle compartment mainly obtain images in front of the vehicle 12100. The camera units 12102 and 12103 arranged at the rearview mirror mainly obtain images on both sides of the vehicle 12100. The camera unit 12104 arranged at the rear bumper or rear door mainly obtains images behind the vehicle 12100. The camera unit 12105 arranged at the upper part of the windshield in the vehicle compartment is mainly used to detect the vehicle in front, pedestrians, obstacles, traffic lights, traffic signs or lanes, etc.

[0131] By the way, Fig.23 An example of the imaging range of the imaging units 12101 to 12104 is shown. The imaging range 12111 indicates the imaging range of the imaging unit 12101 provided at the front nose. The imaging ranges 12112 and 12113 respectively indicate the imaging ranges of the imaging units 12102 and 12103 provided at the rearview mirror. The imaging range 12114 indicates the imaging range of the imaging unit 12104 provided at the rear bumper or the rear door. For example, by superimposing the image data captured by the imaging units 12101 to 12104, a bird's-eye view image of the vehicle 12100 observed from above is obtained.

[0132] At least one of the imaging units 12101 to 12104 may have a function of obtaining distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0133] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can determine the distance to each three-dimensional object within the camera ranges 12111 to 12114 and the time change of the distance (relative speed with respect to the vehicle 12100), thereby extracting the nearest three-dimensional object as the front vehicle, in particular, the three-dimensional object exists on the driving path of the vehicle 12100 and travels in the same direction as the vehicle 12100 at a predetermined speed (e.g., equal to or greater than 0 km / h). In addition, the microcomputer 12051 can pre-set the inter-vehicle distance to be maintained with the front vehicle, and perform automatic braking control (including follow-up stop control) or automatic acceleration control (including follow-up start control), etc. Therefore, cooperative control such as automatic driving, which is intended to make the vehicle travel autonomously without relying on the driver's operation, can be performed.

[0134] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12501 can classify the three-dimensional object data of the three-dimensional object into three-dimensional object data of two-wheeled vehicles, standard vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects, extract the classified three-dimensional object data, and use the extracted three-dimensional object data to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can visually identify and obstacles that the driver of the vehicle 12100 is difficult to visually identify. Then, the microcomputer 12051 determines a collision risk indicating the risk of collision with each obstacle. In the case where the collision risk is equal to or higher than the set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver via the audio speaker 12061 or the display unit 12062, and performs forced deceleration or evasive steering via the drive system control unit 12010. Therefore, the microcomputer 12051 can assist driving to avoid collisions.

[0135] At least one of the camera units 12101 to 12104 may be an infrared camera that detects infrared rays. The microcomputer 12051 may identify a pedestrian, for example, by determining whether a pedestrian exists in the camera images of the camera units 12101 to 12104. For example, such identification of pedestrians is performed by the following steps: a step of extracting feature points in the camera images of the camera units 12101 to 12104 as infrared cameras; and a step of performing pattern matching processing on a series of feature points representing the contour of an object to determine whether it is a pedestrian. If the microcomputer 12051 determines that a pedestrian exists in the camera images of the camera units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 so that a square contour line for emphasis is displayed in a manner superimposed on the identified pedestrian. The sound / image output unit 12052 may also control the display unit 12062 so that an icon representing a pedestrian or the like is displayed at a desired position.

[0136] An example of a vehicle control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to the imaging unit 12031 and the like in the above-described configuration.

[0137] <<9.Supplement>> Although the preferred embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the technical scope of the present disclosure is not limited to these examples. Obviously, a person skilled in the art of the present disclosure can think of various changes or deformations within the scope of the technical idea described in the claims, and naturally understand that these also belong to the technical scope of the present disclosure.

[0138] In addition, the effects described herein are merely illustrative or exemplary and are not restrictive. That is, the technology according to the present disclosure can exhibit other effects that are obvious to those skilled in the art based on the description herein together with or in place of the above effects.

[0139] This technology can also have the following configurations: (1) A light detection element comprising: a photoelectric conversion unit that is provided in the semiconductor substrate and generates charges corresponding to incident light; a first accumulation section that accumulates the charges generated by the photoelectric conversion section; an amplifying transistor that generates an input signal corresponding to the amount of the charge accumulated in the first accumulating portion; a second accumulation section to which saturated charges are transferred from the photoelectric conversion section via the first accumulation section; a conversion efficiency switching transistor that transfers the saturated charge to the second accumulation section to switch the conversion efficiency; a reset transistor that resets the charge accumulated in the first accumulation section and the saturated charge accumulated in the second accumulation section; and a differential input circuit that compares the input signal generated by the amplifying transistor with a reference signal and outputs a comparison result, wherein The second accumulation unit comprises: A metal-insulator-metal (MIM) capacitor or a metal oxide semiconductor (MOS) capacitor having a three-dimensional structure. (2) The light detection element according to (1), wherein The MIM capacitor has A stacked structure comprising a pair of metal layers sandwiching an insulating layer, and A cross section along a stacking direction of the stacked structure has a substantially rectangular wave shape. (3) The light detection element according to (2), wherein one of the pair of metal layers is electrically connected to a power source, a ground, or a well region of the semiconductor substrate. (4) The light detection element according to (1), wherein The second accumulation section includes a plurality of the MIM capacitors. (5) The light detection element according to (4), wherein: Each of the plurality of MIM capacitors has a stacked structure including a pair of metal layers sandwiching an insulating layer, and One of the pair of metal layers of each of the plurality of MIM capacitors is electrically connected to a different one selected from a power source, a ground, or a well region of the semiconductor substrate. (6) The light detection element according to any one of (1) to (5), wherein the MIM capacitor is provided in a wiring layer stacked on the semiconductor substrate. (7) The light detection element according to (1), wherein the MOS capacitor includes an oxide film provided on the semiconductor substrate and an electrode provided on the oxide film. (8) The light detection element according to (7), wherein the electrode is electrically connected to a power source, a ground, or a well region of the semiconductor substrate. (9) The light detection element according to (1), wherein The second accumulation section includes a plurality of the MOS capacitors. (10) The light detection element according to (9), wherein: Each of the plurality of MOS capacitors has an oxide film provided on the semiconductor substrate and an electrode provided on the oxide film, and The electrode of each of the plurality of MOS capacitors is electrically connected to a different one selected from a power source, a ground, or a well region of the semiconductor substrate. (11) The light detection element according to any one of (1) to (10), wherein The photoelectric conversion unit includes impurities of a first conductivity type, and The light detection element further comprises: a pixel separation portion that penetrates the semiconductor substrate in a film thickness direction of the semiconductor substrate and defines the photoelectric conversion portion; and A diffusion region is provided between the photoelectric conversion portion and the pixel separation portion and contains impurities of a second conductivity type different from the first conductivity type. (12) The light detection element according to (11), wherein the diffusion region contains the second conductivity type impurity diffused from an inner wall of a trench provided when forming the pixel separation portion. (13) The light detection element according to (1), wherein one terminal of the second accumulating portion is electrically connected to one or more connection pads for connecting to a power source or a ground via wiring. (14) The light detection element according to any one of (1) to (13), further comprising: a positive feedback circuit connected to the differential input circuit; and A storage unit is connected to the positive feedback circuit. (15) A light detection device comprises: a semiconductor substrate on which a plurality of light detection elements are disposed; and another semiconductor substrate stacked on the semiconductor substrate, wherein: The light detection element comprises: a photoelectric conversion unit that generates electric charges corresponding to incident light; a first accumulation section that accumulates the charges generated by the photoelectric conversion section; an amplifying transistor that generates an input signal corresponding to the amount of the charge accumulated in the first accumulating portion; a second accumulation section to which saturated charges are transferred from the photoelectric conversion section via the first accumulation section; a conversion efficiency switching transistor that transfers the saturated charge to the second accumulation section to switch the conversion efficiency; a reset transistor that resets the charge accumulated in the first accumulation section and the saturated charge accumulated in the second accumulation section; and a differential input circuit that compares the input signal generated by the amplifying transistor with a reference signal and outputs a comparison result, and The second accumulation unit comprises: A metal-insulator-metal (MIM) capacitor or a metal oxide semiconductor (MOS) capacitor having a three-dimensional structure. (16) The light detection device according to (15), wherein one terminal of the second accumulation portion is electrically connected to one or more connection pads provided on the other semiconductor substrate for connecting to a power source, a ground or a well region via a through hole penetrating a wiring layer between the semiconductor substrate and the other semiconductor substrate. (17) An electronic device having a light detection device including a light detection element mounted thereon, wherein: The light detection element comprises: a photoelectric conversion unit that is provided in the semiconductor substrate and generates charges corresponding to incident light; a first accumulation section that accumulates the charges generated by the photoelectric conversion section; an amplifying transistor that generates an input signal corresponding to the amount of the charge accumulated in the first accumulating portion; a second accumulation section to which saturated charges are transferred from the photoelectric conversion section via the first accumulation section; a conversion efficiency switching transistor that transfers the saturated charge to the second accumulation section to switch the conversion efficiency; a reset transistor that resets the charge accumulated in the first accumulation section and the saturated charge accumulated in the second accumulation section; and a differential input circuit that compares the input signal generated by the amplifying transistor with a reference signal and outputs a comparison result, and The second accumulation unit comprises: A metal-insulator-metal (MIM) capacitor or a metal oxide semiconductor (MOS) capacitor having a three-dimensional structure. Reference numerals list

[0140] 1 Camera device 11Semiconductor substrate 21 pixels 22 Pixel array unit 23 pixel driving circuit 24DAC 25 vertical drive circuit 26 sensor amplifier 27 Output unit 28 Timing Generation Circuit 41 pixel circuit 42ADC 52 Data storage unit 61 Comparator 62 Positive feedback circuit 70a,70b substrate 101,152,304PD 102,153,306t transfer transistor 103,154FD Department 151 discharge transistor 155,202,306a Amplifier transistor 156,201,306f conversion efficiency switching transistor 157 Capacitor 158,204,306r Reset transistor 159,160,161,162,163,165 Transistors 167 Power Cord 170 nodes 203 Select transistor 205 vertical signal line 300Semiconductor substrate Area 302 306 pixel transistor 308 diffusion area 310,312 solid diffusion layer 314 Silicon oxide film 316 polysilicon film 320 pixel separation 400 wiring layer 402 insulation film 404,404a,404b,404c,404d wiring 410,806 through hole 420,420a,420b 3D MIM capacitors 422,426 metal layers 424 dielectric layer 428 Contact Department 430MOS capacitor 502 planarization film 504 light-shielding film 506 on-chip lens 800,800a,800b pads 802 Wiring Network 804 potential generating device 810 drive unit.

Claims

1. A light detection element, comprising: a photoelectric conversion unit that is provided in the semiconductor substrate and generates charges corresponding to incident light; a first accumulation section that accumulates the charges generated by the photoelectric conversion section; an amplifying transistor that generates an input signal corresponding to the amount of the charge accumulated in the first accumulating portion; a second accumulation section to which saturated charges are transferred from the photoelectric conversion section via the first accumulation section; a conversion efficiency switching transistor that transfers the saturated charge to the second accumulation section to switch the conversion efficiency; a reset transistor that resets the charge accumulated in the first accumulation section and the saturated charge accumulated in the second accumulation section; as well as a differential input circuit that compares the input signal generated by the amplifying transistor with a reference signal and outputs a comparison result, wherein The second accumulation unit comprises: A metal-insulator-metal (MIM) capacitor or a metal oxide semiconductor (MOS) capacitor having a three-dimensional structure.

2. The light detecting element according to claim 1, wherein The MIM capacitor has A stacked structure comprising a pair of metal layers sandwiching an insulating layer, and A cross section along a stacking direction of the stacked structure has a substantially rectangular wave shape.

3. The light detecting element according to claim 2, wherein: One of the pair of metal layers is electrically connected to a power source, a ground, or a well region of the semiconductor substrate.

4. The light detecting element according to claim 1, wherein The second accumulation section includes a plurality of the MIM capacitors.

5. The light detecting element according to claim 4, wherein Each of the plurality of MIM capacitors has a stacked structure including a pair of metal layers sandwiching an insulating layer, and One of the pair of metal layers of each of the plurality of MIM capacitors is electrically connected to a different one selected from a power source, a ground, or a well region of the semiconductor substrate.

6. The light detecting element according to claim 1, wherein The MIM capacitor is provided in a wiring layer stacked on the semiconductor substrate.

7. The light detecting element according to claim 1, wherein The MOS capacitor includes an oxide film provided on the semiconductor substrate and an electrode provided on the oxide film.

8. The light detecting element according to claim 7, wherein The electrode is electrically connected to a power source, a ground, or a well region of the semiconductor substrate.

9. The light detecting element according to claim 1, wherein The second accumulation section includes a plurality of the MOS capacitors.

10. The light detecting element according to claim 9, wherein Each of the plurality of MOS capacitors has an oxide film provided on the semiconductor substrate and an electrode provided on the oxide film, and The electrode of each of the plurality of MOS capacitors is electrically connected to a different one selected from a power source, a ground, or a well region of the semiconductor substrate.

11. The light detecting element according to claim 1, wherein The photoelectric conversion unit includes impurities of a first conductivity type, and The light detection element further comprises: a pixel separation portion that penetrates the semiconductor substrate in a film thickness direction of the semiconductor substrate and defines the photoelectric conversion portion; and A diffusion region is provided between the photoelectric conversion portion and the pixel separation portion and contains impurities of a second conductivity type different from the first conductivity type.

12. The light detecting element according to claim 11, wherein The diffusion region contains impurities of the second conductivity type diffused from an inner wall of a trench provided when forming the pixel separation portion.

13. The light detecting element according to claim 1, wherein One terminal of the second accumulating section is electrically connected to one or more connection pads for connecting to a power source or a ground via wiring.

14. The light detecting element according to claim 1, further comprising: a positive feedback circuit connected to the differential input circuit; and A storage unit is connected to the positive feedback circuit.

15. An electronic device having a light detection device including a light detection element mounted thereon, wherein: The light detection element comprises: a photoelectric conversion unit that is provided in the semiconductor substrate and generates charges corresponding to incident light; a first accumulation section that accumulates the charges generated by the photoelectric conversion section; an amplifying transistor that generates an input signal corresponding to the amount of the charge accumulated in the first accumulating portion; a second accumulation section to which saturated charges are transferred from the photoelectric conversion section via the first accumulation section; a conversion efficiency switching transistor that transfers the saturated charge to the second accumulation section to switch the conversion efficiency; a reset transistor that resets the charge accumulated in the first accumulation section and the saturated charge accumulated in the second accumulation section; and a differential input circuit that compares the input signal generated by the amplifying transistor with a reference signal and outputs a comparison result, and The second accumulation unit comprises: A metal-insulator-metal (MIM) capacitor or a metal oxide semiconductor (MOS) capacitor having a three-dimensional structure.

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