Noise reduction filter circuit for linear voltage regulator and noise reduction filter method thereof

Abstract

The invention belongs to the field of integrated circuits, and particularly relates to a noise reduction filter circuit for a linear voltage regulator and a noise reduction filter method of the noise reduction filter circuit. The noise reduction filter circuit comprises a first switch tube, a first MOS tube, a first capacitor tube, an operational amplifier, a comparator, a second capacitor tube, a capacitor charging circuit and a digital circuit. Mainly by adjusting the bias voltage and the width-length ratio of the MOS tube, the MOS tube is equivalent to a high-resistance resistor, and rapid charging of the capacitor is achieved in cooperation with gating of the switching tube. According to the noise reduction filter circuit and the noise reduction filter method thereof, on the premise of effectively reducing the output noise of the circuit, the power-on speed reduction caused by large capacitance can be avoided, and the chip area can be reduced. The LDO is simple in structure and small in occupied area, and the requirements of the LDO for high integration, low noise and quick response are met.

Description

Technical Field

[0001] The invention belongs to the field of integrated circuits, and in particular relates to a noise reduction filter circuit for a linear voltage regulator and a noise reduction filter method thereof. Background Art

[0002] In the field of power management, low dropout linear regulator (LDO) is widely used in mobile phones, tablet computers, etc. due to its low power consumption, low ripple, small package size and other characteristics. LDO can provide accurate and stable output voltage for the load. Its basic working principle is to generate a continuous and stable output voltage through the negative feedback of the error amplifier.

[0003] Traditional LDO such as Figure 1 As shown in the figure, it is mainly composed of reference circuit VREF, error amplifier EA, power tube MP, feedback resistors R1, R2, output capacitor COUT, output capacitor parasitic equivalent resistance RESR and other modules. These modules constitute the most basic LDO loop and stabilize the loop through negative feedback. When the LDO output voltage rises, it is transmitted to the error amplifier through feedback and compared with the specific voltage at the other end, so that the output of the error amplifier rises, thereby driving the power device to reduce the output current, thereby causing the LDO output voltage to drop to stabilize the circuit. Similarly, when the LDO output voltage drops, the output voltage is increased through negative feedback regulation.

[0004] As the application scope of LDO becomes wider and wider, the noise requirements for LDO are also getting higher and higher. The traditional LDO on-chip noise reduction filter mainly relies on the RC noise reduction circuit composed of resistors and capacitors. The noise reduction filter stage of the traditional LDO is usually added to V REF Between the output and the EA input, RC filtering is used to filter out noise. The LDO operating frequency band is generally between 10Hz and 100KHz. In order to filter out noise in this frequency band, Figure 2 As shown, very large resistors and capacitors need to be designed to effectively filter out low-frequency noise, which occupies a large chip area. At the same time, the RC noise reduction circuit with large capacitance and resistance will also reduce the startup speed of the LDO circuit. Summary of the invention

[0005] The present invention discloses a noise reduction filter circuit and a noise reduction filter method for a linear voltage regulator, which mainly adjusts the bias voltage and width-to-length ratio of a MOS tube to make it equivalent to a high-resistance resistor, and cooperates with the switching tube to realize the rapid charging of the capacitor. The noise reduction filter circuit and the noise reduction filter method can effectively reduce the output noise of the circuit, not only avoid the reduction of the power-on speed caused by the large capacitor, but also reduce the chip area. The present invention has a simple structure and occupies a small area, and meets the requirements of LDO for high integration, low noise and fast response.

[0006] Based on the requirement of low noise of linear regulator, the present invention proposes a noise reduction filter circuit and a noise reduction filter method for linear regulator to optimize the defects of traditional RC noise reduction circuit. The purpose of the present invention is achieved by the following technical methods:

[0007] In a first aspect of the present invention, the present invention provides a noise reduction filter circuit for a linear regulator, comprising: a first switch tube, a first MOS tube, a first capacitor tube, an operational amplifier, a comparator, a second capacitor tube, a capacitor charging circuit and a digital circuit;

[0008] Among them, the source of the first MOS tube and one end of the first switch tube are connected to the reference voltage Vref, the gate of the first MOS tube is connected to the bias voltage, the drain of the first MOS tube and the other end of the second switch tube are connected to one end of the first capacitor tube and connected to the positive input end of the operational amplifier and the positive input end of the comparator, and the other end of the first capacitor tube is grounded; the inverting input end of the operational amplifier is connected to the inverting input end of the comparator and then connected to the output end of the operational amplifier, and is connected to the capacitor charging circuit and one end of the second capacitor tube, and serves as the output end of the linear regulator; the other end of the second capacitor tube is grounded; the output end of the comparator is connected to the capacitor charging circuit and the digital circuit; the digital circuit is used to output a control signal; the control signal controls the operation of the first switch tube and the capacitor charging circuit.

[0009] Furthermore, the bias voltage is adjustable.

[0010] Furthermore, the width-to-length ratio of the first MOS tube is adjustable.

[0011] Furthermore, the second capacitor tube is a REFCAP capacitor tube.

[0012] Furthermore, it also includes a first resistor and a second resistor, one end of the first resistor is connected to the output end of the operational amplifier, and the other end is connected to the capacitor charging circuit, one end of the second resistor is connected to the inverting input end of the operational amplifier and the comparator, and the other end is connected to the capacitor charging circuit.

[0013] In a second aspect of the present invention, the present invention further proposes a noise reduction filtering method for a linear regulator, which adopts the noise reduction filtering circuit for a linear regulator as described in the first aspect of the present invention, and the method comprises:

[0014] When the reference voltage is input, the output voltage of the output terminal of the linear regulator is low, and the control comparator outputs a high level;

[0015] In response to the high level output by the comparator, the digital circuit outputs a control signal, and the control signal controls the first switch tube and the capacitor charging circuit to turn on, so that the first capacitor tube and the second capacitor tube are powered on quickly;

[0016] The op amp clamps the output voltage at the output of the linear regulator to the reference voltage;

[0017] When the output voltage of the output terminal of the linear regulator is close to the reference voltage, the comparator outputs a low level;

[0018] In response to the low level output by the comparator, the capacitor charging circuit is turned off and the first switch tube is disconnected, so that the reference voltage is subjected to noise reduction filtering by the first MOS tube and the first capacitor tube.

[0019] Beneficial effects of the present invention:

[0020] Compared with the prior art, the present invention adjusts the MOS tube bias and width-to-length ratio to make it equivalent to a high-resistance resistor, thereby reducing the filtering frequency, and at the same time introduces a switch circuit to help the large capacitor branch to power on quickly. Using a MOS tube with an area of ​​0.3u*20u and consuming tens of nA of static current, the frequency band below 10Hz can be filtered. The filtering effect is much higher than that of a high-resistance resistor of 0.5u*100u, which effectively reduces the low-frequency noise of LDO; the capacitor charging circuit can effectively improve the response speed of LDO after the introduction of the high-impedance noise reduction filter circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of a conventional linear regulator circuit;

[0022] Figure 2 This is a schematic diagram of a noise reduction filter circuit traditionally used in linear regulators;

[0023] Figure 3 is a schematic diagram of a noise reduction filter circuit for a linear regulator according to an embodiment of the present invention;

[0024] Figure 4 is a schematic diagram of a noise reduction filter circuit for a linear regulator according to another embodiment of the present invention;

[0025] Figure 5 is a flow chart of a noise reduction filtering method for a linear regulator according to an embodiment of the present invention;

[0026] Figure 6 It is a noise density diagram of the output of the noise reduction filter circuit for the linear voltage regulator of the present invention;

[0027] Figure 7 This is the output noise density diagram of the traditional large resistor noise reduction filter. DETAILED DESCRIPTION

[0028] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] It should be noted that, since the embodiments of the present invention focus on the current or voltage of the signal, the current or voltage input / output of each module / unit / device is used for description herein, and it should be understood by those skilled in the art that, in fact, the input / output of each module / unit / device is a signal. In order to make the technical means and creative features of the present invention easy to understand, the present invention is further described in conjunction with the accompanying drawings.

[0030] It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present invention, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.

[0031] Figure 3 Schematic diagram of a noise reduction filter circuit for a linear regulator according to an embodiment of the present invention; Figure 3 As shown, it includes: a first switch tube S1, a first MOS tube M1, a first capacitor tube C1, an operational amplifier A0, a comparator A1, a second capacitor tube C2, a capacitor charging circuit and a digital circuit;

[0032] Among them, the source of the first MOS tube M1 and one end of the first switch tube S1 are connected to the reference voltage Vref, the gate of the first MOS tube M1 is connected to the bias voltage, the drain of the first MOS tube M1 and the other end of the second switch tube S2 are connected to one end of the first capacitor tube C1 and connected to the positive input end of the operational amplifier A0 and the positive input end of the comparator A1, and the other end of the first capacitor tube C1 is grounded; the inverting input end of the operational amplifier A0 is connected to the inverting input end of the comparator A1 and then connected to the output end of the operational amplifier A0, and is connected to the capacitor charging circuit and one end of the second capacitor tube C2, and serves as the output end of the linear regulator; the other end of the second capacitor tube C2 is grounded; the output end of the comparator A1 is connected to the capacitor charging circuit and the digital circuit; the digital circuit is used to output a control signal a; the control signal a controls the operation of the first switch tube and the capacitor charging circuit.

[0033] In an embodiment of the present invention, the width-to-length ratio of the first MOS tube is adjustable. The bias voltage is adjustable. For the first MOS tube, assuming that the first MOS tube is an N-channel MOS tube, when operating in the subthreshold region, its current-voltage characteristic is similar to the exponential characteristic of a diode. By properly adjusting the gate-source bias voltage, the first MOS tube can be placed in a lower current state. At this time, the drain-source of the first MOS tube can be regarded as an element with a certain resistance value. When other conditions remain unchanged, reducing the width-to-length ratio can reduce the drain current, thereby increasing the equivalent resistance.

[0034] Exemplarily, when the value of the width-to-length ratio of the first MOS tube is reduced from 1u / 20u to 0.3u / 20u, under the same bias voltage, the drain current will be significantly reduced, so that the equivalent resistance of the MOS tube increases.

[0035] Exemplarily, the adjustment of the bias voltage requires precise control, which can be achieved through a stable voltage reference source and a voltage divider circuit, so that the operating point of the MOS tube is in a suitable subthreshold region to obtain the required equivalent resistance.

[0036] It is understandable that in the traditional noise reduction filter circuit, the RC network composed of resistors and capacitors determines the filter frequency. When the MOS tube is equivalent to a high-resistance resistor and forms a filter circuit with a capacitor, the filter cutoff frequency will decrease due to the increase in resistance. In this way, the filter frequency can be flexibly controlled by adjusting the bias voltage and width-to-length ratio of the first MOS tube, thereby achieving filtering of a specific frequency signal.

[0037] In an embodiment of the present invention, the second capacitor tube adopts a REFCAP capacitor tube. The REFCAP capacitor tube generally adopts a sealed tubular package. A notable feature of the REFCAP capacitor tube is that it can provide a high-precision capacitance value. Its capacitance tolerance can usually be controlled within a very small range. The REFCAP capacitor tube has a lower equivalent series resistance (ESR) and equivalent series inductance (ESL), which makes the second capacitor tube have low loss characteristics and high-precision capacitance value to help the second capacitor tube power on quickly.

[0038] Figure 4 Schematic diagram of a noise reduction filter circuit for a linear regulator according to an embodiment of the present invention; Figure 4As shown, it also includes a first resistor R1 and a second resistor R2, one end of the first resistor R1 is connected to the output end of the operational amplifier A0, and the other end is connected to the capacitor charging circuit, one end of the second resistor R2 is connected to the inverting input end of the operational amplifier A0 and the comparator A1, and the other end is connected to the capacitor charging circuit. Wherein, the first resistor R1 is connected in series to the output end of the operational amplifier, and can be matched with the input impedance of the subsequent capacitor charging circuit, so that the signal can be more effectively transmitted to the subsequent circuit, reducing signal distortion. The second resistor R2 is connected in series to the input end of the operational amplifier and the comparator, which can limit the size of the input current, prevent excessive current from flowing into the comparator and causing damage to it, reduce the impact of the input bias current on the performance of the comparator, and improve the accuracy and stability of the comparator.

[0039] Figure 5 A noise reduction filtering method for a linear regulator provided by an embodiment of the present invention comprises:

[0040] 101. When the reference voltage is input, the output voltage of the output end of the linear regulator is low, and the control comparator outputs a high level;

[0041] 102. In response to a high level output by the comparator, the digital circuit outputs a control signal, wherein the control signal controls the first switch tube and the capacitor charging circuit to be turned on, so that the first capacitor tube and the second capacitor tube are powered on quickly;

[0042] 103. The operational amplifier clamps the output voltage at the output end of the linear regulator to the reference voltage;

[0043] 104. When the output voltage of the output terminal of the linear regulator is close to the reference voltage, the comparator outputs a low level;

[0044] 105. In response to the low level output by the comparator, the capacitor charging circuit is turned off, and the first switch tube is disconnected, so that the reference voltage is subjected to noise reduction filtering by the first MOS tube and the first capacitor tube.

[0045] Exemplarily, when the reference voltage Vref is input, the voltage at the OUT terminal is low, the comparator A1 outputs a high level, turns on the capacitor charging circuit, and simultaneously turns on S1 and the capacitor charging circuit through the digital circuit output control signal a, and capacitors C1 and REFCAP are powered on quickly. Op amp A0 is a clamping op amp that clamps the OUT voltage to Vref. When the voltage at the OUT terminal is close to Vref, the output of comparator A1 flips, the capacitor charging circuit is turned off, the switch S1 is disconnected, and Vref is filtered through M3 and C1 for noise reduction.

[0046] When the capacitor C1 is fully charged, the width-to-length ratio of the M3 tube is 0.3u / 20u, the width-to-length ratio of the current mirror corresponding to its gate potential is 40u / 0.3u, and the bias current is 80nA. Based on the principle of current mirror copying current, the theoretical current through the M3 tube is

[0047]

[0048] It is approximately off and equivalent to a large resistor.

[0049] At this time, R M3 The resistance value is in GΩ. When the capacitance of capacitor C1 is 48pF, the noise reduction filter frequency band is approximately:

[0050]

[0051] At this time, the low-frequency noise can be effectively reduced. The area of ​​the M3 tube is W*L=0.3u*20u, which is much lower than the area of ​​the resistor with the same resistance value.

[0052] like Figure 6 , Figure 7 As shown, when the specific frequency is 10Hz, when the large resistance structure of the traditional technology is adopted, the measured output noise spectral density value is 62.57pV2 / Hz. However, after adopting the noise reduction filter circuit proposed in the present invention, its output noise spectral density is significantly reduced to 8.35pV2 / Hz. Through this sharp data comparison, it can be clearly and intuitively found that the structure of the present invention shows an extremely outstanding performance improvement in noise reduction filtering compared to the large resistance structure. This improvement effect is not only very obvious at the data level, but also in actual application scenarios, it will also have a very positive and far-reaching impact on the operating stability, signal quality and overall performance of related equipment or systems, which has strongly promoted the further development and breakthrough of this field in noise reduction filtering technology, and provided a very valuable reference and reference example for subsequent related research and application.

[0053] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A noise reduction filter circuit for a linear regulator, characterized in that: include: A first switch tube, a first MOS tube, a first capacitor tube, an operational amplifier, a comparator, a second capacitor tube, a capacitor charging circuit and a digital circuit; Among them, the source of the first MOS tube and one end of the first switch tube are connected to the reference voltage Vref, the gate of the first MOS tube is connected to the bias voltage, the drain of the first MOS tube and the other end of the second switch tube are connected to one end of the first capacitor tube and connected to the positive input end of the operational amplifier and the positive input end of the comparator, and the other end of the first capacitor tube is grounded; the inverting input end of the operational amplifier is connected to the inverting input end of the comparator and then connected to the output end of the operational amplifier, and is connected to the capacitor charging circuit and one end of the second capacitor tube, and serves as the output end of the linear regulator; the other end of the second capacitor tube is grounded; the output end of the comparator is connected to the capacitor charging circuit and the digital circuit; the digital circuit is used to output a control signal; the control signal controls the operation of the first switch tube and the capacitor charging circuit.

2. First MOS tube First MOS tube First MOS tube First MOS tube The noise reduction filter circuit for a linear regulator according to claim 1, characterized in that the bias voltage is adjustable.

3. The noise reduction filter circuit for a linear regulator according to claim 1, characterized in that: The width-to-length ratio of the first MOS tube is adjustable.

4. The noise reduction filter circuit for a linear regulator according to claim 1, characterized in that: The second capacitor tube is a REFCAP capacitor tube.

5. The noise reduction filter circuit for a linear regulator according to claim 1, characterized in that: It also includes a first resistor and a second resistor, one end of the first resistor is connected to the output end of the operational amplifier, and the other end is connected to the capacitor charging circuit, one end of the second resistor is connected to the inverting input end of the operational amplifier and the comparator, and the other end is connected to the capacitor charging circuit.

6. A noise reduction filtering method for a linear regulator, characterized in that: Using the noise reduction filter circuit for a linear regulator as claimed in any one of claims 1 to 5, the method comprises: When the reference voltage is input, the output voltage of the output terminal of the linear regulator is low, and the control comparator outputs a high level; In response to the high level output by the comparator, the digital circuit outputs a control signal, and the control signal controls the first switch tube and the capacitor charging circuit to turn on, so that the first capacitor tube and the second capacitor tube are powered on quickly; The op amp clamps the output voltage at the output of the linear regulator to the reference voltage; When the output voltage of the output terminal of the linear regulator is close to the reference voltage, the comparator outputs a low level; In response to the low level output by the comparator, the capacitor charging circuit is turned off and the first switch tube is disconnected, so that the reference voltage is subjected to noise reduction filtering by the first MOS tube and the first capacitor tube.

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