High-reliability rapid reconstruction method for satellite-borne software

Abstract

The invention relates to a high-reliability rapid reconstruction method for satellite-borne software. The method comprises the steps that a Smart Fusion2 chip, a FLASH module and the like are used for constructing a spaceborne processor, after an instruction is sent to a spacecraft, the spaceborne processor reads a software configuration item executable file in the FLASH chip and verifies a return value, and therefore the program version and the data correctness are confirmed, and a reconstruction difference data packet is generated. And determining the size of a data block, segmenting and compressing the related file, selecting blocks according to the compression ratio to form a file to be injected, and generating decompression information. The decompressed information and the file to be injected are uploaded to the aircraft through the satellite-ground link, the satellite-borne processor decompresses the file, processes the file according to the decompressed information, writes the file into the FLASH chip and then returns a result, so that continuing or re-uploading is decided, and rapid data reconstruction is realized. By adopting the method, the reconstruction success rate can be improved.

Description

Technical Field

[0001] The present application relates to the field of radio transmission technology, and in particular to a high-reliability and rapid reconstruction method for satellite-borne software. Background Art

[0002] Programmable logic devices and digital signal processors such as FPGA, DSP, CPU, ARM are the first choice for onboard processors due to their high flexibility, strong performance, short development cycle and low cost. The processor can load program files pre-stored in non-volatile memories such as FLASH to implement corresponding functions. In order to further improve the flexibility and scalability of onboard processors, most spacecraft currently have software reconfiguration capabilities, that is, by modifying the program files in FLASH, the software upgrade of the onboard processor is completed. When the onboard software is reconstructed, the modified original executable file is generally injected into the spacecraft by the ground injection equipment through the satellite-to-ground communication link. After receiving the executable file, the spacecraft writes it into the internal FLASH to complete the software upgrade.

[0003] Traditional onboard computers usually use high-quality components, especially for the key and important function of reconstruction, which is generally completed by using single-particle-proof anti-fuse FPGAs in combination with high-level radiation-resistant processors. However, the selection of high-level components greatly increases the development cost of the product, and the FPGA+processor architecture makes the hardware circuit large in size and high in power consumption, further increasing the development cost. Facing the future giant massive low-orbit constellation application scenarios, the traditional hardware architecture is difficult to meet the requirements in terms of volume, power consumption, and cost. In addition, as the functions of spacecraft become increasingly complex, the program size of onboard software is growing rapidly. Taking the current mainstream ZYNQ7000-100 FPGA as an example, its program size reaches 17MB. Due to the limited bandwidth of the satellite-to-ground link, the onboard software injection process often takes a long time. The sharp increase in onboard software programs further exacerbates the problem. The traditional reconstruction method using the original executable file is difficult to meet the needs of rapid iteration of future aerospace, so it is urgent to develop a fast reconstruction method. For example, a fast reconstruction method based on file compression can effectively reduce the size of the executable file by comparing it with the original executable file stored in FLASH and compressing the difference losslessly, thereby improving the reconstruction efficiency. However, the original file may be significantly different from the file to be injected, making the compression efficiency insufficient. In addition, due to the influence of space radiation, the executable file stored in FLASH may be flipped, causing errors in the comparison result between the injected file and the original executable file, and there is a risk of program reconstruction failure. Summary of the invention

[0004] Based on this, it is necessary to provide a reliable and fast reconstruction method suitable for onboard processors that can improve the reconstruction success rate in response to the above technical problems.

[0005] A high-reliability and rapid reconstruction method for onboard software, the method comprising: The onboard processor in the spacecraft is constructed by using SmartFusion2 chip, FLASH module, DDR and SRAM FPGA; the FLASH module includes multiple FLASH chips; the onboard processor sends instructions to the spacecraft to read the executable file of the corresponding software configuration item in the FLASH chip, perform verification and return the verification value; According to the checksum returned by the onboard processor, confirm whether the program version and data in the onboard FLASH are correct, compare the executable files that need to be reconstructed on-orbit, generate a reconstruction difference data packet, and determine the data block size of the file segmentation; Taking data blocks as units, the original executable file data packets to be reconstructed and the reconstructed difference data packets are divided and compressed respectively, and the compression ratio is calculated. Taking the compression ratio as an indicator, data blocks with high compression ratio are selected one by one, and the final file to be injected is composed in sequence. The decompression information is generated, and each data block is marked as the selected original reconstructed data or reconstructed difference data; The decompressed information and the final file to be injected are injected into the spacecraft through the satellite-to-ground link in units of data blocks; after receiving the injected information, the onboard processor decompresses the injected information in units of data blocks, and determines the processing method when writing the current data block into the FLASH chip according to the injected decompressed information; after writing the injected information into the FLASH chip, the data block processing result is returned; The decision to continue or re-upload is made based on the processing results returned by the onboard processor until all data blocks are uploaded to achieve rapid data reconstruction.

[0006] The above-mentioned high-reliability and fast reconstruction method of on-board software uses the radiation-immune SmartFusion2 chip as a dedicated reconstruction unit, and uses its internal ARM Cortex-M3 unit to complete the processing processes such as protocol parsing and process scheduling, replacing the traditional anti-fuse FPGA + radiation-resistant processor architecture, improving the integration of the reconstruction circuit, and effectively reducing the volume, power consumption, and cost while ensuring the radiation resistance performance. At the same time, the on-board processor reads the executable file in the FLASH chip and verifies the return check value, which can confirm the correctness of the program version and data in the on-board FLASH in advance, avoiding the reconstruction failure due to the original file error, and ensuring the reliability of the reconstruction foundation from the source. The original data verification step of the on-board FLASH is added, which can effectively avoid the abnormal reconstruction process caused by the single particle flip of the on-board FLASH. The executable files to be reconstructed on orbit are compared to generate a reconstruction difference data packet, and the original and difference data packets are compressed separately in units of data blocks, and the data blocks are selected according to the compression rate to form the final file to be injected. This method not only utilizes differential data to reduce the amount of transmission, but also reduces the risk of transmission errors by reasonably selecting data blocks with high compression rates. At the same time, it generates decompression information to clarify the properties of each data block, which helps to accurately process when writing to FLASH, and improves the accuracy and efficiency of data transmission and processing during the reconstruction process. The data blocks are used as units for annotation, decompression, and writing to FLASH, and the processing results are returned. The decision to continue or re-annotate is based on the results. This block operation and timely feedback mechanism enables the specific data blocks to be quickly located when problems occur, and to be re-annotated and corrected in time, rather than restarting after the entire reconstruction process fails. This effectively improves the success rate and fault tolerance of the reconstruction, ensuring that even if some data blocks have problems, the overall reconstruction task can be completed by re-annotating the data blocks. In addition, the present application also supports compression reconstruction of all programs. Compression reconstruction is not limited to files of a specific size or type. Any program, configuration parameters, etc. can be reconstructed into the configuration Flash by compression reconstruction. Supports out-of-order transmission. The reconstructed data frame contains the current data sequence number, which represents the offset position of the data in the transmitted file. The reconstruction process supports out-of-order transmission of data frames; lost data frames and error program sectors can be learned through telemetry. Supports breakpoint resumption. The ground can learn the current state of the reconstructor and the verification status of each sector through telemetry, and can continue to upload after the transmission interruption is restored; even if a power outage occurs during the transmission interruption, the sector verification status can be used to confirm the sector that needs to be retransmitted. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 It is a flowchart of a method for high-reliability and rapid reconstruction of onboard software in one embodiment; Figure 2is a structural block diagram of a satellite-borne processor in one embodiment; Figure 3 A system block diagram of generating a file to be injected in one embodiment; Figure 4 A flowchart of a process of generating a compressed file and decompressing information on the ground when the on-board FLASH verification is correct in one embodiment; Figure 5 A flowchart of a process for generating compressed files and decompressing information on the ground when an onboard FLASH check error occurs in another embodiment; Figure 6 The figure is a flowchart of processing injection files on-board in one embodiment. DETAILED DESCRIPTION

[0008] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0009] In one embodiment, Figure 1 As shown, a high-reliability and fast reconstruction method for onboard software is provided, comprising the following steps: Step 102, using SmartFusion2 chip, FLASH module, DDR and SRAM type FPGA to build a satellite processor in the spacecraft; the FLASH module includes multiple FLASH chips; sending instructions to the spacecraft to use the satellite processor to read the executable file of the corresponding software configuration item in the FLASH chip, perform verification and return the verification value.

[0010] The radiation-immune SmartFusion2 chip is used as a dedicated reconstruction unit, and the internal ARM Cortex-M3 unit is used for protocol analysis and process scheduling. The traditional architecture is replaced to improve the integration of the reconstruction circuit. In the space environment, radiation resistance is crucial. This chip can effectively resist space radiation, reduce the risk of hardware failure caused by radiation, and provide a stable hardware foundation for data reconstruction. Compared with the traditional hardware architecture that is susceptible to single particle effects, the stability is greatly improved.

[0011] like Figure 2 As shown in the figure, a FLASH module, DDR and SRAM FPGA are combined to build a satellite processor. The multiple FLASH chips of the FLASH module are used to store executable files of software configuration items, and DDR and SRAM FPGA provide support for data processing and storage. This combination can fully utilize the advantages of each component, making the satellite processor more efficient in data storage, processing and transmission, thereby improving the success rate of reconstruction.

[0012] The onboard processor reads the executable file in the FLASH chip and verifies the returned checksum value, and confirms whether the program version and data in the onboard FLASH are correct based on the checksum value. This link can timely detect data errors in the FLASH that may occur due to single particle upsets and other reasons before reconstruction, effectively avoiding reconstruction anomalies caused by erroneous data and improving reconstruction success from the source.

[0013] The verification process in this step includes but is not limited to XOR verification, cumulative sum verification, CRC verification, etc.

[0014] Step 104, based on the checksum returned by the onboard processor, confirm whether the program version and data in the onboard FLASH are correct, compare the executable files that need to be reconstructed on-orbit, generate a reconstruction difference data packet, and determine the data block size of the file segmentation.

[0015] When the on-board FLASH is verified correctly, the processing flow chart of generating compressed files and decompressing information on the ground is as follows: Figure 4 As shown; the processing flow chart of generating compressed files and decompressing information on the ground when the on-board FLASH check error occurs is as follows Figure 5 shown.

[0016] Step 106, taking data blocks as units, divide the original executable file data packet to be reconstructed and the reconstructed difference data packet and compress them separately, calculate the compression rate, and use the compression rate as an indicator to select data blocks with high compression rate one by one, compose the final file to be injected in order, and generate decompression information to mark whether each data block is the selected original reconstructed data or the reconstructed difference data.

[0017] Compare the executable files that need to be reconstructed in orbit and generate a reconstructed difference data packet. Segment and compress the original executable file data packet and the reconstructed difference data packet in units of data blocks. After calculating the compression rate, select the data blocks with high compression rate one by one to form the final file to be injected, and generate decompression information to mark the properties of the data blocks. This method can reduce the size of the injection package on the reconstruction software and reduce the data transmission requirements for the satellite-to-ground communication link. At the same time, by selecting the optimal compression method, the error probability in the data transmission process is reduced, and each data block can be accurately processed according to the decompression information, which improves the accuracy and efficiency of data processing. Among them, the system block diagram of the file to be injected is shown in the following figure. Figure 3 shown.

[0018] The reconstructed data frame contains a data sequence number representing the offset position, and supports out-of-order transmission of data frames. Even in a complex space communication environment, when the data transmission order is chaotic, the data can be accurately reorganized according to the data sequence number. Lost data frames and erroneous program sectors can be learned through telemetry, making it easy to take remedial measures in a timely manner to ensure the integrity of data reconstruction.

[0019] Step 108, in units of data blocks, the decompressed information and the final file to be injected are injected into the spacecraft through the satellite-to-ground link; after receiving the injection information, the onboard processor decompresses the injection information in units of data blocks, and determines the processing method when writing the current data block into the FLASH chip based on the injected decompressed information; after writing the injection information into the FLASH chip, the data block processing result is returned.

[0020] The injection information supports injection in any packet order.

[0021] Step 110, decide to continue to upload or re-upload according to the processing result returned by the onboard processor until all data blocks are uploaded to achieve rapid data reconstruction.

[0022] The ground can obtain the current status of the reconstructor and the verification status of each sector through telemetry, and can continue to inject after the transmission interruption is restored. Even if a power outage occurs, the sector verification status can be used to confirm the sector that needs to be retransmitted. This mechanism can effectively deal with possible interruptions in space communications, avoid reconstruction failures caused by transmission interruptions, and greatly improve the success rate of reconstruction. Among them, the processing flow chart of the injection file on the satellite is as follows Figure 6 shown.

[0023] The above-mentioned high-reliability and fast reconstruction method of on-board software uses the radiation-immune SmartFusion2 chip as a dedicated reconstruction unit, and uses its internal ARM Cortex-M3 unit to complete the processing processes such as protocol parsing and process scheduling, replacing the traditional anti-fuse FPGA + radiation-resistant processor architecture, improving the integration of the reconstruction circuit, and effectively reducing the volume, power consumption, and cost while ensuring the radiation resistance performance. At the same time, the on-board processor reads the executable file in the FLASH chip and verifies the return check value, which can confirm the correctness of the program version and data in the on-board FLASH in advance, avoiding the reconstruction failure due to the original file error, and ensuring the reliability of the reconstruction foundation from the source. The original data verification step of the on-board FLASH is added, which can effectively avoid the abnormal reconstruction process caused by the single particle flip of the on-board FLASH. The executable files to be reconstructed on orbit are compared to generate a reconstruction difference data packet, and the original and difference data packets are compressed separately in units of data blocks, and the data blocks are selected according to the compression rate to form the final file to be injected. This method not only utilizes differential data to reduce the amount of transmission, but also reduces the risk of transmission errors by reasonably selecting data blocks with high compression rates. At the same time, it generates decompression information to clarify the properties of each data block, which helps to accurately process when writing to FLASH, and improves the accuracy and efficiency of data transmission and processing during the reconstruction process. The data blocks are used as units for annotation, decompression, and writing to FLASH, and the processing results are returned. The decision to continue or re-annotate is based on the results. This block operation and timely feedback mechanism enables the specific data blocks to be quickly located when problems occur, and to be re-annotated and corrected in time, rather than restarting after the entire reconstruction process fails. This effectively improves the success rate and fault tolerance of the reconstruction, ensuring that even if some data blocks have problems, the overall reconstruction task can be completed by re-annotating the data blocks. In addition, the present application also supports compression reconstruction of all programs. Compression reconstruction is not limited to files of a specific size or type. Any program, configuration parameters, etc. can be reconstructed into the configuration Flash by compression reconstruction. Supports out-of-order transmission. The reconstructed data frame contains the current data sequence number, which represents the offset position of the data in the transmitted file. The reconstruction process supports out-of-order transmission of data frames; lost data frames and error program sectors can be learned through telemetry. Supports breakpoint resumption. The ground can learn the current state of the reconstructor and the verification status of each sector through telemetry, and can continue to upload after the transmission interruption is restored; even if a power outage occurs during the transmission interruption, the sector verification status can be used to confirm the sector that needs to be retransmitted.

[0024] In one of the embodiments, the SmartFusion2 chip serves as a reconstruction unit, and its internal ARM Cortex-M3 unit runs a reconstruction application, which is responsible for receiving and parsing reconstruction-related data frames, decompressing compressed files, and controlling the writing of source program files to the FLASH chip; the FPGA unit in the SmartFusion2 chip completes interface conversion, data interaction, and timing control with the FLASH chip, SRAM-type FPGA, and other devices.

[0025] In one of the embodiments, the FLASH chip is mounted on the SmartFusion2 chip, and the external processor can obtain the FLASH chip content in a read-only manner through the SmartFusion2 chip via the inter-board interconnection line; only the reconstruction application has the write permission of the Flash chip, which ensures the data security of the reconstruction content and provides reliable reconstruction data security for the hardware structure of multiple processors.

[0026] In one embodiment, the process of determining the data block size of the file segmentation includes: When determining the data block unit size for file segmentation, select it through limited traversal query. The data block size is 2 times the size of each sector of the FLASH chip. N times, where N is a positive integer starting from 0, 2 N The maximum value is not more than the size of the file to be reconstructed, and the value of N is selected with the goal of minimizing the file size after mixed compression.

[0027] In a specific embodiment, it is assumed that the original reconstructed file is cut to generate data blocks numbered X1, X2, X3, ..., Xi, and the reconstructed difference file is cut to generate data blocks Y1, Y2, Y3, ..., Yi. The generated data blocks are compressed in a lossless manner to generate x1, x2, x3, ..., xi and y1, y2, y3, ..., yi respectively. Compare x1 and y1, x2 and y2, ..., xi and yi respectively, select the file with the smaller file size between the two, record it as z1, z2, z3, ..., zi, and then splice the compressed files after optimization to form a complete compressed file. Set N=1, 2, 3, etc. until the maximum value of N, and N takes different values ​​each time to obtain the corresponding compressed file. Select the smallest compressed file as the final file to be injected. At the same time, record the selection method of each data block, the original executable file is 0, and the reconstructed difference file is 1 to form decompression information.

[0028] The steps of lossless compression include: (1) Initialize the dictionary. At the beginning, the dictionary contains all possible single strings, and the current prefix K is empty; (2) Read the first character of the compressed data as the prefix string K; (3) Read the next character as the extended character x, and determine whether Kx is in the current dictionary. If so, K=Kx; otherwise, output the dictionary index of K as the output codeword, store Kx in the dictionary, and set K=x.

[0029] (4) Determine whether there are any characters in the compressed data that have not been encoded. If so, repeat step (3); otherwise, output the dictionary index of K.

[0030] In one embodiment, the process of calculating the compression ratio includes: Calculating the compression ratio according to the size of the original data block and the size of the compressed data block, and calculating the compression ratio adjustment coefficient according to the compression ratio and a preset control compression ratio curve shape parameter; A time penalty coefficient is calculated based on the time required to compress a data block and the time required to decompress the data block; Calculating a data integrity check value during the decompression process according to a CRC algorithm, and constructing an integrity reward function using the data integrity check value and the number of data errors detected during the decompression process; The compression rate is calculated using the compression ratio adjustment coefficient, the time penalty coefficient, the integrity reward function and the original data block size.

[0031] In a specific embodiment, the compression ratio adjustment coefficient is calculated based on the original and compressed data block sizes and the parameters that control the shape of the compression ratio curve. This can accurately control the compression quality, optimize the transmission efficiency, and indirectly assist in reconstruction. Considering the compression and decompression time, balancing the time cost, improving the overall efficiency, and indirectly affecting the reconstruction rate. With the help of the CRC algorithm check value and the number of decompression errors to ensure data accuracy, construct an integrity reward function to feedback and optimize data block selection, and improve the reconstruction success rate. Finally, the compression ratio is calculated by combining the compression ratio adjustment coefficient, time penalty coefficient, integrity reward function and original data block size, comprehensively evaluating the pros and cons of the data block, optimizing each link of reconstruction, and thus improving the data reconstruction rate.

[0032] In one embodiment, the compression ratio adjustment coefficient is calculated according to the compression ratio and a preset control compression ratio curve shape parameter, including: The compression ratio adjustment coefficient is calculated according to the compression ratio and the preset control compression ratio curve shape parameter.

[0033] in, represents the compression ratio, Indicates the original data block size, Indicates the size of the compressed data block. and Represents the parameters that control the shape of the compression ratio curve.

[0034] In one embodiment, the time penalty coefficient is calculated based on the time required to compress the data block and the time required to decompress the data block, including: The time penalty coefficient is calculated based on the time required to compress the data block and the time required to decompress the data block:

[0035] in, Indicates the time required to compress the data block, Indicates the time required to decompress the data block. and Represents the time weight parameter.

[0036] In one embodiment, constructing an integrity reward function using the data integrity check value and the number of data errors detected during the decompression process includes: The integrity reward function is constructed using the data integrity check value and the number of data errors detected during the decompression process:

[0037] in, Indicates the number of data errors detected during decompression. and represents the integrity weight parameter, Indicates the data integrity check value. Indicates the data integrity value of the current original data block.

[0038] In one embodiment, the compression ratio is calculated using the compression ratio adjustment coefficient, the time penalty coefficient, the integrity reward function and the original data block size, including: The compression ratio is calculated using the compression ratio adjustment coefficient, time penalty coefficient, integrity reward function and original data block size.

[0039] in, Indicates the compression ratio adjustment factor, represents the time penalty coefficient, represents the completeness reward function, Indicates the original data block size.

[0040] In one embodiment, the processing method of writing the injected information into the FLASH chip is determined according to the injected decompressed information, and the injected information is written into the FLASH chip, including: When the onboard processor writes data to the FLASH chip, different processing is performed according to the decompression information of the data packet. If the current data block is original reconstructed data, it is directly written into the FLASH chip after decompression; if the current data block is differentially reconstructed data, the data is first read from the corresponding address of the FLASH chip, and then XORed with the decompressed differentially reconstructed data, and the XOR result is written into the FLASH.

[0041] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. Moreover, Figure 1 At least part of the steps may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily executed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequentially, but can be executed in turn or alternately with other steps or at least part of the sub-steps or stages of other steps.

[0042] The technical features of the above embodiments may be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0043] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention. It should be pointed out that, for a person of ordinary skill in the art, several modifications and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the attached claims.

Claims

1. A high-reliability and rapid reconstruction method for onboard software, characterized in that: The method comprises: A spacecraft-borne processor is constructed by using SmartFusion2 chip, FLASH module, DDR and SRAM FPGA; the FLASH module includes a plurality of FLASH chips; Sending instructions to the spacecraft uses the onboard processor to read the executable file of the corresponding software configuration item in the FLASH chip, performs verification and returns the verification value; According to the checksum returned by the onboard processor, confirm whether the program version and data in the onboard FLASH are correct, compare the executable files that need to be reconstructed on-orbit, generate a reconstruction difference data packet, and determine the data block size of the file segmentation; Taking data blocks as units, the original executable file data packets to be reconstructed and the reconstructed difference data packets are divided and compressed respectively, and the compression ratio is calculated. Taking the compression ratio as an indicator, data blocks with high compression ratio are selected one by one, and the final file to be injected is composed in sequence. The decompression information is generated, and each data block is marked as the selected original reconstructed data or reconstructed difference data; In units of data blocks, the decompressed information and the final file to be injected are injected into the spacecraft through the satellite-to-ground link; After receiving the injected information, the onboard processor decompresses the injected information in units of data blocks, and determines the processing method when writing the current data block into the FLASH chip based on the injected decompressed information. After writing the injected information into the FLASH chip, the processing result of the data block is returned; The decision to continue or re-upload is made based on the processing results returned by the onboard processor until all data blocks are uploaded to achieve rapid data reconstruction.

2. The method according to claim 1, characterized in that The SmartFusion2 chip serves as a reconstruction unit, and its internal ARM Cortex-M3 unit runs the reconstruction application, which is responsible for receiving and parsing reconstruction-related data frames, decompressing compressed files, and controlling the writing of source program files to the FLASH chip; the FPGA unit in the SmartFusion2 chip completes interface conversion, data interaction and timing control with the FLASH chip, SRAM-type FPGA and other devices.

3. The method according to claim 1, characterized in that The FLASH chip is mounted on the SmartFusion2 chip, and the external processor can obtain the FLASH chip content in a read-only manner through the inter-board interconnection line and the SmartFusion2 chip; only the reconstruction application has the write permission of the Flash chip, which ensures the data security of the reconstruction content and provides reliable reconstruction data security for the hardware structure of multiple processors.

4. The method according to claim 1, characterized in that: The process of determining the chunk size for file segmentation includes: When determining the data block unit size for file segmentation, select it through limited traversal query. The data block size is 2 times the size of each sector of the FLASH chip. N times, where N is a positive integer starting from 0, 2 N The maximum value is not more than the size of the file to be reconstructed, and the value of N is selected with the goal of minimizing the file size after mixed compression.

5. The method according to claim 1, characterized in that: The process of calculating compression ratio includes: Calculating the compression ratio according to the size of the original data block and the size of the compressed data block, and calculating the compression ratio adjustment coefficient according to the compression ratio and a preset control compression ratio curve shape parameter; A time penalty coefficient is calculated based on the time required to compress a data block and the time required to decompress the data block; Calculating a data integrity check value during the decompression process according to a CRC algorithm, and constructing an integrity reward function using the data integrity check value and the number of data errors detected during the decompression process; The compression rate is calculated using the compression ratio adjustment coefficient, the time penalty coefficient, the integrity reward function and the original data block size.

6. The method according to claim 1, characterized in that The compression ratio adjustment coefficient is calculated according to the compression ratio and the preset control compression ratio curve shape parameter, including: The compression ratio adjustment coefficient is calculated according to the compression ratio and the preset control compression ratio curve shape parameter. in, represents the compression ratio, Indicates the original data block size, Indicates the size of the compressed data block. and Represents the parameters that control the shape of the compression ratio curve.

7. The method according to claim 1, characterized in that The time penalty coefficient is calculated based on the time required to compress the data block and the time required to decompress the data block, including: The time penalty coefficient is calculated based on the time required to compress the data block and the time required to decompress the data block: in, Indicates the time required to compress the data block, Indicates the time required to decompress the data block. and Represents the time weight parameter.

8. The method according to claim 1, characterized in that The data integrity check value and the number of data errors detected during the decompression process are used to construct an integrity reward function, including: The integrity reward function is constructed using the data integrity check value and the number of data errors detected during the decompression process: in, Indicates the number of data errors detected during decompression. and represents the integrity weight parameter, Indicates the data integrity check value. Indicates the data integrity value of the current original data block.

9. The method according to claim 1, characterized in that The compression ratio is calculated using the compression ratio adjustment coefficient, the time penalty coefficient, the integrity reward function and the original data block size, including: The compression ratio is calculated using the compression ratio adjustment coefficient, time penalty coefficient, integrity reward function and original data block size. in, Indicates the compression ratio adjustment factor, represents the time penalty coefficient, represents the completeness reward function, Indicates the original data block size.

10. The method according to claim 1, characterized in that According to the injected decompressed information, the processing method of writing the current data block into the FLASH chip is determined. The injected information is written into the FLASH chip, including: When the onboard processor writes data to the FLASH chip, different processing is performed according to the decompression information of the data packet. If the current data block is original reconstructed data, it is directly written into the FLASH chip after decompression; if the current data block is differentially reconstructed data, the data is first read from the corresponding address of the FLASH chip, and then XORed with the decompressed differentially reconstructed data, and the XOR result is written into the FLASH.

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