A method and system for automatically allocating battery pack addresses

Abstract

The present invention relates to the field of battery technology, and discloses a method and system for automatically allocating battery pack addresses. The method includes that each battery pack of the battery pack broadcasts its own serial number to the CAN bus respectively, and determines the address of each battery pack through free competition; sequentially detects the level signal of the address unit of the communication port of each battery pack before and after the discharge current limiting unit is turned on, and determines the series-parallel architecture information of the battery pack. The present invention automatically allocates the address of each battery pack through a competition mechanism, and determines the series-parallel architecture information of the battery pack through the change of the level signal of the address unit of the communication port, without adding an additional address allocation unit to handle the battery pack address allocation problem of the system, saving costs; and the method supports increasing the number of series and parallel connections, so users can flexibly apply it according to specific needs so as to be suitable for different projects.

Description

Technical Field

[0001] The present invention relates to the field of battery technology, and in particular to a method and system for automatically allocating battery group addresses. Background Art

[0002] With the continuous expansion of the new energy market and the continuous development of lithium battery products, people have put forward higher requirements for battery life and power. In this case, a single battery is often difficult to meet people's needs. Therefore, we can increase battery life and improve battery output power by connecting multiple battery packs in series and parallel.

[0003] In a battery series-parallel system, it is necessary to identify the number of series and parallel connections of the entire battery pack, so the battery address recognition technology is particularly important. Figure 1 As shown, the number of battery packs in the system is fixed, and the number of series and parallel connections is also fixed. The battery series processing unit, parallel processing unit and address allocation unit are used to complete the address allocation task of battery series and parallel connections. The process is roughly as follows:

[0004] First, after the battery pack is powered on, the address allocation unit allocates an address to battery pack 1, and battery pack 1 transmits its own address signal to battery pack 2 and battery pack 3; then, after receiving the address signal of battery pack 1, battery packs 2 and 3 are respectively allocated corresponding addresses by the address allocation unit; similarly, after allocating the address, battery pack 3 transmits the address signal to battery pack 4; finally, after receiving the address signal of battery pack 3, battery pack 4 is allocated a corresponding address by the address allocation unit.

[0005] In the above technology, when the number of battery packs is certain, the address allocation problem of 1 to 4 batteries in series and parallel can be effectively solved. However, when the application requirements change and the output power and endurance of the battery pack need to be adjusted, the existing architecture design limits the number of serial and parallel address recognition, which also limits the number of serial and parallel batteries and cannot meet the expansion requirements, that is, it is impossible to connect more batteries in series and parallel. It can be seen that the application scenarios of the existing technology are relatively limited, and the number of serial and parallel battery packs cannot be expanded, and the flexibility is poor.

[0006] The above information is presented as background information only to assist with understanding the present disclosure and no determination or admission is made as to whether any of the above may be used as prior art with respect to the present disclosure. Summary of the invention

[0007] The object of the present invention is to provide a method and system for automatically allocating battery pack addresses, so as to solve or at least partially solve the technical problems existing in the prior art.

[0008] To achieve this object, the present invention adopts the following technical solutions:

[0009] In a first aspect, the present invention provides a method for automatically allocating battery pack addresses, comprising:

[0010] Each battery pack in the battery pack broadcasts its own serial number to the CAN bus and determines the address of each battery pack through free competition;

[0011] Sequentially detect the level signals of the address units of the communication ports of each battery pack before and after the discharge current limiting unit is turned on, and determine the series-parallel architecture information of the battery pack; wherein the series-parallel architecture information of the battery pack includes the number of parallel branches and the number of battery packs connected in series under each parallel branch;

[0012] Wherein, the battery pack is provided with the discharge current limiting unit and a plurality of external connection ports, and the plurality of external connection ports include a positive electrode port, a negative electrode port and two communication ports integrated with the address unit.

[0013] Optionally, the initial state of the discharge current limiting unit of the battery pack is set to a closed state;

[0014] The step of sequentially detecting the level signals of the address units of the communication ports of each battery pack before and after the discharge current limiting unit is turned on to determine the series-parallel architecture information of the battery pack specifically includes:

[0015] The discharge current limiting units of the battery packs are turned on in descending order of the serial numbers; the battery packs with the discharge current limiting units turned on are called the battery packs under test; at any time, there is only one battery pack under test in the battery pack;

[0016] Detect whether the level signal of the address unit of the battery pack under test changes; if so, determine that the battery pack under test is a slave pack; if not, determine that the battery pack under test is a head pack;

[0017] Select the header packet with the largest sequence number as the main packet;

[0018] Among them, the head packet is used to collect information of all battery packs in the parallel branch where it is located; the main packet is used to communicate with the host and report information of all battery packs in the battery pack to the host; the battery pack information includes the serial number, address and level signal of the address unit of the battery pack.

[0019] Optionally, the communication port is further integrated with an address switch unit; the initial state of the address switch unit is set to an open state;

[0020] After selecting the header packet with the largest sequence number as the main packet, the method further includes:

[0021] Determine the position of the slave packets under the parallel branch where each head packet is located; specifically including:

[0022] The discharge current limiting units of the slave packs are turned on in descending order of the serial numbers. The slave packs with the discharge current limiting units turned on are called the slave packs under verification. At any time, there is only one slave pack under verification in the battery pack.

[0023] According to the order of the serial number from large to small, the address switch unit of each head packet is turned off in turn; the head packet with the address switch unit turned off is called a paired head packet, and at any time, there is only one paired head packet in the battery pack;

[0024] Detect whether the level of the address unit of the verification slave packet changes; if so, determine that the verification slave packet is connected in series with the pairing head packet; if not, determine that the verification slave packet is not connected in series with the pairing head packet.

[0025] Optionally, the level signals of all address units are initially high level;

[0026] The head pack is a battery pack whose positive electrode port is directly connected to the total positive electrode of the battery pack, and the number of the head packs is the number of the parallel branches;

[0027] The detection of whether the level signal of the address unit of the battery pack under test changes is specifically implemented as follows:

[0028] Detecting whether the level signals of the address units of the two communication ports are a high level and a low level;

[0029] The detecting whether the level of the address unit of the slave packet under verification changes is specifically implemented as follows:

[0030] It is detected whether the level signals of the address units of the two communication ports of the slave packet being verified are both high level.

[0031] Optionally, before selecting the header packet with the largest sequence number as the main packet, the method further includes:

[0032] Determine whether the number of slave packets is a multiple of the number of header packets;

[0033] If not, a notification message or warning message indicating that the battery quantity is incorrect is sent to the CAN bus.

[0034] In a second aspect, the present invention further provides a system for automatically allocating addresses of battery packs, comprising a host and a battery pack, wherein the host and the battery pack establish a communication connection via a CAN bus, wherein the battery pack comprises a plurality of parallel branches, wherein the parallel branches are formed by a plurality of battery packs connected in series; wherein the battery pack is provided with a discharge current limiting unit and a plurality of external connection ports, wherein the plurality of external connection ports comprises a positive electrode port, a negative electrode port and two communication ports integrated with address units;

[0035] The battery pack includes a battery management module, which is used to control all battery packs to broadcast their own serial numbers to the CAN bus after the system is powered on, and determine the address of each battery pack through free competition;

[0036] The battery management module is also used to detect the level signals of the address units of the communication ports of each battery pack in turn before and after the discharge current limiting unit is turned on, and determine the series-parallel architecture information of the battery pack; wherein the series-parallel architecture information of the battery pack includes the number of parallel branches and the number of battery packs connected in series under each parallel branch.

[0037] Optionally, the initial state of the discharge current limiting unit of the battery pack is set to a closed state;

[0038] The battery management module is specifically used for:

[0039] The discharge current limiting units of the battery packs are turned on in descending order of the serial numbers; the battery packs with the discharge current limiting units turned on are called the battery packs under test; at any time, there is only one battery pack under test in the battery pack;

[0040] Detect whether the level signal of the address unit of the battery pack under test changes; if so, determine that the battery pack under test is a slave pack; if not, determine that the battery pack under test is a head pack;

[0041] Select the header packet with the largest sequence number as the main packet;

[0042] Among them, the head packet is used to collect information of all battery packs in the parallel branch where it is located; the main packet is used to communicate with the host and report information of all battery packs in the battery pack to the host; the battery pack information includes the serial number, address and level signal of the address unit of the battery pack.

[0043] Optionally, the communication port is further integrated with an address switch unit; the initial state of the address switch unit is set to an open state;

[0044] The battery management module is also used to determine the position of the slave packages under the parallel branches where each head package is located after selecting the head package with the largest serial number as the master package, which is specifically implemented as follows:

[0045] The discharge current limiting units of the slave packs are turned on in descending order of the serial numbers. The slave packs with the discharge current limiting units turned on are called the slave packs under verification. At any time, there is only one slave pack under verification in the battery pack.

[0046] According to the order of the serial number from large to small, the address switch unit of each head packet is turned off in turn; the head packet with the address switch unit turned off is called a paired head packet, and at any time, there is only one paired head packet in the battery pack;

[0047] Detect whether the level of the address unit of the verification slave packet changes; if so, determine that the verification slave packet is connected in series with the pairing head packet; if not, determine that the verification slave packet is not connected in series with the pairing head packet.

[0048] Optionally, the level signals of all address units are initially high level;

[0049] The head pack is a battery pack whose positive electrode port is directly connected to the total positive electrode of the battery pack, and the number of the head packs is the number of the parallel branches;

[0050] The detection of whether the level signal of the address unit of the battery pack under test changes is specifically implemented as follows:

[0051] Detecting whether the level signals of the address units of the two communication ports are a high level and a low level;

[0052] The detecting whether the level of the address unit of the slave packet under verification changes is specifically implemented as follows:

[0053] It is detected whether the level signals of the address units of the two communication ports of the slave packet being verified are both high level.

[0054] Optionally, the battery management module is further used to determine whether the number of slave packets is a multiple of the number of head packets before selecting the head packet with the largest serial number as the master packet;

[0055] If so, select the header packet with the largest sequence number as the main packet;

[0056] If not, a notification message or warning message of incorrect battery quantity is sent to the host via the CAN bus.

[0057] Compared with the prior art, the present invention has the following beneficial effects:

[0058] The method for automatic allocation of battery pack addresses provided by the present invention automatically allocates the addresses of each battery pack through a competition mechanism, and determines the series-parallel architecture information of the battery pack through changes in the level signal of the address unit of the communication port. There is no need to add additional address allocation units to handle the battery pack address allocation problem of the system, thereby saving costs; and the method supports increasing the number of series and parallel connections, so users can flexibly apply it according to specific needs so that it is suitable for different projects.

[0059] The present invention has other features and advantages, which will be apparent from or will be described in detail in the accompanying drawings and the following detailed description incorporated herein, which together serve to explain the specific principles of the invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0061] Figure 1 The present invention is a schematic diagram of the architecture of an address allocation system for a battery pack in the prior art.

[0062] Figure 2 The present invention provides a flowchart of a method for automatically allocating battery pack addresses.

[0063] Figure 3 This is a partial flow chart of a method for automatically allocating battery pack addresses provided by an embodiment of the present invention.

[0064] Figure 4 This is another partial flow chart of a method for automatically allocating battery pack addresses provided by an embodiment of the present invention.

[0065] Figure 5 It is a system architecture diagram of automatic battery pack address allocation provided by an embodiment of the present invention.

[0066] Figure 6 This is a battery cell level detection principle diagram provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0067] In order to explain in detail the possible application scenarios, technical principles, specific schemes that can be implemented, and the purposes and effects that can be achieved, the following is a detailed description of the specific embodiments listed in conjunction with the accompanying drawings. The embodiments described herein are only used to more clearly illustrate the technical solutions of the present application, and are therefore only used as examples, and cannot be used to limit the scope of protection of the present application.

[0068] Reference to "embodiment" herein means that the specific features, structures or characteristics described in conjunction with the embodiment may be included in at least one embodiment of the present application. The term "embodiment" appearing in various places in the specification does not necessarily refer to the same embodiment, nor does it particularly limit its independence or association with other embodiments. In principle, in the present application, as long as there is no technical contradiction or conflict, the various technical features mentioned in the embodiments can be combined in any way to form a corresponding implementable technical solution.

[0069] Unless otherwise defined, the technical terms used in this document have the same meanings as those generally understood by those skilled in the art to which this application belongs; the use of relevant terms in this document is only for describing specific embodiments and is not intended to limit this application.

[0070] In the description of this application, the term "and / or" is an expression used to describe the logical relationship between objects, indicating that three relationships may exist, for example, A and / or B, which means: A exists, B exists, and A and B exist at the same time. In addition, the character " / " in this article generally indicates that the objects before and after are in an "or" logical relationship.

[0071] In the present application, terms such as “first” and “second” are merely used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship of quantity, priority or sequence between these entities or operations.

[0072] Without further limitations, in this application, the words "include", "comprises", "has" or other similar expressions used in the sentences are intended to cover non-exclusive inclusion. These expressions do not exclude the presence of additional elements in the process, method or product including the elements, so that the process, method or product including a series of elements may include not only those limited elements, but also other elements not explicitly listed, or also include elements inherent to such process, method or product.

[0073] Similar to the understanding in the Examination Guidelines, in this application, expressions such as "greater than", "less than", "exceed" and the like are understood to exclude the number itself; expressions such as "above", "below", "within" and the like are understood to include the number itself. In addition, in the description of the embodiments of this application, "multiple" means more than two (including two), and similar expressions related to "multiple" are also understood in this way, such as "multiple groups", "multiple times", etc., unless otherwise clearly and specifically limited.

[0074] In the description of the embodiments of the present application, space-related expressions used, such as "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "vertical", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicate the orientation or position relationship based on the orientation or position relationship shown in the specific embodiments or drawings, and are only for the convenience of describing the specific embodiments of the present application or facilitating the reader's understanding, and do not indicate or imply that the referred device or component must have a specific position, a specific orientation, or be constructed or operated in a specific orientation, and therefore cannot be understood as a limitation on the embodiments of the present application.

[0075] Unless otherwise expressly specified or limited, in the description of the embodiments of the present application, the terms such as "install", "connect", "connect", "fix", "set", etc. used should be understood in a broad sense. For example, the "connection" can be a fixed connection, a detachable connection, or an integrated setting; it can be a mechanical connection, an electrical connection, or a communication connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium; it can be the internal connection of two elements or the interaction relationship between two elements. For technicians in the technical field to which the present application belongs, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0076] Embodiment 1:

[0077] See also Figure 2 , Figure 2 1 is a flow chart of a method for automatically allocating battery pack addresses provided by an embodiment of the present invention; the method comprises:

[0078] Step 110 : Each battery pack of the battery group broadcasts its own serial number to the CAN bus, and determines the address of each battery pack through free competition.

[0079] Among them, the battery pack is provided with a discharge current limiting unit and a plurality of external connection ports, and the plurality of external connection ports include a positive electrode port, a negative electrode port and two communication ports integrated with an address unit; it can be understood that a CAN communication unit is integrated in the battery pack or its communication port, and a communication connection can be established with a CAN bus through the CAN communication unit;

[0080] Please refer to Figure 5 , Figure 5 It is a system architecture diagram of automatic battery pack address allocation provided by an embodiment of the present invention; after the system is powered on, the battery pack determines the address of each battery pack according to the address free competition allocation mechanism; the battery packs have a serial number for identifying their identity; then, the system turns on the discharge current limiting units in order from large to small according to the serial numbers.

[0081] Step 120 , sequentially detect the level signals of the address units of the communication ports of each battery pack before and after the discharge current limiting unit is turned on, and determine the series-parallel architecture information of the battery pack.

[0082] In step 120, the series-parallel architecture information of the battery pack includes information such as the number of parallel branches and the number of battery packs connected in series under each parallel branch;

[0083] For ease of understanding, the following is an explanation of how the battery pack finds the head pack and the slave pack:

[0084] Specifically, in this embodiment, the initial state of the discharge current limiting unit of the battery pack is set to the closed state; please continue to refer to Figure 3 , Figure 3 It is a partial flow chart of a method for automatically allocating battery pack addresses provided by an embodiment of the present invention;

[0085] Step 120 specifically includes:

[0086] Step 121 , turning on the discharge current limiting units of the battery pack in order of serial numbers from large to small.

[0087] For ease of description, in this embodiment, the battery pack with the discharge current limiting unit turned on is called a battery pack under test; at any time, there is only one battery pack under test in the battery pack;

[0088] Specifically, before the current limiting unit is turned on, the levels of the address units of the two communication ports of the battery pack are both high levels.

[0089] Step 122 , detect whether the level signal of the address unit of the battery pack under test changes; if so, execute step 123 ; if not, execute step 124 .

[0090] Step 123: Determine that the battery pack under test is a slave pack.

[0091] Step 124: Determine that the battery pack under test is a first pack.

[0092] In this embodiment, the level signals of all address units are initially high level; the head pack is a battery pack whose positive port is directly connected to the total positive pole of the battery pack, and the number of head packs is the number of parallel branches.

[0093] Here Figure 5 Take the battery pack 1 in the figure as an example to explain how to find the head pack of the battery pack:

[0094] like Figure 5 As shown, after the discharge current limiting unit of battery pack 1 is turned on, it is necessary to detect the level changes of 1# address unit and 2# address unit. If 1# address unit and 2# address unit maintain high level and last for t seconds, battery pack 1 is the head pack, and the serial number of battery pack 1 is recorded; if 1# address unit and 2# address unit switch from a high level state to a high level and a low level state and last for t seconds, battery pack 1 is a slave pack; after completing the judgment, it is necessary to turn off the discharge current limiting unit of battery pack 1; then check the remaining battery packs in turn according to the above operation process, and after confirming all the head packs, the number of battery packs in parallel can be confirmed.

[0095] Step 125: Select the header packet with the largest sequence number as the main packet.

[0096] After the head pack is determined, the battery pack with the largest serial number is selected as the main pack;

[0097] In this embodiment, the head packet is used to collect information of all battery packs in the parallel branch where it is located; the main packet is used to communicate with the host and report to the host information of all battery packs in the battery pack, including protection status, SOC and other information; the battery pack information includes the serial number, address and level signal of the address unit of the battery pack.

[0098] Specifically, the communication port is further integrated with an address switch unit; the initial state of the address switch unit is set to an open state.

[0099] After step 125, the method further includes:

[0100] Step 126: Determine the position of the slave packets under the parallel branch where each head packet is located.

[0101] Please refer to Figure 4 , Figure 4 is another partial flow chart of a method for automatically allocating battery pack addresses provided by an embodiment of the present invention;

[0102] Step 126 specifically includes:

[0103] Step 1261 , turning on the discharge current limiting unit of each slave package in sequence according to the sequence number from large to small.

[0104] For the convenience of distinction and description, in this embodiment, the slave pack with the discharge current limiting unit turned on is called an under-test slave pack; at any time, there is only one under-test slave pack in the battery pack.

[0105] Step 1262: Close the address switch unit of each header packet in order of serial number from large to small.

[0106] For the convenience of distinction and description, in this embodiment, the head packet with the address switch unit turned off is called a paired head packet. At any time, there is only one paired head packet in the battery pack;

[0107] Step 1263, check whether the level of the address unit of the verification slave packet changes; if so, execute step 1264; if not, execute step 1265.

[0108] Step 1264: Determine whether the slave packet is connected in series with the paired header packet.

[0109] Step 1265: Determine whether the slave packet is connected in series with the paired header packet.

[0110] Step 122 is specifically implemented as follows:

[0111] Check whether the level signals of the address units of the two communication ports are a high level and a low level.

[0112] Step 1263 is specifically implemented as follows:

[0113] Check whether the level signals of the address units of the two communication ports of the slave packet are both high level.

[0114] As a preferred implementation, before step 125, the method further includes:

[0115] Step 1251, determine whether the number of slave packets is a multiple of the number of header packets; if not, execute step 1252; if so, execute step 125.

[0116] Step 1252: Send a notification message or warning message indicating that the battery quantity is incorrect to the CAN bus.

[0117] For ease of understanding, illustratively, taking battery pack 1, battery pack 4, and battery pack 7 as examples, the method for the battery pack to find all battery packs in this string is described in detail:

[0118] First, if Figure 5 As shown, the initial state of all battery packs is: the discharge current limiting unit is turned off, the address switch unit is turned on, and the 1# address unit and the 2# address unit both maintain a high level state.

[0119] After the head pack (battery pack 1, etc.) is determined, the discharge current limiting units of all the slave packs (battery pack 4, battery pack 7, etc.) are turned on in order from largest to smallest according to the serial numbers;

[0120] After the discharge current limiting unit is turned on, the level signals of the 1# address unit and the 2# address unit of the battery pack need to be detected. If the 1# address unit and the 2# address unit of the battery pack are changed from both high levels to a high level and a low level, and last for t seconds, it means that the battery pack is a slave pack, where t is the predetermined level signal duration; this has been explained in the head pack determination process above, and will not be repeated here;

[0121] Taking battery pack 4 as an example, it should be noted that after detecting that the level of address unit 1# and address unit 2# of battery pack 4 is a high level and a low level, it is necessary to broadcast information on the CAN bus to let battery pack 1 execute the action of closing the address switch unit. After battery pack 1 closes its address switch unit, the verification slave pack (battery pack 4) needs to detect the level change of address unit 1# and address unit 2# again;

[0122] If at this time the 1# address unit and the 2# address unit of the verification slave pack (battery pack 4) change from 1 high level and 1 low level to 2 high levels and last for t seconds, it is determined that the verification slave pack (battery pack 4) is connected in series with the battery pack 1, and the serial number of the verification slave pack (battery pack 4) is recorded;

[0123] If the level of the 1# address unit and the 2# address unit of the verification slave pack (battery pack 4) remain unchanged and last for t seconds, the verification slave pack (battery pack 4) is not connected in series with battery pack 1; at this time, switch to the next head pack and perform another round of detection according to the above operation process. After determining the parallel branch where the verification slave pack is located, it is necessary to close the discharge current limiting unit of the verification slave pack, and broadcast information on the CAN bus at the same time, so that the head pack (battery pack 1) of the parallel branch where the verification slave pack is located can reopen the address switch unit.

[0124] After confirming that battery pack 4 is connected in series with battery pack 1, it is necessary to continue to search for the next slave pack in the string. The remaining battery packs still open the discharge current limiting units in order from large to small according to the serial number, and traverse all the batteries until it is determined that battery pack 7 is also the parallel branch where battery pack 1 is located. The specific traversal process will not be repeated here.

[0125] After completing the above steps, it can be confirmed that battery pack 1, battery pack 4, and battery pack 7 are in the same string of batteries. Similarly, battery pack 2, battery pack 5, and battery pack 8 are in the same string of batteries, and battery pack 3, battery pack 6, and battery pack 9 are in the same string of batteries. After clarifying the number of battery packs in series and parallel and the position of each battery pack in the battery pack, the battery pack can turn on the output to power the host, allowing the entire system to start working normally.

[0126] The method for automatic allocation of battery pack addresses provided in this embodiment automatically allocates the addresses of each battery pack through a competition mechanism, and determines the series-parallel architecture information of the battery pack through changes in the level signal of the address unit of the communication port. There is no need to add additional address allocation units to handle the battery pack address allocation problem of the system, thereby saving costs. In addition, the method supports increasing the number of series and parallel connections, so users can flexibly apply it according to specific needs so that it is suitable for different projects.

[0127] Embodiment 2:

[0128] Please refer to Figure 5 , Figure 5 It is a system architecture diagram of automatic battery pack address allocation provided by an embodiment of the present invention.

[0129] like Figure 5 As shown, this embodiment provides a system for automatically allocating addresses of battery packs, including a host and a battery pack, wherein the host and the battery pack establish a communication connection via a CAN bus, wherein the battery pack includes a plurality of parallel branches, wherein the parallel branches are formed by a plurality of battery packs connected in series; the battery pack is provided with a discharge current limiting unit and a plurality of external connection ports, wherein the plurality of external connection ports include a positive electrode port, a negative electrode port, and two communication ports integrated with address units;

[0130] The battery pack includes a battery management module, which is used to control all battery packs to broadcast their own serial numbers to the CAN bus after the system is powered on, and determine the address of each battery pack through free competition;

[0131] The battery management module is also used to detect the level signals of the address units of the communication ports of each battery pack in turn before and after the discharge current limiting unit is turned on, and determine the series-parallel architecture information of the battery pack; wherein the series-parallel architecture information of the battery pack includes the number of parallel branches and the number of battery packs connected in series under each parallel branch.

[0132] Since the method for automatically allocating battery pack addresses has been described in detail in the first embodiment, it will not be described in detail in this embodiment.

[0133] It should be noted that, in order to facilitate understanding of the specific principle of the battery cell level detection in the first embodiment, this embodiment also provides a battery cell level detection circuit, please refer to Figure 6 , Figure 6 is a battery cell level detection principle diagram provided by an embodiment of the present invention;

[0134] like Figure 6 As shown, the battery cell level detection circuit provided in this embodiment specifically includes:

[0135] Two optocoupler switches (U17 and U18), two switch tubes (Q53 and Q54), several resistors, several capacitors and several diodes; the specific circuit connection relationship is as follows:

[0136] The positive input terminal (pin 1) of the optocoupler switch U18 is electrically connected to the first end of the resistor R239, the second end of the resistor R239 is used to electrically connect the ID1_CTRL signal, and the positive input terminal (pin 2) of the optocoupler switch U18 is connected to the reference ground GND; the positive input terminal (pin 1) of the optocoupler switch U17 is electrically connected to the first end of the resistor R238, the second end of the resistor R238 is used to electrically connect the ID2_CTRL signal, and the positive input terminal (pin 2) of the optocoupler switch U17 is connected to the reference ground GND;

[0137] The positive output terminal (pin 4) of the optocoupler switch U18 is electrically connected to the negative terminal of the switch tube Q54, the positive terminal of the switch tube Q54 is electrically connected to the second end of the resistor R208 and the second end of R215 respectively, the first end of R215 is electrically connected to the +VCC power supply, the first end of the resistor R208 is used to electrically connect to the 2# address unit level signal detection terminal ID1_DET, the control end of the switch tube Q54 is electrically connected to the first end of the resistor R230, and the second end of the resistor R230 is used to electrically connect to the ID1 signal;

[0138] The positive output terminal (pin 4) of the optocoupler switch U17 is electrically connected to the negative terminal of the switch tube Q53, the positive terminal of the switch tube Q53 is electrically connected to the second end of the resistor R207 and the second end of R214 respectively, the first end of R214 is electrically connected to the +VCC power supply, the first end of the resistor R207 is used to electrically connect to the 2# address unit level signal detection terminal ID2_DET, the control end of the switch tube Q53 is electrically connected to the first end of the resistor R229, and the second end of the resistor R229 is used to electrically connect to the ID2 signal;

[0139] The negative output terminal (pin 3) of the optocoupler switch U17 and the negative output terminal (pin 3) of the optocoupler switch U18 are both grounded (or the housing of the battery pack);

[0140] The control end of the switch tube Q53 and the positive output end (pin 4) of the optocoupler switch U17 are also electrically connected to a diode D29 and a resistor R226, respectively; the control end of the switch tube Q54 and the positive output end (pin 4) of the optocoupler switch U18 are also electrically connected to a diode D30 and a resistor R227, respectively;

[0141] The second end of R215 is also electrically connected to the positive electrode of capacitor C93, and the negative electrode of capacitor C93 is electrically connected to the reference ground GND; the second end of R214 is also electrically connected to the positive electrode of capacitor C92, and the negative electrode of capacitor C92 is electrically connected to the reference ground GND.

[0142] It should be noted that in the description of the above circuit structure, the “first end” corresponds to Figure 6 The left or upper end of Figure 6 the right or bottom end of the .

[0143] Please combine Figure 5 and Figure 6 , take battery pack 1 (head pack) as an example;

[0144] The initial state of battery pack 1 is: the discharge current limiting unit is turned off, the address switch unit is turned on, and the 1# address unit and the 2# address unit are both kept in a high level state;

[0145] Specifically, initially, since the discharge current limiting unit of battery pack 1 is turned off, no high-level signal is connected to ID1_CTRL and ID2_CTRL, and the 3rd and 4th pins of the optocoupler switches U17 and U18 are not conducting, which is equivalent to the 3rd pins of the transistors Q53 and Q54 being in a floating state, so the 1st address unit level signal detection terminal ID1_DET of battery pack 1 is at a high level, so the 2nd address unit level signal detection terminal ID2_DET of battery pack 1 is also at a high level;

[0146] When the discharge current limiting unit of battery pack 1 is turned on, ID1_CTRL and ID2_CTRL are both connected to high-level signals, and pins 3 and 4 of optocoupler switches U17 and U18 are turned on. However, since battery pack 1 is the head pack, its ID1 is in a floating state, so transistor Q54 is not turned on, and ID2 is connected to the 1# address unit of battery pack 4. In this parallel branch, the positive pole of battery pack 4 is connected to the negative pole of battery pack 1, so ID2 is equivalent to being connected to the negative pole of battery pack 1 (or GND signal), so it is low level, so transistor Q53 is also not turned on, therefore, the level signals of the 1# address unit and the 2# address unit of battery pack 1 are still high level.

[0147] Take battery pack 4 (slave pack) as an example;

[0148] The initial state of the battery pack 4 is: the discharge current limiting unit is turned off, the address switch unit is turned on, and the 1# address unit and the 2# address unit are both kept in a high level state;

[0149] Initially, since the discharge current limiting unit of the battery pack 4 is turned off, no high-level signal is connected to ID1_CTRL and ID2_CTRL, and the 3rd and 4th pins of the optocoupler switches U17 and U18 are not conducting, which is equivalent to the 3rd pins of the transistors Q53 and Q54 being in a suspended state, so the 1# address unit level signal detection terminal ID1_DET and the 2# address unit level signal detection terminal ID2_DET of the battery pack 4 are both high levels;

[0150] When the discharge current limiting unit of battery pack 4 is turned on, ID1_CTRL and ID2_CTRL are both connected to high-level signals, and pins 3 and 4 of optocoupler switches U17 and U18 are turned on. Since battery pack 1 is a slave pack, its ID1 is connected to the 2# address unit of battery pack 1, which is equivalent to connecting to the positive electrode of battery pack 4, so transistor Q54 is turned on, and ID2 is connected to the 1# address unit of battery pack 7. In this parallel branch, the positive electrode of battery pack 7 is connected to the negative electrode of battery pack 4, so ID2 is equivalent to connecting to the negative electrode of battery pack 4 (or GND signal), so it is a low level, so transistor Q53 is not turned on, therefore, the 1# address unit of battery pack 1 is pulled down to a low level, while the level signal of the 2# address unit remains high.

[0151] In this embodiment, each battery pack of the battery group selects the master pack, the slave pack and the head pack according to its own address unit, the address switch unit and the product serial number according to the address allocation self-competition mechanism, and no additional address allocation unit is required to handle the battery pack address allocation problem of the system, which can save costs;

[0152] In addition, the number of series and parallel connections of the battery pack can be changed, and can be flexibly applied to projects with different needs; that is, for projects with large output power and high battery life requirements, the number of series and parallel connections can be increased as appropriate; for projects with low power output and small battery life requirements, the number of series and parallel connections can be reduced as appropriate.

[0153] Those skilled in the art can understand that all or part of the steps of the above embodiments can be completed by hardware, or by a program to instruct the relevant hardware to complete the steps. The program can be stored in a computer-readable storage medium, and the storage medium mentioned above can be a read-only memory, a disk or an optical disk, etc. Based on such an understanding, the technical solution of the present invention can be essentially or partly embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0154] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for automatically allocating battery pack addresses, characterized in that: include: Each battery pack in the battery pack broadcasts its own serial number to the CAN bus and determines the address of each battery pack through free competition; Sequentially detect the level signals of the address units of the communication ports of each battery pack before and after the discharge current limiting unit is turned on, and determine the series-parallel architecture information of the battery pack; wherein the series-parallel architecture information of the battery pack includes the number of parallel branches and the number of battery packs connected in series under each parallel branch; Wherein, the battery pack is provided with the discharge current limiting unit and a plurality of external connection ports, and the plurality of external connection ports include a positive electrode port, a negative electrode port and two communication ports integrated with the address unit.

2. A method for automatically allocating battery pack addresses according to claim 1, characterized in that: The initial state of the discharge current limiting unit of the battery pack is set to a closed state; The step of sequentially detecting the level signals of the address units of the communication ports of each battery pack before and after the discharge current limiting unit is turned on to determine the series-parallel architecture information of the battery pack specifically includes: The discharge current limiting units of the battery packs are turned on in descending order of the serial numbers; the battery packs with the discharge current limiting units turned on are called the battery packs under test; at any time, there is only one battery pack under test in the battery pack; Detect whether the level signal of the address unit of the battery pack under test changes; if so, determine that the battery pack under test is a slave pack; if not, determine that the battery pack under test is a head pack; Select the header packet with the largest sequence number as the main packet; Among them, the head packet is used to collect information of all battery packs in the parallel branch where it is located; the main packet is used to communicate with the host and report information of all battery packs in the battery pack to the host; the battery pack information includes the serial number, address and level signal of the address unit of the battery pack.

3. A method for automatically allocating battery pack addresses according to claim 2, characterized in that: The communication port is also integrated with an address switch unit; the initial state of the address switch unit is set to an open state; After selecting the header packet with the largest sequence number as the main packet, the method further includes: Determine the position of the slave packets under the parallel branch where each head packet is located; specifically including: The discharge current limiting units of the slave packs are turned on in descending order of the serial numbers. The slave packs with the discharge current limiting units turned on are called the slave packs under verification. At any time, there is only one slave pack under verification in the battery pack. According to the order of the serial number from large to small, the address switch unit of each head packet is turned off in turn; the head packet with the address switch unit turned off is called a paired head packet, and at any time, there is only one paired head packet in the battery pack; Detect whether the level of the address unit of the verification slave packet changes; if so, determine that the verification slave packet is connected in series with the pairing head packet; if not, determine that the verification slave packet is not connected in series with the pairing head packet.

4. A method for automatically allocating battery pack addresses according to claim 3, characterized in that: The level signals of all address units are initially high level; The head pack is a battery pack whose positive electrode port is directly connected to the total positive electrode of the battery pack, and the number of the head packs is the number of the parallel branches; The detection of whether the level signal of the address unit of the battery pack under test changes is specifically implemented as follows: Detecting whether the level signals of the address units of the two communication ports are a high level and a low level; The detecting whether the level of the address unit of the slave packet under verification changes is specifically implemented as follows: It is detected whether the level signals of the address units of the two communication ports of the slave packet being verified are both high level.

5. The method for automatically allocating battery pack addresses according to claim 2, characterized in that: Before selecting the header packet with the largest sequence number as the main packet, the method further includes: Determine whether the number of slave packets is a multiple of the number of header packets; If not, a notification message or warning message indicating that the battery quantity is incorrect is sent to the CAN bus.

6. A system for automatically allocating battery pack addresses, comprising a host and a battery pack, wherein the host and the battery pack establish a communication connection via a CAN bus, wherein the battery pack comprises a plurality of parallel branches, wherein the parallel branches are formed by connecting a plurality of battery packs in series; characterized in that: The battery pack is provided with a discharge current limiting unit and a plurality of external connection ports, wherein the plurality of external connection ports include a positive electrode port, a negative electrode port and two communication ports integrated with an address unit; The battery pack includes a battery management module, which is used to control all battery packs to broadcast their own serial numbers to the CAN bus after the system is powered on, and determine the address of each battery pack through free competition; The battery management module is also used to detect the level signals of the address units of the communication ports of each battery pack in turn before and after the discharge current limiting unit is turned on, and determine the series-parallel architecture information of the battery pack; wherein the series-parallel architecture information of the battery pack includes the number of parallel branches and the number of battery packs connected in series under each parallel branch.

7. A system for automatically allocating battery pack addresses according to claim 6, characterized in that: The initial state of the discharge current limiting unit of the battery pack is set to a closed state; The battery management module is specifically used for: The discharge current limiting units of the battery packs are turned on in descending order of the serial numbers; the battery packs with the discharge current limiting units turned on are called the battery packs under test; at any time, there is only one battery pack under test in the battery pack; Detect whether the level signal of the address unit of the battery pack under test changes; if so, determine that the battery pack under test is a slave pack; if not, determine that the battery pack under test is a head pack; Select the header packet with the largest sequence number as the main packet; Among them, the head packet is used to collect information of all battery packs in the parallel branch where it is located; the main packet is used to communicate with the host and report information of all battery packs in the battery pack to the host; the battery pack information includes the serial number, address and level signal of the address unit of the battery pack.

8. A system for automatically allocating battery pack addresses according to claim 7, characterized in that: The communication port is also integrated with an address switch unit; the initial state of the address switch unit is set to an open state; The battery management module is also used to determine the position of the slave packages under the parallel branches where each head package is located after selecting the head package with the largest serial number as the master package, which is specifically implemented as follows: The discharge current limiting units of the slave packs are turned on in descending order of the serial numbers. The slave packs with the discharge current limiting units turned on are called the slave packs under verification. At any time, there is only one slave pack under verification in the battery pack. According to the order of the serial number from large to small, the address switch unit of each head packet is turned off in turn; the head packet with the address switch unit turned off is called a paired head packet, and at any time, there is only one paired head packet in the battery pack; Detect whether the level of the address unit of the verification slave packet changes; if so, determine that the verification slave packet is connected in series with the pairing head packet; if not, determine that the verification slave packet is not connected in series with the pairing head packet.

9. A system for automatically allocating battery pack addresses according to claim 8, characterized in that: The level signals of all address units are initially high level; The head pack is a battery pack whose positive electrode port is directly connected to the total positive electrode of the battery pack, and the number of the head packs is the number of the parallel branches; The detection of whether the level signal of the address unit of the battery pack under test changes is specifically implemented as follows: Detecting whether the level signals of the address units of the two communication ports are a high level and a low level; The detecting whether the level of the address unit of the slave packet under verification changes is specifically implemented as follows: It is detected whether the level signals of the address units of the two communication ports of the slave packet being verified are both high level.

10. The system for automatically allocating battery pack addresses according to claim 7, characterized in that: The battery management module is also used to determine whether the number of slave packets is a multiple of the number of head packets before selecting the head packet with the largest serial number as the master packet; If so, select the header packet with the largest sequence number as the main packet; If not, a notification message or warning message of incorrect battery quantity is sent to the host via the CAN bus.

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