A minority carrier enhanced micro-triggered thyristor device

Abstract

The present invention relates to the technical field of thyristor devices, and particularly to a minority carrier enhanced micro-trigger thyristor device, including: the front base region has a first doping type; a buried layer with a second doping type is formed in the front base region; the buried layer and the front base regions on the upper and lower sides form a triode amplification structure, and minority carriers in the front base region below the buried layer are enhanced when the device is turned on. Aiming at the problem of unstable performance of the micro-trigger thyristor device in the prior art, in this solution, a triode amplification structure is introduced in the front base region through the buried layer. Since the region between the buried layer and the emitter region is fixed and the doping concentration is fixed, stable trigger control accuracy can also be achieved under micro-current. Moreover, the minority carriers in the front base region below the buried layer will generate a multiplication effect due to the amplification structure based on the buried layer above, which can effectively reduce the trigger current. After the device is triggered, the enhancement of the conductance modulation effect can effectively reduce the equivalent resistance after conduction.

Description

Technical Field

[0001] The present invention relates to the technical field of thyristor devices, and more particularly to a minority carrier enhanced micro-trigger thyristor device. Background Art

[0002] A silicon controlled rectifier (SCR), also known as a thyristor, is a device composed of a four-layer semiconductor material of PNPN, with three PN junctions and three electrodes, and is a high-power electrical component. A bidirectional thyristor is developed on the basis of a common thyristor, can replace two thyristors connected in antiparallel, and only requires one trigger circuit, making it an ideal AC switch device. Thyristors are widely used in power electronics technology. In an automatic control system, they can be used as high-power drive devices to achieve the control of high-power equipment with low-power controls. They have been widely used in AC and DC motor speed control systems, power regulation systems, and servo systems. From the perspective of trigger current magnitude, thyristor devices can be divided into micro-trigger, ordinary trigger, and high-trigger thyristor devices. Generally speaking, a trigger current greater than 50 mA belongs to high-trigger, and less than 1 mA belongs to micro-trigger. There are different trigger requirements in practical applications. Minority carriers, also known as minority charge carriers. In an N-type semiconductor, holes are called minority charge carriers, simply referred to as minority carriers. In a P-type semiconductor, electrons are called minority charge carriers. Minority carriers are a concept in semiconductor physics. There are two types of charge carriers, electrons and holes, in semiconductor materials. If a certain type of charge carrier accounts for the majority and plays a major role in conduction, it is called a majority carrier. Otherwise, it is called a minority carrier.

[0003] In the prior art, there have been many thyristor device designs. For example, Chinese Patent CN202011349302.1 discloses a thyristor device. In this structure, a first blank doping region is provided on the upper part of the N-type well region; any equivalent structure includes a first N-type heavily doped region and a second P-type heavily doped region arranged side by side in the left-right direction; any equivalent structure is correspondingly provided with a second polysilicon; a second blank doping region is provided on the upper part of the P-type well region; there is an overlapping region between the first polysilicon and the first blank doping region, and the top of the second blank doping region is covered; the silicide blocking layer has an overlapping region with the first P-type heavily doped region, has an overlapping region with the first polysilicon, and also covers the top of the second blank doping region. A silicide blocking layer is provided on the N-type well region, and by utilizing the good current limiting ability of the silicide blocking layer, and an equivalent diode region is provided in the N-type well region, the purpose of improving the holding voltage of the SCR is achieved, the leakage risk of the SCR is effectively reduced, and the electrostatic discharge protection performance of the SCR is improved.

[0004] For another example, Chinese Patent CN202211342900.5 discloses a thyristor device in the field of integrated circuits, including a substrate and a device region formed on the substrate. A first N-well region and a first P-well region are provided in the device region; a first N+ implantation region, a first isolation trench, and a first P+ implantation region are provided on the first N-well region; a second N+ implantation region, a second isolation trench, and a second P+ implantation region are provided on the first P-well region; the first N+ implantation region and the first P+ implantation region are connected by metal and connected to the anode; the second N+ implantation region and the second P+ implantation region are connected by metal and connected to the cathode; a third P+ implantation region is provided at the junction of the first P-well region and the first N-well region; a reverse P+ / Nwell diode is formed by the first N+ implantation region, the first N-well region, the third P+ implantation region, the first P-well region, and the second P+ implantation region; the holding voltage is improved, and the thyristor device maintains the characteristics of high robustness.

[0005] However, in the actual implementation process, the inventor found that when designing the micro-trigger current for the thyristor device, problems such as poor trigger precision control, a decrease in the VDRM parameter, an excessive VTM parameter, and a poor IT(RMS) parameter are likely to occur when the trigger current of the micro-trigger thyristor is reduced. Summary of the Invention

[0006] In view of the above problems existing in the prior art, a minority-carrier enhanced micro-trigger thyristor device is provided.

[0007] The specific technical solution is as follows: A minority-carrier enhanced micro-trigger thyristor device, the front base region of the minority-carrier enhanced micro-trigger thyristor device has a first doping type; a buried layer with a second doping type is formed in the front base region; the buried layer and the upper and lower front base regions form a triode amplification structure, and minority carriers are enhanced in the front base region below the buried layer when the device is turned on.

[0008] On the other hand, the minority-carrier enhanced micro-trigger thyristor device further includes: a substrate with a second doping type; the front base region is formed above the substrate; a front emitter region, the front emitter region has a second doping type; the front emitter region is partially formed in the upper surface of the front base region and above the buried layer; the front emitter region is spaced from the buried layer by the front base region; the front emitter region partially covers the upper surface of the front base region so that a part of the front base region is exposed; a front base region electrode is formed above the exposed part of the front base region; a front emitter region electrode is formed above the front emitter region; a back base region is formed below the substrate; the back base region has a first doping type; a back electrode is formed below the back base region.

[0009] On the other hand, pn junction isolation diffusion regions are respectively formed on the left and right sides of the minority carrier enhanced micro-trigger thyristor device.

[0010] On the other hand, grooves are respectively formed between the front base region and the pn junction isolation diffusion regions; the depth of the grooves reaches the substrate; the grooves are filled with a glass passivation layer.

[0011] On the other hand, a voltage dividing ring structure is further formed in the region of the substrate between the front base region and the pn junction isolation diffusion regions.

[0012] On the other hand, a passivation layer is formed in the region between the front base region electrode and the front emitter region electrode; on the other hand, at least one back emitter is further formed in the back base region, and the lower part of the back emitter is in contact with the back electrode.

[0013] On the other hand, when the number of the buried layers is at least two, the multiple buried layers are sequentially stacked in the front base region in the height direction; the multiple buried layers are spaced apart by the front base region.

[0014] On the other hand, the left and right ends of the buried layer are located in the front base region; alternatively, the left and right ends of the buried layer respectively reach the grooves and are covered by the glass passivation layer.

[0015] On the other hand, the thickness of the buried layer is less than 4 μm.

[0016] On the other hand, when the second doping type is N-type, the doping concentration of the buried layer is greater than 3E19; when the second doping type is P-type, the doping concentration of the buried layer is greater than 5E19.

[0017] On the other hand, the breakdown voltage VDRM of the minority carrier enhanced micro-trigger thyristor device is greater than 800 V; the trigger current of the minority carrier enhanced micro-trigger thyristor device is less than 1 mA; the thickness of the substrate is between 250 μm and 450 μm.

[0018] On the other hand, the distance between the upper surface of the buried layer and the lower surface of the front emitter region is greater than 1 / 10 of the thickness of the front base region; the distance between the lower surface of the buried layer and the bottom of the front base region is greater than 2 / 10 of the thickness of the front base region.

[0019] A preparation method for preparing the above-mentioned minority-carrier enhanced micro-trigger thyristor device; the preparation method includes: epitaxially growing a front base region with a second doping type above a substrate of a first doping type; implanting in the front base region to form a buried layer, and then further epitaxially growing the front base region above the buried layer; implanting a predetermined position of the front base region to obtain a front emitter region; sequentially fabricating a front base region electrode, a passivation layer, and a front emitter region electrode above the front base region and the front emitter region; epitaxially growing below the substrate to obtain a back base region; fabricating a back electrode below the back base region.

[0020] The above technical solution has the following advantages or beneficial effects: Aiming at the problem of unstable performance of the micro-trigger thyristor device in the prior art, in this solution, a triode amplification structure is introduced in the front base region through a buried layer. When the device is turned on, since the region between the buried layer and the emitter region is fixed and the doping concentration is fixed, stable trigger control accuracy can be achieved even under microcurrents. Moreover, the minority carriers in the front base region below the buried layer will have a multiplication effect due to the amplification structure based on the buried layer above, which can effectively reduce the trigger current. After the device is triggered, the enhancement of the conductance modulation effect can effectively reduce the equivalent resistance after conduction. Thereby reducing the VTM voltage drop and improving the IT(RMS) parameter. In the case where there is no trigger current at the trigger electrode, the amplification effect of the buried layer triode does not exist, so the VDRM parameter can be effectively improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Referring to the accompanying drawings to more fully describe the embodiments of the present invention. However, the accompanying drawings are only for illustration and explanation and do not constitute a limitation on the scope of the present invention.

[0022] Figure 1 It is a schematic diagram of the device structure of Embodiment 1 of the present invention;

[0023] Figure 2 It is a schematic diagram of the device circuit principle of Embodiment 1 of the present invention;

[0024] Figure 3 It is a schematic diagram of the device structure of Embodiment 2 of the present invention;

[0025] Figure 4 It is a schematic diagram of the device circuit principle of Embodiment 2 of the present invention;

[0026] Figure 5 It is a schematic diagram of the device structure of Embodiment 3 of the present invention;

[0027] Figure 6 It is a schematic diagram of the device circuit principle of Embodiment 3 of the present invention;

[0028] Figure 7 It is a schematic diagram of the device structure of Embodiment 4 of the present invention;

[0029] Figure 8 Schematic diagram of the device circuit principle for Embodiment 4 of the present invention;

[0030] Figure 9 Schematic diagram of the device structure for Embodiment 5 of the present invention;

[0031] Figure 10 Schematic diagram of the through isolation diffusion region in the embodiments of the present invention;

[0032] Figure 11 Schematic diagram of the epitaxial base region in the embodiments of the present invention;

[0033] Figure 12 Schematic diagram of the buried layer in the embodiments of the present invention;

[0034] Figure 13 Schematic diagram of the epitaxial coating in the embodiments of the present invention;

[0035] Figure 14 Schematic diagram of the supplementary through isolation in the embodiments of the present invention;

[0036] Figure 15 Schematic diagram of the back base region in the embodiments of the present invention;

[0037] Figure 16 Schematic diagram of the front emitter region in the embodiments of the present invention;

[0038] Figure 17 Schematic diagram of the complete preparation result in the embodiments of the present invention. Detailed implementation manners

[0039] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without making creative efforts belong to the scope of protection of the present invention.

[0040] In the description of this specification, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing this specification and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to this specification.

[0041] It should be noted that, without conflict, the embodiments in the present invention and the features in the embodiments can be combined with each other.

[0042] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments, but it is not intended to limit the present invention.

[0043] The present invention mainly provides a minority-carrier enhanced micro-trigger thyristor device, in which a buried layer is added in the front base region. The buried layer and the front base regions on the upper and lower sides form a triode amplification structure, and minority carriers are enhanced in the front base region below the buried layer when the device is turned on.

[0044] Specifically, the following embodiments may exist according to different device types:

[0045] Embodiment 1:

[0046] A minority-carrier enhanced micro-trigger thyristor device, as Figure 1 and Figure 2 shown, includes: a substrate 1 having a second doping type; a front base region 2 formed above the substrate 1; the front base region 2 having a first doping type; a buried layer 3 formed in the front base region 2; the buried layer 3 having a second doping type different from that of the front base region 2; the buried layer 3 being located in the middle of the front base region 2 and being completely wrapped by the front base region 2 in the height direction; a part of the front base region 2 below the buried layer 3, the buried layer 3, and a part of the front base region 2 above the buried layer 3 sequentially form a set of NPN or PNP triode amplification structures according to the current path.

[0047] It further includes a front emitter region 4 having a second doping type; the front emitter region 4 is partially formed in the upper surface of the front base region 2 and is located above the buried layer 3; the front emitter region 4 is spaced from the buried layer 3 by the front base region 2; the front emitter region 4 partially covers the upper surface of the front base region, so that a part of the front base region 2 is exposed; a front base region electrode 5 formed above the exposed part of the front base region 2; a front emitter region electrode 6 formed above the front emitter region 4; a back base region 7 formed below the substrate 1; the back base region 7 having a first doping type; a back electrode 8 formed below the back base region 7.

[0048] Specifically, aiming at the problem of unstable performance of the micro-trigger thyristor device in the prior art, in this solution, a triode amplification structure is introduced in the front base region 2 through the buried layer 3. When the device is turned on, since the distance between the buried layer 3 and the region of the front emitter region 4 is fixed and the doping concentration is fixed, stable trigger control accuracy can also be achieved under micro-current.

[0049] Moreover, the minority carriers in the front base region 2 below the buried layer 3 will experience a multiplication effect due to the amplification structure based on the buried layer 2 above, which can effectively reduce the trigger current.

[0050] After the device is triggered, the enhancement of the conductivity modulation effect can effectively reduce the equivalent resistance after conduction. Thereby reducing the VTM voltage drop and improving the IT(RMS) parameter.

[0051] In the case where there is no trigger current in the trigger electrode, the amplification effect of the buried layer triode does not exist, so the VDRM parameter can be effectively improved.

[0052] Among them, the first doping type is P-type and the second doping type is N-type; in other embodiments, it may also be that the first doping type is N-type and the second doping type is P-type.

[0053] Specifically, the above structure is formed by adding a buried layer 3 in a typical unidirectional thyristor device.

[0054] Among them, the front base region 2 and the front emitter region 4 are both formed on the front side of the substrate 1.

[0055] At a predetermined depth above the substrate 1 with the second conductivity type, a front base region 2 with the first conductivity type is formed by epitaxial process and doping.

[0056] The typical thickness of the substrate 1 is usually in the range of 250μm - 450μm, and the doping concentration is less than 4E14.

[0057] This predetermined depth is usually less than the actual depth of the front base region 2, but greater than the height of the upper surface of the buried layer 3 relative to the substrate 1.

[0058] After epitaxially growing this predetermined depth, photolithographic injection and doping can be performed in a predetermined window in the front base region 2 to form a buried layer 3 with a specific thickness.

[0059] Generally speaking, the typical thickness of the buried layer 3 is generally less than 4μm.

[0060] Specifically, when the thickness of the buried layer 3 is too large, the minority carriers in the front emitter region 4 cannot penetrate the buried layer 3 to modulate the PN junction between the front base region 2 and the substrate 1, which will lead to the problem of population inversion.

[0061] Generally speaking, when the doping type of the buried layer 3 is N-type, the doping concentration is generally greater than 3E19; when the doping type of the buried layer 3 is P-type, the doping concentration is generally greater than 5E19.

[0062] Among them, considering that the buried layer 3 and the underlying front base region 2 will form a reverse-biased junction structure, when the doping concentration of the buried layer 3 is too light, the breakdown voltage of this reverse-biased junction structure will be too high; after forming a specific buried layer 3, the front base region 2 is further epitaxially grown to further form a front base region 2 above the buried layer 3 for wrapping, so as to finally obtain a front base region 2 that completely wraps the buried layer 3.

[0063] On this basis, diffusion or ion implantation is carried out in a predetermined window in the front base region 2 for doping to form a front emitter region 3 with a second doping type.

[0064] The front emitter region 3 may be located on the left or right side of the front base region 2, partially covering the upper surface of the front base region 2, so that part of the region of the front base region 2 is exposed.

[0065] The distance between the upper surface of the buried layer 3 and the lower surface of the front emitter region 3 is greater than 1 / 10 of the thickness of the front base region 2; the distance between the lower surface of the buried layer 3 and the bottom of the front base region 2 is greater than 2 / 10 of the thickness of the front base region 2.

[0066] Through the above position settings, the requirements of the breakdown voltage and the reverse-biased electric field of the buried layer 3 can be met.

[0067] After forming the front emitter region 3, passivation can be carried out on the upper surfaces of the front base region 2 and the front emitter region 3 to form a passivation layer 9 to completely cover the surfaces of the front base region 2 and the front emitter region 3.

[0068] Subsequently, two windows are etched above the front base region 2 and the front emitter region 3 respectively, and a metal material is evaporated or deposited to form a front base region electrode 5 and a front emitter region electrode 6.

[0069] The front base region electrode 5 and the front emitter region electrode 6 are respectively electrically connected to the underlying front base region 2 and front emitter region 3.

[0070] A part of the passivation layer 9 is reserved between the front base region electrode 5 and the front emitter region electrode 6 as isolation.

[0071] The breakdown voltage VDRM of the finally obtained product is greater than 800V, and the trigger current is less than 1mA. The substrate thickness is 250μm - 450μm. Through the above settings, the breakdown withstand voltage of the product is determined. Since the low-voltage thyristor does not have a large electric field to accelerate ions, it cannot be amplified.

[0072] It should be noted that during the passivation process, usually a continuous passivation layer 9 is formed on the upper surfaces of the front base region 2 and the front emitter region 3, and two windows are opened in the passivation layer 9 for electrode preparation.

[0073] At this time, the passivation layer 9 at the corner part is retained. After the electrode preparation is completed, it is the area between the front base region electrode 5 and the front emitter region electrode 6 and the underlying front base region 2 and front emitter region 3.

[0074] In an additional embodiment, anti-parallel isolation diffusion regions 10 are respectively formed on the left and right sides of the minority carrier enhanced micro-trigger thyristor device.

[0075] Specifically, to achieve a better isolation and protection effect for the device, in this embodiment, anti-parallel isolation diffusion regions 10 are also respectively formed on the left and right sides of the thyristor device.

[0076] Specifically, during the process of processing the substrate 1, protective layers can be prefabricated on the front and back sides of the device, and then diffusion region windows are processed at the corner parts. Subsequently, anti-parallel isolation diffusion regions 10 are respectively formed on the left and right sides of the thyristor device through anti-parallel diffusion process. On this basis, structures such as the front base region 2, buried layer 3, and front emitter region 4 are fabricated.

[0077] It should be noted that during the fabrication processes of the front base region 2 and the buried layer 3, epitaxial process is used. The left and right sides of the newly grown front base region 2 in the epitaxial part do not have anti-parallel isolation diffusion regions 10.

[0078] Therefore, after forming a specific buried layer 3 and further epitaxially growing the front base region 2, it is necessary to re-passivate the two sides of the front base region 2, process diffusion region windows, and then form new anti-parallel isolation diffusion regions 10 on the left and right sides of the front base region 2 respectively through anti-parallel diffusion process, and connect them with the original anti-parallel isolation diffusion regions 10 below.

[0079] In an additional embodiment, grooves 11 are respectively formed between the front base region 2 and the anti-parallel isolation diffusion regions 10; the depth of the grooves 11 reaches the substrate 1; the grooves 11 are filled with glass passivation layers 12.

[0080] Specifically, when the thyristor device is fabricated using mesa process, grooves 11 are respectively formed between the front base region 2 and the anti-parallel isolation diffusion regions 10 to limit the positions of the front base region 2, front emitter region 4, and the upper front base region electrode 5 and front emitter region electrode 6.

[0081] Generally, during the process of fabricating the front base region 2, by opening grooves 11 on both sides and fabricating other parts of the active region in the areas defined by the grooves 11, the width of the active region is thus limited.

[0082] Meanwhile, to prevent water vapor from entering and affecting the device life, after the trench 11 is opened, SiO2 or other equivalent materials are backfilled in it to form a glass passivation layer 12, achieving effective protection for the substrate 1 at the bottom of the trench 11 and the joint parts on both sides.

[0083] Embodiment 2:

[0084] A minority carrier enhanced micro-trigger thyristor device, as Figure 3 and Figure 4 shown, includes: a substrate 1 with a second doping type; a front base region 2 formed above the substrate 1; the front base region 2 has a first doping type; a plurality of buried layers 3 are formed in the front base region 2, and the buried layers 3 have a second doping type different from that of the front base region 2; all the buried layers 3 are located in the middle part of the front base region 2 and are completely wrapped by the front base region 2 in the height direction; the plurality of buried layers 3 are stacked in the front base region 2 in sequence along the height direction, and there is an interval between each pair of buried layers 3 through the front base region 2.

[0085] For each buried layer 3, a part of the front base region 2 below the buried layer 3, the buried layer 3, and a part of the front base region 2 above the buried layer form a set of NPN or PNP transistor amplification structures in sequence according to the current path.

[0086] By introducing a plurality of buried layers 3, a plurality of amplification structures are formed in sequence.

[0087] It further includes a front emitter region 4, and the front emitter region 4 has a second doping type; a part of the front emitter region 4 is formed in the upper surface of the front base region 2 and is located above the buried layer 3; there is an interval between the front emitter region 4 and the buried layer 3 through the front base region 2; a part of the front emitter region 4 covers the upper surface of the front base region, so that a part of the position of the front base region 2 is exposed; a front base region electrode 5 is formed above the exposed part of the front base region 2; a front emitter region electrode 6 is formed above the front emitter region 4; a back base region 7 is formed below the substrate 1; the back base region 7 has a first doping type; a back electrode 8 is formed below the back base region 7.

[0088] Specifically, aiming at the problem of unstable performance of the micro-trigger thyristor device in the prior art, in this solution, a transistor amplification structure is introduced in the front base region 2 through the buried layer 3. When the device is turned on, since the distance between the buried layer 3 and the region of the front emitter region 4 is fixed and the doping concentration is fixed, stable trigger control accuracy can be achieved even under micro-current.

[0089] Moreover, the minority carriers in the front base region 2 below the buried layer 3 will generate a multiplication effect due to the amplification structure based on the buried layer 2 above, which can effectively reduce the trigger current.

[0090] After the device is triggered, the enhancement of the conductivity modulation effect can effectively reduce the equivalent resistance after conduction. Thereby reducing the VTM voltage drop and improving the IT(RMS) parameter.

[0091] In the case where there is no trigger current in the trigger electrode, the amplification effect of the buried layer triode does not exist, so the VDRM parameter can be effectively improved.

[0092] Correspondingly, to achieve a further amplification effect, in this embodiment, multiple buried layers 3 are introduced into the front base region 2. During the preparation process, through repeated epitaxy and ion implantation processes, the buried layer 3 can be formed in the front base region 2 with a certain thickness in sequence, and the front base region 2 is further grown above the buried layer 3.

[0093] Through the above preparation process, the buried layers 3 can be spaced apart by the front base region 2, and a part of the front base region 2 below the buried layer 3, the buried layer 3, and a part of the front base region 2 above the buried layer form a set of NPN or PNP triode amplification structures in sequence according to the current channel, thus forming multiple amplification structures.

[0094] Embodiment 3:

[0095] A minority carrier enhanced micro-trigger thyristor device, as Figure 5 and Figure 6 shown, includes: a substrate 1 with a second doping type; a front base region 2 formed above the substrate 1; the front base region 2 has a first doping type; a buried layer 3 is formed in the front base region 2, and the buried layer 3 has a second doping type different from that of the front base region 2; the buried layer 3 is located in the middle of the front base region 2 and is completely wrapped by the front base region 2 in the height direction; a part of the front base region 2 below the buried layer 3, the buried layer 3, and a part of the front base region 2 above the buried layer form a set of NPN or PNP triode amplification structures in sequence according to the current channel.

[0096] The width of the buried layer 3 in the transverse direction covers the front base region 2, thereby separating the front base region 2 into two independent upper and lower parts.

[0097] It also includes a front emitter region 4, the front emitter region 4 has a second doping type; a part of the front emitter region 4 is formed in the upper surface of the front base region 2, above the buried layer 3; the front emitter region 4 is spaced from the buried layer 3 by the front base region 2; a part of the front emitter region 4 covers the upper surface of the front base region, so that a part of the position of the front base region 2 is exposed; a front base region electrode 5, the front base region electrode 5 is formed above the exposed part of the front base region 2; a front emitter region electrode 6, the front emitter region electrode 6 is formed above the front emitter region 4; a back base region 7, the back base region 7 is formed below the substrate 1; the back base region 7 has a first doping type; a back electrode 8, the back electrode 8 is formed below the back base region 7.

[0098] Specifically, aiming at the problem of unstable performance of micro-trigger thyristor devices in the prior art, a triode amplification structure is introduced in the front base region 2 through the buried layer 3 in this solution. When the device is turned on, since the region between the buried layer 3 and the front emitter region 4 is fixed in distance and doping concentration, stable trigger control accuracy can be achieved even under micro-current.

[0099] Moreover, the minority carriers in the front base region 2 below the buried layer 3 will generate a multiplication effect due to the amplification structure based on the buried layer 2 above, which can effectively reduce the trigger current.

[0100] After the device is triggered, the enhancement of the conductivity modulation effect can effectively reduce the equivalent resistance after conduction, thereby reducing the VTM voltage drop and improving the IT(RMS) parameter.

[0101] In the case where there is no trigger current in the trigger electrode, the amplification effect of the buried triode does not exist, so the VDRM parameter can be effectively improved.

[0102] Furthermore, in this embodiment, the width of the buried layer 3 is extended so that the width of the buried layer 3 reaches the left and right endpoints of the active region, thereby separating the front base region 2 into two independent upper and lower parts.

[0103] In an additional embodiment, trenches 11 are respectively formed between the front base region 2 of the thyristor device and the through isolation diffusion region 10; the depth of the trenches 11 reaches the substrate 1; the trenches 11 are filled with a glass passivation layer 12.

[0104] At this time, the width of the buried layer 3 in the lateral direction completely covers the front base region 2, and both ends reach and contact the glass passivation layer 12 respectively, thereby completely blocking the front base region 2.

[0105] In another additional embodiment, the left and right endpoints of the buried layer 3 in the lateral direction respectively reach the through isolation diffusion region 10 to block the front base region 2.

[0106] Embodiment 4:

[0107] A minority carrier enhanced micro-trigger thyristor device, as Figure 7 and Figure 8 shown, includes: a substrate 1 having a second doping type; a front base region 2 formed above the substrate 1; the front base region 2 having a first doping type; a buried layer 3 formed in the front base region 2; the buried layer 3 having a second doping type different from that of the front base region 2; the buried layer 3 is located in the middle of the front base region 2 and is completely wrapped by the front base region 2 in the height direction; a part of the front base region 2 below the buried layer 3, the buried layer 3, and a part of the front base region 2 above the buried layer form a set of NPN or PNP triode amplification structures in sequence according to the current channel.

[0108] Outside the front base region 2, a set of voltage-dividing rings 13 are also introduced into the substrate 1 through planar technology. The voltage-dividing rings 13 are formed by implantation and doping processes, and the depth is greater than that of the front base region 2.

[0109] It also includes a front emitter region 4, and the front emitter region 4 has a second doping type; the front emitter region 4 is partially formed in the upper surface of the front base region 2 and is located above the buried layer 3; the front emitter region 4 and the buried layer 3 are spaced apart by the front base region 2; the front emitter region 4 partially covers the upper surface of the front base region so that a partial position of the front base region 2 is exposed; a front base region electrode 5 is formed above the exposed portion of the front base region 2; a front emitter region electrode 6 is formed above the front emitter region 4; a back base region 7 is formed below the substrate 1; the back base region 7 has a first doping type; a back electrode 8 is formed below the back base region 7.

[0110] Specifically, aiming at the problem of unstable performance of the micro-trigger thyristor device in the prior art, in this solution, a triode amplification structure is introduced into the front base region 2 through the buried layer 3. When the device is turned on, since the distance between the buried layer 3 and the region of the front emitter region 4 is fixed and the doping concentration is fixed, stable trigger control accuracy can also be achieved under micro-current.

[0111] Moreover, the minority carriers in the front base region 2 below the buried layer 3 will have a multiplication effect due to the amplification structure based on the buried layer 2 above, which can effectively reduce the trigger current.

[0112] After the device is triggered, the enhancement of the conductance modulation effect can effectively reduce the equivalent resistance after conduction. Thereby reducing the VTM voltage drop and improving the IT(RMS) parameter.

[0113] In the case where there is no trigger current at the trigger electrode, the amplification effect of the buried triode does not exist, so the VDRM parameter can be effectively improved.

[0114] Furthermore, the thyristor device in this embodiment is fabricated using planar technology. After forming the front base region 2, a voltage-dividing ring 13 is also introduced outside the front base region 2. The voltage-dividing ring 13 usually has the same doping type as the front base region 2.

[0115] Embodiment Five:

[0116] A minority carrier enhanced micro-trigger thyristor device, such as Figure 9As shown in the figure, it includes: a substrate 1 with a second doping type; a front base region 2 formed above the substrate 1; the front base region 2 has a first doping type; a buried layer 3 is formed in the front base region 2; the buried layer 3 has a second doping type different from that of the front base region 2; the buried layer 3 is located in the middle of the front base region 2 and is completely wrapped by the front base region 2 in the height direction; a part of the front base region 2 below the buried layer 3, the buried layer 3, and a part of the front base region 2 above the buried layer form a set of NPN or PNP transistor amplification structures in sequence according to the current channel.

[0117] It also includes a plurality of front emitter regions 4; the front emitter regions 4 have a second doping type; the front emitter regions 4 are partially formed in the upper surface of the front base region 2 and are located above the buried layer 3; the front emitter regions 4 are spaced apart from the buried layer 3 by the front base region 2; the front emitter regions 4 are defined by a plurality of spaced windows, and are respectively implanted in each window to form a plurality of front emitter regions 4.

[0118] The coverage range of the plurality of front emitter regions 4 in the horizontal direction partially covers the upper surface of the front base region, so that a part of the position of the front base region 2 is exposed; a front base region electrode 5 is formed above the exposed part of the front base region 2; a front emitter region electrode 6 is formed above the front emitter regions 4; a back base region 7 is formed below the substrate 1; the back base region 7 has a first doping type; a plurality of back emitter regions 14 are formed in the back base region 7, and the back emitter regions 14 have a second doping type; a back electrode 8 is formed below the back base region 7 and is electrically connected to the back emitter regions 14.

[0119] Specifically, aiming at the problem of unstable performance of the micro-trigger thyristor device in the prior art, in this solution, a transistor amplification structure is introduced into the front base region 2 through the buried layer 3. When the device is turned on, since the distance between the buried layer 3 and the region of the front emitter region 4 is fixed and the doping concentration is fixed, stable trigger control accuracy can also be achieved under micro-current.

[0120] Moreover, the minority carriers in the front base region 2 below the buried layer 3 will generate a multiplication effect due to the amplification structure based on the buried layer 2 above, which can effectively reduce the trigger current.

[0121] After the device is triggered, the enhancement of the conductance modulation effect can effectively reduce the equivalent resistance after conduction, thereby reducing the VTM voltage drop and improving the IT(RMS) parameter.

[0122] In the case where there is no trigger current at the trigger electrode, the amplification effect of the buried layer transistor does not exist, so the VDRM parameter can be effectively improved.

[0123] Further, to fabricate the triac device, in this embodiment, in the back base region, a back emitter region 14 is introduced by ion implantation and doping, thereby forming a triac device.

[0124] The above five embodiments are five typical embodiments. During the actual fabrication process, the combination of technical features in each embodiment can be adjusted according to needs. For example, the positions and numbers of the front emitter region, back emitter region, voltage-dividing ring, and buried layer can be appropriately adjusted, or some passivation layers, trenches, and through isolation diffusion regions can be omitted.

[0125] A fabrication method is also provided for fabricating a minority carrier enhanced micro-trigger thyristor device similar to that in Embodiment 1; the fabrication method includes: as Figure 10 shown, take a substrate wafer A1. When fabricating the through isolation diffusion region A2, first use silicon oxide to make a mask, and then fabricate the through isolation diffusion region A2 by means of AL diffusion.

[0126] As Figure 11 shown, epitaxy is performed above the substrate A1 of the first doping type to obtain a front base region A3 of the second doping type; during the epitaxy process, the method of boron-doped epitaxy can be selected, with a thickness of 60 μm.

[0127] As Figure 12 shown, implantation is performed in the front base region A3 to form a buried layer A4, and then as Figure 13 shown, the front base region A3 is further epitaxied above the buried layer A4; among them, the specific implantation steps of the buried layer A4 include photolithography implantation, RTA annealing activation, and the typical junction depth after annealing is 1.5 μm, the doping concentration is 5e23, and phosphorus is doped.

[0128] Subsequently, CMP is used to remove 1 μm thickness on the front side. Leave 0.5 microns of the buried layer.

[0129] If the through isolation diffusion region A2 is fabricated in the previous steps, then as Figure 14 shown, it is necessary to re-epitaxiate the corresponding thickness and then perform through isolation supplementary diffusion.

[0130] Adopt the AL implantation method to perform supplementary diffusion of the through isolation.

[0131] Implantation is performed at a predetermined position of the front base region A3 to obtain a front emitter region A5; as Figure 15 shown, it includes first diffusing the back base region A8; as Figure 16 shown, then implanting and annealing the part of the front emitter region A5.

[0132] As Figure 17As shown, a front base electrode A6, a passivation layer A7, a front emitter electrode A10, and a trench glass passivation layer A11 are sequentially fabricated above the front base region A3 and the front emitter region A5. Among them, after the front emitter region A5 is formed, the upper surfaces of the front base region A3 and the front emitter region A5 can be passivated to form the passivation layer A7 so as to completely cover the surfaces of the front base region A3 and the front emitter region A5.

[0133] Subsequently, two windows are etched above the front base region A3 and the front emitter region A5 respectively, and a metal material is evaporated or deposited to form the front base electrode A6 and the front emitter electrode A10.

[0134] The front base electrode A6 and the front emitter electrode A10 are electrically connected to the underlying front base region A3 and the front emitter region A5 respectively.

[0135] A part of the passivation layer A7 is reserved between the front base electrode A6 and the front emitter electrode A10 as isolation.

[0136] A back electrode A9 is fabricated below the back base region A8.

[0137] The above are only preferred embodiments of the present invention, and do not limit the implementation manners and protection scope of the present invention accordingly. For those skilled in the art, it should be realized that all the solutions obtained by equivalent substitution and obvious changes made by using the description and illustrations of the present invention should be included in the protection scope of the present invention.

Claims

1. A minority-carrier enhanced micro-trigger thyristor device, characterized in that: include: a substrate having a second doping type; A front base region, formed above the substrate; The front base region has a first doping type; A buried layer having a second doping type is formed in the front base region; a front emitting region, the front emitting region having a second doping type; The front emitter region is partially formed in the upper surface of the front base region and is located above the buried layer; The front emitter region and the buried layer are spaced apart by the front base region; The front emitter region partially covers the upper surface of the front base region, so that a portion of the front base region is exposed; The buried layer and the front base regions at the upper and lower sides form a triode amplification structure so that a current path between the front base region and the front emitter region passes through; The current path of the front base region is input into the base of the triode amplifying structure; When the device is turned on, minority carrier enhancement is performed on the front base region below the buried layer via the triode amplification structure.

2. The minority-carrier enhanced micro-triggered thyristor device according to claim 1, characterized in that: The minority-carrier enhanced micro-trigger thyristor device further comprises: a front base electrode, the front base electrode being formed above the exposed portion of the front base; A front emitting region electrode, wherein the front emitting region electrode is formed above the front emitting region; A back base region, wherein the back base region is formed below the substrate; The back base region has a first doping type; A back electrode is formed below the back base region.

3. The minority-carrier enhanced micro-triggered thyristor device according to claim 2, characterized in that: The left and right sides of the minority-carrier enhanced micro-trigger thyristor device are respectively formed with through diffusion isolation regions.

4. The minority-carrier enhanced micro-triggered thyristor device according to claim 3, characterized in that: Grooves are respectively formed between the front base region and the through diffusion isolation region; The depth of the groove reaches the substrate; The groove is filled with a glass passivation layer.

5. The minority-carrier enhanced micro-triggered thyristor device according to claim 3, characterized in that: The substrate further forms a voltage divider ring structure in a region between the front base region and the through diffusion isolation region.

6. The minority-carrier enhanced micro-triggered thyristor device according to claim 2, characterized in that: A passivation layer is formed in a region between the front base electrode and the front emitter electrode.

7. The minority-carrier enhanced micro-triggered thyristor device according to claim 2, characterized in that: At least one back-side emitting region is also formed in the back-side base region, and the bottom of the back-side emitting region is in contact with the back-side electrode.

8. The minority-carrier enhanced micro-triggered thyristor device according to claim 1, characterized in that: When the number of the buried layers is at least two, the plurality of buried layers are sequentially stacked in the front base region in a height direction; The front base region is used to space the multiple buried layers.

9. The minority-carrier enhanced micro-triggered thyristor device according to claim 4, characterized in that: The left and right ends of the buried layer are located in the front base region; Alternatively, left and right ends of the buried layer respectively reach the groove and are covered by the glass passivation layer.

10. The minority-carrier enhanced micro-triggered thyristor device according to claim 1, characterized in that: The buried layer has a thickness less than 4 μm.

11. The minority-carrier enhanced micro-triggered thyristor device according to claim 1, characterized in that: When the second doping type is N-type, the doping concentration of the buried layer is greater than 3E19; When the second doping type is P type, the doping concentration of the buried layer is greater than 5E19.

12. The minority-carrier enhanced micro-triggered thyristor device according to claim 2, characterized in that: The breakdown voltage VDRM of the minority-carrier enhanced micro-trigger thyristor device is greater than 800V; The trigger current of the minority-carrier enhanced micro-trigger thyristor device is less than 1 mA; The thickness of the substrate is between 250 μm and 450 μm.

13. The minority-carrier enhanced micro-triggered thyristor device according to claim 2, characterized in that: The distance between the upper surface of the buried layer and the lower surface of the front emitter region is greater than 1 / 10 of the thickness of the front base region; The distance between the lower surface of the buried layer and the bottom of the front base region is greater than 2 / 10 of the thickness of the front base region.

14. A preparation method, characterized in that: Used for preparing the minority-carrier enhanced micro-triggered thyristor device as claimed in any one of claims 1 to 13; The preparation method comprises: Performing epitaxy on a substrate of a first doping type to obtain a front base region of a second doping type; Implanting the front base region to form a buried layer, and then further epitaxying the front base region on the buried layer; Implanting a predetermined position of the front base region to obtain a front emitter region; Sequentially preparing a front base region electrode, a passivation layer and a front emitter region electrode above the front base region and the front emitter region; Performing epitaxy below the substrate to obtain a backside base region; A back electrode is formed below the back base region.

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