TaOx-based multifunctional memristor and preparation method thereof

Abstract

The invention belongs to the related field of micro-nano electronic devices, and discloses a TaOx-based multifunctional memristor, which comprises a substrate, a first electrode layer, a functional layer, a barrier layer and a second electrode layer which are sequentially stacked from bottom to top, and is characterized in that the first electrode layer and the second electrode layer are respectively made of an inert metal material and an active metal material; the functional layer is made of a TaOx material, and x is smaller than 2.5, so that oxygen vacancies exist to form a trap level; and the barrier layer is made of an inert metal material and is used for preventing metal atoms of the second electrode layer from entering the functional layer. When different electrical operations are applied to the second electrode layer, the entire device exhibits different electrical characteristics. The invention further discloses a corresponding manufacturing method. According to the invention, the functions of dendrites, cell bodies and synapses in a biological neural network can be simulated respectively, a multifunctional memristor capable of undertaking multiple functions is provided for an existing artificial neural network, and meanwhile, the process complexity in a hardware implementation process is reduced and the integration level is improved.

Description

Technical Field

[0001] The present invention belongs to the field of micro-nanoelectronic devices, and more specifically, relates to a TaO-based x Multifunctional memristor and preparation method thereof. Background Art

[0002] With the rapid development of artificial intelligence based on large models, parallel computing chips such as graphics processing units (GPUs) and AI-specific chips such as tensor processing units (TPUs) have been launched to meet the parallel, high-speed, and large-capacity computing needs. However, these processors still do not break away from the von Neumann architecture and are still limited by the data transmission bottleneck in the storage wall. Inspired by the structure and operation principles of the human brain, an in-memory computing architecture based on artificial synapses and neurons has been proposed. It can directly process information in parallel in the synaptic storage array, and then dynamically process signals through neurons. It not only effectively overcomes the "von Neumann bottleneck", but is also expected to surpass conventional computing capabilities.

[0003] In biological nervous systems, synapses connect different neurons, and their "weights" are used to represent the strength of the connection between neurons. Biological neurons are composed of dendrites, cell bodies, and axons; dendrites can integrate input information from other neurons, cell bodies are used to convert the integrated information into specific action potentials, and axons are responsible for outputting information. In artificial neural networks, there are also a variety of neuromorphic devices, such as artificial synaptic devices with non-volatile characteristics that form a network through the connection of neurons, artificial dendrite devices with volatile analog characteristics that perform filtering and signal integration, and artificial cell body devices with volatile digital characteristics that act as threshold devices to detect membrane potential signals and emit them.

[0004] Memristor is considered to be the fourth basic circuit device besides resistor, capacitor and inductor, which can be used to characterize the relationship between charge and magnetic flux. It can store information in the form of resistance, and its resistance can be adjusted by external stimulus history. Memristor is widely studied due to its simple structure, easy integration, low power consumption, good compatibility with semiconductor CMOS process, etc., and is a strong candidate for neuromorphic devices. Specifically, memristor can be divided into two types according to its resistance state retention ability: volatile memristor and non-volatile memristor, and different characteristics can play different functions in artificial neural networks. Among them, analog volatile memristor can be used in artificial dendrite devices, digital volatile devices can be used in artificial cell body devices, and non-volatile devices can be used in artificial synapse devices.

[0005] However, further research shows that in the prior art, a memristor with a certain material and structure usually only has one of the three functions mentioned above, and a few devices can achieve two of the three functions by adopting different operation methods. With the rapid development of artificial neural networks, their application scenarios are constantly expanding, and a network often requires the participation of multiple neuromorphic devices with different functions. Therefore, in the manufacturing process of large-scale artificial neural network integrated circuits, if different functions require different devices to perform, the process difficulty will increase exponentially as the network increases.

[0006] With the further development of artificial neural networks, it is necessary to continue to reduce the process complexity and improve its integration in the hardware implementation process. Therefore, it is crucial to explore a device that can realize multiple different functions under different electrical operations. Accordingly, this field urgently needs to make research and improvements to improve the technical difficulties such as the high process difficulty caused by the single function of the device in the existing large-scale artificial neural network hardware implementation process. Summary of the invention

[0007] In view of one or more of the above defects or improvement requirements of the prior art, the present invention provides a TaO-based x A multifunctional memristor and preparation method thereof, wherein by combining the working characteristics and specific needs of the memristor, its specific structural composition and working mechanism and other aspects are redesigned in a targeted manner, so that a memristor device that can realize multiple different functions under different electrical operations can be obtained in a compact structure and easy to control manner, which is suitable for simulating the functions of dendrites, cell bodies and synapses in biological neural networks respectively, and effectively solves the problems of low integration and complex process of existing devices, and is particularly beneficial to large-scale integrated applications of artificial neural networks.

[0008] To achieve the above object, according to one aspect of the present invention, a TaO-based x A multifunctional memristor, characterized in that the memristor comprises a substrate, and a first electrode layer, a functional layer, a barrier layer and a second electrode layer sequentially stacked on the substrate, wherein:

[0009] The first electrode layer and the second electrode layer are made of inert metal material and active metal material respectively to form different electrodes; the functional layer is made of TaO x The barrier layer is made of an inert metal material and x is less than 2.5, so that oxygen vacancies exist in the functional layer to form trap energy levels; the barrier layer is made of an inert metal material to prevent metal atoms of the second electrode layer from entering the functional layer;

[0010] When a negative voltage is applied to the second electrode layer, the electrons transitioning from the second electrode layer to the functional layer are captured by the trap energy level, and the entire device changes from a low resistance state to a high resistance state; when the negative voltage is removed, the electrons captured by the functional layer are released back to the second electrode layer, and the entire device spontaneously returns to a high resistance state, correspondingly showing the simulated volatile resistive switching characteristics of the memristor;

[0011] When the second electrode layer is initialized by applying a current-limiting forward voltage, the metal atoms in the second electrode layer undergo an oxidation-reduction reaction and form a conductive filament in the functional layer, which connects the first and second electrode layers, thereby changing the entire device to a low-resistance state; wherein, when the current-limiting current is not greater than a preset value, the conductive filament is formed into a relatively thin diameter and spontaneously breaks after the forward power supply is removed, corresponding to the digital volatile resistive switching characteristics of the memristor; in addition, when the current-limiting current is greater than a preset value, the conductive filament is formed into a relatively thick diameter and does not break after the forward voltage is removed, corresponding to the non-volatile resistive switching characteristics of the memristor.

[0012] As a further preferred embodiment of the present invention, the material of the first electrode layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the barrier layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the second electrode layer is one of Ag and Cu.

[0013] As a further preferred embodiment of the present invention, the thickness of the first electrode layer is designed to be 5nm-2000nm, the thickness of the functional layer is designed to be 2nm-100nm, the thickness of the barrier layer is designed to be 2nm-10nm, and the thickness of the second electrode layer is designed to be 10nm-2000nm.

[0014] According to another aspect of the present invention, a corresponding preparation method is also provided, characterized in that the method comprises the following steps:

[0015] (i) providing a substrate;

[0016] (ii) preparing the first electrode layer on a substrate;

[0017] (iii) preparing the functional layer on the first electrode layer;

[0018] (iv) processing the desired graphic patterns on the functional layer, and preparing the barrier layer accordingly based on the graphic patterns;

[0019] (v) preparing the second electrode layer on the barrier layer, and after the second electrode layer is grown, sequentially performing the operations of peeling, cleaning and drying, thereby obtaining the desired multifunctional memristor.

[0020] As a further preferred embodiment of the present invention, in step (iii), the functional layer is preferably prepared by physical vapor deposition, chemical vapor deposition, magnetron sputtering, molecular beam epitaxy, atomic layer deposition or electrochemical growth.

[0021] As a further preferred embodiment of the present invention, in step (iv), a photolithography process is preferably used to process a desired graphic pattern on the functional layer.

[0022] As a further preference of the present invention, in step (v), after the second electrode layer is grown, it is preferably peeled off by immersion in acetone, and then washed with anhydrous ethanol and deionized water in sequence, and then dried with nitrogen, thereby obtaining the desired multifunctional memristor.

[0023] In general, the above technical solution conceived by the present invention has the following technical advantages compared with the prior art:

[0024] (1) The present application redesigns the specific structure and working mechanism of the device in a targeted manner, so as to obtain a memristor device that realizes a variety of different electrical characteristics under different electrical operations; wherein, when a negative voltage is applied, the device exhibits analog volatile resistive switching characteristics; after an initialization operation of applying a small current-limiting forward voltage, the device exhibits digital volatile resistive switching characteristics; and after an initialization operation of applying a large current-limiting forward voltage, the device exhibits non-volatile resistive switching characteristics;

[0025] (2) The present application further optimizes the processing technology and key processing parameters of the multifunctional memristor, and accordingly can obtain a compact device in a high-quality, efficient and easy-to-control manner, and can realize the functions of multiple neuromorphic devices such as dendrites, cell bodies and synapses in the same device;

[0026] (3) The multifunctional memristor of the present application effectively solves the technical problems of low integration and complex process of existing devices, and is particularly beneficial to large-scale integrated applications of artificial neural networks, and thus has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 According to a preferred embodiment of the present invention, a TaO x Schematic diagram of the main structure of the multifunctional memristor;

[0028] Figure 2 This is a specific embodiment of the present invention (Pt / TaO xIV curve of the Ag / Ti / Ag multifunctional device after continuous negative voltage scan on the Ag electrode;

[0029] Figure 3 This is a specific embodiment of the present invention (Pt / TaO x IV curve of the multifunctional device (Ti / Ag) after the initialization operation of applying a small current-limiting forward voltage to the Ag electrode and then applying a continuous forward voltage scan;

[0030] Figure 4 This is a specific embodiment of the present invention (Pt / TaO x Figure 3. IV curve of a / Ti / Ag multifunctional device after an initialization operation with a large current-limiting forward voltage applied to the Ag electrode and then a continuous voltage scan. DETAILED DESCRIPTION

[0031] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0032] It should be understood that expressions such as "include" and "may include" used in this application indicate the existence of the disclosed functions, operations or constituent elements, and do not limit one or more additional functions, operations and constituent elements. In this application, terms such as "include" and / or "have" may be interpreted as indicating specific characteristics, numbers, operations, constituent elements, components or combinations thereof, but may not be interpreted as excluding the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components or combinations thereof.

[0033] It should be understood that the terms "center", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0034] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this application, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0035] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0036] Figure 1 According to a preferred embodiment of the present invention, a TaO x The main structure diagram of the multifunctional memristor. Figure 1 To explain the present invention in more detail.

[0037] like Figure 1 As shown in FIG. , the present invention is based on TaO x A multifunctional memristor, characterized in that the memristor comprises a substrate, and a first electrode layer, a functional layer, a barrier layer and a second electrode layer sequentially stacked on the substrate, wherein:

[0038] The first electrode layer and the second electrode layer are made of inert metal material and active metal material respectively to form different electrodes; the functional layer is made of TaO x The barrier layer is made of an inert metal material and x is less than 2.5, so that oxygen vacancies exist in the functional layer to form trap energy levels; the barrier layer is made of an inert metal material to prevent metal atoms of the second electrode layer from entering the functional layer;

[0039] When a negative voltage is applied to the second electrode layer, the electrons transitioning from the second electrode layer to the functional layer are captured by the trap energy level, and the entire device changes from a low resistance state to a high resistance state; when the negative voltage is removed, the electrons captured by the functional layer are released to the second electrode layer, and the entire device spontaneously returns to a high resistance state, correspondingly showing the simulated volatile resistive switching characteristics of the memristor;

[0040] When the second electrode layer is initialized by applying a current-limiting forward voltage, the metal atoms in the second electrode layer undergo an oxidation-reduction reaction and form a conductive filament in the functional layer, which connects the first and second electrode layers, thereby changing the entire device to a low-resistance state; wherein, when the current-limiting current is not greater than a preset value, the conductive filament is formed into a relatively thin diameter and spontaneously breaks after the forward power supply is removed, corresponding to the digital volatile resistive switching characteristics of the memristor.

[0041] More specifically, since the oxygen content in the functional layer is lower than that in Ta2O5, there are certain oxygen vacancies therein to form trap energy levels. When the second electrode layer is subjected to an initialization operation in the direction of a forward voltage, the metal atoms in the second electrode layer will undergo an oxidation-reduction reaction and form a conductive filament in the functional layer; when the conductive filament connects the first electrode layer and the second electrode layer, the device exhibits a low resistance state, otherwise it is a high resistance state; when the limiting current is set to be no greater than the preset limiting current size, after the voltage is removed, the conductive filament is formed to be thinner and the conductive filament spontaneously breaks, and the device exhibits a digital volatile resistive switching characteristic; when the limiting current is set to be greater than the preset limiting current size, after the voltage is removed, the conductive filament is formed to be thicker and a negative voltage needs to be applied to return the device to a high resistance state, and the device exhibits a non-volatile resistive switching characteristic.

[0042] Accordingly, the multifunctional memristor according to the present invention can exhibit different electrical properties under different electrical operations and can be used in different neuromorphic devices, thereby reducing the process complexity of large-scale artificial neural network hardware implementation and improving its integration.

[0043] According to a preferred embodiment of the present invention, the first electrode layer and the barrier layer are respectively made of one of the following inert metal materials: Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the second electrode layer is made of the following active metal materials: Ag, Cu or other similar materials.

[0044] According to another preferred embodiment of the present invention, the thickness of the first electrode layer is designed to be 5nm-2000nm, the thickness of the functional layer is designed to be 2nm-100nm, the thickness of the barrier layer is designed to be 2nm-10nm, and the thickness of the second electrode layer is designed to be 10nm-2000nm.

[0045] It should be noted that the thickness of the functional layer should not exceed 100 nm, nor should it be less than 2 nm. If it is too thin, the device yield will decrease, and if it is too thick, the device operating voltage will be too high, which is not conducive to practical application. For the barrier layer, its thickness should not exceed 10 nm, nor should it be less than 2 nm. If it is too thin, it will not be able to prevent the metal atoms of the second electrode layer from entering the TaO during the growth of the second electrode layer. x When the thickness is too thick, when a positive voltage is applied to the second electrode layer, fewer metal ions generated by oxidation and reduction in the second electrode layer can enter the TaO x layer, thus unable to form a complete conductive filament.

[0046] The present invention also discloses a corresponding preparation process, which comprises the following steps:

[0047] (i) providing a substrate;

[0048] (ii) preparing the first electrode layer on a substrate;

[0049] (iii) preparing the functional layer on the first electrode layer;

[0050] (iv) processing the desired graphic patterns on the functional layer, and preparing the barrier layer accordingly based on the graphic patterns;

[0051] (v) preparing the second electrode layer on the barrier layer, and after the second electrode layer is grown, sequentially performing the operations of peeling, cleaning and drying, thereby obtaining the desired multifunctional memristor.

[0052] According to a preferred embodiment of the present invention, in step (iii), the functional layer is preferably prepared by physical vapor deposition, chemical vapor deposition, magnetron sputtering, molecular beam epitaxy, atomic layer deposition or electrochemical growth.

[0053] According to another preferred embodiment of the present invention, in step (iv), the desired pattern is preferably processed on the functional layer using a photolithography process, wherein the photolithography process steps are coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0054] According to another preferred embodiment of the present invention, in step (v), after the second electrode layer is grown, it is preferably peeled off by immersion in acetone, and then washed with anhydrous ethanol and deionized water in sequence, and then dried with nitrogen, thereby obtaining the desired multifunctional memristor.

[0055] Some specific embodiments are given below to explain the present invention more clearly.

[0056] Example 1

[0057] In this embodiment, a silicon wafer with a crystal phase of (100) and a thickness of 500 μm is first selected, and a 1 μm thick SiO2 thin film layer is thermally grown on its surface as a substrate. It is cut into 1×1 cm samples, immersed in acetone, cleaned in an ultrasonic environment for 10-15 minutes, then immersed in anhydrous ethanol and cleaned in an ultrasonic environment for 5 minutes, wherein the ultrasonic power is 40W, and finally cleaned with deionized water and blown dry with a nitrogen gun.

[0058] Next, take the cleaned sample and grow a first metal electrode Pt layer of about 100nm on its surface by magnetron sputtering. In order to increase the adhesion between the Pt electrode and the substrate, a Ti layer of about 10nm is sputtered by DC, and then a Pt target is sputtered by DC, with a sputtering power of 200W, an Ar gas atmosphere of 0.5Pa, and sputtering for 1000s.

[0059] Next, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. By using radio frequency sputtering, TaO x The flow rate ratio of Ar and O2 was adjusted to control the TaO x The valence and content of oxygen in the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 10 nm.

[0060] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the prepared sample through a photolithography process, for example, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0061] Next, a 5 nm Ti layer was grown on the sample processed as above by magnetron sputtering, with a power of 50 W and an Ar gas atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0062] Next, a 100 nm Ag layer was grown on the sample processed as above by magnetron sputtering, with a power of 30 W and an Ar gas atmosphere of 0.5 Pa for 600 s, to obtain a second electrode layer.

[0063] Finally, the film samples prepared above were immersed in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0064] After completing the above steps, Pt / TaO is prepared. x / Ti / Ag multifunctional devices.

[0065] Example 2

[0066] In this embodiment, a silicon wafer with a crystal phase of (100) and a thickness of 500 μm is first selected, and a 1 μm thick SiO2 thin film layer is thermally grown on its surface as a substrate. It is cut into 1×1 cm samples, immersed in acetone, cleaned in an ultrasonic environment for 10-15 minutes, then immersed in anhydrous ethanol and cleaned in an ultrasonic environment for 5 minutes, wherein the ultrasonic power is 40W, and finally cleaned with deionized water and blown dry with a nitrogen gun.

[0067] Next, take the cleaned sample and use magnetron sputtering to grow a first metal electrode Au layer of about 5nm on its surface, i.e., the first electrode layer. In order to increase the adhesion between the Au electrode and the substrate, a Ti layer of about 10nm is sputtered by DC, and then the Au target is sputtered by DC, with a sputtering power of 200W, an Ar gas atmosphere of 0.5Pa, and sputtering for 1000s.

[0068] Next, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. By using radio frequency sputtering, TaOx The flow rate ratio of Ar and O2 was adjusted to control the TaO x The valence and content of oxygen in the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 2 nm.

[0069] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the prepared sample through a photolithography process, for example, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0070] Next, a 2 nm Ni layer was grown on the sample processed as above by magnetron sputtering, with a power of 50 W and an Ar gas atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0071] Next, a 10 nm Ag layer was grown on the sample processed as above by magnetron sputtering, with a power of 30 W, an Ar gas atmosphere of 0.5 Pa, and sputtering for 600 s to obtain a second electrode layer.

[0072] Finally, the thin film samples prepared above were immersed in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0073] After completing the above steps, Au / TaO is prepared. x / Ni / Ag multifunctional devices.

[0074] Example 3

[0075] In this embodiment, a silicon wafer with a crystal phase of (100) and a thickness of 500 μm is first selected, and a 1 μm thick SiO2 thin film layer is thermally grown on its surface as a substrate. It is cut into 1×1 cm samples, immersed in acetone, cleaned in an ultrasonic environment for 10-15 minutes, then immersed in anhydrous ethanol and cleaned in an ultrasonic environment for 5 minutes, wherein the ultrasonic power is 40W, and finally cleaned with deionized water and blown dry with a nitrogen gun.

[0076] Next, take the cleaned sample and grow a first metal electrode TaN layer of about 2000nm on its surface by magnetron sputtering. In order to increase the adhesion between the electrode and the substrate, a Ti layer of about 10nm will be sputtered by DC, and then the target will be sputtered by DC, with a sputtering power of 200W, an Ar gas atmosphere of 0.5Pa, and sputtering for 1000s.

[0077] Next, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. By using radio frequency sputtering, TaO x The flow rate ratio of Ar and O2 was adjusted to control the TaOx The valence and content of oxygen in the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 100 nm.

[0078] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the prepared sample through a photolithography process, for example, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0079] Next, a 10 nm TiN layer was grown on the sample processed as above by magnetron sputtering, with a power of 50 W and an Ar gas atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0080] Next, a 2000 nm thick Cu layer was grown on the sample processed as above by magnetron sputtering, with a power of 30 W and an Ar gas atmosphere of 0.5 Pa for 600 s, to obtain a second electrode layer.

[0081] Finally, the film samples prepared above were immersed in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0082] After completing the above steps, TaN / TaO is prepared. x / TiN / Cu multifunctional devices.

[0083] Example 4

[0084] In this embodiment, a silicon wafer with a crystal phase of (100) and a thickness of 500 μm is first selected, and a 1 μm thick SiO2 thin film layer is thermally grown on its surface as a substrate. It is cut into 1×1 cm samples, immersed in acetone, cleaned in an ultrasonic environment for 10-15 minutes, then immersed in anhydrous ethanol and cleaned in an ultrasonic environment for 5 minutes, wherein the ultrasonic power is 40W, and finally cleaned with deionized water and blown dry with a nitrogen gun.

[0085] Next, take the cleaned sample and grow a first metal electrode Pd layer of about 200nm on its surface by magnetron sputtering. In order to increase the adhesion between the Pd electrode and the substrate, a Ti layer of about 10nm is sputtered by DC, and then a Pd target is sputtered by DC, with a sputtering power of 200W, an Ar gas atmosphere of 0.5Pa, and sputtering for 1000s.

[0086] Next, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. By using radio frequency sputtering, TaO x The flow rate ratio of Ar and O2 was adjusted to control the TaO x The valence and content of oxygen in the functional layer, namely TaOx The thickness of the layer, in this example, the functional layer is 30 nm.

[0087] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the prepared sample through a photolithography process, for example, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0088] Next, a 4 nm Ni layer was grown on the sample processed as above by magnetron sputtering, with a power of 50 W and an Ar gas atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0089] Next, a 200 nm Ag layer was grown on the sample processed as above by magnetron sputtering, with a power of 30 W, an Ar gas atmosphere of 0.5 Pa, and sputtering for 600 s to obtain a second electrode layer.

[0090] Finally, the thin film samples prepared above were immersed in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0091] After completing the above steps, Pd / TaO x / Ni / Ag multifunctional devices.

[0092] Example 5

[0093] In this embodiment, a silicon wafer with a crystal phase of (100) and a thickness of 500 μm is first selected, and a 1 μm thick SiO2 thin film layer is thermally grown on its surface as a substrate. It is cut into 1×1 cm samples, immersed in acetone, cleaned in an ultrasonic environment for 10-15 minutes, then immersed in anhydrous ethanol and cleaned in an ultrasonic environment for 5 minutes, wherein the ultrasonic power is 40W, and finally cleaned with deionized water and blown dry with a nitrogen gun.

[0094] Next, take the cleaned sample and use magnetron sputtering to grow a first metal electrode Pd of about 1000nm on its surface, that is, the first electrode layer. In order to increase the adhesion between the Pd electrode and the substrate, a Ti layer of about 10nm is sputtered by DC, and then a Pd target is sputtered by DC, with a sputtering power of 200W, an Ar gas atmosphere of 0.5Pa, and sputtering for 1000s.

[0095] Next, for example, the functional layer is prepared by magnetron sputtering, and the target material is Ta2O5 target. By using radio frequency sputtering, TaO x The flow rate ratio of Ar and O2 was adjusted to control the TaO x The valence and content of oxygen in the functional layer, namely TaO x The thickness of the layer, in this example, the functional layer is 60 nm.

[0096] Next, a square photolithography pattern with a size of 100 μm×100 μm is prepared on the prepared sample through a photolithography process, for example, wherein the photolithography process steps are: coating, pre-baking, pre-exposure, post-baking, post-exposure, and development.

[0097] Next, a 6 nm Ni layer was grown on the sample processed as above by magnetron sputtering, with a power of 50 W and an Ar gas atmosphere of 0.5 Pa for 25 seconds to obtain a barrier layer.

[0098] Next, a 1000 nm thick Ag layer was grown on the sample processed as above by magnetron sputtering, with a power of 30 W and an Ar gas atmosphere of 0.5 Pa for 600 s, to obtain a second electrode layer.

[0099] Finally, the film samples prepared above were immersed in acetone for 30-50 minutes, then washed with anhydrous ethanol and deionized water, and dried with nitrogen.

[0100] After completing the above steps, Pd / TaO x / Ni / Ag multifunctional devices.

[0101] The following is the Pt / TaO x / Ti / Ag multifunctional devices were subjected to a series of tests.

[0102] like Figure 2 As shown in Figure 2, the Pt / TaO x The DC characteristic diagram of the / Ti / Ag multifunctional device after applying a negative voltage, where the Pt electrode is grounded and the Ag electrode is applied with a negative scanning voltage of 0~-3~0V. The device has volatile analog characteristics and the number of cycles is 50. x The oxygen content of the layer is lower than that of Ta2O5, and it is in an oxygen-deficient state. There are certain oxygen vacancies that form trap energy levels. When a negative voltage is applied to the second electrode layer, the second electrode layer is connected to TaO x The electrons in the layer transition will be captured by the trap energy level, and the device resistance state will change. When the voltage is removed, the trapped electrons will be released to the second electrode layer, and the device resistance state will spontaneously return to the high resistance state. The number of electrons filled will affect the device resistance state, and the device can have multiple resistance states. Therefore, the device has the characteristics of simulated volatile resistive change, which can realize the function of dendrites in neurons.

[0103] like Figure 3 As shown in Figure 2, the Pt / TaO xThe DC characteristic diagram of the / Ti / Ag multifunctional device after the initialization operation of applying a small current limiting forward voltage, where the Pt electrode is grounded and the Ag electrode is applied with voltage. The initialization operation parameters are 0~1V scanning voltage and 10uA current limiting. The parameters after initialization are 0~0.5~0V scanning voltage, 50uA current limiting, and 50 cycles. Among them, when the initialization operation of applying a limiting current of no more than 10uA to the second electrode layer, a thinner conductive filament can be formed, which spontaneously breaks as the voltage is removed, so that the device has a digital volatile resistive switching characteristic, which can realize the function of the cell body in neurons.

[0104] like Figure 4 As shown, the Pt / TaO x The DC characteristic diagram of the / Ti / Ag multifunctional device after the initialization operation of applying a large current limiting forward voltage, where the Pt electrode is grounded and the Ag electrode is applied with voltage. The initialization operation parameters are 0~2V scanning voltage and 10mA current limit. The parameters after initialization are 0~0.7~0~-0.7V, the current limit in the forward voltage direction is 1mA, and there is no current limit in the negative current direction. Among them, when the initialization operation of applying a current limiting current greater than 10mA to the second electrode layer, a thicker conductive filament can be formed, which cannot spontaneously break when the voltage is removed, so that the device has a non-volatile resistive switching characteristic and can realize the function of a synapse.

[0105] Based on the above electrical measurements, it can be found that under different electrical operations, the device exhibits different electrical properties, so only one device is needed to realize multiple functions in a large artificial neural network. When a negative bias is applied to the second metal layer, the device exhibits analog volatile resistive switching characteristics; after applying a small current-limiting forward voltage initialization operation on the second metal layer, the device exhibits digital volatile characteristics; after applying a large current-limiting forward voltage initialization operation on the second metal layer, the device exhibits non-volatile characteristics, respectively realizing the functions of multiple neuromorphic devices such as dendrites, cell bodies, and synapses, which can reduce the process complexity of artificial neural network hardware implementation and improve integration.

[0106] In summary, according to the present invention, a memristor device that can realize a variety of different functions under different electrical operations can be obtained in a compact and easy-to-control manner, while effectively solving the technical problems of low integration and complex processes of existing devices. Therefore, it is particularly suitable for large-scale integrated applications of artificial neural networks and has good practical value and application prospects.

[0107] It will be easily understood by those skilled in the art that the above description is only a preferred embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A TaO-based x A multifunctional memristor, characterized in that The memristor comprises a substrate, and a first electrode layer, a functional layer, a barrier layer and a second electrode layer sequentially stacked on the substrate, wherein: The first electrode layer and the second electrode layer are made of inert metal material and active metal material respectively to form different electrodes; the functional layer is made of TaO x The barrier layer is made of an inert metal material and x is less than 2.5, so that oxygen vacancies exist in the functional layer to form trap energy levels; the barrier layer is made of an inert metal material to prevent metal atoms of the second electrode layer from entering the functional layer; When a negative voltage is applied to the second electrode layer, the electrons transitioning from the second electrode layer to the functional layer are captured by the trap energy level, and the entire device changes from a low resistance state to a high resistance state; when the negative voltage is removed, the electrons captured by the functional layer are released back to the second electrode layer, and the entire device spontaneously returns to a high resistance state, correspondingly showing the simulated volatile resistive switching characteristics of the memristor; When the second electrode layer is initialized by applying a current-limiting forward voltage, the metal atoms in the second electrode layer undergo an oxidation-reduction reaction and form a conductive filament in the functional layer, which connects the first and second electrode layers, thereby changing the entire device to a low-resistance state; wherein, when the current-limiting current is not greater than a preset value, the conductive filament is formed into a relatively thin diameter and spontaneously breaks after the forward power supply is removed, corresponding to the digital volatile resistive switching characteristics of the memristor; in addition, when the current-limiting current is greater than a preset value, the conductive filament is formed into a relatively thick diameter and does not break after the forward voltage is removed, corresponding to the non-volatile resistive switching characteristics of the memristor.

2. The multifunctional memristor according to claim 1, characterized in that: The material of the first electrode layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the barrier layer is one of Pt, Pd, Au, Ni, ITO, Ti, W, Al, Ta, Hf, TaN, TiN and TiW; the material of the second electrode layer is one of Ag and Cu.

3. The multifunctional memristor according to claim 1 or 2, characterized in that: The thickness of the first electrode layer is designed to be 5nm-2000nm, the thickness of the functional layer is designed to be 2nm-100nm, the thickness of the barrier layer is designed to be 2nm-10nm, and the thickness of the second electrode layer is designed to be 10nm-2000nm.

4. A method for preparing a multifunctional memristor as claimed in any one of claims 1 to 3, characterized in that: The method comprises the following steps: (i) providing a substrate; (ii) preparing the first electrode layer on a substrate; (iii) preparing the functional layer on the first electrode layer; (iv) processing the desired graphic patterns on the functional layer, and preparing the barrier layer accordingly based on the graphic patterns; (v) preparing the second electrode layer on the barrier layer, and after the second electrode layer is grown, sequentially performing the operations of peeling, cleaning and drying, thereby obtaining the desired multifunctional memristor.

5. The preparation method according to claim 4, characterized in that: In step (iii), the functional layer is preferably prepared by physical vapor deposition, chemical vapor deposition, magnetron sputtering, molecular beam epitaxy, atomic layer deposition or electrochemical growth.

6. The preparation method according to claim 4 or 5, characterized in that: In step (iv), a photolithography process is preferably used to form a desired graphic pattern on the functional layer.

7. The preparation method according to claim 6, characterized in that: In step (v), after the second electrode layer is grown, it is preferably peeled off by soaking in acetone, then washed with anhydrous ethanol and deionized water in sequence, and then dried with nitrogen, thereby obtaining the desired multifunctional memristor.

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