One-dimensional differential Hall chip and current sensor with single magnetic layer

Abstract

The present invention discloses a one-dimensional differential Hall chip and a current sensor with a single magnetic concentrator layer, wherein the differential Hall chip comprises: a single magnetic concentrator layer and a one-dimensional Hall pair chip, wherein the one-dimensional Hall pair chip comprises a first Hall chip and a second Hall chip; the central axis of the first Hall chip along the horizontal direction is the x-axis, the perpendicular bisector of the line connecting the central points of the first Hall chip and the second Hall chip is the y-axis, and the single magnetic concentrator layer is symmetrically arranged along the x-axis and the y-axis; the outer edge of the single magnetic concentrator layer is a tooth-shaped structure; a spacing area is formed between the first Hall chip and the second Hall chip, the single magnetic concentrator layer forms a first covering area on the spacing area, the single magnetic concentrator layer forms a second covering area on each Hall chip, and the length of the central area of ​​the first covering area along the y-axis direction is greater than the length of the second covering area along the y-axis direction. The present invention improves the sensitivity of the differential Hall chip; and at the same time has the performance of large tolerance and zero drift.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a one-dimensional differential Hall chip and a current sensor with a single magnetic concentrator layer. Background Art

[0002] Hall technology has been widely used in various fields, but it is limited in many occasions because it is only sensitive to vertical magnetic fields. Hall, which can sense horizontal magnetic fields, can measure two-dimensional magnetic fields in a plane, and has broad application prospects in current detection, mobile phone navigation, attitude measurement and control, and angle and position detection.

[0003] The existing horizontal Hall technology uses a magnetic layer to deflect the horizontal signal, and combines it with differential technology to increase gain and reduce interference, but there are still problems with signal drift and assembly tolerance. The current method to remove drift is to use a circuit to cyclically load the working end and the signal end, that is, the spin technology. The implementation of this type of solution has disadvantages such as complex circuits, slow response, and difficulty in increasing the frequency bandwidth. The existing dual-magnet Hall pair design can realize the measurement of uniaxial magnetic fields, but the signal offset caused by the error in the installation position of the magnet is large. This structure requires a jumper to connect, and secondly, the signal drift is large; and the magnets on both sides protrude outward to improve sensitivity, making it difficult to reduce the chip size. Summary of the invention

[0004] The technical problem solved by the present invention is to provide a one-dimensional differential Hall chip and a current sensor with a single magnetic layer. The differential Hall chip has high sensitivity, zero drift, and large tolerance performance; and has a compact structure.

[0005] In order to solve the above technical problems, the technical solution of this application is as follows:

[0006] According to a first aspect of an embodiment of the present application, a one-dimensional differential Hall chip with a single magnetic concentrator layer is provided, the one-dimensional differential Hall chip comprising: a single magnetic concentrator layer and a one-dimensional Hall pair chip, the single magnetic concentrator layer being located on the one-dimensional Hall pair chip;

[0007] The one-dimensional Hall chip pair includes a first Hall chip and a second Hall chip; the first Hall chip and the second Hall chip are arranged side by side in a contactless manner and are differentially electrically connected in parallel, the central axis of the first Hall chip along the horizontal direction and the central axis of the second Hall chip along the horizontal direction are located on the same straight line, and the central axis of the first Hall chip along the vertical direction and the central axis of the second Hall chip along the vertical direction are parallel to each other;

[0008] The central axis of the first Hall chip along the horizontal direction is taken as the x-axis, the perpendicular bisector of the line connecting the center points of the first Hall chip and the second Hall chip is taken as the y-axis, and the single magnetic concentrating layer is symmetrically arranged along the x-axis and the y-axis; the outer edge of the single magnetic concentrating layer is a tooth-shaped structure;

[0009] A spacing area is formed between the first Hall chip and the second Hall chip, the single magnetic layer forms a first covering area on the spacing area, the single magnetic layer forms a second covering area on each Hall chip, and the length of the central area of ​​the first covering area along the y-axis direction is greater than the length of the second covering area along the y-axis direction.

[0010] Furthermore, the length of the single magnetic concentrating layer in the y-axis direction decreases successively toward both sides along the center point of the single magnetic concentrating layer, and the center point of the single magnetic concentrating layer is the intersection of the x-axis and the y-axis.

[0011] Furthermore, the second covering area formed by the single magnetic layer on each Hall chip includes a side edge of each Hall chip close to the spacing area, and does not exceed a side edge of each Hall chip away from the spacing area.

[0012] Furthermore, the coverage area of ​​the single magnetic concentrator layer on the first Hall chip is equal to the coverage area of ​​the single magnetic concentrator layer on the second Hall chip, and the first coverage area and the second coverage area form a closed area.

[0013] Further, a distance between an edge of one side of the first Hall chip close to the second Hall chip and an edge of one side of the second Hall chip close to the first Hall chip is 5-500 microns;

[0014] Furthermore, the thickness of the single magnetic layer is 2-200 microns.

[0015] Furthermore, the tooth-shaped structure includes a plurality of periodically distributed concave-convex areas, each concave-convex area includes a raised portion, a platform and a recessed portion, the distance between two adjacent raised portions is 5-50 microns, the width of the platform is 0-20 microns, and the depths of the raised portions and the recessed portions are 5-50 microns.

[0016] Furthermore, the first Hall chip and the second Hall chip each include two first electrodes arranged horizontally and two second electrodes arranged vertically; the two first electrodes of the first Hall chip are respectively connected to the two second electrodes of the second Hall chip, and the two second electrodes of the first Hall chip are respectively connected to the two first electrodes of the second Hall chip; the connecting line between the connected first electrode and the second electrode is 90°.

[0017] According to a second aspect of an embodiment of the present application, a current sensor is provided, comprising: a circuit board and the one-dimensional differential Hall chip as described above; a line connecting the center points of a first Hall chip and a second Hall chip in the one-dimensional differential Hall chip is perpendicular to the current direction of the circuit board.

[0018] Furthermore, it also includes: a current bus and an insulating layer located on the current bus, wherein the current bus is used to introduce current;

[0019] The one-dimensional differential Hall chip is located on the insulating layer, the circuit board and the current bus are arranged side by side, and the thickness of the circuit board is greater than or equal to the sum of the thickness of the current bus and the insulating layer.

[0020] Compared with the prior art, the technical solution of the present invention has the following beneficial effects:

[0021] The two Hall chips of the present invention are symmetrically arranged in the horizontal direction and the vertical direction, and a single magnetic concentrating layer is arranged on the two Hall chips, and the single magnetic concentrating layer is symmetrically arranged along the x-axis and the y-axis; and the single magnetic concentrating layer covers the spacing area between the two Hall chips, and forms a covering area on each Hall chip, thereby forming a symmetrical structure with a large middle area and small areas on both sides. The single magnetic concentrating layer of this structure increases the concentration of the current magnetic field, thereby improving the sensitivity of the differential Hall chip; and at the same time has a large tolerance performance.

[0022] The single magnetic layer of the present invention turns the horizontal magnetic field to one side upward and one side downward in the central area of ​​the Hall, forming two Hall signals with opposite polarities. The parallel differential electrode connection mode between the first Hall chip and the second Hall chip determines that the output is a differential signal, and the differential signal naturally eliminates the interference of the same-direction magnetic field. In addition, the working currents of the first Hall chip and the second Hall chip are perpendicular to each other, ensuring that the output zero bias is very low, the drift of the differential signal is very small, and the zero drift performance of the differential Hall chip is achieved.

[0023] The present invention increases the area of ​​the single magnetic concentrator layer by setting the outer edge of the single magnetic concentrator layer as a tooth-shaped structure, thereby improving the magnetic field strength of the one-dimensional differential Hall chip and thus improving the sensitivity of the one-dimensional differential Hall chip.

[0024] The one-dimensional differential Hall chip of the present invention is only provided with a single magnetic concentrator layer, and the single magnetic concentrator layer is a single-layer structure with a small volume. Therefore, the differential Hall chip of the present invention has a compact and small structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solution of the present invention, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 The structure of a one-dimensional differential Hall chip provided by an embodiment of the present invention is shown in FIG. Figure 1 ;

[0027] Figure 2 is a cross-sectional view of a one-dimensional differential Hall chip provided by an embodiment of the present invention;

[0028] Figure 3 The structure of a one-dimensional differential Hall chip provided by an embodiment of the present invention is shown in FIG. Figure 2 ;

[0029] Figure 4 is a schematic diagram of a partial tooth-shaped structure of a single magnetic concentrating layer provided in an embodiment of the present invention;

[0030] Figure 5 It is a schematic diagram of magnetic lines of force of a differential Hall chip with a single magnetic concentrating layer and a dual magnetic concentrating chip provided in an embodiment of the present invention;

[0031] Figure 6 is a wiring diagram of a one-dimensional differential Hall chip provided by an embodiment of the present invention;

[0032] Figure 7 It is a signal error comparison diagram of a differential Hall chip with a single magnetic concentrator layer and a dual magnetic concentrator chip provided by an embodiment of the present invention;

[0033] Figure 8 The structure of a current sensor formed by a one-dimensional differential Hall chip package provided by an embodiment of the present invention is schematically shown in FIG. Figure 1 ;

[0034] Fig. 9 The structure of a current sensor formed by a one-dimensional differential Hall chip package provided by an embodiment of the present invention is schematically shown in FIG. Figure 2 ;

[0035] Among them, the reference numerals in the figure correspond to:

[0036] 1-one-dimensional Hall pair chip, 11-first Hall chip, 12-second Hall chip, 2-spacer area, 3-single magnetic concentrating layer, 4-connecting wire, 5-electrode, 6-circuit board, 7-soldering pad, 8-current row, 9-current, 10-insulating layer, 101-package, 102-device pin, 103-protrusion, 104-recess, 105-magnetic concentrator. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only at least part of the embodiments of the present invention, rather than all the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0038] "One embodiment" or "embodiment" referred to herein refers to a specific feature, structure or characteristic that may be included in at least one implementation of the present application. In the description of the present application, it is to be understood that spatially relative terms, such as "below", "below", "lower", "on", "upper", "front", "back", "above" and the like may be used herein for ease of description to describe the relationship between an element or feature and another (or some) element or feature as illustrated in the figures. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. Spatially relative terms are intended to cover different orientations in the use or operation of the device except for the orientations depicted in the figures. The device can be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially relative descriptors used herein can be similarly interpreted.

[0039] The following disclosure provides many different embodiments or examples for implementing the different features of the provided subject matter. Specific examples of components and configurations are described below to simplify the present disclosure. Of course, these components and configurations are only examples and are not intended to be restrictive. For example, in the following description, the formation of a first feature above or on a second feature may include an embodiment in which the first and second features are directly contacted, and may also include an embodiment in which an additional feature may be formed between the first and second features so that the first and second features may not be directly contacted. In addition, the present disclosure may repeat reference numbers and / or letters in various examples. This repetition is for the purpose of simplicity and clarity, and does not itself indicate the relationship between the various embodiments and / or configurations discussed.

[0040] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Moreover, the terms "first", "second", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein.

[0041] like Figure 1-3 As shown, an embodiment of the present invention provides a differential Hall chip with a single magnetic concentrator layer, the differential Hall chip comprising: a single magnetic concentrator layer 3 and a one-dimensional Hall pair chip 1, the single magnetic concentrator layer 3 is located on the one-dimensional Hall pair chip 1;

[0042] The one-dimensional Hall chip 1 comprises a first Hall chip 11 and a second Hall chip 12; the first Hall chip 11 and the second Hall chip 12 are arranged side by side in a contactless manner and are differentially electrically connected in parallel, the central axis of the first Hall chip 11 along the horizontal direction and the central axis of the second Hall chip 12 along the horizontal direction are located on the same straight line, and the central axis of the first Hall chip 11 along the vertical direction and the central axis of the second Hall chip 12 along the vertical direction are parallel to each other;

[0043] The central axis of the first Hall chip 11 in the horizontal direction is taken as the x-axis, the perpendicular midline of the line connecting the center points of the first Hall chip 11 and the second Hall chip 12 is taken as the y-axis, and the single magnetic concentrator layer 3 is symmetrically arranged along the x-axis and the y-axis; the outer edge of the single magnetic concentrator layer is a tooth-shaped structure;

[0044] A spacing region 2 is formed between the first Hall chip 11 and the second Hall chip 12, the single magnetic layer 3 forms a first covering region on the spacing region 2, and the single magnetic layer 3 forms a second covering region on each Hall chip, and the length of the central region of the first covering region along the y-axis direction is greater than the length of the second covering region along the y-axis direction.

[0045] In the embodiment of this specification, the single magnetic layer 3 covers at least part of the first Hall chip 11, at least part of the second Hall chip 12, and part of the spacing area 2 between the first Hall chip 11 and the second Hall chip 12; the central axis of the first Hall chip 11 along the horizontal direction is the x-axis, and the perpendicular bisector of the line connecting the center points of the first Hall chip 11 and the second Hall chip 12 is the y-axis, and the single magnetic layer 3 is symmetrically arranged along the x-axis and the y-axis; the first Hall chip 11 and the second Hall chip 12 have the same shape and structure; exemplarily, the first Hall chip 11 and the second Hall chip 12 are both cross-shaped symmetrical structures; the first Hall chip 11 and the second Hall chip 12 are symmetrical about the x-axis and about the y-axis; the differential Hall chip of this one-dimensional structure can be used to detect the magnetic field in the horizontal direction (x-axis direction). The single magnetic layer 3 can cover part or all of the Hall chips, and the coverage area does not exceed the outer edge of the Hall sensitive surface of the two Hall chips; when the single magnetic layer 3 covers a local Hall chip, the single magnetic layer 3 covers the edge area on the side closest to the two Hall chips.

[0046] In the present embodiment, continue as Figure 1 As shown, the length of the single magnetic concentrating layer 3 in the y-axis direction decreases gradually toward both sides along the center point of the single magnetic concentrating layer 3, and the center point of the single magnetic concentrating layer 3 is the intersection of the x-axis and the y-axis.

[0047] Since the single magnetic concentrating layer 3 is symmetrically arranged along the x-axis and the y-axis, the center point of the single magnetic concentrating layer 3 is the intersection of the x-axis and the y-axis; illustratively, the single magnetic concentrating layer 3 can be arranged so that the length in the y-axis direction decreases successively along the center point of the single magnetic concentrating layer 3 toward both sides, thereby ensuring that the area of ​​the center point region of the magnetic concentrating layer is larger than the area of ​​the non-center point region, further ensuring the symmetrical structure of the magnetic concentrating layer with a large middle area and small areas on both sides, which is beneficial to the gathering of the current magnetic field, thereby improving the sensitivity of the differential Hall chip.

[0048] In some embodiments, continuing as Figure 1 , 3 As shown, the second covering area formed by the single magnetic layer 3 on each Hall chip includes one side edge of each Hall chip close to the spacing area 2 and does not exceed one side edge of each Hall chip away from the spacing area 2.

[0049] In the embodiment of the present specification, the single magnetic concentrator layer 3 forms a first covering area on the spacing area 2, that is, the first covering area is the area corresponding to the non-Hall sensitive surface; the single magnetic concentrator layer 3 forms a second covering area on the first Hall chip 11 and the second Hall chip 12, and the two second covering areas are symmetrically arranged along the x-axis and the y-axis, and each second covering area includes a side edge of the Hall chip corresponding to each second covering area close to the spacing area 2, and does not exceed a side edge of each Hall chip away from the spacing area 2. That is, the second covering area of ​​the single magnetic concentrator layer 3 on the first Hall chip 11 includes a side edge of the first Hall chip 11 close to the spacing area 2, and does not exceed a side edge of the first Hall chip 11 away from the spacing area 2; if the side edge of the first Hall chip 11 close to the spacing area 2 is determined as the first inner edge, and the side edge of the first Hall chip 11 away from the spacing area 2 is determined as the first outer edge; then the first inner edge and the first outer edge are arranged parallel to each other; the second covering area of ​​the single magnetic concentrator layer 3 on the first Hall chip 11 includes the first inner edge and does not exceed the first outer edge.

[0050] The second coverage area of ​​the single magnetic layer 3 on the second Hall chip 12 includes a side edge of the second Hall chip 12 close to the spacing area 2 and does not exceed a side edge of the second Hall chip 12 away from the spacing area 2; if the side edge of the second Hall chip 12 close to the spacing area 2 is determined as the second inner edge, and the side edge of the second Hall chip 12 away from the spacing area 2 is determined as the second outer edge; then the second inner edge and the second outer edge are arranged parallel to each other; the second coverage area of ​​the single magnetic layer 3 on the second Hall chip 12 includes the second inner edge and does not exceed the second outer edge.

[0051] Exemplarily, the single magnetic layer 3 can be divided along the y-axis direction to form two symmetrical trapezoids. The single magnetic layer 3 can also be an even polygon, a circle, an ellipse, or a star with an even number of corners. The single magnetic layer 3 is a symmetrical structure and can be set to a symmetrical even polygon, a circle, an ellipse or a star; for example, it can be set to a four-pointed star structure, etc. Figure 1 As shown, the single magnetic layer 3 is a regular hexagonal structure, such as Figure 3 As shown, the single magnetic concentrating layer 3 is a regular octagonal structure; the single magnetic concentrating layer 3 can also be set to a symmetrical structure of any other shape; the flexibility of the shape setting of the single magnetic concentrating layer 3 and the diversity of shape selection are achieved; the use of single magnetic concentrating layers 3 of different shapes can achieve high sensitivity, zero drift, and large tolerance performance of the differential Hall chip.

[0052] In some embodiments, the coverage area of ​​the single magnetic layer 3 on the first Hall chip 11 is equal to the coverage area of ​​the single magnetic layer 3 on the second Hall chip 12, and the first coverage area and the second coverage area form a closed area.

[0053] In the embodiment of the present specification, the first covering area and the second covering area are seamlessly connected to form a complete closed area; thereby ensuring that the single magnetic layer 3 increases the concentration of the current magnetic field and improves the sensitivity of the differential Hall chip.

[0054] In some embodiments, the distance between the edge of one side of the first Hall chip 11 close to the second Hall chip 12 and the edge of one side of the second Hall chip 12 close to the first Hall chip 11 is 5-500 microns; the thickness of the single magnetic layer 3 is 2-200 microns.

[0055] In the embodiment of the present specification, the edge of one side of the first Hall chip 11 close to the second Hall chip 12 is the first inner edge, and the edge of one side of the second Hall chip 12 close to the first Hall chip 11 is the second inner edge. The distance between the first inner edge and the second inner edge can be set to 5-500 microns, and the thickness of the single magnetic layer 3 can be set to 2-200 microns. In this way, the sensitivity of the differential Hall chip can be further improved, zero drift and large tolerance performance can be achieved, and the miniaturization of the one-dimensional differential Hall chip can be achieved.

[0056] In some embodiments, Figure 1 , 3 As shown in Figure 4, the outer edge of the single magnetic concentrating layer 3 is a tooth-shaped structure. The tooth-shaped structure includes a plurality of periodically distributed concave-convex areas, each of which includes a convex portion 103, a platform and a concave portion 104, the distance between two adjacent convex portions 103 is 5-50 microns, the width of the platform is 0-20 microns, and the depth of the convex portion 103 and the concave portion 104 is 5-50 microns.

[0057] In the embodiments of the present specification, the platform can be arranged between two adjacent protrusions 103, or between two adjacent recesses 104; the outer edge of the single magnetic concentrating layer 3 can be arranged as a tooth-shaped structure, and the single magnetic concentrating layer 3 can be cut by a cutting knife according to cutting parameters; the tooth-shaped structure includes a plurality of periodically distributed concave-convex regions, and the concave-convex region corresponding to each period includes a protrusion 103, a platform and a recess 104, such as Figure 4 As shown, the distance a between two adjacent protrusions 103 is 5-50 microns, the width b of the platform is 0-20 microns, and the depth c of the protrusion 103 and the recessed portion 104 is 5-50 microns; by setting the outer edge of the single magnetic layer 3 as a tooth-shaped structure, the area of ​​the single magnetic layer 3 can be increased, and the magnetic field strength of the one-dimensional differential Hall chip can be improved, thereby improving the sensitivity of the one-dimensional differential Hall chip.

[0058] It should be noted that the first Hall chip 11 can be set on the left side of the dual Hall integrated chip or on the right side of the dual Hall integrated chip. The first Hall chip 11 can be set on the left side of the dual Hall integrated chip or on the right side of the dual Hall integrated chip. As for which Hall chip applies the longitudinal voltage and which Hall chip applies the transverse voltage, it does not actually affect the function of the components.

[0059] In some embodiments, the first Hall chip 11 and the second Hall chip 12 each include two first electrodes 5 arranged horizontally and two second electrodes 5 arranged vertically; the two first electrodes 5 of the first Hall chip 11 are respectively connected to the two second electrodes 5 of the second Hall chip 12, and the two second electrodes 5 of the first Hall chip 11 are respectively connected to the two first electrodes 5 of the second Hall chip 12; the connecting line 4 between the connected first electrode 5 and the second electrode 5 is at 90°.

[0060] In this embodiment, two closely adjacent Hall chips are integrated, and the two Hall chips generate Hall potentials longitudinally and transversely respectively and are connected in parallel, so that the zero point offsets of the two Hall chips can be offset, thereby realizing a Hall device with low offset and low drift. Among them, any two connecting wires 4 for connecting electrodes 5 do not cross.

[0061] In the embodiment of this specification, the distance between the two first electrodes 5 near the spacing area in the first Hall chip 11 and the second Hall chip 12 is 5-500 microns. The connecting line 4 between the first electrode 5 and the second electrode 5 connected to each other is 90°, and this connection method can achieve the zero drift performance of the one-dimensional differential Hall chip.

[0062] like Figure 5 As shown, Figure 5 Figure (a) is a schematic diagram of the magnetic field line structure of a one-dimensional device in the prior art, in which the focusing magnets 105 are attached to two Hall chips respectively; its magnetic field is annular in cross section. When the focusing magnets 105 are set on both sides, the current magnetic field is horizontally converted into a vertical magnetic field around each focusing magnet 105, which is opposite to the original vertical magnetic field, thereby having a canceling effect. As shown in the right Hall on the left in the figure, the horizontal-to-vertical magnetic field that can be felt is downward, while the vertical component of the original magnetic field in the Hall region is upward. This creates a canceling effect, making the gain lower than the original horizontal magnetic field. The horizontal magnetic field component here is generally stronger than the vertical one. The situation of the left Hall is symmetrical, and the magnetic field that is felt to be turned is upward, while the vertical component of the original current magnetic field is downward. The blue arrow is the direction of the original magnetic field component, and the yellow is a schematic diagram of the horizontal magnetic field lines of force of the deflected focusing magnet 105. Figure 5Figure (b) is a schematic diagram of the magnetic field line structure of the one-dimensional Hall pair chip 1 of this embodiment; the direction of the horizontal-to-vertical magnetic field is consistent with the direction of the vertical component of the original current magnetic field, and the magnetic field intensity effect felt by the Hall is a superposition effect. Therefore, it is shown that such a structure can make full use of the components of the magnetic field to be measured in two directions, superimpose them, increase the gain, and thus improve the sensitivity of the component.

[0063] like Figure 6 As shown, Figure 6 It is a wiring diagram of a one-dimensional differential Hall chip provided by an embodiment of the present invention; each Hall chip is provided with electrodes 5 at four ports, the electrodes 5 of two Hall chips are connected by connecting wires 4, and pads 7 are provided between the connecting wires 4, and each Hall chip includes two first electrodes 5 arranged horizontally and two second electrodes 5 arranged vertically; wherein, in the two Hall chips arranged oppositely, the first electrode 5 arranged horizontally in one Hall chip is used to apply voltage, and the second electrode 5 arranged vertically is used to generate a first Hall potential; the second electrode 5 arranged vertically in the other Hall chip is used to apply voltage, and the first electrode 5 arranged horizontally is used to generate a second Hall potential, and the first Hall potential and the second Hall potential are connected in parallel to realize signal extraction. The two first electrodes 5 of the first Hall chip 11 are respectively connected to the two second electrodes 5 of the second Hall chip 12 and pads 7 are respectively provided on the two connecting wires 4, and the two second electrodes 5 of the first Hall chip 11 are respectively connected to the two first electrodes 5 of the second Hall chip 12 and pads 7 are provided on the two connecting wires 4; by applying voltage to one group of pads 7, a Hall potential is generated in the other group of pads. Figure 6 The single magnetic layer 3 in the figure is a regular hexagon.

[0064] The two first electrodes 5 of the first Hall chip 11 are respectively connected to the two second electrodes 5 of the second Hall chip 12, and the first pad and the second pad are respectively arranged on the two connecting lines 4; the two second electrodes 5 of the first Hall chip 11 are respectively connected to the two first electrodes 5 of the second Hall chip 12, and the third pad and the fourth pad are arranged on the two connecting lines 4; by applying voltage to the first pad and the second pad, a Hall potential is generated at the third pad and the fourth pad, or by applying voltage to the third pad and the fourth pad, a Hall potential is generated at the first pad and the second pad. The two electrodes 5 for generating the Hall potential connected to the same pad are respectively the positive pole of the Hall potential generated by the environmental interference magnetic field and the negative pole of the Hall potential generated by the environmental interference magnetic field, so that the positive and negative potentials generated by the environmental interference magnetic field of the first Hall chip 11 and the second Hall chip 12 are offset.

[0065] The first Hall potential and the second Hall potential are signaled through a parallel wiring structure. Specifically, in a first example, the first left end electrode 5 of the first Hall chip 11 is connected to the second upper end electrode 5 of the second Hall chip 12, and a pad is set on the connecting line 4; the first upper end electrode 5 of the first Hall chip 11 is connected to the second left end electrode 5 of the second Hall chip 12, and a pad 7 is set on the connecting line 4; the first right end electrode 5 of the first Hall chip 11 is connected to the second lower end electrode 5 of the second Hall chip 12, and a pad 7 is set on the connecting line 4; the first lower end electrode 5 of the first Hall chip 11 is connected to the second right end electrode 5 of the second Hall chip 12, and a pad 7 is set on the connecting line 4. At this time, a voltage can be applied between one group of pads 7 to generate a Hall potential between another group of pads 7.

[0066] like Figure 1 As shown, the second example mode of parallel connection is that the first upper electrode 5 of the first Hall chip 11 is connected to the second right electrode 5 of the second Hall chip 12, and a pad 7 is set on the connecting line 4, the first right electrode 5 of the first Hall chip 11 is connected to the second upper electrode 5 of the second Hall chip 12, and a pad 7 is set on the connecting line 4, the first lower electrode 5 of the first Hall chip 11 is connected to the second right electrode 5 of the second Hall chip 12, and a pad 7 is set on the connecting line 4, the first left electrode 5 of the first Hall chip 11 is connected to the second lower electrode 5 of the second Hall chip 12, and a pad 7 is set on the connecting line 4. At this time, a voltage can be applied between one group of pads 7 to generate a Hall potential between another group of pads 7.

[0067] In this embodiment, the magnetic focusing layer of the single-axis Hall can be installed by a mounting process. When the distance between the two Hall chips is 300 microns, the installation error is within the process level of 12 microns in translation and 2 degrees in angle, and the signal error is less than 2.5%.

[0068] For a pair of Hall sensors designed on a horizontal line, a single magnetic layer 3 with a symmetrical structure is set on its upper surface. From the symmetry, it can be seen that it has the ability to be sensitive to a single-axis magnetic field (x or y axis) in the horizontal direction. Figure 2 As shown by the green line in the middle, the single magnetic layer 3 turns the horizontal magnetic field in the central area of ​​the Hall to one side upward and the other side downward, forming two Hall signals with opposite polarities. The parallel connection of the electrodes 5 determines that the output is a differential signal. Its differential signal naturally eliminates the interference of the same-direction magnetic field. In addition, the working currents of the first Hall chip 11 (Hall A) and the second Hall chip 12 (Hall B) are perpendicular to each other, ensuring that their output zero bias is very low and the drift of the differential signal is very small.

[0069] For Hall A and B, each Hall is originally sensitive to the vertical magnetic field of the z-axis; sensitive to the x-axis and its own z-axis magnetic field, the calculation formula for the output signal is as follows:

[0070] V A =K 1 B z +K x B x

[0071] V B =K 1 B z -K x B x

[0072] k is the Hall sensitivity gain coefficient, K 1 is the Hall sensitivity gain coefficient of Hall pairs A and B on the z-axis, k x is the sensitivity gain coefficient of the x-axis magnetic field; any pair of the four wires of the two Halls can be the working electrode 5, and the other pair is the signal electrode 5. The output of Hall A is V A , Hall B is V B The differential parallel signal V AB The output is:

[0073] 2V AB =V A -V B =2k x B x

[0074] So: B x =V AB / k x

[0075] Thus, the Hall differential voltage V AB and gain factor (k x ), the strength of the measured horizontal magnetic field can be calculated. This differential structure of the deflected magnetic field has a large magnetic field gain, so it has high sensitivity.

[0076] Use Figure 1 The chip shown in the figure and the chip in the prior art with magnets 105 attached to both sides of the two Halls are tested for signal error, and the following is obtained: Figure 7 The test comparison results shown in the figure show that the chip test results (blue curve) of this embodiment have a 12-micron position error and a maximum signal error of only 2.5% under the bad conditions of 2-degree angle deviation and translation error, while the error of the original dual-magnet chip test results (black curve) reaches 20%. The error of the present invention has dropped by 8 times, and the curve is always in the lower error area, showing good installation tolerance performance. In addition, calculations show that the signal gain of the single-magnet signal is increased by 30%.

[0077] like Figure 8-9As shown, this embodiment also provides a current sensor, including:

[0078] Circuit board 6 and the differential Hall chip as described above;

[0079] The line connecting the center points of the first Hall chip 11 and the second Hall chip 12 in the one-dimensional differential Hall chip is perpendicular to the current direction of the circuit board 6 .

[0080] In the embodiments of this specification, Figure 8 As shown, a one-dimensional differential Hall chip is set on a circuit board 6, and the current is set outside the device. The sensor made of the Hall chip is installed on the current row 8 for measurement; the center point connection line of the two Hall chips in the differential Hall chip is perpendicular to the current direction of the circuit board 6; the single-axis Hall pair and the conditioning circuit can be packaged as a device and applied to the current sensor. Just connect it to the circuit and place it on the current row 8 extending in the y-axis direction to sense the current strength by detecting the magnetic field. According to the required sensitivity, it can be made into a millimeter-sized patch device.

[0081] In some embodiments, the specific packaging steps of the device are as follows:

[0082] 1. Set a lead frame and place the circuit board 6 on it;

[0083] 2. Fixedly connect the circuit board 6 to the lead frame;

[0084] 3. Fix the Hall pair chip at the set position of the circuit board 6;

[0085] 4. Mount and fix the single magnetic layer 3 at the set position of the Hall pair;

[0086] 5. Perform metal bonding to connect the Hall chip and the circuit;

[0087] 6. After plastic sealing, a current sensor is formed.

[0088] like Fig. 9As shown, the current row 8 is introduced into the device through the frame, and the Hall sensitive chip is sealed as a whole with the circuit and the current row 8 when the device is packaged. The current sensor also includes: a current row 8 and an insulating layer 10 located on the current row 8, and the current row 8 is used to introduce the current 9; the one-dimensional differential Hall chip is located on the insulating layer 10, and the circuit board 6 is arranged side by side with the current row 8, and the thickness of the circuit board 6 is equal to the sum of the thickness of the current row 8 and the insulating layer 10. Exemplarily, the upper surface of the circuit board 6 is flush with the upper surface of the insulating layer 10. The structure of the current row 8, the insulating layer 10, the circuit board 6 and the one-dimensional differential Hall chip is arranged in the package body 101, and then eight device pins 102 are arranged, the input and output of the current to be measured occupy four device pins 102, and the remaining four device pins 102 are all arranged on the Hall chip. In this structure, the current relative to the Hall position is controllable and fixed, no on-site calibration and debugging are required, and the sensitivity of the current sensor is relatively high.

[0089] The embodiments of this specification have the following beneficial effects:

[0090] The two Hall chips of the present invention are symmetrically arranged in the horizontal direction and the vertical direction, and a single magnetic concentrating layer is arranged on the two Hall chips, and the single magnetic concentrating layer is symmetrically arranged along the x-axis and the y-axis; and the single magnetic concentrating layer covers the spacing area between the two Hall chips, and forms a covering area on each Hall chip, thereby forming a symmetrical structure with a large middle area and small areas on both sides. The single magnetic concentrating layer of this structure increases the concentration of the current magnetic field, thereby improving the sensitivity of the differential Hall chip; and at the same time has a large tolerance performance.

[0091] The single magnetic layer of the present invention turns the horizontal magnetic field to one side upward and one side downward in the central area of ​​the Hall, forming two Hall signals with opposite polarities. The parallel differential electrode connection mode between the first Hall chip and the second Hall chip determines that the output is a differential signal, and the differential signal naturally eliminates the interference of the same-direction magnetic field. In addition, the working currents of the first Hall chip and the second Hall chip are perpendicular to each other, ensuring that the output zero bias is very low, the drift of the differential signal is very small, and the zero drift performance of the differential Hall chip is achieved.

[0092] The present invention increases the area of ​​the single magnetic concentrator layer by setting the outer edge of the single magnetic concentrator layer as a tooth-shaped structure, thereby improving the magnetic field strength of the one-dimensional differential Hall chip and thus improving the sensitivity of the one-dimensional differential Hall chip.

[0093] The one-dimensional differential Hall chip of the present invention is only provided with a single magnetic concentrator layer, and the single magnetic concentrator layer is a single-layer structure with a small volume. Therefore, the differential Hall chip of the present invention has a compact and small structure.

[0094] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the claims.

[0095] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A one-dimensional differential Hall chip with a single magnetic layer, characterized in that: The one-dimensional differential Hall chip comprises: a single magnetic concentrator layer and a one-dimensional Hall pair chip, wherein the single magnetic concentrator layer is located on the one-dimensional Hall pair chip; The one-dimensional Hall chip pair includes a first Hall chip and a second Hall chip; the first Hall chip and the second Hall chip are arranged side by side in a contactless manner and are differentially electrically connected in parallel, the central axis of the first Hall chip along the horizontal direction and the central axis of the second Hall chip along the horizontal direction are located on the same straight line, and the central axis of the first Hall chip along the vertical direction and the central axis of the second Hall chip along the vertical direction are parallel to each other; The central axis of the first Hall chip along the horizontal direction is taken as the x-axis, the perpendicular bisector of the line connecting the center points of the first Hall chip and the second Hall chip is taken as the y-axis, and the single magnetic concentrating layer is symmetrically arranged along the x-axis and the y-axis; the outer edge of the single magnetic concentrating layer is a tooth-shaped structure; A spacing area is formed between the first Hall chip and the second Hall chip, the single magnetic layer forms a first covering area on the spacing area, the single magnetic layer forms a second covering area on each Hall chip, and the length of the central area of ​​the first covering area along the y-axis direction is greater than the length of the second covering area along the y-axis direction.

2. The chip according to claim 1, characterized in that: The length of the single magnetic concentrator layer in the y-axis direction decreases toward both sides along the center point of the single magnetic concentrator layer, and the center point of the single magnetic concentrator layer is the intersection of the x-axis and the y-axis.

3. The chip according to claim 2, characterized in that: The second covering area formed by the single magnetic layer on each Hall chip includes a side edge of each Hall chip close to the spacing area and does not exceed a side edge of each Hall chip away from the spacing area.

4. The chip according to claim 1, characterized in that: The coverage area of ​​the single magnetic concentrator layer on the first Hall chip is equal to the coverage area of ​​the single magnetic concentrator layer on the second Hall chip, and the first coverage area and the second coverage area form a closed area.

5. The chip according to claim 1, characterized in that: A distance between an edge of one side of the first Hall chip close to the second Hall chip and an edge of one side of the second Hall chip close to the first Hall chip is 5-500 microns.

6. The chip according to claim 1, characterized in that: The thickness of the single magnetic layer is 2-200 microns.

7. The chip according to any one of claims 1 to 6, characterized in that: The tooth-shaped structure includes a plurality of periodically distributed concave-convex areas, each concave-convex area includes a raised portion, a platform and a recessed portion, the distance between two adjacent raised portions is 5-50 microns, the width of the platform is 0-20 microns, and the depths of the raised portions and the recessed portions are 5-50 microns.

8. The chip according to any one of claims 1 to 6, characterized in that: The first Hall chip and the second Hall chip each include two first electrodes arranged horizontally and two second electrodes arranged vertically; the two first electrodes of the first Hall chip are respectively connected to the two second electrodes of the second Hall chip, and the two second electrodes of the first Hall chip are respectively connected to the two first electrodes of the second Hall chip; the connecting line between the connected first electrode and the second electrode is at 90°.

9. A current sensor, characterized in that: include: A circuit board and a one-dimensional differential Hall chip as claimed in any one of claims 1 to 8; A line connecting the center points of the first Hall chip and the second Hall chip in the one-dimensional differential Hall chip is perpendicular to the current direction of the circuit board.

10. The current sensor according to claim 9, characterized in that: Also includes: A current bus and an insulating layer located on the current bus, wherein the current bus is used to introduce current; The one-dimensional differential Hall chip is located on the insulating layer, the circuit board and the current bus are arranged side by side, and the thickness of the circuit board is greater than or equal to the sum of the thickness of the current bus and the insulating layer.

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