Layout graph processing method and device, equipment, medium and product

Abstract

The invention discloses a layout graph processing method and device, equipment, a medium and a product, and belongs to the technical field of graph processing, the method comprises the steps that a first layout graph is obtained, the first layout graph is a graph processed through an optical proximity effect correction algorithm, the edges of the first layout graph comprise a plurality of invariant edges and a plurality of variable edges, and the invariant edges are different from the variable edges; wherein each non-variable edge is connected between two adjacent variable edges; merging the edges in the first layout graph, and converting a plurality of non-variable edges into a plurality of corresponding new variable edges to obtain a second layout graph; and optimizing at least part of edges in the second layout graph to obtain a third layout graph, converting non-variable edges in the first layout graph into variable edges, and then optimizing the second layout graph comprising a plurality of new variable edges to obtain the third layout graph. The graph quality after the third layout graph is subjected to real exposure can be improved.

Description

Technical Field

[0001] The present application belongs to the field of graphics processing technology, and in particular, relates to a method, device, equipment, medium and product for processing layout graphics. Background Art

[0002] In the production process of integrated chips, the pattern manufacturing of the mask is very important. In the prior art, the mask is often simulated to optimize the pattern of the mask. For example, after obtaining the original design pattern of the mask, the original design pattern will be corrected based on the optical proximity correction algorithm (Optical Proximity Correction, OPC) to obtain a corrected pattern. However, the corrected pattern obtained based on the above OPC algorithm may have a ripple phenomenon, which makes the difference between the corrected pattern and the template pattern large, and the pattern accuracy is low. Summary of the invention

[0003] The embodiments of the present application provide a method, device, equipment, medium and product for processing a layout graphic, which can improve the accuracy of the graphic of the generated mask.

[0004] In a first aspect, an embodiment of the present application provides a method for processing a layout graphic, comprising:

[0005] Obtaining a first layout graphic. The first layout graphic is a graphic processed by an optical proximity effect correction algorithm, wherein the edges of the first layout graphic include a plurality of non-variable edges and a plurality of variable edges, wherein each non-variable edge is connected between two adjacent variable edges;

[0006] Performing a merging operation on the edges in the first layout graph to convert multiple non-variable edges into corresponding multiple new variable edges to obtain a second layout graph;

[0007] At least part of the edges in the second layout graphic are optimized to obtain a third layout graphic.

[0008] In a second aspect, an embodiment of the present application provides a layout graphics processing device, including:

[0009] An acquisition module, used for acquiring a first layout graphic. The first layout graphic is a graphic processed by an optical proximity effect correction algorithm, wherein the edges of the first layout graphic include a plurality of non-variable edges and a plurality of variable edges, wherein each non-variable edge is connected between two adjacent variable edges;

[0010] A merging module, used for merging the edges in the first layout graph to convert a plurality of non-variable edges into a corresponding plurality of new variable edges to obtain a second layout graph;

[0011] The optimization module is used to optimize at least part of the edges in the second layout graphic to obtain a third layout graphic.

[0012] In a third aspect, an embodiment of the present application provides an electronic device, the device comprising:

[0013] a processor and a memory storing computer program instructions;

[0014] When the processor executes the computer program instructions, it is used to execute the layout graphics processing method of the first aspect mentioned above.

[0015] In a fourth aspect, an embodiment of the present application provides a computer storage medium having computer program instructions stored thereon, and when the computer program instructions are executed by a processor, the method for processing layout graphics of the first aspect described above is implemented.

[0016] In a fifth aspect, an embodiment of the present application provides a computer program product, including a computer program, which, when processed by a processor, implements the method for processing layout graphics of the above-mentioned first aspect.

[0017] The processing method, device, equipment, medium and product of the layout graphics provided in the embodiments of the present application obtain a first layout graphic processed by an optical proximity effect correction algorithm, merge the edges in the first layout graphic, convert multiple non-variable edges into variable edges, and obtain a second layout graphic. Then, at least part of the edges in the second layout graphic are optimized, which can reduce the contour fluctuation phenomenon in the layout graphic, so that the graphic after the actual exposure of the third layout graphic is closer to the reference graphic. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the technical solution of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0019] Figure 1 A partial schematic diagram of an exemplary graphic to be optimized provided for some embodiments of the present application.

[0020] Figure 2 A partial schematic diagram of an exemplary exposure pattern provided for some embodiments of the present application.

[0021] Figure 3 A flowchart of a method for processing layout graphics provided in some embodiments of the present application.

[0022] Figure 4 A partial schematic diagram of an exemplary first layout graphic provided for some embodiments of the present application.

[0023] Figure 5 A partial schematic diagram of another exemplary exposure pattern provided for some embodiments of the present application.

[0024] Figure 6 A flowchart of another method for processing layout graphics provided for some embodiments of the present application.

[0025] Figure 7 A flowchart of another method for processing layout graphics provided for some embodiments of the present application.

[0026] Figure 8 A schematic diagram of a layout graphics processing device provided in some embodiments of the present application.

[0027] Fig. 9 A schematic diagram of the hardware structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] The features and exemplary embodiments of various aspects of the present application will be described in detail below. In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain the present application, rather than to limit the present application. For those skilled in the art, the present application can be implemented without the need for some of these specific details. The following description of the embodiments is only to provide a better understanding of the present application by illustrating the examples of the present application.

[0029] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "include..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0030] Before describing the technical solutions provided by the embodiments of the present application, in order to facilitate the understanding of the embodiments of the present application, the present application first specifically describes the problems existing in the related art:

[0031] In the production process of integrated chips, the pattern to be optimized of the mask is obtained. The pattern to be optimized is corrected by the above-mentioned optical proximity correction algorithm (OPC) to obtain the following: Figure 1 The layout pattern shown in FIG. 1 may include a non-variable edge 101 and a variable edge 102. Afterwards, the first layout pattern may be simulated and exposed to obtain the following: Figure 2 However, based on the exposure graph shown in Figure 1 After the layout pattern shown in the figure is simulated exposed, the edge bias errors of adjacent edges of the exposure pattern may be quite different and have opposite signs, for example Figure 2 , Figure 2 For the above Figure 1 The exposure pattern obtained by simulating exposure of the layout pattern, Figure 2 The edge placement error (EPE) of edge 201 in is -2.25, and the edge placement error of edge 202 is 1.5. The absolute value of the difference between -2.25 and 1.5 is greater than the threshold value 3, that is, Figure 2 The exposure pattern after the simulated exposure in the above-mentioned example has a ripple phenomenon. The above phenomenon may cause pinches or bridges to be present in the actual exposure pattern obtained after the above-mentioned layout pattern is actually exposed.

[0032] Here, it can be appreciated that the above thresholds and edge placement errors are merely exemplary values.

[0033] Based on this, the embodiments of the present application provide a method, device, equipment, medium and product for processing a layout graphic, which can solve the above problems.

[0034] In some embodiments, Figure 3 As shown, the embodiment of the present application provides a method for processing a layout graphic, which may include the following steps S310-S320:

[0035] S310: Obtain a first layout graphic. The first layout graphic is a graphic processed by an optical proximity effect correction algorithm, wherein the edges of the first layout graphic include a plurality of non-variable edges 401 and a plurality of variable edges 402, wherein each non-variable edge is connected between two adjacent variable edges.

[0036] The first layout graphic can be obtained, for example, Figure 4The partial schematic diagram of the first layout pattern shown in FIG. 1 is a pattern processed by an optical proximity effect correction algorithm. It can be imagined that the first layout pattern may include multiple non-variable edges (non-var edges) and multiple variable edges (var edges). The variable edges may be edges obtained by translating the edges in the layout pattern to be corrected, and the non-variable edges may be connected between two adjacent variable edges. Figure 4 In FIG. 4 , a non-variable edge 401 is connected between two variable edges 402 .

[0037] In some examples, the variable edges or non-variable edges may be straight lines or curves, such as Figure 4 The first layout pattern shown is only an exemplary layout pattern.

[0038] S320: performing a merging operation on the edges in the first layout graph to convert a plurality of non-variable edges into a corresponding plurality of new variable edges to obtain a second layout graph.

[0039] The edges in the above-mentioned first layout graphic can be merged to convert multiple non-variable edges into corresponding multiple new variable edges to obtain a second layout graphic. Here, the edges in the first layout graphic can be merged through the merge operation command (merge) in the layout processing script file.

[0040] In some examples, the above-mentioned merging operation of the edges in the first layout graphic may also include merging the overlapping and intersecting graphics in the first layout graphic to obtain the second layout graphic.

[0041] S330: Optimize at least part of the edges in the second layout graphic to obtain a third layout graphic.

[0042] At least part of the edges in the second layout graph may be optimized, for example, the variable edge and the first variable edge may be optimized simultaneously, or only the first variable edge may be optimized, to obtain a third layout graph.

[0043] In some examples, when the variable edge and the first variable edge are optimized simultaneously, the first variable edge may be optimized first, and then the variable edge may be optimized.

[0044] In some embodiments, a layout optimization tool may be used to optimize at least part of the edges in the second layout graphic to obtain a third layout graphic. For example, a global optimizer may be used to optimize the above-mentioned variable edges and the first variable edges, or a local optimizer may be used to optimize only the first variable edges or the variable edges. Here, when the optimization tool is used to optimize the edges in the second layout graphic, the optimization target and constraint conditions may be manually input in the control interface of the optimization tool. For example, the identifier of the first variable edge may be input as the optimization target, and the distance between the edge and the preset border may be input as the constraint condition for translating the edge to optimize at least part of the edge.

[0045] In some examples, the second layout graphic can also be subjected to simulated exposure to obtain an exposure graphic, and at least part of the edges of the second layout graphic can be optimized based on the edge bias error between the exposure graphic and the reference graphic. Here, the above-mentioned optimization tool can also be used to optimize the second layout graphic. For example, the absolute value of the difference between the edge bias error of the first variable edge and the edge bias error of its adjacent edge is less than a threshold value as an optimization condition to optimize the above-mentioned first variable edge. By optimizing the above-mentioned second layout graphic through the optimization tool, the optimization efficiency of the layout graphic can be improved. The above-mentioned edge placement error is an indicator to measure the correction quality. The smaller the edge placement error, the closer the exposure graphic is to the reference graphic.

[0046] In some examples, the above optimization operations include, but are not limited to, translating, deforming, shortening, lengthening, and rotating some edges.

[0047] For example, after optimizing at least part of the edges in the second layout graphic, a third layout graphic is obtained, such as Figure 5 , Figure 5 The figure obtained after simulating exposure of the third layout figure is as follows: Figure 5 , the edge placement errors of adjacent edges 501 and 502 are -0.75 and 1.25 respectively, and the absolute value of the difference between -0.75 and 1.25 is less than or equal to the threshold value 3, achieving a significant optimization effect. The smaller the absolute value difference of the edge placement errors of adjacent edges, the higher the quality of the actual exposed layout. It can be imagined that the above thresholds and edge placement errors are only exemplary, and the actual thresholds can be set manually.

[0048] The embodiment of the present application obtains a first layout graphic processed by an optical proximity effect correction algorithm, merges the edges in the first layout graphic, converts multiple non-variable edges into variable edges, and obtains a second layout graphic. Thereafter, at least part of the edges in the second layout graphic are optimized, thereby reducing contour fluctuations in the layout graphic, so that the graphic after actual exposure of the third layout graphic is closer to the reference graphic.

[0049] In some embodiments, optimizing at least part of the edges in the second layout graphic to obtain the third layout graphic may include:

[0050] The new variable edges in the second layout graph are optimized to obtain the third layout graph.

[0051] Here, the new variable edges in the second layout graph may be optimized to obtain a third layout graph. For example, the new variable edges may be optimized based on the aforementioned global optimizer or local optimizer.

[0052] In some examples, optimizing at least a portion of the edges in the second layout graphic to obtain the third layout graphic may include:

[0053] The variable edges and new variable edges in the second layout graph are optimized to obtain a third layout graph.

[0054] Here, the variable edges and the new variable edges in the second layout graph may be optimized simultaneously. For example, the variable edges and the new variable edges may be optimized simultaneously based on the aforementioned global optimizer to obtain a third layout graph.

[0055] It can be imagined that based on the variable edges and new variable edges in the second layout graphic, one of the variable edges can be optimized based on the global optimizer or the local optimizer to obtain a sub-layout graphic, and then the other variable edge can be optimized based on the global optimizer or the local optimizer to obtain a third layout graphic.

[0056] In some examples, optimizing at least some edges in the second layout graphic to obtain the third layout graphic may include:

[0057] The variable edges in the second layout graphic are optimized to obtain a first sub-layout graphic including the optimized variable edges and new variable edges, and the new variable edges in the first sub-layout graphic are optimized to obtain a third layout graphic.

[0058] Here, the variable edges in the above-mentioned second layout graphic can be optimized first to obtain optimized variable edges, and then a first sub-layout graphic including the optimized variable edges and new variable edges can be obtained. After that, the new variable edges in the above-mentioned first sub-layout graphic can be optimized to obtain a third layout graphic.

[0059] In some examples, the new variable edges in the second layout graphic can be optimized first to obtain optimized edges, and then a second sub-layout graphic including the optimized edges and variable edges can be obtained. Then, the variable edges in the second sub-layout graphic can be optimized to obtain a third layout graphic.

[0060] The above optimization operations include but are not limited to translating, deforming, shortening, lengthening and rotating some edges.

[0061] In the embodiment of the present application, the third layout graphic is obtained by optimizing the new variable edge in the second layout graphic, or the new variable edge and the variable edge in the second layout graphic are optimized to obtain the third layout graphic, or the variable edge in the second layout graphic is optimized to obtain a first sub-layout graphic including the optimized variable edge and the new variable edge, and the new variable edge in the first sub-layout graphic is optimized to obtain the third layout graphic. By optimizing at least part of the edges in the above-mentioned second layout graphic in three different optimization methods, the flexibility of optimization can be improved. In some embodiments, such as Figure 6 As shown, the above step S310: obtaining the first layout graphic may include the following steps S610-S630:

[0062] S610: Acquire the graphics to be corrected.

[0063] A graphic to be corrected may be obtained, and the graphic to be corrected may include a main-resolution graphic of a layout.

[0064] S620: Generate a plurality of breakpoints in the edge of the graphic to be corrected by using an optical proximity effect correction algorithm.

[0065] The above-mentioned optical proximity correction algorithm (OPC) is a technology that adjusts the topological structure of the light-transmitting area pattern on the photolithography mask, or adds a small sub-resolution auxiliary pattern on the mask, so that the imaging result in the photoresist is as close as possible to the mask pattern. The optical proximity correction algorithm can be processed on the above-mentioned pattern to be corrected based on the template pattern, and multiple breakpoints can be generated in the edge of the above-mentioned pattern to be corrected, and the edge of the pattern to be corrected can be broken into multiple line segments based on the above-mentioned multiple endpoints.

[0066] S630: Based on the multiple breakpoints, generate a first layout graph including multiple non-variable edges and multiple variable edges.

[0067] Based on the multiple line segments generated by the multiple breakpoints, the multiple line segments can be moved, deformed, or rotated to generate variable edges, and multiple non-variable edges connecting any two adjacent variable edges can be generated.

[0068] In some examples, the above-mentioned graphic to be corrected can be processed by an optical proximity effect correction algorithm based on a pre-trained graphics processing model. For example, the graphic to be corrected and the template graphic are simultaneously input into the graphics processing model, and the above-mentioned graphic to be corrected is processed by the model processing model to generate multiple breakpoints. The generated multiple line segments are moved to preset positions to generate variable edges, and non-variable edges are generated to connect the endpoints of two adjacent variable edges to obtain the above-mentioned first layout graphic.

[0069] In some examples, the OPC processing of the graphic to be corrected may also include moving, reducing, enlarging, rotating, combining, deleting, and processing edges of the graphic to be corrected.

[0070] The embodiment of the present application obtains the graphic to be corrected, performs OPC processing on the graphic to be corrected to generate multiple breakpoints in the edges of the graphic to be corrected, and generates a first layout graphic of non-variable edges and variable edges based on the multiple breakpoints, thereby correcting the graphic to be corrected and improving the accuracy of graphic processing.

[0071] In some embodiments, performing a merging operation on edges in the first layout graph includes:

[0072] Merge non-variable edges into the variable set of variable edges.

[0073] In the above process of performing OPC processing on the graphics to be corrected, the newly generated variable edges and non-variable edges will be located in different sets. The set of non-variable edges can be merged into the variable set of variable edges to realize the conversion of the above non-variable edges into variable edges.

[0074] In some embodiments, a layout processing script file may be used to merge the edges of the first layout graphic. For example, a set of non-variable edges may be merged into a variable set of variable edges based on a merge operation command (merge) in the layout processing script file.

[0075] The embodiment of the present application can convert the non-variable edges into variable edges by merging the non-variable edges into the variable set of variable edges, thereby facilitating subsequent optimization of the non-variable edges to solve the ripple phenomenon that may occur in the layout after actual exposure.

[0076] It can be imagined that when optimizing at least part of the edges in the second layout graphic and obtaining the third layout graphic, the second layout graphic can be simulated exposed, and the second layout graphic can be optimized based on the deviation between the exposure graphic obtained by the simulated exposure and the reference graphic to obtain the third layout graphic.

[0077] In some embodiments, Figure 7As shown, the above step S330: optimizing at least part of the edges in the second layout graphic to obtain the third layout graphic may include the following steps S710-S740:

[0078] S710: Acquire a reference pattern, where the reference pattern is a pattern obtained by simulating exposure of the template pattern.

[0079] Here, the template pattern may be first subjected to simulated exposure to obtain a reference pattern. The reference pattern obtained after the template pattern is subjected to simulated exposure may be obtained.

[0080] S720: Perform simulated exposure on the second layout pattern to obtain an exposure pattern.

[0081] The second layout pattern may be simulated exposed to obtain an exposure pattern. It is conceivable that the second layout pattern may be simulated exposed using the same operating condition information as that used in the simulated exposure of the template pattern to expose the second layout pattern to obtain an exposure pattern. In some examples, the operating condition information may include the type of photoresist, such as positive photoresist or negative photoresist, and light source information, such as the illumination position of the light source.

[0082] S730: Determine a pattern deviation based on the exposure pattern and the reference pattern.

[0083] The pattern deviation may be determined based on the exposure pattern and the reference pattern. Here, the pattern deviation may be an edge offset error between the exposure pattern and the reference pattern or a square value of the Euler distance between a pixel matrix of the exposure pattern and a pixel matrix of the reference pattern.

[0084] In some examples, a first pixel value of each pixel in the exposure pattern may be determined to determine a first pixel matrix, and a second pixel value of each pixel in the reference pattern may be determined to determine a second pixel matrix. A square value of the Euler distance is determined based on the first pixel matrix and the second pixel matrix. Here, the square value of the Euler distance between the pixel matrix and the pixel matrix of the reference pattern may be calculated based on the following expression:

[0085]

[0086] Among them, F is the square value of the Euler distance between the pixel matrix and the pixel matrix of the reference pattern, M and N represent the number of rows and columns of pixels in the exposure pattern, i and j are the row index and column index, a is the first pixel value, and b is the second pixel value.

[0087] S740: When the graphic deviation is greater than or equal to the threshold, based on the graphic deviation, at least part of the edges in the second layout graphic are optimized to obtain a third layout graphic.

[0088] When the above-mentioned graphic deviation is greater than or equal to the threshold, at least part of the edges in the second layout graphic can be optimized based on the graphic deviation to obtain a third layout graphic.

[0089] In some examples, the graphic deviation may be an average value or a weighted average value of edge placement errors at different edges corresponding to the exposure graphic and the reference graphic. When the average value or the weighted average value of edge placement errors at different edges corresponding to the exposure graphic and the reference graphic is greater than or equal to a threshold, the first variable edge and the variable edge in the second layout graphic may be optimized based on the graphic deviation to obtain a third layout graphic.

[0090] In some examples, the graphic deviation may be or be the square value of the Euler distance between the pixel matrix of the exposure graphic and the pixel matrix of the reference graphic. When the square value of the Euler distance is greater than or equal to a threshold, the first variable edge and the variable edge in the second layout graphic may be optimized based on the square value of the Euler distance to obtain a third layout graphic.

[0091] In some examples, the above-mentioned graphic deviation may include an edge placement error between a target edge in the exposure graphic and an edge corresponding to a reference graphic. When the edge placement error between the target edge in the exposure graphic and the edge corresponding to the reference graphic is greater than or equal to a threshold, the edge corresponding to the target edge in the second layout graphic may be optimized to obtain a third layout graphic.

[0092] The embodiment of the present application obtains a reference graphic after simulating exposure of a template graphic, simulates exposure of the second layout graphic, obtains an exposure graphic, optimizes at least part of the edges in the second layout graphic based on the graphic deviation between the exposure graphic and the reference graphic, and obtains a third layout graphic. By optimizing part of the edges of the second layout graphic through the exposure graphic after simulating exposure, the graphic after actual exposure of the third layout graphic can be made closer to the reference graphic, while avoiding the ripple phenomenon.

[0093] In some embodiments, the above step S740: optimizing at least part of the edges in the second layout graphic based on the graphic deviation to obtain the third layout graphic may include:

[0094] Based on the graphic deviation, at least part of the edges in the second layout graphic are translated to obtain a third layout graphic.

[0095] Here, based on the above-mentioned graphic deviation, at least part of the edges in the second layout graphic can be translated to obtain a third layout graphic. Taking the above-mentioned graphic deviation including the average value of the edge placement errors on different edges corresponding to the exposure graphic and the reference graphic as an example, when the average value of the above-mentioned edge placement errors is greater than or equal to a preset threshold, the first variable edge and the variable edge in the above-mentioned second layout graphic can be translated to obtain a third layout graphic.

[0096] In some examples, a translation distance for translating both the first variable edge and the variable edge in the second layout graphic can be determined based on the average value of the edge placement error, and both the first variable edge and the variable edge can be translated based on the translation distance.

[0097] The embodiment of the present application obtains a third layout graphic by translating at least part of the edges in the second layout graphic based on the above-mentioned graphic deviation. By translating at least part of the edges, the ripple phenomenon that may exist in the graphic after actual exposure can be effectively improved, thereby achieving the purpose of optimizing the layout.

[0098] In some embodiments, based on the graphic deviation, translating at least part of the edges in the second layout graphic to obtain a third layout graphic includes:

[0099] Based on the graphic deviation, a translation distance is determined; based on the translation distance, at least part of the edges in the second layout graphic are translated to obtain a third layout graphic.

[0100] Here, the translation distance of some edges in the second layout graphic can be determined based on the graphic deviation, and at least some edges in the second layout graphic can be translated based on the translation distance to obtain the third layout graphic.

[0101] In some examples, a plurality of correspondences between graphic deviations and translation distances may be pre-established, and the translation distance corresponding to the graphic deviation may be determined based on the correspondences.

[0102] In some examples, when the graphic deviation includes the average value of the edge placement errors between the exposure graphic and the reference graphic on different sides or the square value of the Euler distance between the pixel matrix of the exposure graphic and the pixel matrix of the reference graphic, the translation distance can be the distance by which the first variable edge and the variable edge in the second layout graphic are translated, and the first variable edge and the variable edge in the second layout graphic can be translated by the translation distance to obtain a third layout graphic.

[0103] In some examples, when the graphic deviation includes an edge placement error between a target edge in an exposure graphic and an edge corresponding to a reference graphic, the translation distance may include only the translation distance of an edge in the second layout graphic corresponding to the target edge, and the edge in the second layout graphic corresponding to the target edge may be translated by the translation distance to obtain a third layout graphic.

[0104] In some examples, to improve the accuracy of translating edges, at least part of the edges in the second layout graphic may be translated based on a layout optimization tool such as a global optimizer or a local optimizer to obtain a third layout graphic.

[0105] The embodiment of the present application determines the translation distance based on the graphic deviation, and translates at least part of the edges in the second layout graphic based on the translation distance to obtain the third layout graphic, thereby improving the accuracy of optimizing the second layout graphic.

[0106] Based on the same inventive concept, an embodiment of the present application also provides a layout graphics processing device.

[0107] like Figure 8 As shown, an embodiment of the present application provides a layout graphics processing device, which may include:

[0108] The acquisition module 801 is used to acquire a first layout graphic, wherein the first layout graphic is a graphic processed by an optical proximity effect correction algorithm, wherein the edges of the first layout graphic include a plurality of non-variable edges and a plurality of variable edges, wherein each of the non-variable edges is connected between two adjacent variable edges;

[0109] A merging module 802 is used to perform a merging operation on the edges in the first layout graph to convert the plurality of non-variable edges into a corresponding plurality of new variable edges to obtain a second layout graph;

[0110] The optimization module 803 is used to optimize at least part of the edges in the second layout graphic to obtain a third layout graphic.

[0111] In the embodiment of the present application, an acquisition module is used to acquire a first layout graphic processed by an optical proximity effect correction algorithm, and a merging module is used to merge the edges in the first layout graphic, thereby converting multiple non-variable edges into variable edges to obtain a second layout graphic. Then, an optimization module is used to optimize at least part of the edges in the second layout graphic, thereby reducing contour fluctuations in the layout graphic, so that the graphic after actual exposure of the third layout graphic is closer to the reference graphic.

[0112] In some embodiments, the acquisition module is specifically configured to:

[0113] Get the graphics to be corrected;

[0114] Generate multiple breakpoints in the edge of the graphic to be corrected by an optical proximity effect correction algorithm;

[0115] Based on the multiple breakpoints, a first layout graph including non-variable edges and variable edges is generated.

[0116] In some embodiments, the merging module is specifically configured to:

[0117] Merge non-variable edges into the variable set of variable edges.

[0118] In some embodiments, the optimization module is specifically configured to:

[0119] Acquire a reference pattern, where the reference pattern is a pattern obtained by simulating exposure of the template pattern;

[0120] Performing simulated exposure on the second version pattern to obtain an exposure pattern;

[0121] determining a pattern deviation based on the exposure pattern and the reference pattern;

[0122] When the graphic deviation is greater than or equal to the threshold, at least part of the edges in the second layout graphic are optimized based on the graphic deviation to obtain a third layout graphic.

[0123] In some embodiments, the optimization module is specifically configured to:

[0124] Based on the graphic deviation, at least part of the edges in the second layout graphic are translated to obtain a third layout graphic.

[0125] In some embodiments, the optimization module is specifically configured to:

[0126] Based on the graphic deviation, the translation distance is determined;

[0127] Based on the translation distance, at least part of the edges in the second layout graphic are translated to obtain a third layout graphic.

[0128] In some embodiments, the optimization module is specifically configured to:

[0129] Optimize the new variable edge in the second layout graph to obtain a third layout graph; or

[0130] Optimizing the variable edges and the new variable edges in the second layout graph to obtain a third layout graph; or

[0131] The new variable edge in the second layout pattern is optimized to obtain a first sub-layout pattern including the optimized variable edge and the variable edge, and the new variable edge in the first sub-layout pattern is optimized to obtain a third layout pattern. The device of the above embodiment is used to implement the corresponding mask pattern processing method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0132] Fig. 9 A schematic diagram of the hardware structure of an electronic device provided in an application embodiment.

[0133] The electronic device 900 may include a processor 901 and a memory 902 storing computer program instructions.

[0134] Specifically, the processor 901 may include a central processing unit (CPU), or an application specific integrated circuit (ASIC), or may be configured to implement one or more integrated circuits of the embodiments of the present application.

[0135] The memory 902 may include a large capacity memory for data or instructions. By way of example and not limitation, the memory 902 may include a hard disk drive (HDD), a floppy disk drive, a flash memory, an optical disk, a magneto-optical disk, a magnetic tape, or a universal serial bus (USB) drive or a combination of two or more of these. In appropriate cases, the memory 902 may include a removable or non-removable (or fixed) medium. In appropriate cases, the memory 902 may be inside or outside the integrated gateway disaster recovery device. In a specific embodiment, the memory 902 is a non-volatile solid-state memory.

[0136] In certain embodiments, memory 902 includes a read-only memory (ROM). The ROM may be a mask-programmed ROM, a programmable ROM (PROM), an erasable PROM (EPROM), an electrically erasable PROM (EEPROM), an electrically alterable ROM (EAROM), or flash memory, or a combination of two or more of the above, where appropriate.

[0137] The memory may include a read-only memory (ROM), a random access memory (RAM), a magnetic disk storage medium device, an optical storage medium device, a flash memory device, an electrical, optical or other physical / tangible memory storage device. Thus, typically, the memory includes one or more tangible (non-transitory) computer-readable storage media (e.g., a memory device) encoded with software including computer-executable instructions, and when the software is executed (e.g., by one or more processors), it is operable to perform the operations described with reference to the method according to the first aspect of the present application.

[0138] The processor 901 implements any one of the layout graphics processing methods in the above embodiments by reading and executing computer program instructions stored in the memory 902 .

[0139] In one example, the electronic device may further include a communication interface 903 and a bus 904. Fig. 9 The processor 901, the memory 902, and the communication interface 903 are connected via a bus 904 and communicate with each other.

[0140] The communication interface 903 is mainly used to implement communication between various modules, devices, units and / or equipment in the embodiments of the present application.

[0141] Bus 904 includes hardware, software or both, and the parts of online data flow billing equipment are coupled to each other. For example, but not limitation, bus may include accelerated graphics port (AGP) or other graphics bus, enhanced industrial standard architecture (EISA) bus, front side bus (FSB), hypertransport (HT) interconnection, industrial standard architecture (ISA) bus, infinite bandwidth interconnection, low pin count (LPC) bus, memory bus, micro channel architecture (MCA) bus, peripheral component interconnection (PCI) bus, PCI-Express (PCI-X) bus, serial advanced technology attachment (SATA) bus, video electronics standard association local (VLB) bus or other suitable bus or two or more of these combinations. In appropriate cases, bus 904 may include one or more buses. Although the present application embodiment describes and shows a specific bus, the application considers any suitable bus or interconnection.

[0142] The electronic device of the above embodiment is used to implement the corresponding layout graphic processing method in any of the above embodiments, and has the beneficial effects of the corresponding method embodiment, which will not be repeated here.

[0143] In addition, in combination with the method for processing the layout graphics in the above embodiments, the embodiments of the present application may provide a computer storage medium for implementation. The computer storage medium stores computer program instructions; when the computer program instructions are executed by a processor, any one of the methods for processing the layout graphics in the above embodiments is implemented.

[0144] In addition, in combination with the processing method of the layout graphics in the above embodiments, the embodiments of the present application can provide a computer program product for implementation. When the instructions of the computer program product are executed by a processor of an electronic device, any one of the processing methods of the layout graphics in the above embodiments is implemented.

[0145] Those skilled in the art should understand that the discussion of any of the above embodiments is merely illustrative and is not intended to imply that the scope of the present application (including the claims) is limited to these examples. In line with the concept of the present application, the technical features in the above embodiments or different embodiments may be combined, the steps may be implemented in any order, and there are many other variations of the different aspects of the embodiments of the present application as described above, which are not provided in detail for the sake of simplicity.

[0146] The functional blocks shown in the above-described block diagram can be implemented as hardware, software, firmware or a combination thereof. When implemented in hardware, it can be, for example, an electronic circuit, an application-specific integrated circuit (ASIC), appropriate firmware, a plug-in, a function card, etc. When implemented in software, the elements of the present application are programs or code segments that are used to perform the required tasks. The program or code segment can be stored in a machine-readable medium, or transmitted on a transmission medium or a communication link by a data signal carried in a carrier wave. "Machine-readable medium" can include any medium capable of storing or transmitting information. Examples of machine-readable media include electronic circuits, semiconductor memory devices, ROM, flash memory, erasable ROM (EROM), floppy disks, CD-ROMs, optical disks, hard disks, optical fiber media, radio frequency (RF) links, etc. The code segment can be downloaded via a computer network such as the Internet, an intranet, etc.

[0147] It should also be noted that the exemplary embodiments mentioned in this application describe some methods or devices based on a series of steps or devices. However, this application is not limited to the order of the above steps, that is, the steps can be performed in the order mentioned in the embodiment, or in a different order from the embodiment, or several steps can be performed simultaneously.

[0148] The above reference is according to the method of the embodiment of the present application, the flow chart of the device (device) and the computer program product and / or the block diagram described various aspects of the present application.It should be understood that each square box in the flow chart and / or the block diagram and the combination of each square box in the flow chart and / or the block diagram can be realized by computer program instructions.These computer program instructions can be provided to the processor of a general-purpose computer, a special-purpose computer or other programmable data processing device to produce a machine so that these instructions executed by the processor of the computer or other programmable data processing device enable the realization of the function / action specified in one or more square boxes of the flow chart and / or the block diagram.Such a processor can be but is not limited to a general-purpose processor, a special-purpose processor, a special application processor or a field programmable logic circuit.It can also be understood that each square box in the block diagram and / or the flow chart and the combination of the square boxes in the block diagram and / or the flow chart can also be realized by the dedicated hardware that performs the specified function or action, or can be realized by the combination of dedicated hardware and computer instructions.

[0149] The above is only a specific implementation of the present application. Those skilled in the art can clearly understand that for the convenience and simplicity of description, the specific working processes of the above-described devices, modules and units can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here. It should be understood that the protection scope of the present application is not limited to this. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application.

Claims

1. A method for processing a layout graphic, characterized in that: include: Acquire a first layout graphic, wherein the first layout graphic is a graphic processed by an optical proximity effect correction algorithm, wherein the edges of the first layout graphic include a plurality of non-variable edges and a plurality of variable edges, wherein each of the non-variable edges is connected between two adjacent variable edges; Performing a merging operation on the edges in the first layout graph to convert the plurality of non-variable edges into a corresponding plurality of new variable edges to obtain a second layout graph; At least part of the edges in the second layout graphic are optimized to obtain a third layout graphic.

2. The method for processing layout graphics according to claim 1, characterized in that: The step of obtaining a first layout graphic comprises: Get the graphics to be corrected; generating a plurality of breakpoints in the edge of the to-be-corrected graphic by an optical proximity effect correction algorithm; Based on the multiple breakpoints, the first layout graph including the multiple non-variable edges and the multiple variable edges is generated.

3. The method for processing layout graphics according to claim 1, characterized in that: The merging operation on the edges in the first layout graph includes: The non-variable edge is merged into the variable set of the variable edge.

4. The method for processing layout graphics according to claim 1, characterized in that: The step of optimizing at least part of the edges in the second layout graphic to obtain a third layout graphic comprises: Acquire a reference pattern, wherein the reference pattern is a pattern obtained by simulating exposure of a template pattern; Performing simulated exposure on the second layout pattern to obtain an exposure pattern; determining a pattern deviation based on the exposure pattern and the reference pattern; When the graphic deviation is greater than or equal to a threshold, at least part of the edges in the second layout graphic are optimized based on the graphic deviation to obtain the third layout graphic.

5. The method for processing layout graphics according to claim 4, characterized in that: The step of optimizing at least part of the edges in the second layout graphic based on the graphic deviation to obtain a third layout graphic comprises: Based on the graphic deviation, at least part of the edges in the second layout graphic are translated to obtain a third layout graphic.

6. The method for processing layout graphics according to claim 5, characterized in that: The step of translating at least part of the edges of the second layout graphic based on the graphic deviation to obtain the third layout graphic comprises: Based on the graphic deviation, determining a translation distance; Based on the translation distance, at least part of the edges in the second layout graphic are translated to obtain the third layout graphic.

7. The method for processing layout graphics according to claim 1, characterized in that: The step of optimizing at least part of the edges in the second layout graphic to obtain a third layout graphic comprises: Optimizing the new variable edge in the second layout graph to obtain the third layout graph; or Optimizing the variable edge and the new variable edge in the second layout graph to obtain the third layout graph; or The new variable edge in the second layout graphic is optimized to obtain a first sub-layout graphic including the optimized variable edge and the variable edge, and the new variable edge in the first sub-layout graphic is optimized to obtain the third layout graphic.

8. An electronic device, characterized in that: The device comprises: a processor, and a memory storing computer program instructions; The processor reads and executes the computer program instructions to implement the method for processing layout graphics as described in any one of claims 1 to 7.

9. A readable storage medium, characterized in that: The readable storage medium stores computer program instructions, and when the computer program instructions are executed by a processor, the method for processing layout graphics according to any one of claims 1 to 7 is implemented.

10. A computer program product, comprising a computer program, characterized in that When the computer program is processed by a processor, the method for processing layout graphics as described in any one of claims 1 to 7 is implemented.

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