Template optimization method and device based on cross-heterogeneous programming model

Abstract

The invention provides a template optimization method based on a cross-heterogeneous programming model. The template optimization method comprises the steps of obtaining adjustment and optimization demand parameters; according to a preset tuning strategy and the tuning demand information, directionally generating a tuning parameter population; searching the tuning parameter population according to a predetermined genetic algorithm, performing iterative search for multiple times until a convergence condition is met, and generating corresponding optimization parameter settings; and automatically generating an optimization code according to a preset template operator and the optimization parameter setting. The invention further provides a template optimization device based on the cross-heterogeneous programming model, a storage medium and electronic equipment. Therefore, according to the method, automatic adjustment and optimization of template calculation based on the cross-heterogeneous programming model can be achieved, a good template calculation optimization effect can be achieved for different hardware platforms, and the most suitable optimization technology combination can be found for templates in different modes.

Description

Technical Field

[0001] The present invention relates to the technical field of parallel computer devices, and in particular to a template optimization method, device, storage medium and electronic device based on a cross-heterogeneous programming model. Background Art

[0002] Existing hardware accelerators and programming models are diverse. In the current field of high-performance computing, the popularity of heterogeneous accelerators has become an obvious trend. In addition to traditional CPUs, various computing hardware such as GPU (Graphics Processing Unit), FPGA (Field-Programmable Gate Array), and TPU (Tensor Processing Unit) have gradually become popular choices in the field of high-performance computing. This trend is not only reflected in different accelerator categories, but also in the fact that even in the same category of accelerators, products produced by different manufacturers also show their own unique characteristics and advantages. In order to give full play to the performance of hardware accelerators, developers need to use dedicated programming models to build parallel applications. With the increase in the types of hardware accelerators, the corresponding programming models are also showing a diversified development trend. At present, the mainstream programming models include CUDA (Compute Unified Device Architecture) for NVIDIA GPU, HIP (Heterogeneous-Compute Interface for Portability) for AMD GPU, and OpenCL (Open Computing Language) for various CPUs, GPUs and other types of processors. These models provide support for efficient programming on different hardware platforms.

[0003] The diversity of heterogeneous architectures leads to different accelerators supporting different programming models. Applications need to carry out heterogeneous parallel porting and optimization for different heterogeneous platforms, which greatly increases the difficulty of heterogeneous parallel application development and optimization. Although OpenCL was once regarded as an ideal choice to solve this problem, compared with other models, programming with OpenCL is more complicated and error-prone, and there are major problems in terms of ease of use. In addition, compared with the programming model natively supported by the platform, OpenCL cannot give full play to the hardware performance and may have certain performance losses. So in 2014, Khronos Group released the parallel SYCL (Standard C++ for Heterogeneous Computing-Language Extensions, Standard C++ Language Extensions for Heterogeneous Computing) programming model. The SYCL programming model is based on the basic concepts of OpenCL and can be regarded as a high-level abstraction layer of OpenCL. It inherits many features of OpenCL, allowing the code to be reused between different hardware platforms (such as CPU, GPU and FPGA). The design of SYCL conforms to the modern C++ specification, introduces the concept of data parallelism, simplifies the complexity of parallel programming, and supports integration with other C++ software.

[0004] Stencil computing is a fixed computing paradigm for updating element values ​​in a multidimensional data space. Stencil computing often has rich parallelism, making GPU a good choice for performance acceleration. In order to solve the optimization and deployment problems of stencil computing on multiple GPU platforms, there have been many automatic code generation works that integrate domain-specific languages ​​(DSL) with optimization schemes. In addition, a stencil automatic tuning framework has been proposed to determine the best optimization parameter combination for a specific stencil operator.

[0005] The work of automatic code generation is mainly to judge the computing mode of the target template through an input in the form of a domain-specific language and generate executable code for it, and at the same time integrate a series of optimization schemes to ensure the high performance of the generated code. The Physis system converts the template code written by the user into a scalable implementation suitable for GPU clusters. Hagedorn et al. explored how to use the LIFT primitive to implement template code and optimizations such as blocking. Rawat et al. developed STENCILGEN based on a domain-specific language, which implemented a variety of optimizations including DAG (Directed Acyclic Graph) fusion. AN5D achieves a high degree of temporal blocking and spatial blocking, and uses standard C code as input to generate corresponding CUDA code.

[0006] Automatic code generation → lacks effective support for automatic parameter adjustment, and cannot achieve optimal optimization for each type of template. In addition, automatic code generation does not adequately evaluate the performance impact of a single optimization method on a specific optimization combination and a specific optimization object, and is not sufficient for further optimization guidance. The template automatic tuning framework automatically provides a better combination of optimization methods and parameter settings for template calculations through a series of search methods. Halide separates algorithm specifications from scheduling, which can be manually written by domain experts or automatically generated through built-in strategies. Artemis uses nvprof to perform sample-based performance analysis, tune optimization methods with greater impact, and select some high-performance candidate solutions. In response to some defects of the automatic tuning framework, such as long search time and inaccurate performance analysis, recent work such as GSTuner has introduced neural networks to assist in the search and screening of parameter space and performance prediction, which has better solved these problems.

[0007] Although the computing performance of GPUs has grown rapidly, optimizing template computing on GPUs remains a challenge because the performance of template computing is often limited by memory bandwidth. This gap between computing and memory access prevents the GPU from efficiently utilizing its performance. An analysis of the characteristics of the template computing pattern shows that the memory access pattern during the data point update process is discontinuous, which results in inefficient data reuse. In addition, since different types of template computing applications have different computing memory access ratios and resource usage, the same optimization strategy on the same platform may produce different optimization effects. Researchers need to fully understand the program algorithm and hardware platform architecture to select appropriate optimization strategies to achieve efficient optimization of template computing on a specific platform.

[0008] In summary, the prior art obviously has inconveniences and defects in practical use, so it is necessary to improve it. Summary of the invention

[0009] In view of the above-mentioned defects, the object of the present invention is to provide a template optimization method, device, storage medium and electronic device based on a cross-heterogeneous programming model.

[0010] In order to solve the above-mentioned technical problems, the present invention is achieved as follows:

[0011] In a first aspect, an embodiment of the present invention provides a template optimization method based on a cross-heterogeneous programming model, comprising:

[0012] Obtain the required tuning parameters;

[0013] Directionally generating a tuning parameter population according to a predetermined tuning strategy and the tuning requirement information;

[0014] Searching the tuning parameter population according to a predetermined genetic algorithm, iterating the search multiple times until a convergence condition is reached, and generating corresponding optimization parameter settings;

[0015] According to the predetermined template operator and the optimization parameter settings, the optimization code is automatically generated.

[0016] According to the template optimization method based on cross-heterogeneous programming models of the present invention, the step of obtaining tuning information parameters includes:

[0017] Defining the tuning requirement parameters, wherein the tuning requirement parameters at least include the data range and algorithm of the template operator;

[0018] The shape file describing the template operator is read to obtain the respective values ​​corresponding to the tuning requirement parameters.

[0019] According to the template optimization method based on cross-heterogeneous programming models of the present invention, the step of directionally generating a tuning parameter population according to a predetermined tuning strategy and the tuning requirement information comprises:

[0020] According to the tuning strategy and the tuning requirement information, code generation parameters are generated step by step in sequence. The code generation parameters are generated in three parts: optimization method combination part, block size part, and expansion parameter part, including:

[0021] Screening the optimization method combination part, wherein the optimization method includes blocking, stream processing, retiming and / or prefetching;

[0022] Screening the block size portion;

[0023] Screening the expansion parameter part;

[0024] After the code generation parameters are generated, they are sequentially filled into the array of the tuning parameter population.

[0025] According to the template optimization method based on cross-heterogeneous programming models of the present invention, the step of screening the optimization method combination part includes:

[0026] First, the optimization method needs to meet the predetermined constraints and give priority to increasing the probability of combining the two methods of blocking and streaming processing. Retiming is only enabled when the order of the template operator is greater than or equal to 2.

[0027] According to the template optimization method based on cross-heterogeneous programming models of the present invention, the step of screening the block size part includes:

[0028] First, the blocks should be limited to powers of 2, and the blocks should be within the range of the number of blocks, and the size of each block of data cannot exceed the maximum shared memory size.

[0029] According to the template optimization method based on cross-heterogeneous programming models of the present invention, the step of screening the expansion parameter part includes:

[0030] Firstly, the probability of setting the expansion parameter part to the preferred loop expansion factor is increased, and the register value owned by each thread corresponding to the current expansion parameter can be obtained by querying the register occupancy of the expansion operation, and the product of the register value and the number of blocks cannot exceed the maximum register value.

[0031] According to the template optimization method based on a cross-heterogeneous programming model of the present invention, the step of searching the tuning parameter population according to a predetermined genetic algorithm, iterating the search multiple times until a convergence condition is reached, and generating corresponding optimization parameter settings includes:

[0032] Reading the tuning parameter population, wherein each individual represents an optimized code generation parameter combination;

[0033] Evaluate each individual in the tuning parameter population and calculate the fitness value corresponding to each individual;

[0034] Selecting a portion of individuals from the tuning parameter population as parent individuals, and individuals with higher fitness have a greater probability of being selected;

[0035] Performing a crossover operation on the selected parent individuals to generate new offspring individuals;

[0036] Performing a mutation operation on the offspring individuals after the crossover;

[0037] The mutated offspring individuals and the parent individuals form a new population, and the corresponding optimization parameter settings are generated;

[0038] Repeat the above steps until the maximum number of iterations is reached.

[0039] In a second aspect, an embodiment of the present invention provides a template optimization device based on a cross-heterogeneous programming model constructed based on any of the methods described above, the device comprising at least a controller unit, a tuning strategy unit, a search algorithm unit, and a code generation unit;

[0040] The controller unit is used to obtain the tuning requirement parameters and send the tuning requirement parameters to the tuning strategy unit;

[0041] The tuning strategy unit is used to directionally generate a tuning parameter population according to a predetermined tuning strategy and the tuning requirement information, and send the tuning parameter population to the search algorithm unit;

[0042] The search algorithm unit is used to search the tuning parameter population according to a predetermined genetic algorithm, perform multiple iterations of the search until a convergence condition is reached, generate corresponding optimization parameter settings, and send the optimization parameter settings to the code generation unit;

[0043] The code generation unit is used to automatically generate optimized code according to the predetermined template operator and the optimization parameter setting.

[0044] In a third aspect, an embodiment of the present invention provides a storage medium for storing a computer program for executing any of the above-mentioned template optimization methods based on cross-heterogeneous programming models.

[0045] In a fourth aspect, an embodiment of the present invention provides an electronic device, comprising a storage medium, a processor, and a computer program stored in the storage and executable on the processor, wherein the processor implements any of the above-mentioned template optimization methods based on cross-heterogeneous programming models when executing the computer program.

[0046] The template optimization technology based on the cross-heterogeneous programming model of the present invention includes: obtaining tuning requirement parameters; generating tuning parameter populations according to tuning strategies and tuning requirement information; searching the tuning parameter populations according to genetic algorithms to generate optimization parameter settings; and automatically generating optimization codes according to template operators and optimization parameter settings. Thus, the present invention can realize automatic tuning of template calculations based on cross-heterogeneous programming models, not only achieving better template calculation optimization effects for different hardware platforms, but also finding the most suitable optimization technology combination for templates of different modes. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] Figure 1 It is a flowchart of a template optimization method based on a cross-heterogeneous programming model provided in the first embodiment of the present invention;

[0048] Figure 2 It is a schematic diagram of a stream processing method based on a template optimization method across heterogeneous programming models provided in the second embodiment of the present invention;

[0049] Figure 3 is a schematic diagram of block merging and loop merging based on a template optimization method across heterogeneous programming models provided in the second embodiment of the present invention;

[0050] Figure 4 It is a pre-fetching schematic diagram of a template optimization method based on a cross-heterogeneous programming model provided in the second embodiment of the present invention;

[0051] Figure 5 It is a schematic diagram of code changes before and after retiming of the template optimization method based on cross-heterogeneous programming models provided in the second embodiment of the present invention;

[0052] Figure 6 It is a structural schematic diagram of a template optimization device based on a cross-heterogeneous programming model provided in the first embodiment of the present invention;

[0053] Figure 7 It is a structural schematic diagram of a template optimization device based on a cross-heterogeneous programming model provided in the second embodiment of the present invention;

[0054] Figure 8 It is a schematic diagram of the hardware structure of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0055] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0056] It should be noted that references to "one embodiment", "embodiment", "example embodiment", etc. in this specification refer to the embodiment described, which may include specific features, structures or characteristics, but not every embodiment must include these specific features, structures or characteristics. In addition, such expressions do not refer to the same embodiment. Furthermore, when describing specific features, structures or characteristics in conjunction with an embodiment, whether or not there is an explicit description, it has been shown that it is within the knowledge of those skilled in the art to combine such features, structures or characteristics into other embodiments.

[0057] In addition, certain words are used in the specification and subsequent claims to refer to specific components or parts. Those with ordinary knowledge in the relevant field should understand that manufacturers can use different nouns or terms to refer to the same component or part. This specification and subsequent claims do not use differences in names as a way to distinguish components or parts, but use differences in the functions of components or parts as the criteria for distinction. "Including" and "including" mentioned throughout the specification and subsequent claims are open-ended terms and should be interpreted as "including but not limited to". In addition, the word "connected" here includes any direct and indirect electrical connection means. Indirect electrical connection means include connection through other devices.

[0058] The template optimization method based on a cross-heterogeneous programming model provided by an embodiment of the present invention is described in detail below through specific embodiments and application scenarios in conjunction with the accompanying drawings.

[0059] The present invention provides a template optimization method based on a cross-heterogeneous programming model. The final generated code is based on the cross-heterogeneous programming model. The cross-heterogeneous programming model is preferably a SYCL programming model. The present invention utilizes the SYCL programming model's good support for cross-heterogeneous platforms to achieve multi-platform optimization support for template calculations, and through a heuristic method, designs and implements an automatic tuning framework. To realize the invention of this patent, there are mainly the following two difficulties: (1) How to achieve better template calculation optimization effects on different hardware platforms; (2) How to find the most suitable combination of optimization technologies for templates of different modes. The technical problems to be solved by the present invention are mainly the following two aspects:

[0060] (1) Use the SYCL programming model to achieve good optimization of template computing on different hardware platforms.

[0061] In recent years, most of the template optimization work has been carried out based on NVIDIA GPU, and there are works with automatic tuning functions such as artemisGStuner and Halide, as well as other works mainly for automatic code generation of integrated optimization solutions. In addition, the work with cross-platform support is all implemented using OpenCL, of which only Halide supports its own automatic tuning function. However, OpenCL cannot play the performance of the hardware like the programming model natively supported by the platform, which will bring certain performance losses. The lack of automatic tuning makes it difficult to determine the best optimization solution for template operators of complex types. As a cross-heterogeneous programming model, the SYCL programming model can provide us with a unified way to describe and execute template calculations on different hardware. The present invention uses the SYCL programming model to expand a set of template calculation automatic tuning solutions proposed in the present invention, so that cross-heterogeneous template calculation optimization can be better implemented.

[0062] (2) Integrate existing template calculation optimization methods and combine them with heuristic methods. By combining and screening the optimization methods, the best optimization solution for template calculation of different modes can be obtained within a controllable time.

[0063] Figure 1 : is a flow chart of a template optimization method based on a cross-heterogeneous programming model provided in the first embodiment of the present invention. The code finally generated is based on a cross-heterogeneous programming model. The cross-heterogeneous programming model is preferably a SYCL programming model. The method includes:

[0064] Step S101, obtaining tuning requirement parameters.

[0065] Preferably, this step S101 further includes:

[0066] S1011, defining tuning requirement parameters, where the tuning requirement parameters at least include the data range and algorithm of the template operator.

[0067] S1012, reading a shape file describing a template operator to obtain various values ​​corresponding to the tuning requirement parameters.

[0068] Step S102 : generating a tuning parameter population in a directionally manner according to a predetermined tuning strategy and tuning requirement information.

[0069] Preferably, this step S102 further includes:

[0070] S1021, according to the tuning strategy and the tuning requirement information, code generation parameters are sequentially generated step by step. The code generation parameters are sequentially divided into three parts: an optimization method combination part, a block size part, and an expansion parameter part, including:

[0071] S1022, screening the optimization method combination part, the optimization method includes blocking, stream processing, retiming and / or prefetching. Preferably, the optimization method needs to meet the predetermined constraint conditions, and give priority to improving the probability of combining the blocking and stream processing methods, and retiming is enabled only when the order of the template operator is greater than or equal to 2.

[0072] S1023, screening the block size part. Preferably, firstly, the blocks are limited to a power of 2, and the blocks are within the block number range, and the data size of each block of the blocks cannot exceed the maximum shared memory size.

[0073] S1024, screening the expansion parameter part. Preferably, firstly, the probability of setting the expansion parameter part as the preferred loop expansion factor is increased, and the register value of each thread corresponding to the current expansion parameter can be obtained by querying the register occupancy of the expansion operation, and the product of the register value and the number of blocks cannot exceed the maximum register value.

[0074] After the code generation parameters are generated, they are filled into the array of the tuning parameter population in sequence.

[0075] Step S103, searching the tuning parameter population according to a predetermined genetic algorithm, performing multiple iterations of searching until a convergence condition is reached, and generating corresponding optimization parameter settings.

[0076] Preferably, this step S103 further includes:

[0077] S1031, reading a tuning parameter population, wherein each individual represents an optimized code generation parameter combination.

[0078] S1032, evaluating each individual in the tuning parameter population, and calculating the fitness value corresponding to each individual.

[0079] S1033 selects a portion of individuals from the tuning parameter population as parent individuals, and individuals with higher fitness have a greater probability of being selected.

[0080] S1034 performs a crossover operation on the selected parent individuals to generate new child individuals.

[0081] S1035 performs mutation operation on the offspring individuals after crossover.

[0082] S1036 The mutated offspring individuals and the parent individuals are combined into a new population, and the corresponding optimization parameter settings are generated.

[0083] Repeat the above steps S1031 to S1036 until the maximum number of iterations is reached.

[0084] The present invention firstly focuses on template calculation, studies a variety of optimization techniques from aspects such as memory access and resource reuse, and establishes an optimized resource library. In terms of memory access and calculation mode optimization, the present invention adopts Blocking and Streaming methods. The basic idea of ​​blocking: speed up calculation by improving the locality of the program, divide the calculation area into smaller sub-areas, these sub-areas are called tiles or blocks, the program will load each block into the cache, and perform calculations at the block level, so that the data that needs to be accessed multiple times in the block can be transmitted faster. The basic idea of ​​stream processing: stream processing changes the calculation mode of 3D templates and improves data reuse. Assuming that the three dimensions of the 3D grid are X, Y, and Z, the entire grid can be regarded as a stack of XY planes along the Z plane. Specifically, stream processing uses blocking on the XY plane, and also calculates one output plane at a time in a serial manner along the Z dimension.

[0085] like Figure 2 As shown, for the optimization of memory access efficiency, the present invention adopts block merging, cyclic merging, and prefetching. In general implementation, each GPU thread processes a single output point, and merging is to merge the outputs of multiple points into one thread for processing. On the one hand, it can reduce the number of threads and thread blocks that need to be started by the kernel function, thereby reducing the kernel startup overhead. In addition, the reduction of thread blocks brought about by merging can also reduce redundant data loading, thereby reducing memory access overhead. The present invention will use two merging strategies, namely block merging and cyclic merging, depending on the situation. Figure 3 As shown in , block merging is to merge a certain number of adjacent output points, while loop merging is to merge output points with a fixed interval. Figure 4As shown in the figure, the data needed for the third stage can be read into the prefetch register while the program is executing the calculation of the first stage. Since there is no synchronization barrier between reading and calculation, calculation and memory access can overlap to hide the data transmission delay.

[0086] Finally, the present invention also uses retiming to optimize the use of register resources. Retiming improves data reuse by decomposing the template calculation into a set of accumulated sub-calculations. Splitting the original formula into sub-calculations can make the data access of the template calculation uniform, thereby balancing the resource usage between registers and memory. Figure 5 In the retiming example shown, before optimization, each calculation needs to read from the input array 7 times and write back to the output array once. After optimization, each calculation needs to read from the input array 5 times and write back to the output array 3 times. Since less data is read, the retiming code can achieve less register occupancy. Due to the associative and distributive laws of operators, the same calculation can be split in many ways, so there are many ways to implement retiming.

[0087] In order to achieve automatic tuning, the present invention adopts a set of automatic retiming strategies: it is observed that stream processing itself has the characteristic of iterative execution in a single dimension. For a given template calculation statement, when stream processing is enabled along the K dimension, the K dimension is retimed. The program will check whether the sub-calculation formulas on both sides of the equal sign can be added or subtracted by a constant at the same time, so that the change of the formula on the right side of the equal sign in this dimension is 0, and then add the changed right formula to the calculation of the corresponding left formula. Figure 6 In the code shown, the statement output[k+1][j][i]+=f*input[k][j][i] is obtained by adding 1 to both output[k][j][i] and f*input[k-1][j][i] in dimension k in the original expression.

[0088] The present invention implements an automatic tuning framework based on the above-mentioned multiple optimization techniques and SYCL programming model. The automatic tuning framework designed and implemented by the present invention aims to determine the optimal parameter settings for a given template calculation by globally exploring the optimization space, and generate the optimized code with the best performance. However, the scale of the overall parameter space is huge. For a data space of size 5123, the parameter space size can reach 43904, and the cost of traversing the search to achieve tuning is huge. Therefore, this framework performs guided sampling in the global space, and then uses the genetic algorithm in traditional machine learning to search.

[0089] The present invention realizes the automatic tuning of template calculation based on the cross-heterogeneous programming model S as a whole. (1) It is implemented based on the SYCL programming model and can be applied to a variety of GPU hardware platforms. (2) It integrates and utilizes a variety of existing template calculation optimization technologies, and based on this, it realizes an automatic tuning framework, which can automatically give the best optimization technology combination for a given template operator. (3) It uses a pre-set tuning strategy to screen the parameter population to be searched, and combines the genetic algorithm to realize the search of the population, which solves the problem of high traversal search overhead time, can shorten the search time, and improve the search accuracy.

[0090] After actual experiments and comparison with some related works, the present invention has achieved good results in optimizing the template operator on NVIDIA GPU and AMD GPU platforms, and is better than some related tuning works. On NVIDIA A100, the tuning results of the present invention are 1.22 times faster than artimes on average, and 1.88 times faster than Halide on average; on AMD MI210, the tuning results of the present invention achieve a speedup ratio of 1.65 compared to Halide.

[0091] This patent invents an automatic tuning framework for template calculations based on the cross-heterogeneous programming model SYCL. The framework can generate the best optimization technology combination and parameter settings for a given template operator, which can significantly shorten the time consumed by template calculations and is applicable to multiple hardware platforms. The framework consists of multiple templates.

[0092] S1: The template calculation mode is expressed in pseudo code in the shape file. The data range size and specific algorithm of the template operator need to be given.

[0093] S2: The controller unit 20 reads the shape file, obtains some basic information of the template operator to be calculated this time, and generates some specific codes to obtain some more detailed execution information. In addition, some basic information of the hardware platform where the current tuning is located is obtained through some hardware platform-specific methods.

[0094] S3: The controller unit 20 provides the tuning strategy unit 30 with the information required for tuning. The tuning strategy unit 30 generates a parameter population using the tuning information and the strategy set in advance in the template. The parameter population is then passed to the search algorithm unit 40.

[0095] S4: The search algorithm unit 40 uses a genetic algorithm to search the parameter population passed in by the tuning strategy unit 30, and performs multiple iterations of the search until a convergence condition is reached, and finally obtains an optimal optimization parameter setting.

[0096] S5: Output the best optimization parameter setting, and use the setting to generate code using the code generation unit 10 to obtain the best optimization code

[0097] The step S2 specifically includes:

[0098] S21: Define tuning information parameters, including the order of the template, the recommended setting of unroll parameters (the unroll parameter refers to the number of points merged along each dimension of a single thread in the Merging method), prefer unroll factor, the corresponding number of registers per thread under each unroll parameter, register occupancy for unroll, the maximum number of registers occupied by a single thread block, the maximum size of shared memory occupied by a single thread block, and the range of thread block size allowed to be set.

[0099] S22: Read the shape file describing the template operator, and determine the order according to the maximum dimension length involved in the algorithm.

[0100] S23: adopting a series of optimization parameter settings that have been set in advance and cover most of the optional unroll parameters, calling the code generation unit 10 to generate corresponding code and adding the above-mentioned specific compilation options for compilation, extracting the specific value of register per thread from the output of the compiled terminal, and then adding it and the unroll parameter to the array representing registeroccupancy for unroll.

[0101] S24: With the help of the CUDA Occupancy Calculator tool officially provided by Nvidia (this tool can give the impact of threads per block, register perthread and shared memory per block on warp occupancy according to the Compute Capability version of the provided Nvidia GPU device) and the register occupancy for unroll array obtained in the above steps, select several sets of parameters with the highest warp occupancy and values ​​not equal to 1 as prefer unroll factor.

[0102] S25: In the results given by the CUDA Occupancy Calculator tool, several specific threads perblock can achieve the highest warp occupancy. Set the minimum of these values ​​to the minimum of the range of blocksize, and set the maximum of these values ​​to the maximum of the range of blocksize.

[0103] S26: In the Nvidia GPU device, the values ​​of the maximum number of register and the maximum size of shared memory are obtained by executing the deviceQuery program provided in the CUDA installation directory and searching the relevant fields.

[0104] S27: After completing the acquisition of the tuning information parameters, the controller unit 20 starts the tuning strategy unit 30 in the form of a function call and passes in the tuning information parameters.

[0105] The step S3 specifically includes:

[0106] S31: Generate code generation parameters step by step and fill them into the array representing the parameter population in sequence until the array size meets the requirements. The code generation parameters will be generated in three parts: the optimization method combination part, the block size part, and the unroll parameter part. The generation process will screen the three parts in sequence.

[0107] S32: The selection of optimization method combinations must first meet the following constraints. In addition, the probability of combining the two methods of block processing and stream processing will be given priority, and the retiming method will be enabled only when the order is greater than or equal to 2.

[0108] Optimization methods Constraints Overlapped Tiling - Streaming - Block Merging Cannot be enabled when Cyclic Merging is enabled Cyclic Merging Cannot be enabled when Block Merging is enabled Retiming Only available when Streaming is enabled Prefetching Only available when Streaming is enabled

[0109] S33: Screening of block size: First, the blocks must be limited to powers of 2 to facilitate alignment of grid size and memory size; secondly, the blocks must be within the range of block size to ensure that there is no negative impact on warp occupancy; finally, the size of each block of data cannot exceed the maximum shared memory size to avoid the situation where the shared memory cannot be used normally.

[0110] S34: Screening of the unroll parameter part. First, the probability of setting this part of the parameters to prefer unrollfactor should be increased to maximize the warp occupancy. In addition, by querying register occupancy forunroll, the register per thread value corresponding to the current unroll parameter can be obtained. The product of this value and the block size cannot exceed the maximum number of registers to prevent the occurrence of unexecutable parameters.

[0111] S35: After the filtered parameters are generated, a tuning parameter population represented by an array is obtained, which is input to the search algorithm unit 40 for further search.

[0112] The step S4 specifically includes:

[0113] S41: Read the output of the tuning strategy unit 30 as an initial population, wherein each individual represents an optimized code generation parameter combination.

[0114] S42: Evaluate each individual in the population and calculate its fitness value, that is, the degree of superiority of the solution to the problem. In the present invention, the template will use the individuals in the population as execution parameters of the code generation unit 10 in turn, call the code generation unit 10 to generate the corresponding code and compile and execute it. After the code is executed, the execution time of the template operator will be output, and the template will use the inverse of this time as the fitness of the individual.

[0115] S43: Select a part of individuals from the population as parents, and the individuals with higher fitness have a greater probability of being selected.

[0116] S44: Perform crossover operation on the selected parent individuals to generate new child individuals. In the present invention, the individuals are divided into three parts as described in S31, and different parts are selected from each of the two parent individuals to be spliced ​​to generate new code generation parameters to generate child individuals.

[0117] S45: Perform mutation operation on the offspring individuals after crossover to increase the diversity of the population. The mutation operation randomly changes certain gene values ​​of the individuals, simulating the gene mutation process in biological inheritance. In the present invention, the mutation operation is achieved by randomly changing the parameter values ​​in the three parts.

[0118] S46: The mutated offspring individuals and the parent individuals form a new population. Check whether the stopping condition is met, that is, the maximum number of iterations is reached. If the stopping condition is met, the optimal optimization parameters are output to stop the algorithm, and return to S42 to continue the execution.

[0119] A specific embodiment is given below to describe the technical solution of the present invention.

[0120] Assume that a three-dimensional seven-point (J3d7PT) template is calculated on NVIDIA A100. The calculation formula is:

[0121] out[k][j][i]=0.12*in[k-1][j][i]+0.13*in[k+1][j][i]+0.14*in[k][j-1][i]+

[0122] 0.15*in[k][j+1][i]+0.16*in[k][j][i-1]+0.17*in[k][j][i+1]+0.18*in[k][j][i]

[0123] The total grid size for calculation is 512*512*512. The implementation steps are as follows:

[0124] S1. Express the J3d7PT template calculation in pseudocode in the shape file, define the calculation formula as shown above, and determine that the sizes of the three dimensions of the grid K, J, and I are all 512.

[0125] S2. The controller unit 20 reads the shape file, obtains basic information of the J3d7PT template, generates code and executes it to obtain more detailed information. In addition, by executing deviceQuery, some basic information of NVIDIA A100 is obtained.

[0126] S3. The tuning strategy unit 30 generates a parameter population using the tuning information and the strategy set in advance in the template. The parameter population is then passed to the search algorithm unit 40.

[0127] S4. The search algorithm unit 40 uses a genetic algorithm to search the parameter population passed in by the tuning strategy unit 30, iterates the search until a convergence condition is reached, and finally obtains an optimal optimization parameter setting.

[0128] S5. Output the best optimization parameter setting, and use the setting to generate code using the code generation unit 10 to obtain the best optimization code

[0129] The step S2 specifically includes:

[0130] S21: Define tuning information parameters, including the order of the template, the recommended setting of unroll parameters (the unroll parameter refers to the number of points merged along each dimension of a single thread in the Merging method), prefer unroll factor, the corresponding number of registers per thread under each unroll parameter, register occupancy for unroll, the maximum number of registers occupied by a single thread block, the maximum size of shared memory occupied by a single thread block, and the range of thread block size allowed to be set.

[0131] S22: Read the shape file describing the template operator and determine that order is 1.

[0132] S23: Using the pre-set parameter settings, unrollX, Y, Z are respectively [1, 2, 4, 8], calling the code generation unit 10 to generate code with the above unroll optimization parameters added, extracting the specific value of register perthread from the output of the compiled terminal, and then adding it and the unroll parameter to the array representing register occupancy for unroll.

[0133] S24: Use the register occupancy for unroll array obtained in the above step to compare it with the register occupancy for unroll array obtained by the CUDAOccupancy Calculator tool. Figure 6 Based on the given information, select several sets of parameters with the highest Warp occupancy and values ​​not equal to 1 as the prefer unroll factor.

[0134] S25: Compare the CUDA Occupancy Calculator tool such as Figure 7 Given the information, select 32 as the minimum value of the range of blocksize and select 512 as the maximum value of the range of blocksize.

[0135] S26: execute the deviceQuery program provided in the CUDA installation directory to query and search related fields to obtain the values ​​of maxnumber of register and max size of share memory.

[0136] S27: Start the tuning strategy unit 30 in the form of calling a function, and pass in the tuning information parameters obtained above.

[0137] The step S3 specifically includes:

[0138] S31: Generate code generation parameters sequentially and fill them into an array representing a parameter population in sequence until the array size meets the requirement.

[0139] S32: When generating the optimization method combination parameters, the following constraints are set. The probability of the combination of the two methods of block processing and stream processing is set to 70%. Since the order is 1, the retiming method is disabled.

[0140]

[0141]

[0142] S33: When generating the block size parameter, only powers of 2 can be generated, and the value is between 32 and 512. The product of the block size and the data type size cannot exceed the maximum shared memory size.

[0143] S34. When generating unroll parameters, 70% of the parameters will be selected from the prefer unroll factor. The product of the register per thread value corresponding to the current unroll parameter and the block size cannot exceed the maximum number of registers. The parameters that exceed the value need to be discarded.

[0144] S35. After the size of the tuning parameter population reaches the requirement, it is input to the search algorithm unit 40 for parameter search.

[0145] The step S4 specifically includes:

[0146] S41: Read the output of the tuning strategy unit 30 as the initial population, and each individual in the population is a parameter of a generated code.

[0147] S42: For each individual in the population, use it as the execution parameter of the code generation unit 10 in turn, and generate code for compilation and execution, and use the inverse of the execution time output after execution as the fitness of the individual.

[0148] S43: Select the individuals with the top 50% fitness in the population as parents.

[0149] S44: Randomly select different parameter parts from two parent individuals and splice them to generate a certain number of child individuals.

[0150] S45: Perform a mutation operation at a mutation rate of 0.05, and randomly change one of the three parameter components of the individual during the mutation.

[0151] S46: The mutated offspring individuals and the parent individuals form a new population. If the number of iterations reaches 20, the algorithm stops and the individual with the highest fitness is output as the optimal optimization parameter. Otherwise, return to S42 to continue the steps.

[0152] The template optimization method based on the cross-heterogeneous programming model provided by the embodiment of the present invention includes: obtaining tuning requirement parameters; generating tuning parameter populations according to tuning strategies and tuning requirement information; searching the tuning parameter populations according to genetic algorithms to generate optimization parameter settings; and automatically generating optimization codes according to template operators and optimization parameter settings. Thus, the present invention can realize automatic tuning of template calculations based on the cross-heterogeneous programming model, not only achieving good template calculation optimization effects for different hardware platforms, but also finding the most suitable optimization technology combination for templates of different modes.

[0153] It should be noted that the template optimization method based on a cross-heterogeneous programming model provided in the embodiment of the present invention can be executed by an electronic device, a device, or a control module in the device for executing the template optimization method based on a cross-heterogeneous programming model. In the embodiment of the present invention, the template optimization device based on a cross-heterogeneous programming model is taken as an example to execute the template optimization method based on a cross-heterogeneous programming model to illustrate the template optimization device based on a cross-heterogeneous programming model provided in the embodiment of the present invention.

[0154] The template optimization device based on cross-heterogeneous programming model provided by the embodiment of the present invention can realize Figures 1 to 6 To avoid repetition, the various processes implemented in the embodiment of the template optimization method based on cross-heterogeneous programming models are not described here.

[0155] Figure 6 1 is a schematic diagram of the structure of a template optimization device based on a cross-heterogeneous programming model provided in the first embodiment of the present invention. The code finally generated is based on the cross-heterogeneous programming model. The cross-heterogeneous programming model is preferably a SYCL programming model. The device 100 at least includes a controller unit 10, a tuning strategy unit 20, a search algorithm unit 30 and a code generation unit 40. These units are connected together through interfaces to work together to ensure the smooth progress of automatic tuning work, wherein:

[0156] The controller unit 10 is used to obtain the tuning requirement parameters and send the tuning requirement parameters to the tuning strategy unit 20. Preferably, the controller unit 10 is used to execute the overall tuning process, coordinate the operation between the templates, and obtain some auxiliary information that is helpful for tuning. This information involves both hardware information and software information that changes with the program. The controller unit 20 transmits the auxiliary information to the tuning strategy unit 30 to assist in the selection of the tuning parameter population, and then sequentially executes the remaining parts of the tuning framework until the final program is completed.

[0157] The tuning strategy unit 20 is used to directionally generate tuning parameter populations according to the predetermined tuning strategy and tuning requirement information, and send the tuning parameter populations to the search algorithm unit 30. Preferably, the tuning strategy unit 30 will receive the auxiliary information transmitted by the controller unit 20, and use the built-in tuning strategy to directionally generate some initial tuning parameter populations that may have better performance, thereby reducing the search time of the tuning parameters and improving the tuning efficiency.

[0158] The search algorithm unit 30 is used to search the tuning parameter population according to a predetermined genetic algorithm, perform multiple iterations of the search until a convergence condition is reached, generate corresponding optimization parameter settings, and send the optimization parameter settings to the code generation unit 40. Preferably, the search algorithm unit 30 is implemented using a genetic algorithm, uses the initial tuning parameter population passed in by the tuning strategy unit 30, applies the genetic algorithm to it for search, and obtains the best optimization parameter combination after the search converges, and sends it to the controller unit 20 for generating the best optimization code.

[0159] The code generation unit 40 is used to automatically generate optimization code according to a predetermined template operator and optimization parameter settings. Preferably, the code generation unit 40 is used to generate code that uses a specified optimization method and parameter settings, conforms to a specified template calculation mode, and ensures calculation correctness according to a shape file (shape.txt) and an input optimization parameter setting. The controller unit 20 obtains necessary information and the search algorithm can judge the quality of parameters through executable code, which requires the participation of the code generation unit 10, which is an important part of the smooth execution of the tuning framework.

[0160] Figure 7 1 is a schematic diagram of the structure of a template optimization device based on a cross-heterogeneous programming model provided in Embodiment 2 of the present invention. The device 100 at least includes a controller unit 10, a tuning strategy unit 20, a search algorithm unit 30, and a code generation unit 40, wherein:

[0161] The controller unit 10 is used to obtain the tuning requirement parameters and send the tuning requirement parameters to the tuning strategy unit 20. Preferably, the controller unit 10 further includes a parameter definition subunit 11 and a parameter acquisition subunit 12, wherein:

[0162] The definition subunit 11 is used to define the tuning requirement parameters, which at least include the data range and algorithm of the template operator;

[0163] The acquisition subunit 12 is used to read the shape file describing the template operator to obtain various values ​​corresponding to the tuning requirement parameters.

[0164] The tuning strategy unit 20 is used to directionally generate a tuning parameter population according to a predetermined tuning strategy and tuning requirement information, and send the tuning parameter population to the search algorithm unit 30. Preferably, the tuning strategy unit 20 further includes a parameter screening subunit 21 and a parameter generating subunit 22; wherein:

[0165] According to the tuning strategy and tuning requirement information, the code generation parameters are generated step by step. The code generation parameters are divided into three parts: optimization method combination part, block size part, and expansion parameter part, including:

[0166] (1) Screening the optimization method combination part, the optimization method includes blocking, stream processing, retiming and / or prefetching. Preferably, the optimization method needs to meet the predetermined constraint conditions, and give priority to improving the probability of combining the blocking and stream processing methods, and retiming is enabled only when the order of the template operator is greater than or equal to 2.

[0167] (2) Screening the block size: Preferably, the blocks should be limited to a power of 2, and the blocks should be within the block number range, and the data size of each block of the blocks should not exceed the maximum shared memory size.

[0168] (3) Screening the expansion parameter part. Preferably, the probability of setting the expansion parameter part to the preferred loop expansion factor is first increased, and the register value of each thread corresponding to the current expansion parameter can be obtained by querying the register occupancy of the expansion operation, and the product of the register value and the number of blocks cannot exceed the maximum register value.

[0169] After the code generation parameters are generated, they are filled into the array of the tuning parameter population in sequence.

[0170] The search algorithm unit 30 is used to search the tuning parameter population according to a predetermined genetic algorithm, perform multiple iterations of the search until a convergence condition is reached, generate corresponding optimization parameter settings, and send the optimization parameter settings to the code generation unit 40. Preferably, the search algorithm unit 30 further includes:

[0171] A reading subunit 31 is used to read a tuning parameter population, wherein each individual represents an optimized code generation parameter combination;

[0172] A calculation subunit 32 is used to evaluate each individual in the tuning parameter population and calculate the fitness value corresponding to each individual;

[0173] A selection subunit 33 is used to select a part of individuals from the tuning parameter population as parent individuals, and individuals with higher fitness have a greater probability of being selected;

[0174] A crossover subunit 33 is used to perform a crossover operation on the selected parent individuals to generate new child individuals;

[0175] The mutation subunit 35 is used to perform mutation operation on the offspring individuals after the crossover;

[0176] The optimization subunit 36 ​​combines the mutated offspring individuals with the parent individuals into a new population, generates corresponding optimization parameter settings, and repeats the above actions until the maximum number of iterations is reached.

[0177] The code generation unit 40 is used to automatically generate optimized code according to a predetermined template operator and optimization parameter settings.

[0178] The template optimization device based on the cross-heterogeneous programming model provided by the embodiment of the present invention and the template optimization method based on the cross-heterogeneous programming model provided by the embodiment of the present invention include: a controller unit for obtaining tuning requirement parameters; a tuning strategy unit for directionally generating tuning parameter populations according to tuning strategies and tuning requirement information; a search algorithm unit for searching the tuning parameter population according to a genetic algorithm, performing multiple iterations of the search until the convergence condition is reached, and generating corresponding optimization parameter settings; a code generation unit for automatically generating optimization code according to template operators and optimization parameter settings. Thus, the present invention can realize automatic tuning of template calculations based on the cross-heterogeneous programming model, not only can it achieve better template calculation optimization effects for different hardware platforms, but it can also find the most suitable combination of optimization technologies for templates of different modes.

[0179] The present invention also provides a storage medium for storing Figure 1 to Figure 5 Any of the computer programs of the template optimization method based on cross-heterogeneous programming models. For example, computer program instructions, when executed by a computer, can call or provide the method and / or technical solution according to the present invention through the operation of the computer, and can achieve the same technical effect. To avoid repetition, it will not be repeated here. The program instructions for calling the method of the present invention may be stored in a fixed or removable storage medium, and / or transmitted through a data stream in a broadcast or other signal-bearing medium and / or stored in a storage medium of a computer device running according to the program instructions.

[0180] According to one embodiment of the present invention, the present invention also provides a Figure 8The electronic device 400 shown, the electronic device 400 optionally includes a storage medium 200 for storing a computer program and a processor 300 for executing the computer program, wherein when the computer program is executed by the processor 300, any of the above-mentioned template optimization methods based on a cross-heterogeneous programming model is implemented, triggering the electronic device 400 to execute the methods and / or technical solutions based on the aforementioned multiple embodiments, and can achieve the same technical effect, to avoid repetition, it is not repeated here. It should be noted that the electronic devices in the embodiments of the present invention include mobile electronic devices and non-mobile electronic devices. Exemplarily, the mobile electronic device can be a mobile phone, a tablet computer, a laptop computer, a PDA, an in-vehicle electronic device, a wearable device, a super mobile personal computer, a netbook or a personal digital assistant, etc., and the non-mobile electronic device can be a server, a network attached storage (Network Attached Storage, NAS), a personal computer (personal computer, PC), a television (television, TV), a teller machine or a self-service machine, etc., which is not specifically limited in the embodiments of the present invention.

[0181] It should be noted that the present invention can be implemented in software and / or a combination of software and hardware, for example, can be implemented using an application specific integrated circuit (ASIC), a general purpose computer or any other similar hardware device. In one embodiment, the software program of the present invention can be executed by a processor to implement the above steps or functions. Similarly, the software program of the present invention (including related data structures) can be stored in a computer-readable recording medium, for example, a RAM memory, a magnetic or optical drive or a floppy disk and the like. In addition, some steps or functions of the present invention can be implemented using hardware, for example, as a circuit that cooperates with a processor to perform each step or function.

[0182] The present invention can be implemented on a computer as a computer-implemented method, or implemented in dedicated hardware, or implemented in a combination of the two. The executable code or part thereof for the method according to the present invention can be stored on a computer program product. Examples of computer program products include memory devices, optical storage devices, integrated circuits, servers, online software, etc. Optionally, the computer program product includes a non-temporary program code component stored on a computer-readable medium so as to perform the method according to the present invention when the program product is executed on a computer.

[0183] In an alternative embodiment, the computer program comprises computer program code means adapted to perform all the steps of the method according to the invention when the computer program is run on a computer. Optionally, the computer program is embodied on a computer readable medium.

[0184] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the method and device in the embodiment of the present invention is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0185] Of course, the present invention may have many other embodiments. Without departing from the spirit and essence of the present invention, those skilled in the art may make various corresponding changes and modifications based on the present invention, but these corresponding changes and modifications should all fall within the scope of protection of the claims attached to the present invention.

Claims

1. A template optimization method based on a cross-heterogeneous programming model, characterized in that: include: Obtain the required tuning parameters; Directively generating a tuning parameter population according to a predetermined tuning strategy and the tuning requirement information; Searching the tuning parameter population according to a predetermined genetic algorithm, iterating the search multiple times until a convergence condition is reached, and generating corresponding optimization parameter settings; According to the predetermined template operator and the optimization parameter settings, the optimization code is automatically generated.

2. The template optimization method based on cross-heterogeneous programming model according to claim 1 is characterized in that: The step of obtaining tuning information parameters comprises: Defining the tuning requirement parameters, wherein the tuning requirement parameters at least include the data range and algorithm of the template operator; The shape file describing the template operator is read to obtain the respective values ​​corresponding to the tuning requirement parameters.

3. The template optimization method based on cross-heterogeneous programming model according to claim 1 is characterized in that: The step of directionally generating a tuning parameter population according to a predetermined tuning strategy and the tuning requirement information comprises: According to the tuning strategy and the tuning requirement information, code generation parameters are generated step by step in sequence. The code generation parameters are generated in three parts: optimization method combination part, block size part, and expansion parameter part, including: Screening the optimization method combination part, wherein the optimization method includes blocking, stream processing, retiming and / or prefetching; Screening the block size portion; Screening the expansion parameter part; After the code generation parameters are generated, they are sequentially filled into the array of the tuning parameter population.

4. The template optimization method based on cross-heterogeneous programming model according to claim 2 is characterized in that: The step of screening the optimization method combination part comprises: First, the optimization method needs to meet the predetermined constraints and give priority to increasing the probability of combining the two methods of blocking and streaming processing. Retiming is only enabled when the order of the template operator is greater than or equal to 2.

5. The template optimization method based on cross-heterogeneous programming model according to claim 1, characterized in that: The step of screening the block size portion comprises: First, the blocks should be limited to powers of 2, and the blocks should be within the range of the number of blocks, and the size of each block of data cannot exceed the maximum shared memory size.

6. The template optimization method based on cross-heterogeneous programming model according to claim 1, characterized in that: The step of screening the expansion parameter part comprises: Firstly, the probability of setting the expansion parameter part to the preferred loop expansion factor is increased, and the register value owned by each thread corresponding to the current expansion parameter can be obtained by querying the register occupancy of the expansion operation, and the product of the register value and the number of blocks cannot exceed the maximum register value.

7. The template optimization method based on cross-heterogeneous programming models according to claim 1, characterized in that: The step of searching the tuning parameter population according to a predetermined genetic algorithm, iterating the search multiple times until a convergence condition is reached, and generating corresponding optimization parameter settings comprises: Reading the tuning parameter population, wherein each individual represents an optimized code generation parameter combination; Evaluate each individual in the tuning parameter population and calculate the fitness value corresponding to each individual; Selecting a portion of individuals from the tuning parameter population as parent individuals, and individuals with higher fitness have a greater probability of being selected; Performing a crossover operation on the selected parent individuals to generate new offspring individuals; Performing a mutation operation on the offspring individuals after the crossover; The mutated offspring individuals and the parent individuals form a new population, and the corresponding optimization parameter settings are generated; Repeat the above steps until the maximum number of iterations is reached.

8. A template optimization device based on a cross-heterogeneous programming model constructed based on the method described in any one of claims 1 to 7, characterized in that: The device at least includes a controller unit, a tuning strategy unit, a search algorithm unit and a code generation unit; The controller unit is used to obtain the tuning requirement parameters and send the tuning requirement parameters to the tuning strategy unit; The tuning strategy unit is used to directionally generate a tuning parameter population according to a predetermined tuning strategy and the tuning requirement information, and send the tuning parameter population to the search algorithm unit; The search algorithm unit is used to search the tuning parameter population according to a predetermined genetic algorithm, perform multiple iterations of the search until a convergence condition is reached, generate corresponding optimization parameter settings, and send the optimization parameter settings to the code generation unit; The code generation unit is used to automatically generate optimized code according to the predetermined template operator and the optimization parameter setting.

9. A storage medium, characterized in that: Used to store a computer program for executing the template optimization method based on a cross-heterogeneous programming model according to any one of claims 1 to 7.

10. An electronic device comprising a storage medium, a processor, and a computer program stored in the storage medium and executable on the processor, characterized in that: When the processor executes the computer program, the template optimization method based on a cross-heterogeneous programming model according to any one of claims 1 to 7 is implemented.

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