Memory management method, device, equipment, storage medium and computer program product

Abstract

The present disclosure is about a memory management method, apparatus, device, storage medium and computer program product, the method comprising: obtaining first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information at least comprises: the starting address of the memory, the size of the memory and the preset filling data in the protection zone of the memory; based on the starting address of the memory, the size of the memory and the preset filling data in the protection zone in the first memory information, the reading, writing and releasing process of the memory are managed. Through this method, the accuracy and comprehensiveness of memory management can be improved, and the possibility of reduced operating efficiency of devices (including host devices and heterogeneous devices) can be reduced.

Description

Technical Field

[0001] The present disclosure relates to the field of heterogeneous device technology, and in particular to a memory management method, apparatus, device, storage medium, and computer program product. Background Art

[0002] With the rapid development of computing technology, heterogeneous computing systems have become widely used in the field of high-performance computing. In a heterogeneous computing system, heterogeneous devices work in collaboration with the host. After the host requests and allocates memory to a heterogeneous device, the host and heterogeneous devices share this memory for read and write operations. However, since the read and write sizes are arbitrary, memory overflows, such as out-of-bounds reads and writes, are prone to occur, thus affecting the computing efficiency of heterogeneous computing systems. While current host-side virtual memory protection mechanisms and combined hardware and software mechanisms can provide some protection for memory, they are not suitable for scenarios where heterogeneous devices share memory. Furthermore, hardware implementations are costly, have poor compatibility, and are difficult to scale. Therefore, managing the memory of heterogeneous devices to minimize the impact on the computing efficiency of heterogeneous computing systems has become a pressing issue. Summary of the Invention

[0003] To overcome the problems existing in the related art, the present disclosure provides a memory management method, apparatus, device, storage medium and computer program product.

[0004] According to a first aspect of an embodiment of the present disclosure, a memory management method is provided, the method comprising:

[0005] Obtaining first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information includes at least: a starting address of the memory, a size of the memory, and preset filling data in a protection zone of the memory;

[0006] Based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone, the reading, writing and releasing processes of the memory are managed.

[0007] In some embodiments, the method further comprises:

[0008] In response to detecting a read or write instruction to the memory, obtaining current fill data in a protected area of ​​the memory and read or write parameters for reading or writing the memory; wherein the read or write parameters are used to indicate a read or write address range;

[0009] The managing the reading and writing process of the memory based on the starting address of the memory in the first memory information, the size of the memory, and the preset filling data in the protection zone includes:

[0010] In response to the current fill data being the preset fill data and the read and write address range indicated in the read and write parameters being within the address range of the memory, read and write operations are performed on the memory based on the read and write parameters; wherein the address range of the memory is determined based on the starting address of the memory and the size of the memory.

[0011] In some embodiments, the method further comprises:

[0012] In response to detecting a release instruction for the memory, obtaining current fill data in the protected area of ​​the memory and a release parameter for releasing the memory; wherein the release parameter is used to indicate a starting address for releasing the memory;

[0013] The managing the release process of the memory based on the starting address of the memory in the first memory information, the size of the memory, and the preset filling data in the protection zone includes:

[0014] In response to the current filling data being the preset filling data, and the starting address for releasing the memory indicated in the release parameter being the starting address of the memory, a release operation is performed on the memory based on the release parameter.

[0015] In some embodiments, the first memory information further includes a validity identifier for representing a release status of the memory; and the managing the reading, writing, and release processes of the memory based on the starting address of the memory, the size of the memory, and the preset padding data in the protection zone in the first memory information includes:

[0016] In response to the validity identifier of the first memory information of the memory indicating that the memory has not been released, the reading, writing and releasing processes of the memory are managed based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0017] In some embodiments, the first memory information further includes a first information check code; and the method further includes:

[0018] In response to detecting an operation on a memory adjacent to the memory storing the first memory information, acquiring second memory information of the memory;

[0019] Determining a second information check code based on the second memory information;

[0020] The managing the reading, writing, and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory, and the preset filling data in the protection zone includes:

[0021] In response to the second information check code being the same as the first information check code, the reading, writing and releasing processes of the memory are managed based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0022] In some embodiments, the method further comprises:

[0023] Get the environment variable indicating the target memory to be managed;

[0024] The obtaining of first memory information recorded when applying for memory in the heterogeneous device includes:

[0025] Acquire first memory information recorded when applying for the target memory in the heterogeneous device.

[0026] In some embodiments, the protection zone of the memory includes a first protection zone and a second protection zone, the end address of the first protection zone is the starting address of the memory, the starting address of the second protection zone is the end address of the memory, and the preset fill data of the first protection zone is different from the preset fill data of the second protection zone.

[0027] According to a second aspect of an embodiment of the present disclosure, a memory management device is provided, the device comprising:

[0028] A first acquisition module is configured to acquire first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information includes at least: a starting address of the memory, a size of the memory, and preset fill data in a protected area of ​​the memory;

[0029] The management module is configured to manage the reading, writing and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0030] In some embodiments, the apparatus further comprises:

[0031] a second acquisition module configured to, in response to detecting a read or write instruction to the memory, acquire current fill data in the protected area of ​​the memory and read or write parameters for reading or writing the memory; wherein the read or write parameters are used to indicate a read or write address range;

[0032] The management module is further configured to perform read and write operations on the memory based on the read and write parameters in response to the current fill data being the preset fill data and the read and write address range indicated in the read and write parameters being within the address range of the memory; wherein the address range of the memory is determined based on the starting address of the memory and the size of the memory.

[0033] In some embodiments, the apparatus further comprises:

[0034] a third acquisition module configured to, in response to detecting a release instruction for the memory, acquire current fill data in the protected area of ​​the memory and a release parameter for releasing the memory; wherein the release parameter is used to indicate a starting address for releasing the memory;

[0035] The management module is further configured to release the memory based on the release parameter in response to the current filling data being the preset filling data and the starting address for releasing the memory indicated in the release parameter being the starting address of the memory.

[0036] In some embodiments, the first memory information also includes a validity identifier for characterizing the release status of the memory; the management module is further configured to manage the reading, writing and release processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone in response to the validity identifier of the first memory information of the memory characterizing that the memory has not been released.

[0037] In some embodiments, the first memory information further includes a first information check code; and the apparatus further includes:

[0038] a fourth acquiring module, configured to acquire second memory information of the memory in response to detecting an operation on a memory adjacent to the memory storing the first memory information;

[0039] a determination module configured to determine a second information check code based on the second memory information;

[0040] The management module is also configured to manage the reading, writing and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone in response to the second information verification code being the same as the first information verification code.

[0041] In some embodiments, the apparatus further comprises:

[0042] a fifth acquisition module configured to acquire an environment variable indicating a target memory to be managed;

[0043] The first acquisition module is configured to acquire first memory information recorded when applying for the target memory in the heterogeneous device.

[0044] In some embodiments, the protection zone of the memory includes a first protection zone and a second protection zone, the end address of the first protection zone is the starting address of the memory, the starting address of the second protection zone is the end address of the memory, and the preset fill data of the first protection zone is different from the preset fill data of the second protection zone.

[0045] According to a third aspect of an embodiment of the present disclosure, there is provided an electronic device, including:

[0046] processor;

[0047] memory for storing computer programs or instructions;

[0048] The processor executes the computer program or instructions to implement the steps of the memory management method described in the first aspect above.

[0049] According to a fourth aspect of an embodiment of the present disclosure, a non-temporary computer-readable storage medium is provided, which stores a computer program or instructions. When the computer program or instructions in the storage medium are executed by a processor, the steps of the memory management method described in the first aspect above are implemented.

[0050] According to a fifth aspect of an embodiment of the present disclosure, a computer program product is provided, comprising a computer program or instructions, which, when executed by a processor, implement the steps of the memory management method described in the first aspect above.

[0051] The technical solutions provided by the embodiments of the present disclosure may have the following beneficial effects:

[0052] In an embodiment of the present disclosure, first memory information recorded when applying for memory in a heterogeneous device is obtained, and the reading, writing, and releasing processes of the memory are managed based on the starting address of the memory, the size of the memory, and the preset fill data in the protection zone in the first memory information. On the one hand, the first memory information recorded at the time of application not only helps to manage the subsequent memory usage process, but also can achieve management of the entire process, which can improve the accuracy and comprehensiveness of memory management and reduce the possibility of a decrease in the operating efficiency of devices (including host devices and heterogeneous devices); on the other hand, in an embodiment of the present disclosure, the first memory information of the memory when applying for memory in a heterogeneous device is recorded, so that the host device can quickly locate the unapplied free memory area on the heterogeneous device based on the first memory information, thereby applying for the free memory area subsequently to improve the effectiveness of the memory application of the heterogeneous device.

[0053] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0054] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0055] Figure 1 The figure is a flowchart showing a memory management method according to an exemplary embodiment.

[0056] Figure 2 The present invention is a schematic diagram showing the principle of applying for and accessing memory according to an exemplary embodiment.

[0057] Figure 3 The figure is a schematic diagram showing a memory and a memory protection zone according to an exemplary embodiment.

[0058] Figure 4 The figure is a schematic diagram showing memory information according to an exemplary embodiment.

[0059] Figure 5 The figure is a flowchart of a memory management method according to an exemplary embodiment.

[0060] Figure 6 The figure is a flowchart showing a memory read and write management process according to an exemplary embodiment.

[0061] Figure 7 The figure is a block diagram of a memory management device according to an exemplary embodiment.

[0062] Figure 8 The figure is a structural block diagram of an electronic device according to an exemplary embodiment. DETAILED DESCRIPTION

[0063] Exemplary embodiments will be described in detail herein, with examples illustrated in the accompanying drawings. In the following description, when referring to the drawings, identical numerals in different figures represent identical or similar elements, unless otherwise indicated. The embodiments described in the following exemplary embodiments are not intended to represent all possible embodiments consistent with the present disclosure. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the present disclosure, as detailed in the appended claims.

[0064] Figure 1 FIG. 1 is a flow chart showing a memory management method according to an exemplary embodiment. Figure 1 As shown, the method mainly includes the following steps:

[0065] S11. Obtaining first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information includes at least: a starting address of the memory, a size of the memory, and preset fill data in a protected area of ​​the memory;

[0066] S12: Based on the starting address of the memory in the first memory information, the size of the memory, and the preset filling data in the protection zone, manage the reading, writing, and releasing processes of the memory.

[0067] It should be noted that the application scenario of the embodiment of the present disclosure is a heterogeneous computing system, wherein a heterogeneous computing system refers to a system that uses multiple different types of processors or computing devices and works together to achieve a more efficient computing purpose. The heterogeneous computing system includes a host device and a heterogeneous device, such as a host device and a heterogeneous device, or a host device and multiple heterogeneous devices. The host device is connected to the heterogeneous device via a high-speed serial computer expansion bus standard (Peripheral Component Interconnect express, PCIe). The host device is typically an electronic device with a central processing unit (CPU), such as a personal computer with a CPU, a smartphone, a tablet computer, a user device, a vehicle-mounted device, a server, etc. The host device is provided with a multi-tasking application and a heterogeneous device management driver, wherein the multi-tasking application can be a computationally intensive mathematical library, or an application based on an open multi-processing (Open Multi-Processing, OpenMp) application program interface to offload tasks to an accelerator card, or an application with multi-tasking characteristics such as a search system, but the host device resources cannot meet the performance requirements. Heterogeneous devices can be various types of computing devices or processing units, such as data processing units (DPUs), graphics processing units (GPUs), field-programmable gate arrays (FPGAs), etc. Heterogeneous devices can also be heterogeneous accelerator cards, such as software define infrastructure (SDI) cards.

[0068] In the embodiments of the present disclosure, the memory management method can be applied to the host device side to manage the memory of each heterogeneous device, and can also be applied to the heterogeneous device side to manage the memory of the heterogeneous device itself. The embodiments of the present disclosure are described using the host device as an example.

[0069] In step S11, the host device obtains first memory information recorded when requesting memory from the heterogeneous device. When the task request received by the host device indicates that the task needs to be processed in the heterogeneous device, or when the host device's local computing resources are insufficient and the computing resources of the heterogeneous device need to be utilized, the host device requests memory from the heterogeneous device connected to the host device. This memory is shared memory between the host device and the heterogeneous device.

[0070] In some embodiments, when the heterogeneous device is a GPU, and the task request received by the host device is image processing, and image data or computing data needs to be sent to the GPU for processing, the host device needs to apply for memory in the GPU and store the received image data in the applied memory. The GPU then obtains the image data from the memory and processes it.

[0071] In other embodiments, when the local computing resources of the host device are insufficient, in order to improve data processing efficiency, the host device needs to request memory from the connected heterogeneous device so that the host device and the heterogeneous device can process data in parallel.

[0072] In other embodiments, when data needs to be transmitted between the host device and a connected heterogeneous device, the host device needs to request memory from the heterogeneous device so that the host device and the heterogeneous device can perform data transmission based on the requested memory.

[0073] In other embodiments, there are multiple heterogeneous devices. For some tasks, multiple heterogeneous devices may need to work together. The host device can apply for memory on each heterogeneous device that is working together so as to share data and calculation results between different heterogeneous devices. For example, the host device can transfer the initial data to the memory in heterogeneous device 1. After heterogeneous device 1 completes the processing, it stores the processed data in the memory. The host device reads the processed data from the memory of heterogeneous device 1 and transfers it to the memory of heterogeneous device 2 for processing by heterogeneous device 2. And so on, until the heterogeneous device that performs the final processing on the data completes the processing, the host device reads the final processing result, thereby completing the processing of the data.

[0074] Figure 2 This is a schematic diagram showing a principle of applying for and accessing memory according to an exemplary embodiment. The host device in the embodiment of the present disclosure may apply for and access memory in a heterogeneous device in the following manner: Figure 2 In the way, such as Figure 2As shown, the heterogeneous device is L21. In step S21, the host requests memory. In this step, the host device requests memory from heterogeneous device L21, and the requested memory is L22. In step S22, the host writes input data. In this step, the host device writes the input data to the requested memory L22 of heterogeneous device L21. In step S23, the heterogeneous device reads the input data. In this step, heterogeneous device L21 reads the input data written by the host device in step S22 from the requested memory L22. In step S24, the heterogeneous device reads and writes intermediate results. In this step, heterogeneous device L21 reads the input data written by the host device in step S22 and processes the input data. The process of processing input data by heterogeneous device L21 typically requires multiple processing operations. After each processing operation, heterogeneous device L21 can write the intermediate results to the requested memory L22 for storage and perform further processing based on the intermediate results. In step S25, the heterogeneous device writes the output data. As mentioned above, the heterogeneous device L21 usually needs to process the input data multiple times during the process of processing the input data. When the heterogeneous device L21 completes multiple processing of the input data and obtains the processing result data, in this process, the heterogeneous device L21 writes the processing result data (output data) to the requested memory L22. In step S26, the output data is read sentence by sentence. In this process, the host device reads the processing result data (output data) after the heterogeneous device L21 completes multiple processing of the input data from the requested memory L22. In step S27, the host releases the memory. In this step, after the host device obtains the output data, it indicates that the processing result of the task request has been completed once, and the requested memory L22 needs to be released to reduce the waste of memory resources.

[0075] In an embodiment of the present disclosure, the host device can apply for a memory in its own memory space, so that after the host device obtains the first memory information recorded when applying for memory in the heterogeneous device, the first memory information of the memory can be stored in the host device's own memory space, so that the memory resources of the memory applied for in the heterogeneous device are not occupied.

[0076] In the disclosed embodiment, the first memory information includes at least the starting address of the memory, the size of the memory, and pre-set padding data in the protected area of ​​the memory. The memory size represents the amount of data that the memory can store. Based on the starting address and size of the memory, the ending address of the memory can be determined, thereby defining the range of the memory.

[0077] In the disclosed embodiment, the memory has a protection zone, wherein the memory may have one or two protection zones. The memory protection zone protects preset fill data, wherein the preset fill data may be increasing data, decreasing data, fixed data and the like, and the embodiments that cannot be disclosed are not limited to this. For example, when the preset fill data is increasing data, the data may be filled row by row from the starting address of the protection zone to the ending address of the protection zone, the data value of the starting branch is the smallest, the data value of the ending branch is the largest, and the data values ​​of adjacent rows are continuous. For another example, when the preset fill data is fixed data, the data may be filled row by row from the starting address of the protection zone to the ending address of the protection zone, and the data value of each row is the same. Specifically, the data value may be 0A0A0A0A0 or 050505050.

[0078] In some embodiments, when there is only one protection zone of the memory, the end address of the protection zone is the start address of the memory, or the start address of the protection zone is the end address of the memory.

[0079] In other embodiments, the protection zone of the memory includes a first protection zone and a second protection zone, the end address of the first protection zone is the starting address of the memory, the starting address of the second protection zone is the end address of the memory, and the preset fill data of the first protection zone is different from the preset fill data of the second protection zone.

[0080] In the embodiment of the present disclosure, the memory has two protection zones, namely a first protection zone and a second protection zone, wherein the end address of the first protection zone is the start address of the memory, and the start address of the second protection zone is the end address of the memory. Figure 3 This is a schematic diagram of a memory and memory protection zone according to an exemplary embodiment, wherein the legal memory area L32 is the memory, the protection zone L31 in front of the memory is the first protection zone of the legal memory area L32, and the protection zone L33 behind the memory is the second protection zone of the legal memory area L32.

[0081] In the embodiment of the present disclosure, the preset filling data of the first protection zone is different from the preset filling data of the second protection zone, for example, the preset filling data of the first protection zone is incremental data, and the preset filling data of the second protection zone is decremental data, etc.; for another example, the preset filling data of the first protection zone and the second protection zone are both fixed data, but the fixed data of the first protection zone is different from the fixed data of the second protection zone. Specifically, the preset filling data of the first protection zone can be 0A0A0A0A0, and the preset filling data of the second protection zone can be 050505050.

[0082] In the embodiment of the present disclosure, two protection zones are set, and the preset filling data of the two protection zones are different, which can isolate the memory from other memories and distinguish whether the current data is in the first protection zone or the second protection zone based on the preset filling data, which is highly intelligent.

[0083] In the embodiment of the present disclosure, the first memory information may also include information such as memory application time, memory application process, memory location, memory usage status, memory type, memory access rights, etc., which is not limited by the embodiment of the present disclosure.

[0084] In step S12, the host device manages the reading, writing, and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory, and the preset padding data in the protected area. In some embodiments, the host device can control the memory to read and write data within the memory range based on the starting address of the memory and the size of the memory in the first memory information, and when the memory is released, the starting address of the memory release indicated by the host device is the same as the starting address of the memory.

[0085] In other embodiments, taking the host device managing the reading and writing process of the memory as an example, before reading and writing the memory of the heterogeneous device, the host device may first verify whether the target memory area to be read and written is legal based on the starting address and size of the memory in the first memory information, and then check whether the memory area is located in the protection zone and whether the preset fill data in the protection zone remains unchanged. If the verification passes, the read and write operation is performed. If the verification fails, the error handling mechanism is triggered, such as recording an error log, issuing a warning signal, or refusing to perform the operation.

[0086] In other embodiments, taking the host device managing the read and write process of the memory as an example, after the read and write process is completed, the host device can check the data in the memory and whether it is consistent with the read and write data, and whether the current fill data in the protection zone of the memory is consistent with the preset fill data. If a data abnormality is found, such as the preset fill data is illegally modified, the exception handling process is triggered, such as recording an error log, issuing a warning signal, restarting the heterogeneous device or reallocating the memory area, etc.

[0087] In other embodiments, the host device can map the memory requested in the heterogeneous device into the host device's own address space based on the starting address of the memory and the size of the memory. Thus, through memory mapping, the host device can use the same addressing method as its own memory to access the memory of the heterogeneous device, reducing the overhead of data transmission and conversion.

[0088] In an embodiment of the present disclosure, first memory information recorded when applying for memory in a heterogeneous device is obtained, and the reading, writing, and releasing processes of the memory are managed based on the starting address of the memory, the size of the memory, and the preset fill data in the protection zone in the first memory information. On the one hand, the first memory information recorded at the time of application not only helps to manage the subsequent memory usage process, but also can achieve management of the entire process, which can improve the accuracy and comprehensiveness of memory management and reduce the possibility of a decrease in the operating efficiency of devices (including host devices and heterogeneous devices); on the other hand, in an embodiment of the present disclosure, the first memory information of the memory when applying for memory in a heterogeneous device is recorded, so that the host device can quickly locate the unapplied free memory area on the heterogeneous device based on the first memory information, thereby applying for the free memory area subsequently to improve the effectiveness of the memory application of the heterogeneous device.

[0089] In some embodiments, the method further comprises:

[0090] In response to detecting a read or write instruction to the memory, obtaining current fill data in a protected area of ​​the memory and read or write parameters for reading or writing the memory; wherein the read or write parameters are used to indicate a read or write address range;

[0091] The managing the reading and writing process of the memory based on the starting address of the memory in the first memory information, the size of the memory, and the preset filling data in the protection zone includes:

[0092] In response to the current fill data being the preset fill data and the read and write address range indicated in the read and write parameters being within the address range of the memory, read and write operations are performed on the memory based on the read and write parameters; wherein the address range of the memory is determined based on the starting address of the memory and the size of the memory.

[0093] In an embodiment of the present disclosure, a host device obtains the currently filled data in the protected area of ​​the memory and the read / write parameters for reading and writing the memory in response to detecting a read / write instruction to the memory, wherein the read / write parameters are used to indicate the read / write address range. In some embodiments, the read / write parameters may include the starting address of the read / write memory and the amount of data to be read / written. The starting address of the read / write memory is used to indicate the location of the memory from which the read / write operation will start, and the amount of data to be read / written is used to indicate how many bytes of data need to be read / written starting from the starting address. The read / write address range can be determined based on the starting address of the read / write memory and the amount of data to be read / written.

[0094] In other embodiments, the read / write parameters may include a start address of the read / write memory and an end address of the read / write memory, and the read / write address range may be determined based on the start address of the read / write memory and the end address of the read / write memory.

[0095] In the embodiment of the present disclosure, the host device can detect read and write instructions to the memory by monitoring the instruction queue. The host device can also detect read and write instructions to the memory through an interrupt mechanism. When a read and write instruction occurs, the interrupt handler is triggered. After the host device detects the read and write instruction to the memory, it accesses the protected area of ​​the memory to obtain the current fill data in the protected area.

[0096] In an embodiment of the present disclosure, the host device responds to the current fill data being preset fill data and the read and write address range indicated in the read and write parameters being within the address range of the memory, and performs read and write operations on the memory based on the read and write parameters, wherein the address range of the memory is determined based on the starting address of the memory and the size of the memory. The end address of the memory can be determined based on the starting address of the memory and the size of the memory, and then the address range of the memory can be determined based on the starting address of the memory and the size of the memory.

[0097] In the embodiment of the present disclosure, the host device compares the current filling data in the protection zone with the preset filling data. If the current filling data is consistent with the preset filling data, it means that the data in the protection zone has not been changed, and thus the data in the memory has not been changed. It can be determined that the current memory has not been stepped on before the read and write operation is performed.

[0098] In the disclosed embodiment, the host device also needs to determine that the read / write address range indicated in the read / write parameters is within the address range of the memory. If the read / write address range indicated in the read / write parameters is within the address range of the memory, then the read / write operation will not cause any damage to the memory. It should be noted that the disclosed embodiment does not limit the order of determining that the current fill data is the preset fill data and determining that the read / write address range indicated in the read / write parameters is within the address range of the memory.

[0099] In the embodiment of the present disclosure, after the host device detects a read instruction for the memory, in response to the current filling data being the preset filling data and the read and write address range indicated in the read and write parameters being within the address range of the memory, the host device performs read and write operations on the memory based on the read and write parameters. This can detect whether the current memory is stepped on and whether the read and write operation will cause the memory to be stepped on, thereby reducing the possibility of the memory being stepped on and improving the accuracy and security of reading and writing the memory.

[0100] In some embodiments, the method further comprises:

[0101] In response to detecting a release instruction for the memory, obtaining current fill data in the protected area of ​​the memory and a release parameter for releasing the memory; wherein the release parameter is used to indicate a starting address for releasing the memory;

[0102] The managing the release process of the memory based on the starting address of the memory in the first memory information, the size of the memory, and the preset filling data in the protection zone includes:

[0103] In response to the current filling data being the preset filling data, and the starting address for releasing the memory indicated in the release parameter being the starting address of the memory, a release operation is performed on the memory based on the release parameter.

[0104] In an embodiment of the present disclosure, a host device, in response to detecting a memory release instruction, obtains the current fill data in the protected area of ​​the memory and a release parameter for releasing the memory, wherein the release parameter is used for the starting address for releasing the memory. In some embodiments, the release parameter may also include an ending address for releasing the memory, and the address range of the released memory may be determined based on the starting address for releasing the memory and the ending address for releasing the memory.

[0105] In an embodiment of the present disclosure, the host device can detect the release instruction of the memory by monitoring the instruction queue. The host device can also detect the release instruction of the memory through an interrupt mechanism. When a release instruction occurs, the interrupt handler is triggered. After the host device detects the release instruction of the memory, it accesses the protection zone of the memory to obtain the current fill data in the protection zone.

[0106] In an embodiment of the present disclosure, in response to the current fill data being the preset fill data and the start address for releasing the memory indicated in the release parameter being the start address of the memory, the host device performs a release operation on the memory based on the release parameter. After obtaining the current fill data in the protected area, the host device may compare the current fill data in the protected area with the preset fill data. If the current fill data is consistent with the preset fill data, it indicates that the data in the protected area has not been modified, and thus the data in the memory has not been modified, thereby confirming that the current memory has not been stepped on before the release operation is performed.

[0107] In the disclosed embodiment, the host device also needs to determine whether the starting address for releasing the memory indicated in the release parameter is the starting address of the memory. If the starting address for releasing the memory indicated in the release parameter is the starting address of the memory, then the memory released by this release operation is correct, and other memory that does not need to be released will not be released. It should be noted that the disclosed embodiment does not limit the order of determining whether the current fill data is the preset fill data and whether the starting address for releasing the memory indicated in the release parameter is the starting address of the memory.

[0108] In an embodiment of the present disclosure, after the host device detects an instruction to release the memory, in response to the current filling data being the preset filling data and the starting address for releasing the memory indicated in the release parameter being the starting address of the memory, the host device performs a release operation on the memory based on the release parameter. This can detect whether the memory currently to be released is stepped on and whether the release operation will release memory that does not need to be released, thereby improving the accuracy and security of releasing the memory.

[0109] In some embodiments, the first memory information further includes a validity identifier for representing a release status of the memory; and the managing the reading, writing, and release processes of the memory based on the starting address of the memory, the size of the memory, and the preset padding data in the protection zone in the first memory information includes:

[0110] In response to the validity identifier of the first memory information of the memory indicating that the memory has not been released, the reading, writing and releasing processes of the memory are managed based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0111] In an embodiment of the present disclosure, the first memory information also includes a validity identifier for characterizing the release status of the memory. The validity identifier for characterizing the release status of the memory can be a binary bit. For example, 0 can indicate that the memory has been released, while 1 can indicate that the memory is released and is in use. It should be noted that the validity identifier for characterizing the release status of the memory can also be a Boolean value, a special value, etc., which is not limited by the embodiment of the present disclosure.

[0112] In an embodiment of the present disclosure, after the host device releases the memory based on the release instruction, the validity flag in the first memory information of the memory can be adjusted.

[0113] In an embodiment of the present disclosure, before managing the reading, writing and releasing processes of the memory, the host device may first determine the current state of the memory based on the validity identifier of the first memory information. After the validity identifier of the first memory information of the memory indicates that the memory has not been released, the host device may manage the reading, writing and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0114] In the embodiment of the present disclosure, after the validity identifier of the first memory information of the memory indicates that the memory has not been released, the reading, writing and releasing processes of the memory are managed, which can reduce the possibility of managing the released memory, thereby reducing resource waste and improving the efficiency of memory management.

[0115] In some embodiments, the first memory information further includes a first information check code; and the method further includes:

[0116] In response to detecting an operation on a memory adjacent to the memory storing the first memory information, acquiring second memory information of the memory;

[0117] Determining a second information check code based on the second memory information;

[0118] The managing the reading, writing, and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory, and the preset filling data in the protection zone includes:

[0119] In response to the second information check code being the same as the first information check code, the reading, writing and releasing processes of the memory are managed based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0120] In an embodiment of the present disclosure, the first memory information further includes a first information check code, wherein the first information check code can be generated based on the first memory information, such as a first information check code parity check code, a Hamming code, a cyclic redundancy check code, a Gray code, etc. The first information check code can also be assigned to the first memory information by the host device when applying for memory, which is not limited in the embodiment of the present disclosure.

[0121] In some embodiments, the first information check code is an odd check code. After recording the first memory information in the memory, a check bit is added to the original data in the first memory information so that the number of 1s in the data including the check bit is an odd number.

[0122] In an embodiment of the present disclosure, the host device obtains second memory information of the memory in response to detecting an operation on the memory adjacent to the first memory information of the storage memory. As mentioned above, the storage address of the first memory information of the storage memory may be located in the memory space of the host device. Since the memory in the host device may also be stepped on based on the operation on the adjacent memory, it is necessary to obtain the second memory information of the memory after detecting the operation on the memory adjacent to the first memory information of the storage memory. It should be noted that the second memory information is the current memory information of the memory obtained from the memory address of the first memory information of the storage memory after the host device detects the operation on the memory adjacent to the first memory information of the storage memory.

[0123] In the embodiment of the present disclosure, after the host device obtains the second memory information, it can determine the second information check code based on the second memory information, wherein the second information check code can be directly located in the second memory information; the second information check code can also be generated based on the second memory information, such as the second information check code parity check code, Hamming code, cyclic redundancy check code, Gray code, etc. It should be noted that when generating the second information check code based on the second memory information, it must be consistent with the type of the first information check code. If the first information check code is an odd check code, the second information check code must also be an odd check code.

[0124] In the embodiment of the present disclosure, before the host device manages the reading, writing and releasing processes of the memory, it can first compare the second information verification code with the first information verification code. On the basis that the second information verification code is the same as the first information verification code, the host device can then manage the reading, writing and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0125] In the embodiment of the present disclosure, the host device can determine whether the first memory information of the stored memory has been modified by judging whether the first information verification code is the same as the second information verification code. On the basis of determining that the first memory information of the stored memory has not been modified, the host device manages the memory based on the first memory information of the memory, which can improve the accuracy of memory management and is highly intelligent.

[0126] In some embodiments, the method further comprises:

[0127] Get the environment variable indicating the target memory to be managed;

[0128] The obtaining of first memory information recorded when applying for memory in the heterogeneous device includes:

[0129] Acquire first memory information recorded when applying for the target memory in the heterogeneous device.

[0130] In an embodiment of the present disclosure, a host device obtains an environment variable indicating a target memory to be managed. The environment variable may be a system environment variable or a user environment variable. In some embodiments, the host device may obtain the environment variable using a preset acquisition function parameter, a preset command line, or a preset interface, and the present disclosure does not impose any restrictions on this.

[0131] In the embodiment of the present disclosure, the environment variable may carry indication information for indicating the target memory to be managed, such as the amount of the target memory, the type of heterogeneous device corresponding to the target memory, etc.

[0132] In the embodiments of the present disclosure, users or developers can also pre-set the type of environment variables and the target memory corresponding to each environment variable value, and determine the target memory corresponding to the environment variable value based on the obtained environment variable value. For example, in some embodiments, the target memory amount corresponding to an environment variable of 0 can be 0, the target memory amount corresponding to an environment variable of 1 can be all the memory requested by the host device after obtaining the environment variable, and the target memory amount corresponding to an environment variable of 2 can be the first 10 memories requested by the host device after obtaining the environment variable. Other mapping methods can also be used, and the embodiments of the present disclosure do not limit this.

[0133] In an embodiment of the present disclosure, after the host device obtains the environment variable, it only obtains the first memory information recorded when applying for the target memory in the heterogeneous device based on the environment variable.

[0134] In the embodiment of the present disclosure, the method of setting environment variables can improve the flexibility of memory management and be more intelligent.

[0135] Figure 4 FIG. 1 is a schematic diagram of memory information according to an exemplary embodiment. Figure 4As shown, L41 is the memory information recording space, which is the space for storing the first memory information of each memory. L46, L49, and L52 are all different memories. It should be noted that memory L46, memory L49, and memory L52 can be located in the same heterogeneous device or in different heterogeneous devices. The front protection area L45 of the memory is the first protection area of ​​the legal memory area L46, and the back protection area L47 of the memory is the second protection area of ​​the legal memory area L46. The front protection area L48 of the memory is the first protection area of ​​the legal memory area L49, and the back protection area L50 of the memory is the second protection area of ​​the legal memory area L49. The front protection area L51 of the memory is the first protection area of ​​the legal memory area L52, and the back protection area L53 of the memory is the second protection area of ​​the legal memory area L52. L42 is the first memory information of the legal memory area L46, L43 is the first memory information of the legal memory area L49, and L44 is the first memory information of the legal memory area L52. Taking L42 as an example, the valid mark 0 in L42 is the validity mark of the legal memory area L46; the starting address 0 in L42 is the starting address of the legal memory area L46; the application size 0 in L42 is the memory size of the legal memory area L46; the front protection area size 0 in L42 is the size of the front protection area L45 of the legal memory area L46; the back protection area size 0 in L42 is the size of the back protection area L47 of the legal memory area L46; the check code 0 in L42 is the information check code corresponding to L42; in addition, the application time 0 in L42 is the application time of the legal memory area L46; the application number 0 in L42 is the application number of the legal memory area L46, and the application number corresponding to each memory includes the process information when applying for memory, application location and other information; the fill mode 0 in L42 is the corresponding environment variable value when applying for the legal memory area L46.

[0136] Figure 5 is a flowchart of a memory management method according to an exemplary embodiment. Figure 5 The process in the example is applied to the host device. Figure 5 As shown, the following steps are included:

[0137] S51. Initialization: setting the memory protection enable flag according to the environment variable settings.

[0138] In an embodiment of the present disclosure, a host device is initialized and obtains environment variables from an initialization interface, determines a target memory based on the obtained environment variables, and turns on a memory protection flag, wherein the memory protection flag is a flag indicating that the host device turns on memory management. The purpose of turning on the memory protection flag is to allow the host device or a heterogeneous device to simultaneously know that the memory protection mechanism is turned on, the amount and type of target memory to be obtained, and the recording space location for recording the first memory information of the memory.

[0139] S52. When applying for memory, apply for additional space and make good data marking and information records.

[0140] In the embodiment of the present disclosure, the extra space is a protection zone of the memory, the data mark is to fill the unstored protection zone with preset filling data, and the information record is to record the first memory information of the memory when applying for the memory.

[0141] S53. Before writing to the memory, the heterogeneous device or host checks whether the write parameters and protection data are correct according to the information record; if so, execute step S54; if not, execute step S50.

[0142] In the embodiment of the present disclosure, when a heterogeneous device or a host device writes data to the memory, it is necessary to determine whether the write data range in the write parameters is within the address range of the memory based on the information in the memory information record of the memory, such as the starting address of the memory and the size of the memory, and determine whether the current data in the protection zone of the memory is the data marked when the memory is applied for; if both are consistent, the data is written to the memory based on the write parameters, and step S54 is executed; if at least one of the two is inconsistent, step S50 is executed.

[0143] S54. Before reading the memory, the heterogeneous device or host checks whether the read parameters and protection data are correct according to the information record; if so, execute step S55; if not, execute step S50.

[0144] In the embodiment of the present disclosure, when a heterogeneous device or a host device reads data from the memory, it is necessary to determine whether the read data range in the read parameter is within the address range of the memory based on the information in the memory information record of the memory, such as the starting address of the memory and the size of the memory, and determine whether the current data in the protection zone of the memory is the data marked when the memory is applied for; if both are consistent, the data in the memory is read based on the read parameter, and step S54 is executed; if at least one of the two is inconsistent, step S50 is executed.

[0145] S55. Before releasing the memory, check whether the release parameters and protection data are correct according to the information record; if so, execute step S56; if not, execute step S50.

[0146] In the embodiment of the present disclosure, before the memory is released, it is necessary to determine whether the release starting address in the release parameter is the starting address of the memory based on the information in the memory information record of the memory, such as the starting address of the memory, and determine whether the current data in the protection zone of the memory is the data marked when the memory is applied; if both are consistent, execute step S56; if at least one of the two is inconsistent, execute step S50.

[0147] S56. When releasing memory, the over-applied memory is released and the corresponding resources are recovered.

[0148] In the disclosed embodiment, when releasing memory, the protected area of ​​the memory is also released to reclaim the corresponding memory space so that when the defective application for memory is made, this part of the memory address can be applied for.

[0149] S50: If an error is detected, the program is terminated and the corresponding error memory information is output.

[0150] In the embodiment of the present disclosure, if it is checked that the operating parameters do not conform to the information in the memory information record of the memory, or the current data in the protection zone of the memory is not the data marked when the memory is applied, it indicates that an error has occurred, and the current operation on the memory needs to be stopped, and the corresponding error memory information is output, such as the memory location, memory address range, error cause, etc.

[0151] In the disclosed embodiment, when applying for memory, a memory protection zone is simultaneously applied for, and data tags and information records are prepared. Before each memory operation, a check is performed to determine whether the operating parameters conform to the information in the memory information record and whether the data in the protection zone corresponds to the data tags. After the check is completed, the memory is operated. If the check is incorrect, the memory operation is stopped and corresponding error memory information is output. This solution can detect whether the memory has been stepped on during an operation, reduce the possibility of memory being stepped on due to incorrect memory operating parameters, and output corresponding error memory information, making it easier to identify the error memory and thus repair it, thus providing high intelligence.

[0152] Figure 6 This is a flow chart showing a process of managing memory reading and writing according to an exemplary embodiment. Figure 6 The process in the example is applied to the host device. This process is applicable to the scenario of applying for at least one memory in a heterogeneous device, or applying for multiple memories in multiple heterogeneous devices at the same time. Figure 6 As shown, the following steps are included:

[0153] S61, initialize the mark reading and writing parameters to be illegal, and find the starting position of the memory information record data.

[0154] In the disclosed embodiment, taking the memory information record data as the first memory information as an example, each memory corresponds to a piece of memory information record data, and the memory information record data of all memories are stored in the same space. After the host device detects a read or write operation on a certain memory, it marks the read or write parameters as illegal and determines the starting position in the space for storing the memory information record data of all memories, namely, the first piece of memory information record data.

[0155] S62. Read a valid memory information record data.

[0156] In the embodiment of the present disclosure, as described above, the memory information recording data of each memory includes a validity mark representing the release status of the memory. Starting from the starting position in the space storing the memory information recording data of all memories, that is, the first memory information recording data, the memory information recording data corresponding to the first memory information recording data that represents the memory that has not been released is determined.

[0157] S63. Use the verification code to verify the integrity of the record. If yes, go to step S64; if not, go to step S69.

[0158] In the embodiment of the present disclosure, as mentioned above, the memory information recording data of each memory includes an initial information verification code. After reading a valid memory information recording data, it is determined whether the information verification code in the current memory information recording data is the initial verification code to determine the integrity of the current memory information recording data. If so, execute step S64; if not, execute step S69.

[0159] S64: Check the integrity of the corresponding protected area data. If yes, proceed to step S65; if no, proceed to step S70. In the disclosed embodiment, as previously described, the memory information record data of each memory includes preset fill data corresponding to the protected area of ​​the memory. After determining that the memory information record data is complete, it is necessary to determine whether the current fill data of the protected area of ​​the memory in the current memory information record data is the preset fill data to determine whether the current memory has been stepped on. If yes, proceed to step S65; if no, proceed to step S70.

[0160] S65. Determine whether the read / write memory range is within the record range. If so, execute step S71; if not, execute step S66.

[0161] In the embodiment of the present disclosure, as described above, the memory information recording data of each memory includes the memory starting address and the memory size. Based on the memory starting address and the memory size, the address range of the memory can be determined. After determining that the data in the protection zone is complete, it is also determined whether the read and write address range indicated in the read and write parameters is within the address range of the memory to determine whether the current read and write operation will cause a stampede on the memory. If so, execute step S71; if not, execute step S66.

[0162] S66: Are there any valid records? If so, go to step S62; if not, go to step S67.

[0163] In the embodiment of the present disclosure, after detecting the valid memory information record data obtained for the first time, it is necessary to obtain the validity mark in the memory information record data of each memory from the space storing the memory information record data of all memories. If there is a validity mark indicating that the memory information record data has not been released, then return to execute step S62; if there is no validity mark indicating that the memory information record data has not been released, execute step S67.

[0164] S67: Check whether the read and write parameters are legal. If so, go to step S68; if not, go to step S72.

[0165] In the embodiment of the present disclosure, it is determined whether the mark of the read and write parameters is legal. If so, step S68 is executed; if not, step S72 is executed.

[0166] S68. Perform normal read and write operations.

[0167] In the embodiment of the present disclosure, read and write operations are performed on the memory based on information indicated in the read and write parameters, such as the starting address of the read and write and the amount of data to be read and written.

[0168] S69, Report error: Record space is corrupted.

[0169] In the embodiment of the present disclosure, if the information verification code in the current memory information recording data is not the initial verification code, the memory information recording data has been tampered with, the current memory information recording data is incomplete, and information indicating that the recording space for recording the memory information recording data of each memory is destroyed is output.

[0170] S70. Report error: Memory is stepped on, output information.

[0171] In an embodiment of the present disclosure, if the current fill data of the memory protection zone in the current memory information recording data is not the preset fill data, it means that the data in the memory protection zone has been tampered with and the memory has been stepped on. The output is used to record the information that the memory has been stepped on, and output the location, size, address range and other information of the stepped memory.

[0172] S71. Mark the read and write parameters as legal.

[0173] In the embodiment of the present disclosure, if the read / write address range indicated in the read / write parameter is within the address range of the memory, the flag of the read / write parameter is changed from illegal to legal.

[0174] S72. Report error: Illegal parameters, record not found.

[0175] In the embodiment of the present disclosure, if the mark of the read and write parameters is still illegal, it means that the read and write parameters do not match the memory information recording data corresponding to all unreleased memories in the recording space, and the output is that the read and write parameters are illegal and no matching memory information recording data is found.

[0176] The disclosed embodiment can judge various situations such as whether the recording space of memory information recording data is damaged, whether the memory is stepped on, and whether the current read and write parameters are legal. After all the conditions are detected to be qualified, the memory will be read and written. If any condition is detected to be unqualified, the memory read and write operation will be stopped and the corresponding error information will be output. This can improve the accuracy and security of memory operations, and can output error information in a timely manner, with high intelligence.

[0177] Figure 7 FIG. 7 is a block diagram of a memory management device 700 according to an exemplary embodiment. Figure 7 As shown, the device mainly includes:

[0178] A first acquisition module 701 is configured to acquire first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information includes at least: a starting address of the memory, a size of the memory, and preset fill data in a protected area of ​​the memory;

[0179] The management module 702 is configured to manage the reading, writing and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

[0180] In some embodiments, the apparatus further comprises:

[0181] a second acquisition module configured to, in response to detecting a read or write instruction to the memory, acquire current fill data in the protected area of ​​the memory and read or write parameters for reading or writing the memory; wherein the read or write parameters are used to indicate a read or write address range;

[0182] The management module 702 is further configured to perform read and write operations on the memory based on the read and write parameters in response to the current fill data being the preset fill data and the read and write address range indicated in the read and write parameters being within the address range of the memory; wherein the address range of the memory is determined based on the starting address of the memory and the size of the memory.

[0183] In some embodiments, the apparatus further comprises:

[0184] a third acquisition module configured to, in response to detecting a release instruction for the memory, acquire current fill data in the protected area of ​​the memory and a release parameter for releasing the memory; wherein the release parameter is used to indicate a starting address for releasing the memory;

[0185] The management module 702 is further configured to release the memory based on the release parameter in response to the current filling data being the preset filling data and the starting address for releasing the memory indicated in the release parameter being the starting address of the memory.

[0186] In some embodiments, the first memory information also includes a validity identifier for characterizing the release status of the memory; the management module 702 is also configured to manage the reading, writing and release processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone in response to the validity identifier of the first memory information of the memory characterizing that the memory has not been released.

[0187] In some embodiments, the first memory information further includes a first information check code; and the apparatus further includes:

[0188] a fourth acquiring module, configured to acquire second memory information of the memory in response to detecting an operation on a memory adjacent to the memory storing the first memory information;

[0189] a determination module configured to determine a second information check code based on the second memory information;

[0190] The management module 702 is also configured to manage the reading, writing and releasing processes of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone in response to the second information verification code being the same as the first information verification code.

[0191] In some embodiments, the apparatus further comprises:

[0192] a fifth acquisition module configured to acquire an environment variable indicating a target memory to be managed;

[0193] The first acquisition module 701 is further configured to acquire first memory information recorded when applying for the target memory in the heterogeneous device.

[0194] In some embodiments, the protection zone of the memory includes a first protection zone and a second protection zone, the end address of the first protection zone is the starting address of the memory, the starting address of the second protection zone is the end address of the memory, and the preset fill data of the first protection zone is different from the preset fill data of the second protection zone.

[0195] Regarding the apparatus in the above embodiment, the specific manner in which each module performs operations has been described in detail in the embodiment of the method, and will not be elaborated here.

[0196] Figure 8 This is a block diagram of an electronic device 800 according to an exemplary embodiment. For example, the electronic device 800 may be a host in a heterogeneous computing system capable of managing the memory of various heterogeneous devices, such as a mobile device, mobile phone, personal digital assistant, handheld device, computing device, vehicle-mounted device, wearable device, or other electronic device with a built-in CPU. The electronic device 800 may also be a server with a built-in CPU, which is not limited in this embodiment of the present disclosure.

[0197] Reference Figure 8 , the electronic device 800 may include one or more of the following components: a processing component 802 , a memory 804 , a power component 806 , a multimedia component 808 , an audio component 810 , an input / output (I / O) interface 812 , a sensor component 814 , and a communication component 816 .

[0198] The processing component 802 generally controls the overall operation of the electronic device 800, such as operations associated with at least one of display, phone calls, data communications, camera operation, and recording operations. The processing component 802 may include one or more processors 820 to execute instructions to perform all or part of the steps of the above-described method. In addition, the processing component 802 may include one or more modules to facilitate interaction between the processing component 802 and other components. For example, the processing component 802 may include a multimedia module to facilitate interaction between the multimedia component 808 and the processing component 802.

[0199] The memory 804 is configured to store various types of data to support operations on the electronic device 800. Examples of such data include at least one of the following: instructions for any application or method operating on the electronic device 800, contact data, phone book data, messages, pictures, and videos. The memory 804 can be implemented by any type of volatile or non-volatile storage device, or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

[0200] The power supply component 806 provides power to various components of the electronic device 800. The power supply component 806 may include at least one of the following: a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to the electronic device 800.

[0201] The multimedia component 808 includes a screen that provides an output interface between the electronic device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, slides, and gestures on the touch panel. The touch sensor can not only sense the boundaries of a touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia component 808 includes a front camera and / or a rear camera. When the electronic device 800 is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera can receive external multimedia data. Each front camera and rear camera can be a fixed optical lens system or have a focal length and optical zoom capability.

[0202] The audio component 810 is configured to output and / or input audio signals. For example, the audio component 810 includes a microphone (MIC), which is configured to receive external audio signals when the electronic device 800 is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode. The received audio signal can be further stored in the memory 804 or transmitted via the communication component 816. In some embodiments, the audio component 810 also includes a speaker for outputting audio signals.

[0203] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as a keyboard, click wheel, and buttons. These buttons may include, but are not limited to, a home button, volume buttons, a start button, and a lock button.

[0204] The sensor assembly 814 includes one or more sensors for providing various aspects of the status assessment of the electronic device 800. For example, the sensor assembly 814 can detect the open / closed state of the electronic device 800, the relative positioning of components, such as the display and keypad of the electronic device 800. The sensor assembly 814 can also detect changes in the position of the electronic device 800 or a component thereof, the presence or absence of user contact with the electronic device 800, the orientation or acceleration / deceleration of the electronic device 800, and changes in the temperature of the electronic device 800. The sensor assembly 814 can include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly 814 can also include an optical sensor, such as a complementary metal oxide semiconductor (CMOS) or charge coupled device (CCD) image sensor, for use in imaging applications. In some embodiments, the sensor assembly 814 can also include, but is not limited to, at least one of the following: an accelerometer, a gyroscope, a magnetic sensor, a pressure sensor, and a temperature sensor.

[0205] The communication component 816 is configured to facilitate communication between the electronic device 800 and other devices in a wired or wireless manner. The electronic device 800 can access a wireless network based on a communication standard, such as Wi-Fi, 4G, 5G, or a combination thereof. In an exemplary embodiment, the communication component 816 receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component 816 also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0206] In an exemplary embodiment, the electronic device 800 can be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components.

[0207] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is further provided, such as a memory 804 including executable instructions or a computer program. The instructions or computer program can be executed by the processor 820 of the electronic device 800 to perform the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a compact disc read-only memory (CD-ROM), a magnetic tape, a floppy disk, an optical data storage device, etc.

[0208] A non-transitory computer-readable storage medium, when the instructions in the storage medium are executed by a processor of an electronic device, enables the electronic device to perform any of the above-mentioned memory management methods of the embodiments of the present disclosure. For example, the method includes:

[0209] Obtaining first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information includes at least: a starting address of the memory, a size of the memory, and preset filling data in a protection zone of the memory;

[0210] Based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone, the reading, writing and releasing processes of the memory are managed.

[0211] The present disclosure provides a computer program product comprising a computer program or executable instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer program or executable instructions from the computer-readable storage medium and executes the computer program or executable instructions, causing the computer device to perform any of the aforementioned memory management methods of the present disclosure.

[0212] Other embodiments of the present disclosure will readily occur to those skilled in the art after considering the specification and practicing the invention disclosed herein. This disclosure is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include common knowledge or customary techniques in the art not disclosed herein. The description and examples are to be considered as exemplary only, with the true scope and spirit of the present disclosure being indicated by the claims.

[0213] It should be understood that the present disclosure is not limited to the exact structures that have been described above and shown in the drawings, and that various modifications and changes can be made without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.

Claims

1. A memory management method, characterized in that: The method comprises: Acquire first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information at least includes: a starting address of the memory, a size of the memory, and preset filling data in a protection zone of the memory; Based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone, the reading, writing and releasing process of the memory is managed.

2. The method according to claim 1, characterized in that The method further comprises: In response to detecting a read / write instruction to the memory, obtaining current filling data in a protection zone of the memory and read / write parameters for reading and writing the memory; wherein the read / write parameters are used to indicate a read / write address range; The managing the reading and writing process of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone includes: In response to the current fill data being the preset fill data and the read / write address range indicated in the read / write parameters being within the address range of the memory, read / write operations are performed on the memory based on the read / write parameters; wherein the address range of the memory is determined based on the starting address of the memory and the size of the memory.

3. The method according to claim 1, characterized in that: The method further comprises: In response to detecting a release instruction for the memory, obtaining current filling data in a protection zone of the memory and a release parameter for releasing the memory; wherein the release parameter is used to indicate a starting address for releasing the memory; The managing the release process of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone includes: In response to the current filling data being the preset filling data, and the starting address for releasing the memory indicated in the release parameter being the starting address of the memory, a release operation is performed on the memory based on the release parameter.

4. The method according to any one of claims 1 to 3, characterized in that: The first memory information also includes a validity identifier for characterizing a release state of the memory; and the management of the reading, writing and release process of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone includes: In response to the validity identifier of the first memory information of the memory indicating that the memory has not been released, the reading, writing and releasing processes of the memory are managed based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

5. The method according to any one of claims 1 to 3, characterized in that: The first memory information also includes a first information check code; the method also includes: In response to detecting an operation on a memory adjacent to the memory storing the first memory information, acquiring second memory information of the memory; Determine a second information check code based on the second memory information; The managing the reading, writing and releasing process of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone includes: In response to the second information verification code being the same as the first information verification code, the reading, writing and releasing process of the memory is managed based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection zone.

6. The method according to any one of claims 1 to 3, characterized in that: The method further comprises: Get an environment variable indicating the target memory to be managed; The obtaining of first memory information recorded when applying for memory in a heterogeneous device includes: Acquire first memory information recorded when applying for the target memory in the heterogeneous device.

7. The method according to any one of claims 1 to 3, characterized in that: The protection zone of the memory includes a first protection zone and a second protection zone, the end address of the first protection zone is the start address of the memory, the start address of the second protection zone is the end address of the memory, and the preset fill data of the first protection zone is different from the preset fill data of the second protection zone.

8. A memory management device, characterized in that: The device comprises: A first acquisition module is configured to acquire first memory information recorded when applying for memory in a heterogeneous device; wherein the first memory information at least includes: a starting address of the memory, a size of the memory, and preset filling data in a protection zone of the memory; The management module is configured to manage the reading, writing and releasing process of the memory based on the starting address of the memory in the first memory information, the size of the memory and the preset filling data in the protection area.

9. An electronic device, characterized in that: include: processor; Memory for storing computer programs or instructions; The processor executes the computer program or instructions to implement the steps of the method according to any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium storing a computer program or instruction, characterized in that: When the computer program or instructions in the storage medium are executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

11. A computer program product, comprising a computer program or instructions, characterized in that: When the computer program or instruction is executed by a processor, the steps of the method according to any one of claims 1 to 7 are implemented.

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