Graph generation architecture and method for mixed security level application

Abstract

The invention belongs to the field of airborne graphic processing in an avionics system, and relates to a graphic generation architecture and method for hybrid security level application. The architecture comprises a multi-core SOC, a display processing unit DPU and an external independent GPU, virtualization management software supporting virtualization runs on the multi-core SOC; a real-time operating system and a non-real-time operating system respectively run on the virtualization layer, and each operating system is distributed with one or more processor cores; a driving program of the GPU in the SOC under the real-time operating system runs on the real-time operating system, and a driving program of the independent GPU runs on the non-real-time operating system; the SOC is connected with the external independent GPU, the SOC is connected with the DPU through a video output interface, and the output of the independent GPU is connected with the DPU through the video output interface of the independent GPU.

Description

Technical Field

[0001] The present invention belongs to the field of airborne graphics processing in avionics systems, and relates to a graphics generation architecture and method for mixed safety level applications. Background Art

[0002] The operating systems used for traditional airborne displays are generally embedded real-time operating systems, such as Wind River's vxworks system and China's Tianmai system. Graphics applications run on these operating systems, and the reliability and real-time performance of the equipment are guaranteed through the mechanisms provided by the operating systems. With the development of technology, more and more systems represented by China's Kirin and Hongmeng are being adopted. These systems use the Linux kernel and provide rich functional components and third-party software compared to embedded real-time operating systems. If they can be used in the field of airborne displays, they will significantly enrich the functions of airborne display software and improve the convenience of development.

[0003] The hardware architecture for onboard graphics generation is generally divided into two types: one is based on an independent CPU plus an independent GPU, and the other is based on a SOC chip. Generally speaking, the performance of the independent CPU plus an independent GPU architecture is relatively strong, while the SOC architecture has a higher degree of integration, with the CPU core and GPU core integrated inside, and occupies a smaller printed circuit board area.

[0004] Traditionally, there are the following solutions to achieve this requirement:

[0005] Use two independent CPUs and GPUs, one to run the real-time system and the other to run the non-real-time system.

[0006] The advantage of this solution is that it uses two independent sets of hardware, has good isolation and simple architecture. The disadvantage is that due to the use of two sets of hardware, the power consumption, volume and cost are relatively large. At the same time, the data exchange between the two systems requires the use of the CPU's peripheral interface, which is relatively slow in use and transmission speed.

[0007] Use CPUs and GPUs that support hardware virtualization to virtualize one set of CPUs and GPUs into two sets of virtual CPUs and GPUs, one set running the real-time system and the other running the non-real-time system.

[0008] The advantage of this method is that it only requires one set of hardware, so power consumption, volume and cost are greatly reduced. The disadvantage is that both the CPU and GPU need to support hardware virtualization. Currently, CPUs and GPUs that support hardware virtualization are generally oriented to the server field, and very few are suitable for airborne embedded systems. Summary of the invention

[0009] Purpose of the invention: In some scenarios, it is necessary to provide a hybrid security graphics solution that is compatible with embedded real-time systems and non-real-time systems. High-security display applications run in embedded real-time systems, and display applications that need to run the Linux ecosystem run in non-embedded systems. This ensures that applications developed under traditional real-time operating systems can run directly on new platforms while supporting the Linux ecosystem. Compared with the previous two solutions, it has better applicability and energy efficiency while ensuring support for hybrid systems.

[0010] The present invention proposes a graphics generation architecture and method for hybrid security level applications, which can support both real-time operating systems and non-real-time operating systems. Both systems can use GPU for drawing, and can perform synthesis, integrity monitoring and other processing on the two-way rendering content.

[0011] Technical Solution

[0012] In a first aspect, a graphics generation architecture for hybrid security level applications is provided, including: a multi-core SOC, a display processing unit DPU, and an external independent GPU;

[0013] Virtualization management software that supports virtualization runs on the multi-core SOC; real-time operating systems and non-real-time operating systems run on the virtualization layer, and each operating system is assigned one or more processor cores; the real-time operating system runs the driver of the SOC's internal GPU under the real-time operating system, and the non-real-time operating system runs the driver of the independent GPU;

[0014] The SOC is interconnected with an external independent GPU, the SOC is interconnected with the DPU through a video output interface, and the output of the independent GPU is interconnected with the DPU through its own video output interface.

[0015] Furthermore, the SOC includes an internal GPU;

[0016] The output of the internal GPU is output to the DPU through the video interface for processing.

[0017] Furthermore, DPU can be implemented through programmable logic FPGA or dedicated chip. Its functions include overlaying and windowing external input videos, while supporting integrity monitoring of key display parameters.

[0018] Furthermore, the SOC is interconnected with an external independent GPU via a PCIE bus.

[0019] In a second aspect, a method for generating graphics for a mixed security level application is provided, characterized in that it is applied to the architecture described in any one of claims 1 to 4, and the method comprises:

[0020] Control m CPU cores to run a real-time operating system and n CPU cores to run a non-real-time operating system;

[0021] Connect the m CPU cores to the internal GPU through the chip's internal bus to perform graphics drawing;

[0022] Connect n CPU cores to an external independent GPU via the PCIE bus to perform graphics drawing; m and n are both positive integers;

[0023] The above two graphics rendering outputs are fused and processed in the DPU, and the final result is displayed.

[0024] Furthermore, the method further comprises:

[0025] Run virtualization management software on a multi-core SOC and establish a virtualization layer to enable m CPU cores to run a real-time operating system and n CPU cores to run a non-real-time operating system.

[0026] Furthermore, the method further comprises:

[0027] The drawing integrity of the displayed key data is monitored in the DPU. The principle is to compare the input key data drawing frame memory with the expected frame memory content through template matching, so as to ensure the correctness of the display of safety-critical data.

[0028] Beneficial effects: The present invention proposes a graphics generation architecture and method for hybrid security level applications. By utilizing the multi-core virtualization of the SOC processor, it realizes compatibility with two operating systems running at the same time. At the same time, by introducing independent GPUs and DPUs, the security and reliability of the system are enhanced. Compared with the solution using two sets of hardware, one independent GPU and one CPU are reduced, reducing costs and power consumption. Compared with the solution using hardware virtualization, the requirement that the hardware platform must support hardware virtualization is reduced, significantly enhancing the scope of application.

[0029] The present invention does not rely on a specific hardware platform, has good adaptability and flexibility, is simple to implement, convenient and easy to use, and is suitable for various occasions of mixed graphics rendering. It has strong promotion potential and will have a broad market space and significant economic benefits. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A block diagram of an embodiment of a graph generation architecture for mixed security level applications. DETAILED DESCRIPTION

[0031] The present invention proposes a graphics generation architecture for mixed security level applications, specifically comprising:

[0032] A virtualization management software (hypervisor) supporting virtualization runs on the multi-core SOC. A real-time operating system and a non-real-time operating system run on the virtualization layer, and each operating system is allocated one or more processor cores.

[0033] The SOC is interconnected with an external independent GPU through a PCIE bus, and is interconnected with a display processing unit (DPU) through a video output interface. The output of the independent GPU is interconnected with a display processing unit (DPU) through its own video output interface.

[0034] The display processing unit (DPU) can be implemented through programmable logic (FPGA) or dedicated chips. Its main functions include overlaying and windowing external input videos, and supporting integrity monitoring of key display parameters.

[0035] The driver for the SOC internal GPU under the real-time operating system runs on the real-time operating system, and the driver for the independent GPU runs on the non-real-time operating system;

[0036] The output of the internal GPU is output to the display processing unit (DPU) through the video interface for processing, and the output of the external independent GPU is output to the display processing unit (DPU) through the video interface for processing;

[0037] Applications with high requirements for real-time and security can be run on real-time operating systems, and applications with low requirements for real-time and security can be run on non-real-time operating systems. The application running space is completely isolated to ensure the security of operation;

[0038] After the output of the GPU inside the SOC and the output of the independent GPU are sent to the display processing unit (DPU), the DPU performs various video processing functions according to application needs. At the same time, it can monitor the drawing integrity of the key data displayed. The main principle is to compare the input key data drawing frame memory with the expected frame memory content through template matching, so as to ensure the correctness of the display of safety-critical data;

[0039] The DPU sends the processed video to the monitor for display.

[0040] Example 1

[0041] 1) If Figure 1 As shown, the hardware consists of a multi-core SOC (Rockchip's RK3588 chip is selected in this embodiment), an independent GPU (Feitian X100 is selected in this embodiment) and a display processor (FPGA is selected in this embodiment), and the software consists of a virtualization middleware (hvp), an embedded real-time operating system (Tianmai operating system is used as an example), a graphics driver and a Linux operating system;

[0042] 2) On a multi-core SOC, run the virtualization middleware, CPU core 0 runs the real-time operating system (this example uses the domestic Tianmai system as an example, other systems are similar); CPU core 1 runs the Linux operating system;

[0043] 3) CPU0 connects to the internal GPU through the chip's internal bus to perform graphics drawing; CPU1 connects to the external independent GPU through the PCIE bus (this example uses the domestic X100 GPU as an example, and other GPUs are similar);

[0044] 4) The graphics output of the SOC and independent GPU are connected to the display controller DPU through their respective DP video output interfaces. In this example, the DPU function is implemented through FPGA.

[0045] 5) The DPU processes two-way video outputs, including video processing functions such as overlay and scaling. It can also monitor the integrity of high-security graphics information output by the SOC to ensure the correctness of the GPU drawing content;

[0046] 6) The DPU sends the processed results to the display for display.

Claims

1. A graphics generation architecture for mixed security level applications, characterized in that: include: Multi-core SOC, display processing unit DPU, external independent GPU; Virtualization management software that supports virtualization runs on the multi-core SOC; real-time operating systems and non-real-time operating systems run on the virtualization layer, and each operating system is assigned one or more processor cores; The driver for the SOC internal GPU under the real-time operating system runs on the real-time operating system, and the driver for the independent GPU runs on the non-real-time operating system; The SOC is interconnected with an external independent GPU, the SOC is interconnected with the DPU through a video output interface, and the output of the independent GPU is interconnected with the DPU through its own video output interface.

2. The architecture according to claim 1, characterized in that The SOC includes an internal GPU; The output of the internal GPU is output to the DPU through the video interface for processing.

3. The architecture according to claim 2, characterized in that: DPU can be implemented through programmable logic FPGA or dedicated chip. Its functions include overlaying and windowing external input videos, while supporting integrity monitoring of key display parameters.

4. The architecture according to claim 3, characterized in that The SOC is interconnected with an external independent GPU via the PCIE bus.

5. A method for generating graphics for mixed security level applications, characterized in that: Applied to the architecture of any one of claims 1 to 4, the method comprises: Control m CPU cores to run a real-time operating system and n CPU cores to run a non-real-time operating system; Connect the m CPU cores to the internal GPU through the chip's internal bus to perform graphics drawing; Connect n CPU cores to an external independent GPU via the PCIE bus to perform graphics drawing; m and n are both positive integers; The above two graphics rendering outputs are fused and processed in the DPU, and the final result is displayed.

6. The method according to claim 5, characterized in that The method further comprises: Run virtualization management software on a multi-core SOC and establish a virtualization layer to enable m CPU cores to run a real-time operating system and n CPU cores to run a non-real-time operating system.

7. The method according to claim 6, characterized in that The method further comprises: The drawing integrity of the displayed key data is monitored in the DPU. The principle is to compare the input key data drawing frame memory with the expected frame memory content through template matching, so as to ensure the correctness of the display of safety-critical data.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: The computer program is executed by a processor to implement the method according to any one of claims 5 to 7.

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