Wafer etching method and semiconductor process equipment

Abstract

The present invention provides a wafer etching method and semiconductor process equipment; wherein, the method comprises: depositing a first carbon-containing layer of a preset thickness on a focusing ring before the wafer enters a process chamber; controlling the wafer to enter the process chamber, and etching the film layer below the photoresist layer to transfer the pattern of the photoresist layer to the film layer below. In the above etching method, without changing the hardware material of the semiconductor process equipment, firstly, before the wafer enters the process chamber, a first carbon-containing layer of a preset thickness is deposited on the focusing ring, and then after the wafer enters the process chamber, the film layer below the photoresist layer is etched to transfer the pattern of the photoresist layer to the film layer below. Since the first carbon-containing layer of a preset thickness is deposited on the focusing ring, the situation of abnormal etching at the edge of the wafer due to the material of the focusing ring during the etching process is avoided, thereby improving the uniformity of wafer etching.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a wafer etching method and semiconductor process equipment. Background Art

[0002] With the advancement of integrated circuit process technology, the line width has shrunk dramatically with the development of technology nodes. In order to have a better exposure window, the thickness of the wafer's photoresist has also been continuously reduced, which greatly limits the accurate transmission of the pattern. At present, the wafer in semiconductor process technology mainly adopts a sandwich structure (Tri-layer). Here, the sandwich structure refers to the top film layer of the wafer, which is set with photoresist, anti-reflection layer and carbon film layer from top to bottom. By cleverly using the etching selectivity between the three film layers, the mask is successfully transferred from the thin photoresist to the carbon film layer with sufficient thickness and good etching resistance.

[0003] However, the inventors of the present invention have found that in the process of etching the sandwich structure, etching anomalies are often found at the edge of the wafer (e.g., within 10 mm from the edge of the wafer), and the closer to the edge, the more significant the anomaly is. The specific manifestation can be seen as an abnormal increase in the etching rate, which reduces the uniformity of wafer etching. Therefore, how to solve the etching anomaly at the edge of the wafer with a sandwich structure is an urgent problem to be solved. Summary of the invention

[0004] In view of this, an object of the present invention is to provide a wafer etching method and a semiconductor process equipment to alleviate the above-mentioned problem and improve the uniformity of wafer etching.

[0005] In the first aspect, an embodiment of the present invention provides a wafer etching method, which is applied to semiconductor process equipment, wherein a process chamber of the semiconductor process equipment is provided with a focusing ring surrounding a wafer supporting device, and a patterned photoresist layer is formed on the wafer; the method comprises: before the wafer enters the process chamber, depositing a first carbon-containing layer of a preset thickness on the focusing ring; controlling the wafer to enter the process chamber, and etching a film layer below the photoresist layer to transfer the pattern of the photoresist layer to the film layer below.

[0006] Preferably, before the step of depositing a first carbon-containing layer of a preset thickness on the focusing ring, the method further comprises: performing a waferless cleaning process on the process chamber.

[0007] Preferably, the wafer comprises an anti-reflection layer below the photoresist layer, and the step of etching the film layer below the photoresist layer comprises: etching the anti-reflection layer using a fluorine-containing gas to transfer the pattern of the photoresist layer to the anti-reflection layer.

[0008] Preferably, the wafer further comprises a second carbon-containing layer located below the anti-reflection layer, and the method further comprises: etching the second carbon-containing layer with oxygen-containing gas, while eliminating the first carbon-containing layer deposited on the focusing ring.

[0009] Preferably, the preset thickness is determined according to the thickness of the anti-reflection layer and the etching selectivity ratio between the anti-reflection layer and the first carbon-containing layer deposited on the focusing ring.

[0010] Preferably, the process gas for forming the first carbon-containing layer includes a deposition gas; wherein the deposition gas includes a hydrocarbon gas and / or a hydrocarbon-fluorine gas.

[0011] Preferably, the process gas further includes a dilution gas, and the flow ratio of the deposition gas to the dilution gas is 1:8 to 1:12.

[0012] Preferably, the process parameters for depositing the first carbon-containing layer of a preset thickness on the focusing ring include:

[0013] The power of the upper RF power supply is 300W to 1200W; and / or,

[0014] The power of the RF power supply is 0 to 50 W; and / or,

[0015] The pressure range of the process chamber is 5mT to 30mT, and the total gas flow rate is 200sccm to 500sccm; and / or,

[0016] The temperature range of the wafer carrier is 30°C to 60°C; and / or,

[0017] The processing time is 10s to 30s.

[0018] In a second aspect, an embodiment of the present invention further provides a semiconductor process equipment, comprising a process chamber and a controller; wherein a focusing ring surrounding a wafer carrier is arranged in the process chamber; the controller comprises at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the steps of the method of the first aspect mentioned above are implemented.

[0019] Preferably, the focus ring comprises quartz or ceramic material.

[0020] In a third aspect, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, the steps of the method of the first aspect are executed.

[0021] The embodiments of the present invention bring the following beneficial effects:

[0022] An embodiment of the present invention provides a wafer etching method and semiconductor process equipment. Without changing the hardware material of the semiconductor process equipment, a first carbon-containing layer of a preset thickness is first deposited on a focusing ring before the wafer enters a process chamber. Then, after the wafer enters the process chamber, the film layer below the photoresist layer is etched to transfer the pattern of the photoresist layer to the film layer below. Since the first carbon-containing layer of a preset thickness is deposited on the focusing ring, abnormal etching at the edge of the wafer due to the focusing ring material during the etching process is avoided, thereby improving the uniformity of wafer etching.

[0023] Other features and advantages of the present invention will be described in the following description, and partly become apparent from the description, or understood by practicing the present invention. The purpose and other advantages of the present invention are realized and obtained by the structures particularly pointed out in the description and the drawings.

[0024] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0026] Figure 1 A schematic diagram of assembling an existing focusing ring;

[0027] Figure 2 A flowchart of a wafer etching method provided by an embodiment of the present invention;

[0028] Figure 3 A schematic diagram of a wafer structure before etching provided by an embodiment of the present invention;

[0029] Figure 4 A schematic diagram of a wafer structure for etching an anti-reflection layer provided in an embodiment of the present invention;

[0030] Figure 5 A schematic diagram of a wafer structure for etching a carbon-based film layer provided by an embodiment of the present invention;

[0031] Figure 6 A flow chart of another wafer etching method provided by an embodiment of the present invention;

[0032] Figure 7 A distribution diagram of critical dimensions of a wafer after etching without using a pre-WAC process stage provided by an embodiment of the present invention;

[0033] Figure 8 A distribution diagram of critical dimensions of a wafer after etching in a pre-WAC process stage provided in an embodiment of the present invention;

[0034] Fig. 9 A schematic structural diagram of a semiconductor process equipment provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0035] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0036] For sandwich structure wafers, the relevant technical solutions usually use fluorine-based gases in the initial etching process of the anti-reflection layer, and the focus ring bordering the edge of the wafer will also be etched by the fluorine-based plasma. Figure 1 As shown, the wafer 12 is placed on the wafer carrier 13 and fixed by the focusing ring 11; in addition, during the etching process, the focusing ring 11 is also used to improve the etching uniformity of the edge of the wafer 12. Therefore, the focusing ring 11 needs to have good corrosion resistance, high temperature stability and mechanical strength. The material of the focusing ring 11 in existing semiconductor process equipment is generally quartz or ceramic.

[0037] The inventor of the present invention has found through research that the focus ring 11 made of oxide materials such as quartz or ceramic will release a certain amount of oxygen under the etching of fluorine-based plasma due to its material. The oxygen free radicals formed will increase the etching rate of the photoresist in the sandwich structure. In addition, due to the existence of the vacuum system of the process chamber during the etching process, the oxygen free radicals released by the focus ring 11 cannot diffuse to the center of the wafer 12, and will only affect the edge area of ​​the wafer adjacent to the focus ring 11, which is about 10 mm away from the edge of the wafer. Figure 1 The dotted line area causes etching anomalies at the edge of the wafer, which is directly manifested as a difference in the critical dimension (CD). For example, due to the release of oxygen by the focus ring 11 during the etching of the anti-reflection layer, the CD at the edge of the wafer will suddenly decrease by 3nm to 7nm (6% to 14%) compared with other positions; in particular, this CD change is not a gradual decrease from the center of the wafer to the edge, but a sudden decrease at the edge of the wafer, thereby reducing the uniformity of wafer etching.

[0038] Based on this, an embodiment of the present invention provides a wafer etching method and semiconductor process equipment. Without changing the focusing ring material, a first carbon-containing layer of a preset thickness is first deposited on the focusing ring before the wafer enters the process chamber. Then, after the wafer enters the process chamber, the film layer below the photoresist layer is etched to transfer the pattern of the photoresist layer to the film layer below. Since the first carbon-containing layer of a preset thickness is deposited on the focusing ring, abnormal etching at the edge of the wafer due to the focusing ring material during the etching process is avoided, thereby improving the uniformity of wafer etching.

[0039] To facilitate understanding of this embodiment, the embodiment of the present invention is described in detail below.

[0040] Embodiment 1

[0041] An embodiment of the present invention provides a wafer etching method, which is applied to semiconductor process equipment, wherein a focusing ring surrounding a wafer carrier is provided in a process chamber of the semiconductor process equipment, and a patterned photoresist layer is formed on the wafer. Since quartz or ceramic focusing rings are commonly used in semiconductor process equipment, the focusing ring is preferably made of quartz or ceramic material, so that the wafer etching method has a certain degree of universality without changing the focusing ring material.

[0042] Specifically, Figure 2 As shown, the wafer etching method comprises the following steps:

[0043] Step S202 , before the wafer enters the process chamber, a first carbon-containing layer with a preset thickness is deposited on the focus ring.

[0044] Specifically, before the wafer enters the process chamber, the process chamber is first pre-treated with carbon layer deposition to deposit a carbon-based polymer, i.e., a first carbon-containing layer, of a preset thickness on the focus ring. In the subsequent wafer etching process, since the first carbon-containing layer is deposited on the focus ring, the situation where etching abnormalities at the edge of the wafer due to oxygen released by the focus ring are avoided, thereby improving the uniformity of wafer etching.

[0045] Step S204 , controlling the wafer to enter the process chamber, and etching the film layer below the photoresist layer to transfer the pattern of the photoresist layer to the film layer below.

[0046] The above-mentioned wafer etching method, without changing the hardware material of the semiconductor process equipment (i.e., the focusing ring material), first deposits a first carbon-containing layer of a preset thickness on the focusing ring before the wafer enters the process chamber, and then etches the film layer below the photoresist layer after the wafer enters the process chamber to transfer the pattern of the photoresist layer to the film layer below. Since the first carbon-containing layer of a preset thickness is deposited on the focusing ring, abnormal etching at the edge of the wafer due to the focusing ring material during the etching process is avoided, thereby improving the uniformity of wafer etching.

[0047] In one embodiment, before the step of depositing a first carbon-containing layer with a preset thickness on the focus ring, the method further includes: performing a waferless cleaning process on the process chamber.

[0048] Specifically, before depositing the first carbon-containing layer on the focusing ring, the process chamber is cleaned in a wafer-free state by a WAC (Waferless Auto Clean) process, thereby avoiding the process chamber from reducing the quality of subsequent wafer etching due to the deposition of byproducts in the previous process, thereby ensuring the uniformity of subsequent wafer etching. The specific cleaning process of the WAC process can refer to the existing WAC process, and the embodiment of the present invention will not be described in detail here.

[0049] Therefore, the embodiment of the present invention is equivalent to adding a carbon layer deposition pretreatment between the WAC process and the wafer etching process. For the sake of convenience, the WAC process and the carbon layer deposition pretreatment are collectively referred to as the pre-WAC process stage, and the wafer etching process is referred to as the wafer etching process stage. In practical applications, the pre-WAC process stage first cleans the process chamber in a wafer-free state, and then performs a carbon layer deposition pretreatment on the cleaned process chamber until a first carbon-containing layer of a preset thickness is deposited on the focusing ring; finally, the wafer is controlled to enter the process chamber, and the wafer is etched through the wafer etching process stage. Since the first carbon-containing layer is deposited on the focusing ring, the focusing ring will not be directly exposed to the fluorine-based gas during the etching process, thereby avoiding the situation where abnormal etching at the edge of the wafer is caused by the generation of oxygen free radicals by the focusing ring, thereby improving the uniformity of wafer etching.

[0050] In one embodiment, the wafer includes an anti-reflection layer below the photoresist layer, and the step of etching the film layer below the photoresist layer includes: etching the anti-reflection layer using a fluorine-containing gas to transfer the pattern of the photoresist layer to the anti-reflection layer.

[0051] In practical applications, the top film layer of the wafer usually adopts a sandwich structure. Specifically, for a wafer with a sandwich structure, the top film layer has a photoresist PR (Photo Resist) as the top layer, the middle layer is an anti-reflection layer, where the anti-reflection layer can be a DARC (Dielectric Anti-reflective Coating) or a Si-BARC (Silicon Bottom Anti-reflective Coating) silicon-containing bottom anti-reflection layer; the lower layer is a carbon-based film layer, where the carbon-based film layer can be an amorphous carbon (Amorphous carbon) or an organic film layer, etc. It should be noted that, for the sake of ease of distinction, the carbon-based film layer located in the lower layer of the top film layer of the wafer is referred to as the second carbon-containing layer, and the carbon-based film layer deposited on the focusing ring is referred to as the first carbon-containing layer.

[0052] Therefore, the sandwich structure wafer is Figure 3 As shown, a photoresist layer 31, an anti-reflection layer 32 and a second carbon-containing layer 33 are arranged in sequence from top to bottom. In addition, other film layers 34 are arranged below the sandwich structure, that is, below the second carbon-containing layer 33. Here, other film layers 34 can be film layers such as silicon oxide or silicon, and the embodiments of the present invention are not limited here.

[0053] When etching the wafer, the anti-reflection layer 32 is first etched using the photoresist layer 31 as a mask. During this process, the anti-reflection layer 32 is etched using a fluorine-containing gas to transfer the pattern of the photoresist layer 31 to the anti-reflection layer 32. After etching the anti-reflection layer, the wafer is as follows: Figure 4 As shown. Since a first carbon-containing layer of a preset thickness is deposited on the focus ring, the focus ring will not be directly exposed to the fluorine-based gas during the etching process, thereby avoiding the situation where the etching abnormality at the edge of the wafer is caused by the oxygen free radicals generated by the focus ring. Therefore, the focus ring deposited with the first carbon-containing layer does not abnormally reduce the critical dimension of the photoresist at the edge of the wafer, thereby ensuring that the critical dimension transferred to the anti-reflection layer 32 is normal.

[0054] In one embodiment, the wafer further includes a second carbon-containing layer located below the anti-reflection layer, and the method further includes: etching the second carbon-containing layer using an oxygen-containing gas, while eliminating the first carbon-containing layer deposited on the focus ring.

[0055] Specifically, after the anti-reflection layer 32 is completed, the anti-reflection layer 32 is used as a mask, and an oxygen-containing gas such as oxygen O2, sulfur dioxide SO2 or other etching gas is used to etch the second carbon-containing layer 33 below the anti-reflection layer 32, so as to transfer the pattern to the lower layer in the sandwich structure, that is, the second carbon-containing layer 33. At this time, the wafer structure is as follows: Figure 5As shown, since the thickness of the second carbon-containing layer 33 is relatively thick and its selectivity for other film layers 34 is relatively high, the over-etching amount is usually large, so that it can not only simultaneously and fully remove the first carbon-containing layer deposited on the focusing ring and the residual carbon deposits in the process chamber, but also will not affect the etching of subsequent film layers, thereby ensuring the etching effect of the wafer.

[0056] Therefore, in the process of etching the wafer, the embodiment of the present invention cleverly utilizes the characteristics of the sandwich structure, and covers the focusing ring with a first carbon-containing layer of a preset thickness in the pre-WAC process stage, thereby ensuring that the critical size of the photoresist at the edge of the wafer does not shrink abnormally during the etching process; at the same time, the gas used to subsequently etch the second carbon-containing layer is used to synchronously remove the first carbon-containing layer deposited on the focusing ring, thereby eliminating the adverse effects on subsequent film layer etching, thereby improving the uniformity of wafer etching and ensuring the etching effect of the wafer.

[0057] It should be noted that the wafer in the embodiment of the present invention can be a wafer with a sandwich structure, that is, the top film layer structure of the wafer includes a photoresist layer, an anti-reflection layer and a carbon-based film layer (that is, a second carbon-containing layer) arranged in sequence from top to bottom; it can also be a wafer including a sandwich structure and other film layers, such as a wafer including a sandwich structure and an upper mask being a soft mask.

[0058] In one embodiment, the preset thickness is determined according to the thickness of the anti-reflection layer and the etching selectivity ratio between the anti-reflection layer and the first carbon-containing layer deposited on the focus ring.

[0059] Specifically, in the pre-WAC process stage, the deposition amount of the first carbon-containing layer deposited on the focus ring cannot be too large. If the first carbon-containing layer is deposited too much, it will greatly affect the chamber environment during the wafer etching process, resulting in an etch stop (Etch stop) during the etching of the anti-reflection layer, and the anti-reflection layer cannot be opened smoothly. At the same time, the deposition of the first carbon-containing layer cannot be too small. It is necessary to ensure that the first carbon-containing layer deposited on the focus ring is not completely consumed in the step of etching the anti-reflection layer to ensure that the material of the focus ring itself is not exposed to the fluorine-based plasma environment.

[0060] Therefore, in the pre-WAC process stage, the carbon layer deposition pretreatment step needs to comprehensively control its process parameters such as RF power, gas pressure and time according to the thickness of the anti-reflection layer without affecting the subsequent normal etching, so as to ensure the appropriate amount of deposition. In addition, the deposition thickness can be estimated according to the etching selectivity ratio of the first carbon-containing layer and the anti-reflection layer in the step of etching the anti-reflection layer. For example, when the thickness of the anti-reflection layer is 30nm and the etching selectivity ratio of the first carbon-containing layer and the anti-reflection layer is 1:2, the thickness of the first carbon-containing layer can be controlled to be about 15nm, that is, the preset thickness of the first carbon-containing layer is determined according to the thickness of the anti-reflection layer and the etching selectivity ratio of the anti-reflection layer and the first carbon-containing layer, and the first carbon-containing layer is controlled to reach the preset thickness in the deposition step, which not only avoids the situation where the etching at the edge of the wafer is abnormal due to the material of the focusing ring during the etching process, but also avoids affecting the chamber environment during the wafer etching process, thereby ensuring the etching effect of the wafer.

[0061] It should be noted that the etching selectivity ratio of the anti-reflection layer and the first carbon-containing layer can be obtained from the process recipe. In addition, in the pre-WAC process stage, in addition to reaching a preset thickness, the first carbon-containing layer must also reach a certain density during the deposition process to ensure that the deposition amount of the first carbon-containing layer is appropriate. The density can be determined according to the pressure during the deposition process, etc., and the embodiment of the present invention does not limit this.

[0062] In one embodiment, the process gas for forming the first carbon-containing layer includes a deposition gas, wherein the deposition gas includes a hydrocarbon gas and / or a hydrocarbon-fluorine gas. In addition, the process gas also includes a dilution gas, and the flow ratio of the deposition gas to the dilution gas is 1:8 to 1:12.

[0063] Specifically, in the carbon layer deposition pretreatment step, a first carbon-containing layer of a preset thickness is formed on the focusing ring using a process gas. The process gas includes a deposition gas and a dilution gas, and the flow ratio of the deposition gas to the dilution gas is in the range of 1:8 to 1:12. In practical applications, the deposition gas includes hydrocarbon gases and / or hydrocarbon-fluorine gases, such as one or more of methane (CH4), fluoromethane (CH3F) and difluoromethane (CH2F2); the dilution gas includes one of the following: argon (Ar), helium (He) and nitrogen (N2), so that the first carbon-containing layer is ensured to reach a preset thickness by the deposition gas and the dilution gas. The specific deposition gas and the dilution gas can be set according to actual conditions.

[0064] In addition, process parameters are also set in the process of depositing the first carbon-containing layer of preset thickness on the focusing ring. Specifically, the process parameters include: the power of the upper RF power supply is 300W to 1200W; and / or, the power of the lower RF power supply is 0 to 50W; and / or, the pressure range of the process chamber is 5mT to 30mT, and the total gas flow rate is 200sccm to 500sccm; and / or, the temperature range of the wafer carrier such as the electrostatic chuck is 30℃ to 60℃; and / or, the duration of the process processing is 10s to 30s, so that the deposition effect of the first carbon-containing layer is further guaranteed by the process parameters, and the situation of abnormal etching at the edge of the wafer due to the material of the focusing ring in the subsequent etching process is avoided, and the influence on the chamber environment during the etching process is avoided, the uniformity of wafer etching is improved, and the etching effect of the wafer is guaranteed.

[0065] In summary, the wafer etching method provided in the embodiment of the present invention can perfectly solve the problem of abnormal reduction of key dimensions caused by abnormal etching at the edge of the wafer through the pre-WAC process stage without making major changes to the focus ring material. Among them, the pre-WAC process stage is to clean the process chamber without wafers and pre-treat the carbon polymer deposition before the formal etching in the process chamber, so that the carbon polymer (i.e., the first carbon-containing layer) of preset thickness is covered on the focus ring; then, the wafer etching process with the sandwich structure as the top film layer is connected, and the focus ring will not be directly exposed to the fluorine-based gas when the anti-reflection layer is first etched, and oxygen free radicals will not be generated, which cannot affect the photoresist etching rate and critical dimensions at the edge of the wafer, thereby compensating for the adverse effect of abnormal wafer edge etching caused by the focus ring's own material; and the first carbon-containing layer covered by the focus ring makes the wafer edge and non-edge etching environment more consistent, which is beneficial to improving the uniformity of wafer etching; and this method is widely applicable to focus rings that widely use quartz or ceramics, and wafers containing sandwich structures, has a certain universality, and is easy to promote and implement in practical applications.

[0066] Embodiment 2

[0067] Based on the above embodiments, the present invention provides another wafer etching method. Figure 6 As shown, the method comprises the following steps:

[0068] (1) Pre-WAC process stage: A pre-WAC process is performed in a process chamber without a wafer. The pre-WAC process is a process in which a carbon polymer deposition step is added to the end of the normal WAC process to deposit a first carbon-containing layer of a preset thickness on the focus ring. The pre-WAC process stage is divided into a normal WAC step and a carbon layer deposition pretreatment step. The process parameters of each step are shown in Table 1 below:

[0069] Table 1

[0070]

[0071] According to Table 1 above, in the pre-WAC process stage, the process parameters corresponding to the process chamber cleaning process under the normal WAC step can refer to the prior art, and the embodiments of the present invention will not be described in detail here. In the last step of carbon layer deposition pretreatment, CH4 is used as the deposition gas, and Ar is used as the dilution gas. The process parameters include: the pressure of the process chamber is 15mT, the power of the upper RF power supply is 500W, the power of the lower RF power supply is 0, the deposition gas CH4 flow rate is 20sccm, the dilution gas Ar flow rate is 200sccm, the temperature of the wafer carrier such as the electrostatic chuck is 40°C, and the process processing time, that is, the deposition time, is 20s. The values ​​of the specific process parameters can be adjusted according to actual conditions.

[0072] (2) Wafer etching process stage: After the pre-WAC process stage, the wafer is controlled to enter the process chamber, and the wafer is etched according to the sandwich structure of the wafer. The wafer etching process includes: anti-reflective layer etching (Si-Barc), second carbon-containing layer etching (Organic Dielectric Layer, ODL) and normal etching process steps. A trim is also set between Si-Barc and ODL. Here, the normal etching process steps are divided into: ME (Main Etch, main etching) step, SL (Stereo lithography, photocuring) step and ASH (Atomic Layer Etching, ash) step; for example, the process parameters of each step are shown in Table 2 below:

[0073] Table 2

[0074]

[0075] According to Table 2 above, in the wafer etching process stage, the process parameters of each step are set as follows:

[0076] ① Si-Barc step: the pressure of the process chamber is 6mT, the power of the upper RF power supply is 550W, the power of the lower RF power supply is 80W, the CF4 flow rate in the etching gas is 40sccm, the CHF3 flow rate is 80sccm, the dilution gas Ar flow rate is 70sccm, the temperature of the wafer carrier such as the electrostatic chuck is 45°C, and the process time is 30s;

[0077] ②Trim step: the pressure of the process chamber is 10mT, the power of the upper RF power supply is 400W, the power of the lower RF power supply is 0W, the etching gas CF4 flow rate is 50sccm, the dilution gas Ar flow rate is 150sccm, the temperature of the wafer carrier such as the electrostatic chuck is 60°C, and the process time is 12s;

[0078] ③ODL step: The pressure of the process chamber is 8mT, the power of the upper RF power supply is 1000W, the power of the lower RF power supply is 120W, the O2 flow rate in the etching gas is 35sccm, the SO2 flow rate is 80sccm, the temperature of the wafer carrier such as the electrostatic chuck is 53°C, and the process time is 55s;

[0079] ④ME step: the pressure of the process chamber is 5mT, the power of the upper RF power supply is 400W, the power of the lower RF power supply is 400W, the CF4 flow rate in the etching gas is 150sccm, the CH3F flow rate is 6sccm, the SF6 flow rate is 16sccm, the dilution gas N2 flow rate is 20sccm, the temperature of the wafer carrier such as the electrostatic chuck is 55°C, and the process time is 25s;

[0080] ⑤SL step: the pressure of the process chamber is 6mT, the power of the upper RF power supply is 300W, the power of the lower RF power supply is 60W, the HBr flow rate in the etching gas is 180sccm, the O2 flow rate is 16sccm, the dilution gas Ar flow rate is 100sccm, the temperature of the wafer carrier such as the electrostatic chuck is 50°C, and the process time is 28s;

[0081] ⑥ASH step: the pressure of the process chamber is 10mT, the power of the upper RF power supply is 800W, the power of the lower RF power supply is 0W, the flow rate of etching gas O2 is 200sccm, the temperature of the wafer supporting device such as the electrostatic chuck is 60°C, and the process time is 60s.

[0082] It should be noted that the values ​​of the process parameters in the above steps can be adaptively adjusted according to actual conditions.

[0083] For example, when the pre-WAC process is not used, that is, only the conventional WAC process is used to clean the process chamber, the critical dimension of the mandrel at the edge of the wafer after etching is 7nm (14%) smaller than that of the central area, and the empirical rule 3-Sigma is 4.24nm, such as Figure 7 As shown, it can be seen that the edge critical dimension reduction anomaly is mainly distributed at the 6 o'clock and 9 o'clock directions of the wafer. This is because the position for measuring the critical dimension is at the lower left corner of the repeating unit (Die), which makes the measured position of the Die at 6 o'clock and 9 o'clock directions closer to the edge of the wafer and is most affected by the focus ring.

[0084] However, when the wafer etching method provided by the embodiment of the present invention is adopted, that is, the first carbon-containing layer is deposited on the focus ring through the carbon layer deposition pretreatment step after the conventional WAC process, under the same wafer etching process conditions, Figure 8 As shown in the figure, the critical dimension of the mandrel at the edge of the wafer after etching is basically the same as that in the central area, and its empirical rule 3-Sigma value is improved from 4.24nm to 1.33nm. Therefore, the uniformity of wafer etching is improved by the pre-WAC process.

[0085] In addition, after the pre-WAC process was adopted, the average value of the critical dimension increased from 45.84nm to 49.52nm. On the one hand, it was due to the improvement of the abnormal reduction of the critical dimension at the edge of the wafer. On the other hand, the deposition step of the first carbon-containing layer in the pre-WAC process may affect the chamber environment, which may cause the overall etching rate of the anti-reflection layer etching step (Si-Barc) and the critical dimension reduction step (Trim) to decrease, resulting in an increase in the overall critical dimension. It should be noted that the stability and consistency of the critical dimension can be assisted by increasing the time of the Trim step.

[0086] In summary, the wafer etching method provided in the embodiment of the present invention can perfectly solve the problem of abnormal reduction of key dimensions caused by abnormal etching at the edge of the wafer without changing the focusing ring material, that is, without changing the hardware of the semiconductor process equipment, by depositing the first carbon-containing layer on the focusing ring in the pre-WAC process stage. This not only improves the etching uniformity of the wafer, but also has a certain universality.

[0087] Embodiment 3

[0088] The embodiment of the present invention also provides a semiconductor process equipment, such as Fig. 9 As shown, the semiconductor process equipment 200 may include a process chamber 20, an inlet assembly 20A, an upper electrode assembly 20B and a lower electrode assembly 20C, a gas extraction assembly 20D and a controller ( Fig. 9 not shown).

[0089] The process chamber 20 is provided with a focusing ring ( Fig. 9 The controller includes at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method of the above embodiment is implemented.

[0090] Exemplarily, the controller can be a host computer or a slave computer. The controller can control the valve opening of the air inlet component 20A to introduce the corresponding process gas into the process chamber 20; the controller can also control the opening and closing degree of the valve of the air inlet component 20A to control the flow rate of the process gas. The controller can also control the exhaust component 20D to exhaust the interior of the process chamber 20, such as controlling the valve opening degree or the exhaust pump speed of the exhaust component 20D, to control the pressure inside the process chamber 20, discharge reaction byproducts, etc.

[0091] The upper electrode assembly 20B may include an RF coil 21, an upper RF power source 23 and an upper matcher 25. The controller is also used to control the upper RF power source 23 to provide RF power to the RF coil 21 through the upper matcher 25, so that the RF coil 21 excites the process gas inside the process chamber 20 to generate plasma.

[0092] The lower electrode assembly 20C may include a wafer carrier 22, a lower RF power supply 24, and a lower matcher 26. The controller is also used to control the lower RF power supply 24 to provide RF power to the wafer carrier 22 through the lower matcher 26 to provide RF bias. The wafer carrier 22 may be, for example, an electrostatic chuck, a mechanical chuck, or a vacuum adsorption chuck.

[0093] It should be noted that the semiconductor process equipment 200 of the embodiment of the present invention may be an inductively coupled plasma (ICP) device or a capacitively coupled plasma (CCP) device. The embodiment of the present invention does not limit the type of the semiconductor process equipment 200.

[0094] The semiconductor process equipment provided by the embodiment of the present invention has the same technical features as the wafer etching method provided by the above embodiment, and can therefore solve the same technical problems and achieve the same technical effects.

[0095] This embodiment also provides a machine-readable storage medium, which stores machine-executable instructions. When the machine-executable instructions are called and executed by a processor, the machine-executable instructions prompt the processor to implement the above-mentioned wafer etching method.

[0096] The computer program product of the wafer etching method and semiconductor process equipment provided in the embodiments of the present invention includes a computer-readable storage medium storing program code. The instructions included in the program code can be used to execute the methods described in the previous method embodiments. The specific implementation can be found in the method embodiments and will not be repeated here.

[0097] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working process of the system and device described above can refer to the corresponding process in the aforementioned method embodiment, and will not be repeated here.

[0098] In addition, in the description of the embodiments of the present invention, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0099] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0100] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0101] Finally, it should be noted that the above-described embodiments are only specific implementations of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The protection scope of the present invention is not limited thereto. Although the present invention is described in detail with reference to the above-described embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-described embodiments within the technical scope disclosed by the present invention, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A wafer etching method, applied to a semiconductor process equipment, wherein a process chamber of the semiconductor process equipment is provided with a focusing ring surrounding a wafer carrier, and a patterned photoresist layer is formed on the wafer; characterized in that: The method comprises: Before the wafer enters the process chamber, depositing a first carbon-containing layer of a preset thickness on the focus ring; The wafer is controlled to enter the process chamber, and the film layer below the photoresist layer is etched to transfer the pattern of the photoresist layer to the film layer below.

2. The method according to claim 1, characterized in that Before the step of depositing a first carbon-containing layer of a preset thickness on the focusing ring, the method further comprises: A waferless cleaning process is performed on the process chamber.

3. The method according to claim 1, characterized in that The wafer includes an anti-reflection layer located below the photoresist layer, and the step of etching the film layer below the photoresist layer includes: The anti-reflection layer is etched by using a fluorine-containing gas to transfer the pattern of the photoresist layer to the anti-reflection layer.

4. The method according to claim 3, characterized in that The wafer further includes a second carbon-containing layer below the anti-reflective layer, and the method further includes: The second carbon-containing layer is etched by using oxygen-containing gas, and the first carbon-containing layer deposited on the focusing ring is eliminated at the same time.

5. The method according to claim 3, characterized in that: The preset thickness is determined according to the thickness of the anti-reflection layer and an etching selectivity ratio between the anti-reflection layer and the first carbon-containing layer deposited on the focus ring.

6. The method according to claim 1, characterized in that The process gas for forming the first carbon-containing layer includes a deposition gas; wherein the deposition gas includes a hydrocarbon gas and / or a hydrocarbon-fluorine gas.

7. The method according to claim 6, characterized in that The process gas further includes a dilution gas, and a flow ratio of the deposition gas to the dilution gas is 1:8 to 1:

12.

8. The method according to claim 1, characterized in that Process parameters for depositing a first carbon-containing layer of a preset thickness on the focusing ring include: The power of the upper RF power supply is 300W to 1200W; and / or, The power of the RF power supply is 0 to 50 W; and / or, The pressure range of the process chamber is 5mT to 30mT, and the total gas flow rate is 200sccm to 500sccm; and / or, The temperature range of the wafer carrier is 30° C. to 60° C.; and / or, The processing time is 10s to 30s.

9. A semiconductor process equipment, characterized in that: It comprises a process chamber and a controller; wherein the process chamber is provided with a focusing ring surrounding a wafer carrier; the controller comprises at least one processor and at least one memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the steps of the method described in any one of claims 1 to 8 are implemented.

10. The semiconductor process equipment according to claim 9, characterized in that: The focusing ring includes quartz or ceramic material.

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