Stacked packaging structure and packaging method

Abstract

The invention discloses a stack packaging structure and a packaging method, and the stack packaging structure comprises a first packaging substrate which comprises a first surface and a plurality of first welding surfaces, and the first surface of the first packaging substrate is provided with a signal connection end; and the plurality of device structures are arranged in one-to-one correspondence with the plurality of first welding surfaces, are welded on the first welding surfaces of the first packaging substrate, and are electrically connected with the first packaging substrate. According to the technical scheme, the integration level of the packaging structure can be improved.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of integrated circuits, and in particular to a stacked packaging structure and a packaging method. Background Art

[0002] Today's highly integrated packaging technology has achieved a compact layout of complex passive components, and the packaging process plays a key role in improving the performance and controlling the cost of passive components. Existing packaging technologies include ball grid array (BGA), chip scale package (CSP), wafer level package (WLP), three-dimensional package (3D Package) and system in package (SiP).

[0003] However, the existing packaging structure has the problem of low integration. Summary of the invention

[0004] The problem solved by the embodiments of the present invention is to provide a stacked package structure and a packaging method, which can improve the integration of the stacked package structure.

[0005] To solve the above problems, an embodiment of the present invention provides a stacked package structure, including:

[0006] A first packaging substrate, comprising a first surface and a plurality of first welding surfaces, wherein a signal connection terminal is arranged on the first surface of the first packaging substrate;

[0007] A plurality of device structures are arranged corresponding to the plurality of first welding surfaces one by one, welded on the first welding surface of the first packaging substrate, and electrically connected to the first packaging substrate.

[0008] Optionally, the device structure includes any one of a packaging structure and a chip.

[0009] Optionally, the plurality of first welding surfaces include a group of second surfaces and third surfaces that are arranged opposite to each other, and the device structure includes a first packaging structure and a second packaging structure;

[0010] A first packaging structure, welded on the second surface of the first packaging substrate and electrically connected to the first packaging substrate;

[0011] The second packaging structure is welded on the third surface of the first packaging substrate and is electrically connected to the first packaging substrate.

[0012] Optionally, the stacked package structure further includes: a first conductive connection structure, located between the first package structure and the second surface of the first package substrate, used to weld the first package structure to the second surface of the first package substrate and realize electrical connection between the first package structure and the first package substrate;

[0013] The second conductive connection structure is located between the second packaging structure and the third surface of the second packaging substrate, and is used to weld the second packaging structure to the third surface of the first packaging substrate and realize the electrical connection between the second packaging structure and the first packaging substrate.

[0014] Optionally, the first surface is a side surface of the first packaging substrate, the second surface is a back surface of the first packaging substrate, and the third surface is a front surface of the first packaging substrate.

[0015] Optionally, the first packaging structure and the second packaging structure respectively include:

[0016] A second packaging substrate, comprising a second welding surface;

[0017] A first chip is soldered on the second soldering surface of the second packaging substrate and is electrically connected to the second packaging substrate;

[0018] The plastic packaging layer is located on the second packaging substrate and covers the first chip.

[0019] Optionally, the first packaging structure and the second packaging structure further include: a third conductive connection structure, located between the first chip and the second packaging substrate, used to weld the first chip to the second welding surface of the second packaging substrate, and used to achieve electrical connection between the first chip and the second packaging substrate.

[0020] Optionally, the first packaging structure and the second packaging structure further include: a bottom filling layer, which is located between the first chip and the second packaging substrate and also fills the gaps between the third conductive connection structures.

[0021] Optionally, the first packaging structure and the second packaging structure further include: a first passive component, which is located on the second packaging substrate and is electrically connected to the second packaging substrate.

[0022] Optionally, the first packaging structure and the second packaging structure further include: a second passive element, located above the first chip and electrically connected to the second packaging substrate.

[0023] Optionally, the first packaging structure and the second packaging structure further include: a connecting column, which is located on the second packaging substrate where the first chip is exposed, and is used to achieve electrical connection between the second passive component and the second packaging substrate.

[0024] Optionally, the first packaging structure and the second packaging structure further include: an adhesive layer, located between the second passive component and the first chip, for adhering the second passive component to the first chip.

[0025] Optionally, a surface of the second packaging substrate away from the first surface of the first packaging substrate is a fourth surface;

[0026] The stacked packaging structure also includes: a third device structure, which is respectively welded to the fourth surface of the second substrate of the first packaging structure and the fourth surface of the second substrate of the second packaging structure, and is respectively electrically connected to the second packaging substrate of the first packaging structure and the second packaging substrate of the second packaging structure.

[0027] Optionally, the stacked packaging structure also includes: a fourth conductive connection structure, located between the third device structure and the fourth surface of the second packaging substrate of the first packaging structure and the fourth surface of the second packaging substrate of the second packaging structure, and used to weld the third device structure and the fourth surface of the second packaging substrate of the first packaging structure and the fourth surface of the second packaging substrate of the second packaging structure, and to achieve electrical connection between the third device structure and the second packaging substrate of the first packaging structure and the second packaging substrate of the second packaging structure.

[0028] Optionally, the third device structure includes any one of a packaging structure, a chip or a passive component.

[0029] Accordingly, an embodiment of the present invention further provides a packaging method, comprising:

[0030] Providing a first packaging substrate, comprising a first surface and a plurality of first welding surfaces, wherein a signal connection terminal is arranged on the first surface of the first packaging substrate;

[0031] Providing a plurality of device structures, wherein the plurality of device structures correspond one-to-one to the plurality of first welding surfaces;

[0032] The plurality of device structures are respectively welded on the welding surface of the first packaging substrate, and electrical connection between the plurality of device structures and the first packaging substrate is achieved.

[0033] Optionally, the device structure includes any one of a packaging structure and a chip.

[0034] Optionally, the plurality of first welding surfaces include a group of second surfaces and third surfaces that are disposed opposite to each other;

[0035] The providing of multiple device structures includes: providing a first packaging structure and a second packaging structure;

[0036] The step of respectively welding the multiple device structures on the welding surface of the first packaging substrate and realizing electrical connection between the multiple device structures and the first packaging substrate includes: respectively welding the first packaging structure and the second packaging structure on the second surface and the third surface of the first packaging substrate, and respectively realizing electrical connection between the first packaging structure and the second packaging structure and the first packaging substrate.

[0037] Optionally, in the step of providing a first packaging structure and a second packaging structure, the first packaging structure and the second packaging structure respectively include: a second packaging substrate, including a second welding surface; a first chip, welded to the second welding surface of the second packaging substrate and electrically connected to the second packaging substrate; and a plastic packaging layer, located on the second packaging substrate and covering the first chip.

[0038] Optionally, a surface of the second packaging substrate away from the first surface of the first packaging substrate is a fourth surface;

[0039] The method also includes: providing a third device structure; welding the first packaging structure and the second packaging structure to the second surface and the third surface of the first packaging substrate, respectively, and realizing electrical connection between the first packaging structure and the second packaging structure and the first packaging substrate, respectively, and then welding the third device structure to the fourth surface of the second substrate of the first packaging structure and the fourth surface of the second substrate of the second packaging structure, respectively, and realizing electrical connection between the third device structure and the second packaging substrate of the first packaging structure and the second packaging substrate of the second packaging structure.

[0040] Compared with the prior art, the technical solution of the embodiment of the present invention has the following advantages:

[0041] An embodiment of the present invention provides a stacked packaging structure, including: a first packaging substrate, including a first surface and multiple first welding surfaces, a signal connection terminal is arranged on the first surface of the first packaging substrate; multiple device structures are arranged one by one corresponding to the multiple first welding surfaces, welded on the first welding surface of the first packaging substrate, and electrically connected to the first packaging substrate.

[0042] In the stacked packaging structure provided by an embodiment of the present invention, the first packaging substrate includes multiple first welding surfaces, and the first welding surfaces are respectively welded with corresponding device structures. Compared with the existing method of welding the device structure only on one side of the first packaging substrate, the integration of the stacked packaging structure can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Figure 1 It is a structural schematic diagram of an embodiment of a stacked packaging structure provided by the technical solution of the present invention;

[0044] Figure 2 It is a structural schematic diagram of another embodiment of the stacked packaging structure provided by the technical solution of the present invention;

[0045] Figures 3 to 5 It is a schematic diagram of an intermediate structure formed by each step in an embodiment of a packaging method provided by the technical solution of the present invention;

[0046] Figure 6 to Figure 7 It is a schematic diagram of an intermediate structure formed by each step in another embodiment of the packaging method provided by the technical solution of the present invention. DETAILED DESCRIPTION

[0047] As can be seen from the background technology, the existing packaging structure has the problem of high cost.

[0048] In order to solve the above technical problems, an embodiment of the present invention provides a stacked packaging structure, including: a first packaging substrate, including a first surface and multiple first welding surfaces, a signal connection terminal is arranged on the first surface of the first packaging substrate; multiple device structures are arranged one by one corresponding to the multiple first welding surfaces, welded on the first welding surface of the first packaging substrate, and electrically connected to the first packaging substrate.

[0049] In the stacked packaging structure provided by an embodiment of the present invention, the first packaging substrate includes multiple first welding surfaces, and the multiple first welding surfaces are respectively welded with corresponding device structures. Compared with the existing method of welding the device structure only on one side of the first packaging substrate, the integration of the stacked packaging structure can be improved.

[0050] In order to make the above-mentioned purposes, features and advantages of the embodiments of the present invention more obvious and understandable, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0051] Figure 1 1 is a schematic diagram of a stacked package structure according to an embodiment of the present invention. Figure 1 A stacked packaging structure includes: a first packaging substrate 100, including a first surface 101 and first welding surfaces 1021 and 1022, wherein a signal connection terminal 1011 is exposed on the first surface 101 of the first packaging substrate 100; a first packaging structure 21, welded on the first welding surface 1021 of the first packaging substrate 100, and electrically connected to the first packaging substrate 100; a second packaging structure 22, welded on the first welding surface 1022 of the first packaging substrate 100, and electrically connected to the first packaging substrate 100.

[0052] The first packaging substrate 100 is used to achieve welding with the first packaging structure 21 and the second packaging structure 22 , thereby achieving packaging integration and electrical integration between the first packaging substrate 100 and the first packaging structure 21 and the second packaging structure 22 .

[0053] Specifically, the first packaging substrate 100 has a conductive circuit, which is used to supply power to multiple device structures or transmit electrical signals, thereby realizing the packaging integration of multiple device structures. At the same time, integrating multiple device structures on the first packaging substrate 100 is conducive to improving the integration of the stacked packaging structure.

[0054] In this embodiment, the first packaging substrate 100 includes a first dielectric layer 110 and a first redistribution layer 120 located in the first dielectric layer 110 .

[0055] The first dielectric layer 110 is used to achieve electrical isolation between the first re-wiring layers 120 , thereby reducing the risk of electrical leakage between adjacent first re-wiring layers 120 .

[0056] As an example, the material of the first dielectric layer 110 includes one or more of silicon oxide, silicon nitride, silicon oxynitride and polyimide.

[0057] The first redistribution layer 120 is used to electrically connect to a plurality of device structures, and through the first redistribution layer 120, the input ports and output ports on the plurality of device structures can be reallocated, which helps to improve the flexibility of electrical signal connection, and is beneficial to reduce the path length of electrical signal transmission and reduce the transmission delay of electrical signals.

[0058] As an example, the material of the first rewiring layer 120 is copper. In other embodiments, the material of the rewiring layer can also be at least one of aluminum and silver.

[0059] In this embodiment, an interconnection via structure 115 is disposed in the first dielectric layer 110 between adjacent first redistribution layers 120. The interconnection via structure 115 enables electrical connection between adjacent first redistribution layers 120.

[0060] As an example, the material of the interconnection via structure 115 is copper. In other embodiments, the material of the interconnection via structure can also be tungsten, cobalt, or tungsten-cobalt alloy, etc. Those skilled in the art can set it according to actual needs, and it is not limited here.

[0061] In this embodiment, the first packaging substrate 100 includes a first surface 101. Specifically, the first surface 101 of the first packaging substrate 100 is a side surface of the first packaging substrate 100.

[0062] The first surface 101 of the first packaging substrate 100 is used to realize signal transmission between the stacked packaging structure and the outside. Specifically, a signal connection terminal 1011 is exposed on the first surface 101 of the first packaging substrate 100, and the signal connection terminal 1011 is used to realize signal transmission between the first packaging substrate 100 and the outside, thereby realizing signal transmission between the stacked packaging structure and the outside. It can be understood that the signal connection terminal 1011 can be set on the first surface 101 of the first packaging substrate 100, and can also be set at the end of the first welding surface 1021 and 1022 of the first packaging substrate 100 close to the first surface 101.

[0063] In this embodiment, the first packaging substrate 100 further includes a set of first welding surfaces 1021 and 1022 arranged opposite to each other. Specifically, the first welding surfaces 1021 and 1022 are respectively the second surface and the third surface of the first packaging substrate 100. The second surface of the first packaging substrate 100 is the back surface of the first packaging substrate 100, and the third surface of the first packaging substrate 100 is the front surface of the first packaging substrate 100.

[0064] In this embodiment, the first welding surface 1021 of the first packaging substrate 100 is used to achieve welding with the first packaging structure 21 , and the first welding surface 1022 of the first packaging substrate 100 is used to achieve welding with the second packaging structure 22 .

[0065] In this embodiment, the first packaging substrate 100 includes an organic substrate or a glass substrate having a circuit.

[0066] Please refer to Figure 1 In this embodiment, the first packaging structure 21 and the second packaging structure 22 respectively include: a second packaging substrate 200, including a second welding surface 201; a first chip 210, welded on the second welding surface 201 of the second packaging substrate 200, and electrically connected to the second packaging substrate 200; a plastic packaging layer 220, located on the second packaging substrate 200, and covering the first chip 210.

[0067] The second packaging substrate 200 is used to provide a process platform for packaging the first chip 210 .

[0068] In this embodiment, the second packaging substrate 200 includes a second dielectric layer 201 ′ and a second redistribution layer 202 ′ located in the second dielectric layer.

[0069] As an example, the material of the second dielectric layer 201 ′ includes one or more of silicon oxide, silicon nitride, silicon oxynitride and polyimide.

[0070] The second redistribution layer 202' is used to electrically connect to the first chip 210. The second redistribution layer 202' can be used to reallocate input ports and output ports on the first chip 210, thereby helping to improve the flexibility of electrical signal connection, and helping to reduce the path length of electrical signal transmission and reduce electrical signal transmission delay.

[0071] The second redistribution layer 202 ′ is also used to be electrically connected to the first packaging substrate 100 , so as to achieve electrical connection between the first device structure 21 and the second device structure 22 and the first packaging substrate 100 .

[0072] As an example, the second packaging substrate 200 may be one of a silicon substrate, a re-distribution layer (RDL), a resin substrate, a printed circuit board (PCB), a ceramic substrate, a glass substrate or a flexible circuit board (FPC). As an example, the second packaging substrate 200 may be a single-layer board or a multi-layer board.

[0073] The first chip 210 is used to achieve packaging integration and electrical integration with the second packaging substrate 200 to form a corresponding packaging structure to meet corresponding functional requirements.

[0074] Specifically, the first chip 210 may be manufactured using integrated circuit manufacturing technology. The first chip 210 generally includes devices such as NMOS devices and / or PMOS devices formed on a semiconductor substrate.

[0075] For example, the first chip 210 can be one or more of a system-on-chip (SoC), a memory chip, an application-specific integrated circuit (ASIC) chip, a central processing unit (CPU) chip, a graphics processing unit (GPU) chip, and a field-programmable gate array (FPGA) chip.

[0076] According to actual needs, the number of the first chip 210 may be one or more. In the case where there are multiple first chips 210, the functions of the multiple first chips 210 are different.

[0077] Please continue to refer to Figure 1In this embodiment, the first chip 210 is welded on the second welding surface 201 of the second packaging substrate 200. Specifically, the first packaging structure 21 and the second packaging structure 22 also include: a third conductive connection structure 205, located between the first chip 210 and the second packaging substrate 200, used to weld the first chip 210 to the second welding surface 201 of the second packaging substrate 200, and used to achieve electrical connection between the first chip 210 and the second packaging substrate 200.

[0078] The third conductive connection structure 205 is used to electrically lead out the first chip 210, and is used to realize that the first chip 210 is disposed on the second rewiring layer 202' at the top layer, thereby reducing the risk of the first chip 210 and the second rewiring layer 202' being separated from each other. At the same time, the third conductive connection structure 205 is also used to realize the electrical connection between the first chip 210 and the second rewiring layer 202', so that the first chip 210 can be electrically connected to the second packaging substrate 200 through the third conductive connection structure 205.

[0079] In this embodiment, the third conductive connection structure 205 is a conductive bump.

[0080] Specifically, during the process of forming the first packaging structure and the second packaging structure, the third conductive connection structure 205 is formed by using a conductive bump process.

[0081] As an example, the material of the third conductive connection structure 205 includes one or more of gold, lead-tin, silver-tin, gold-tin and copper-tin.

[0082] In other embodiments, the back side of the first chip is attached to the front side of the second package substrate, and is electrically connected to the second package substrate through a lead wire. Specifically, the lead wire is a metal wire, and one end of the lead wire is connected to the first chip, and the other end is connected to the interconnection structure layer in the second package substrate, so as to realize the electrical connection between the first chip and the second package substrate.

[0083] Please continue to refer to Figure 1 In this embodiment, the first packaging structure 21 and the second packaging structure 22 also include: a bottom filling layer 230, which is located between the first chip 210 and the second packaging substrate 200, and also fills the gap between the third conductive connection structures 205.

[0084] The bottom filling layer 230 can protect the first chip 210 from the influence of the external environment, can reduce the influence of the mismatch of thermal expansion coefficients between the first chip 210 and the second packaging substrate 200, can redistribute stress and strain, avoid failure of the third conductive connection structure 205, and help to improve the reliability of welding between the first chip 210 and the second welding surface 201 of the second packaging substrate 200, thereby helping to improve the reliability of the obtained packaging structure.

[0085] As an example, the material of the bottom filling layer 230 includes epoxy resin. In other embodiments, the material of the bottom filling layer can also be made of other thermosetting materials, which can be selected by those skilled in the art according to actual needs, and is not limited here.

[0086] Please continue to refer to Figure 1 In this embodiment, the first packaging structure 21 and the second packaging structure 22 also include: a heat dissipation layer 240 formed on the first chip 210, and used to conduct the heat generated during the operation of the first chip 210 to the outside.

[0087] The heat dissipation layer 240 is used to conduct the heat generated during the operation of the first chip 210 to the outside, which can prevent the accumulation of heat generated during the operation of the first chip 210 and cause damage to the first chip 210, thereby protecting the first chip 210.

[0088] In this embodiment, the material of the heat dissipation layer 240 is copper. Copper has excellent thermal conductivity and can quickly conduct the heat generated by the first chip 210 during operation to the outside, which is beneficial to improving the heat dissipation efficiency.

[0089] In other embodiments, the heat dissipation layer can also be made of a metal material or alloy material suitable for use as a heat sink, such as aluminum, gold, nickel, steel, or stainless steel.

[0090] Please continue to refer to Figure 1 In this embodiment, the first packaging structure 21 and the second packaging structure 22 also include: a first passive component 250, which is located on the second welding surface 201 of the second packaging substrate 200 exposed by the first chip 210 and is electrically connected to the second packaging substrate 200.

[0091] The first passive element 250 is a passive device. A passive device is a passive device that can display its characteristics without an external power supply, and mainly includes resistors, inductors, and capacitors, such as at least one of resistors, capacitors, inductors, converters, gradienters, matching networks, resonators, filters, mixers, and switches.

[0092] The first passive component 250 can be welded to the second welding surface 201 of the second packaging substrate 200 through a bump, and realize electrical connection with the second packaging substrate 200. In other embodiments, other feasible welding methods can also be adopted.

[0093] The plastic packaging layer 220 is used to seal the first chip 210 and the first passive component 250 therein, thereby sealing the first chip 210 and the first passive component 250 and reducing the probability of the first chip 210 and the first passive component 250 being damaged, contaminated or oxidized.

[0094] The plastic packaging layer 220 is made of a plastic packaging material. The plastic packaging material has a relatively high strength, which can correspondingly improve the strength of the plastic packaging layer 220 , thereby facilitating the improvement of the strength of the packaging structure.

[0095] In this embodiment, the material of the plastic sealing layer 220 is epoxy resin. Epoxy resin has the advantages of low shrinkage, good adhesion, good corrosion resistance, excellent electrical properties and low cost, so it is widely used as a packaging material for electronic devices and integrated circuits.

[0096] In other embodiments, the material of the plastic sealing layer can also be other suitable materials, such as thermosetting materials such as polyimide or silicone.

[0097] In this embodiment, the plastic encapsulation layer 220 exposes the top surface of the heat dissipation layer 240 , so that the heat generated by the first chip 210 during operation can be quickly conducted to the outside, which is beneficial to improving the heat dissipation efficiency.

[0098] Please continue to refer to Figure 1 In this embodiment, the first packaging structure 21 and the second packaging structure 22 also include: a second passive component 260, which is located above the first chip 210 and is electrically connected to the second packaging substrate 200.

[0099] The second passive component 260 is located above the first chip 210, that is, the second passive component 260 and the first chip 210 are stacked in the vertical direction. Compared with the situation where the first chip 210 and the second passive component 260 are laid out in the horizontal direction, the area of ​​the second packaging substrate 200 occupied by the second passive component 260 can be reduced, and the volume of the packaging structure can be reduced, which correspondingly helps to improve the integration of the packaging structure and is beneficial to reducing the cost of the packaging structure.

[0100] In this embodiment, when a heat dissipation layer 240 is formed on the first chip 210 and the plastic packaging layer 220 exposes the top surface of the heat dissipation layer 240 , the second passive component 260 is located above the plastic packaging layer 220 and the heat dissipation layer 240 .

[0101] As an example, the second passive element 260 is an inductor. In other embodiments, the second passive element can also be at least one of a capacitor, a resistor, a converter, a gradienter, a matching network, a resonator, a filter, a mixer, a switch, and the like.

[0102] Please continue to refer to Figure 1 In this embodiment, the first packaging structure 21 and the second packaging structure 22 also include: a connecting column 270, which is located on the second packaging substrate 200 exposed by the first chip 210, and is used to achieve electrical connection between the second passive component 260 and the second packaging substrate 200.

[0103] Specifically, one end of the connecting column 270 is electrically connected to the second packaging substrate 200 , and the other end of the connecting column 270 is electrically connected to the second passive component 260 , thereby achieving electrical connection between the second passive component 260 and the second packaging substrate 200 .

[0104] In this embodiment, the material of the connecting column 270 is copper. In other embodiments, the material of the connecting column can also be metal materials such as aluminum, tin, and silver.

[0105] In this embodiment, there are multiple connecting pillars 270 , and the multiple connecting pillars 270 are arranged at intervals from each other.

[0106] In this embodiment, the plastic sealing layer 220 also covers the side wall of the connecting pillar 270 , so as to seal the connecting pillar 270 , thereby reducing the probability of the connecting pillar 270 being damaged, contaminated or oxidized.

[0107] Please continue to refer to Figure 1 In this embodiment, the first packaging structure 21 and the second packaging structure 22 also include: an adhesive layer 280 located between the second passive component 260 and the first chip 210, and used to adhere the second passive component 20 to the plastic packaging layer 220.

[0108] The adhesive layer 280 is used to adhere the second passive component 260 to the plastic packaging layer 220 , thereby further improving the fixing strength of the second passive component 260 .

[0109] In this embodiment, a heat dissipation layer 240 is further disposed above the first chip 210 , and when the plastic encapsulation layer 220 exposes the top surface of the heat dissipation layer 240 , the adhesive layer 280 is located between the second passive component 260 and the heat dissipation layer 240 and the plastic encapsulation layer 220 .

[0110] In this embodiment, the material of the adhesive layer 280 includes one or both of a resin adhesive and a double-sided adhesive film.

[0111] The first device structure and the second device structure in the embodiment of the present invention are described above by taking the first packaging structure and the second packaging structure as an example. It is understandable that the first packaging structure and the second packaging structure can also be different, which is not limited here.

[0112] The first packaging structure and the second packaging structure are described above by taking the first packaging structure and the second packaging structure as packaging structures respectively formed by ball grid array packaging process. In other embodiments, the first packaging structure and the second packaging structure can also be packaging structures formed by packaging processes such as chip size packaging, wafer level packaging, three-dimensional packaging and system packaging, which are not limited here.

[0113] Please continue to refer to Figure 1 The stacked packaging structure also includes: a first conductive connection structure 150, located between the first packaging structure 21 and the second surface of the first packaging substrate 100, used to weld the first packaging structure 21 to the second surface of the first packaging substrate 100, and realize the electrical connection between the first packaging structure 21 and the first packaging substrate 100.

[0114] As an example, the first conductive connection structure 150 is a solder ball or a bump. As an embodiment, the material of the solder ball includes tin. In other embodiments, other feasible connection methods can also be used, which are not limited here.

[0115] Accordingly, the first conductive connection structure 150 is formed by adopting a ball planting process or a conductive bump process.

[0116] Please continue to refer to Figure 1 The stacked packaging structure also includes: a second conductive connection structure 150', located between the second packaging structure 22 and the third surface of the second packaging substrate 100, used to weld the second packaging structure 22 to the third surface of the first packaging substrate 100, and realize the electrical connection between the second packaging structure 22 and the first packaging substrate 100.

[0117] As an example, the second conductive connection structure 150' is a solder ball or a bump. In other embodiments, other feasible connection methods may also be adopted, which are not limited here.

[0118] Accordingly, the second conductive connection structure 150 ′ is formed by adopting a ball planting process or a conductive bump process.

[0119] The stacked package structure in the embodiment of the present invention is described above with the plurality of device structures including a first package structure and a second package structure. It can be understood that at least one of the first package structure and the second package structure can also be a chip.

[0120] Figure 2 FIG. 1 is a schematic diagram showing another embodiment of a stacked package structure provided by the technical solution of the present invention. The similarities between this embodiment and the above embodiment are not repeated here. Figure 2 The difference between this embodiment and the previous embodiment is that: the side of the second packaging substrate 200 away from the first side 101 of the first packaging substrate 100 is the fourth side; the stacked packaging structure also includes: a second chip 23, which is respectively welded to the fourth side of the second packaging substrate 200 of the first packaging structure 21 and the fourth side of the second packaging substrate 200 of the second packaging structure 22, and is respectively electrically connected to the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22.

[0121] In this embodiment, the second chip 23 is different from the first chip 210 in the first packaging structure 21 and the first chip 210 in the second packaging structure 22 .

[0122] The second chip 23 is electrically connected to the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22 , respectively, so as to achieve electrical connection between the first packaging structure 21 and the second packaging structure 22 .

[0123] Please continue to refer to Figure 1 In this embodiment, the stacked packaging structure also includes: a fourth conductive connection structure 215, located between the second chip 23 and the fourth surface of the second packaging substrate 200 of the first packaging structure 21 and the fourth surface of the second packaging substrate 200 of the second packaging structure 22, and used to weld the second chip 23 to the fourth surface of the second packaging substrate 200 of the first packaging structure 21 and the fourth surface of the second packaging substrate 200 of the second packaging structure 22, and to achieve electrical connection between the second chip 23 and the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22.

[0124] As an example, the fourth conductive connection structure 215 is a solder ball or a bump. In other embodiments, other feasible connection methods may also be adopted, which are not limited here.

[0125] The second chip 23 is respectively welded to the fourth surface of the second packaging substrate 200 of the first packaging structure 21 and the fourth surface of the second packaging substrate 200 of the second packaging structure 22, and is respectively electrically connected to the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22, which is beneficial to further improve the integration of the stacked packaging structure.

[0126] The stacked package structure in the embodiment of the present invention is described above by taking the third device structure as the second chip 23 as an example. In other embodiments, the third device structure can also be a packaging structure or a passive component.

[0127] Correspondingly, an embodiment of the present invention also provides a packaging method.

[0128] Figures 3 to 5 A schematic diagram of an intermediate structure formed by each step in an embodiment of a packaging method provided by the technical solution of the present invention is shown.

[0129] Please refer to Figure 3 , providing a first packaging substrate 100, including a first surface 101 and first welding surfaces 1021, 1022, wherein a signal connection terminal 1011 is disposed on the first surface 101 of the first packaging substrate 100.

[0130] The first packaging substrate 100 provides a process platform for forming the stacked packaging structure.

[0131] In this embodiment, the first packaging substrate 100 is used to achieve welding with the first packaging structure 21 and the second packaging structure 22 , thereby achieving packaging integration and electrical integration between the first packaging substrate 100 and the first packaging structure 21 and the second packaging structure 22 .

[0132] In the step of providing the first packaging substrate 100, the first packaging substrate 100 has a conductive circuit, which is used to supply power to multiple device structures or transmit electrical signals, thereby realizing the packaging integration of multiple device structures. At the same time, the multiple device structures are integrated on the first packaging substrate 100, which is conducive to improving the integration of the stacked packaging structure.

[0133] In this embodiment, the first packaging substrate 100 includes a first dielectric layer 110 and a first redistribution layer 120 located in the first dielectric layer 110 .

[0134] The first dielectric layer 110 is used to achieve electrical isolation between the first re-wiring layers 120 , thereby reducing the risk of electrical leakage between adjacent first re-wiring layers 120 .

[0135] As an example, the material of the first dielectric layer 110 includes one or more of silicon oxide, silicon nitride, silicon oxynitride and polyimide.

[0136] The first redistribution layer 120 is used to electrically connect to multiple device structures. Through the first redistribution layer 120, the input ports and output ports on the multiple device structures can be reallocated, which can improve the flexibility of electrical signal connection, and is beneficial to reducing the path length of electrical signal transmission and reducing the transmission delay of electrical signals.

[0137] As an example, the material of the first rewiring layer 120 is copper. In other embodiments, the material of the rewiring layer can also be at least one of aluminum and silver.

[0138] In this embodiment, in the step of providing the first package substrate 100, an interconnection via structure 115 is provided in the first dielectric layer 110 between adjacent first redistribution layers 120. The interconnection via structure 115 enables electrical connection between adjacent first redistribution layers 120.

[0139] As an example, the material of the interconnection via structure 115 is copper. In other embodiments, the material of the interconnection via structure can also be tungsten, cobalt, or tungsten-cobalt alloy, etc. Those skilled in the art can set it according to actual needs, and it is not limited here.

[0140] In this embodiment, the first packaging substrate 100 includes a first surface 101. Specifically, the first surface 101 of the first packaging substrate 100 is a side surface of the first packaging substrate 100.

[0141] The first surface 101 of the first packaging substrate 100 is used to realize signal transmission between the stacked packaging structure and the outside. Specifically, a signal connection terminal 1011 is provided on the first surface 101 of the first packaging substrate 100, and the signal connection terminal 1011 is used to realize signal transmission between the first packaging substrate 100 and the outside, thereby realizing signal transmission between the stacked packaging structure and the outside.

[0142] In this embodiment, the first packaging substrate 100 further includes first welding surfaces 1021 and 1022. Specifically, the first welding surfaces 1021 and 1022 are respectively the second surface and the third surface of the first packaging substrate 100. The second surface of the first packaging substrate 100 is the back surface of the first packaging substrate 100, and the third surface of the first packaging substrate 100 is the front surface of the first packaging substrate 100.

[0143] In this embodiment, the first welding surface 1021 of the first packaging substrate 100 is used to achieve welding with the first device structure 21 , and the first welding surface 1022 of the first packaging substrate 100 is used to achieve welding with the second device structure 22 .

[0144] In this embodiment, the first packaging substrate 100 includes an organic substrate or a glass substrate having a circuit.

[0145] Please refer to Figure 4 , providing a first packaging structure 21 and a second packaging structure 22.

[0146] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22, the first packaging structure 21 and the second packaging structure 22 respectively include: a second packaging substrate 200, including a second welding surface 201; a first chip 210, welded on the second welding surface 201 of the second packaging substrate 200, and electrically connected to the second packaging substrate 200; a plastic packaging layer 220, located on the second packaging substrate 200, and covering the first chip 210.

[0147] The second packaging substrate 200 is used to provide a process platform for packaging the first chip 210 .

[0148] In this embodiment, the second packaging substrate 200 includes a second dielectric layer 201 ′ and a second redistribution layer 202 ′ located in the second dielectric layer.

[0149] As an example, the material of the second dielectric layer 201 ′ includes one or more of silicon oxide, silicon nitride, silicon oxynitride and polyimide.

[0150] The second redistribution layer 202' is used to electrically connect to the first chip 210. The first redistribution layer 120 can be used to reallocate input ports and output ports on the first chip 210, thereby helping to improve the flexibility of electrical signal connection, and helping to reduce the path length of electrical signal transmission and reduce electrical signal transmission delay.

[0151] The second redistribution layer 202 ′ is also used to be electrically connected to the first packaging substrate 100 , so as to achieve electrical connection between the first device structure 21 and the second device structure 22 and the first packaging substrate 100 .

[0152] As an example, the second packaging substrate 200 may be one of a silicon substrate, a re-distribution layer (RDL), a resin substrate, a printed circuit board (PCB), a ceramic substrate, a glass substrate or a flexible circuit board (FPC). As an example, the second packaging substrate 200 may be a single-layer board or a multi-layer board.

[0153] The first chip 210 is used to achieve packaging integration and electrical integration with the second packaging substrate 200 to form a corresponding packaging structure to meet corresponding functional requirements.

[0154] Specifically, the first chip 210 may be manufactured using integrated circuit manufacturing technology. The first chip 210 generally includes devices such as NMOS devices and / or PMOS devices formed on a semiconductor substrate.

[0155] For example, the first chip 210 can be one or more of a system-on-chip (SoC), a memory chip, an application-specific integrated circuit (ASIC) chip, a central processing unit (CPU) chip, a graphics processing unit (GPU) chip, and a field-programmable gate array (FPGA) chip.

[0156] According to actual needs, the number of the first chip 210 may be one or more. In the case where there are multiple first chips 210, the functions of the multiple first chips 210 are different.

[0157] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22, the first chip 210 is welded to the second welding surface 201 of the second packaging substrate 200. Specifically, the first packaging structure 21 and the second packaging structure 22 also include: a third conductive connection structure 205, located between the first chip 210 and the second packaging substrate 200, used to weld the first chip 210 to the second welding surface 201 of the second packaging substrate 200, and used to achieve electrical connection between the first chip 210 and the second packaging substrate 200.

[0158] The third conductive connection structure 205 is used to electrically lead out the first chip 210, and is used to realize that the first chip 210 is disposed on the second rewiring layer 202' at the top layer, thereby reducing the risk of the first chip 210 and the second rewiring layer 202' being separated from each other. At the same time, the third conductive connection structure 205 is also used to realize the electrical connection between the first chip 210 and the second rewiring layer 202', so that the first chip 210 can be electrically connected to the second packaging substrate 200 through the third conductive connection structure 205.

[0159] In this embodiment, the third conductive connection structure 205 is a conductive bump.

[0160] Specifically, during the process of forming the first packaging structure and the second packaging structure, the third conductive connection structure 205 is formed by using a conductive bump process.

[0161] As an example, the material of the third conductive connection structure 205 includes one or more of gold, lead-tin, silver-tin, gold-tin and copper-tin.

[0162] In other embodiments, in the step of providing the packaging structure and the second packaging structure, the back side of the first chip is attached to the front side of the second packaging substrate, and is electrically connected to the second packaging substrate through a lead. Specifically, the lead is a metal wire, and one end of the lead is connected to the first chip, and the other end is connected to the interconnection structure layer in the second packaging substrate, so as to achieve electrical connection between the first chip and the second packaging substrate.

[0163] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22, the first packaging structure 21 and the second packaging structure 22 respectively further include: a bottom filling layer 230, which is located between the first chip 210 and the second packaging substrate 200, and also fills the gap between the third conductive connection structure 205.

[0164] The bottom filling layer 230 can protect the first chip 210 from the influence of the external environment, can reduce the influence of the mismatch of thermal expansion coefficients between the first chip 210 and the second packaging substrate 200, can redistribute stress and strain, avoid failure of the third conductive connection structure 205, and help to improve the reliability of welding between the first chip 210 and the second welding surface 201 of the second packaging substrate 200, thereby helping to improve the reliability of the obtained packaging structure.

[0165] As an example, the material of the bottom filling layer 230 includes epoxy resin. In other embodiments, the material of the bottom filling layer can also be made of other thermosetting materials, which can be selected by those skilled in the art according to actual needs and are not limited here.

[0166] As an example, an underfill process is used to form the bottom filling layer 230. In other embodiments, other processes can also be used to form the bottom filling layer, which is not limited here.

[0167] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22, the first packaging structure 21 and the second packaging structure 22 also include: a heat dissipation layer 240 formed on the first chip 210, used to conduct the heat generated during the operation of the first chip 210 to the outside.

[0168] The heat dissipation layer 240 is used to conduct the heat generated during the operation of the first chip 210 to the outside, which can prevent the accumulation of heat generated during the operation of the first chip 210 and cause damage to the first chip 210, thereby protecting the first chip 210.

[0169] In this embodiment, the material of the heat dissipation layer 240 is copper. Copper has excellent thermal conductivity and can quickly conduct the heat generated by the first chip 210 during operation to the outside, which is beneficial to improving the heat dissipation efficiency.

[0170] In other embodiments, the heat dissipation layer can also be made of a metal material or alloy material suitable for use as a heat sink, such as aluminum, gold, nickel, steel, or stainless steel.

[0171] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22, the first packaging structure 21 and the second packaging structure 22 respectively further include: a first passive component 250, which is located on the second welding surface 201 of the second packaging substrate 200 exposed by the first chip 210, and is electrically connected to the second packaging substrate 200.

[0172] The first passive element 250 is a passive device. A passive device is a passive device that can display its characteristics without an external power supply, and mainly includes resistors, inductors, and capacitors, such as at least one of resistors, capacitors, inductors, converters, gradienters, matching networks, resonators, filters, mixers, and switches.

[0173] The first passive component 250 can be welded to the second welding surface 201 of the second packaging substrate 200 through a bump, and realize electrical connection with the second packaging substrate 200. In other embodiments, other feasible welding methods can also be adopted.

[0174] The plastic encapsulation layer 220 is used to seal the first chip 210 and the first passive component 250 therein, so as to seal the first chip 210 and the first passive component 250, and reduce the probability of damage, contamination or oxidation of the first chip 210 and the first passive component 250. The plastic encapsulation layer 220 is made of a plastic encapsulation material, and the strength of the plastic encapsulation material is relatively large, which can correspondingly improve the strength of the plastic encapsulation layer 220, thereby facilitating the improvement of the strength of the packaging structure.

[0175] In this embodiment, the material of the plastic sealing layer 220 is epoxy resin. Epoxy resin has the advantages of low shrinkage, good adhesion, good corrosion resistance, excellent electrical properties and low cost, so it is widely used as a packaging material for electronic devices and integrated circuits.

[0176] In other embodiments, the material of the plastic sealing layer can also be other suitable materials, such as thermosetting materials such as polyimide or silicone.

[0177] In this embodiment, the plastic encapsulation layer 220 exposes the top surface of the heat dissipation layer 240 , so that the heat generated by the first chip 210 during operation can be quickly conducted to the outside, which is beneficial to improving the heat dissipation efficiency.

[0178] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22 , the first packaging structure 21 and the second packaging structure 22 respectively further include: a second passive component 260 located above the first chip 210 and electrically connected to the second packaging substrate 200 .

[0179] The second passive component 260 is located above the first chip 210, that is, the second passive component 260 and the first chip 210 are stacked in the vertical direction. Compared with the situation where the first chip 210 and the second passive component 260 are laid out in the horizontal direction, the area of ​​the second packaging substrate 200 occupied by the second passive component 260 can be reduced, and the volume of the packaging structure can be reduced, which correspondingly helps to improve the integration of the packaging structure and is beneficial to reducing the cost of the packaging structure.

[0180] In this embodiment, when a heat dissipation layer 240 is formed on the first chip 210 and the plastic packaging layer 220 exposes the top surface of the heat dissipation layer 240 , the second passive component 260 is located above the plastic packaging layer 220 and the heat dissipation layer 240 .

[0181] As an example, the second passive element 260 is an inductor. In other embodiments, the second passive element can also be at least one of a capacitor, a resistor, a converter, a gradienter, a matching network, a resonator, a filter, a mixer, a switch, and the like.

[0182] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22, the first packaging structure 21 and the second packaging structure 22 respectively further include: a connecting column 270, located on the second packaging substrate 200 exposed by the first chip 210, for realizing an electrical connection between the second passive component 260 and the second packaging substrate 200.

[0183] Specifically, one end of the connecting column 270 is electrically connected to the second packaging substrate 200 , and the other end of the connecting column 270 is electrically connected to the second passive component 260 , thereby achieving electrical connection between the second passive component 260 and the second packaging substrate 200 .

[0184] In this embodiment, the material of the connection pillar 270 is copper. In other embodiments, the material of the connection pillar can also be metal materials such as aluminum, tin, and silver.

[0185] In this embodiment, there are multiple connecting pillars 270 , and the multiple connecting pillars 270 are arranged at intervals from each other.

[0186] In this embodiment, the plastic sealing layer 220 also covers the side wall of the connecting pillar 270 , so as to seal the connecting pillar 270 , thereby reducing the probability of the connecting pillar 270 being damaged, contaminated or oxidized.

[0187] In this embodiment, in the step of providing the first packaging structure 21 and the second packaging structure 22 , the first packaging structure further includes: an adhesive layer 280 located between the second passive component 260 and the first chip 210 , for adhering the second passive component 20 to the plastic packaging layer 220 .

[0188] The adhesive layer 280 is used to adhere the second passive component 260 to the plastic packaging layer 220 , thereby further improving the fixing strength of the second passive component 260 .

[0189] In this embodiment, a heat dissipation layer 240 is further formed above the first chip 210 , and the plastic encapsulation layer 220 exposes the top surface of the heat dissipation layer 240 , and the adhesive layer 280 is located between the second passive component 260 and the heat dissipation layer 240 and the plastic encapsulation layer 220 .

[0190] In this embodiment, the material of the adhesive layer 280 includes one or both of a resin adhesive and a double-sided adhesive film.

[0191] The first device structure and the second device structure in the embodiment of the present invention are described above by taking the first packaging structure and the second packaging structure as an example. It is understandable that the first packaging structure and the second packaging structure can also be different, which is not limited here.

[0192] The first packaging structure and the second packaging structure are described above by taking the first packaging structure and the second packaging structure as packaging structures respectively formed by ball grid array packaging process. In other embodiments, the first packaging structure and the second packaging structure can also be packaging structures formed by packaging processes such as chip size packaging, wafer level packaging, three-dimensional packaging and system packaging, which are not limited here.

[0193] Please refer to Figure 5 , the first packaging structure 21 and the second packaging structure 22 are respectively welded to the first welding surfaces 1021 and 1022 of the first packaging substrate 100, and the first packaging structure 21 and the second packaging structure 22 are respectively electrically connected to the first packaging substrate 100.

[0194] In this embodiment, the first welding surfaces 1021 and 1022 of the first packaging substrate 100 include the second surface and the third surface of the first packaging substrate 100 , and the multiple device structures include a first packaging structure 21 and a second packaging structure 22 .

[0195] Correspondingly, the first packaging structure 21 and the second packaging structure 22 are respectively welded on the first welding surfaces 1021 and 1022 of the first packaging substrate 100, and the steps of realizing electrical connection between the first packaging structure 21 and the second packaging structure 22 and the first packaging substrate 100, respectively, include: welding the first packaging device structure 21 to the second surface of the first packaging substrate 100, welding the second packaging device structure 22 to the third surface of the first packaging substrate 100, and realizing electrical connection between the first packaging structure 21 and the second packaging structure 22 and the first packaging substrate 100, respectively.

[0196] In this embodiment, the steps of welding the first packaging device structure 21 to the second surface of the first packaging substrate 100 and realizing the electrical connection between the first packaging structure 21 and the first packaging substrate 100 include: setting a first conductive connection structure 150 between the second packaging substrate 200 of the first packaging device structure 21 and the first packaging substrate 100; welding the first packaging device structure 21 to the second surface of the first packaging substrate 100 through the first conductive connection structure 150, and realizing the electrical connection between the first packaging structure 21 and the first packaging substrate 100.

[0197] Among them, the step of setting a first conductive connection structure 150 between the second packaging substrate 200 of the first packaging device structure 21 and the first packaging substrate 100 includes: forming the first conductive connection structure 150 on a surface of the second packaging substrate 200 of the first packaging device structure 21 facing the second surface of the first packaging substrate 100, or forming the first conductive connection structure 150 on the second surface of the first packaging substrate 100, or forming a first sub-conductive connection structure on a surface of the second packaging substrate 200 of the first packaging device structure 21 facing the second surface of the first packaging substrate 100, and forming the second sub-conductive connection structure on the second surface of the first packaging substrate 100, and the first sub-conductive connection structure and the second sub-conductive connection structure constitute the first conductive connection structure 150.

[0198] The steps of welding the second packaging device structure 22 to the third surface of the first packaging substrate 100 and realizing the electrical connection between the second packaging device structure 22 and the first packaging substrate 100 include: setting a second conductive connection structure 150' between the second packaging substrate 200 of the second packaging device structure 22 and the first packaging substrate 100; welding the second packaging device structure 22 to the third surface of the first packaging substrate 100 through the second conductive connection structure 150', and realizing the electrical connection between the second packaging device structure 22 and the first packaging substrate 100.

[0199] Among them, the step of setting a second conductive connection structure 150' between the second packaging substrate 200 of the second packaging device structure 22 and the first packaging substrate 100 includes: forming a second conductive connection structure 150' on a surface of the second packaging substrate 200 of the second packaging device structure 22 facing the third surface of the first packaging substrate 100, or forming the second conductive connection structure 150' on the third surface of the first packaging substrate 100, or forming a third sub-conductive connection structure on a surface of the second packaging substrate 200 of the second packaging device structure 22 facing the third surface of the first packaging substrate 100, and forming the fourth sub-conductive connection structure on the third surface of the first packaging substrate 100, and the third sub-conductive connection structure and the fourth sub-conductive connection structure constitute the second conductive connection structure 150'.

[0200] In this embodiment, the first conductive connection structure 150 and the second conductive connection structure 150' are conductive bumps, respectively. Specifically, the material of the first conductive connection structure 150 and the second conductive connection structure 150' is tin.

[0201] As an example, the first conductive connection structure 150 and the second conductive connection structure 150' are respectively controllable collapse connections. Controllable collapse connections have excellent electrical and thermal properties, are suitable for mass production, and are conducive to reducing the size and weight of the packaging structure.

[0202] In this embodiment, the first conductive connection structure 150 and the second conductive connection structure 150 ′ are formed by using a conductive bump process.

[0203] Figure 6 and Figure 7 The schematic diagram of the intermediate structure formed by each step in another embodiment of the packaging method provided by the technical solution of the present invention is shown. The similarities between this embodiment and the above embodiment will not be repeated here.

[0204] Please refer to Figure 6 , providing a second chip 23.

[0205] In this embodiment, the second chip 23 is different from the first chip 210 in the first packaging structure 21 and the first chip 210 in the second packaging structure 22 .

[0206] Please refer to Figure 7, weld the first packaging device structure 21 to the second surface of the first packaging substrate 100, weld the second packaging device structure 22 to the third surface of the first packaging substrate 100, and respectively realize electrical connection between the first packaging structure 21 and the second packaging structure 22 and the first packaging substrate 100, then weld the second chip 23 to the fourth surface of the second packaging substrate 200 of the first packaging structure 21 and the fourth surface of the second packaging substrate 200 of the second packaging structure 22, and respectively realize electrical connection between the second chip 23 and the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22.

[0207] In this embodiment, the second chip 23 is welded to the fourth surface of the second packaging substrate 200 of the first packaging structure 21 and the fourth surface of the second packaging substrate 200 of the second packaging structure 22, and the steps of respectively realizing electrical connection between the second chip 23 and the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22 include: forming a fourth conductive connection structure 215 on one surface of the second packaging substrate 200 of the second chip 23 facing the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22; and welding the second chip 23 to the fourth surface of the second packaging substrate 200 of the first packaging structure 21 and the fourth surface of the second packaging substrate 200 of the second packaging structure 22 through the fourth conductive connection structure 215, and respectively realizing electrical connection between the second chip 23 and the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22.

[0208] In other embodiments, in the steps of respectively welding the second chip to the fourth surface of the second packaging substrate of the first packaging structure and the fourth surface of the second packaging substrate of the second packaging structure, and respectively realizing electrical connection between the second chip and the second packaging substrate of the first packaging structure and the second packaging substrate of the second packaging structure, the fourth conductive connection structure can be formed on the fourth surface of the second packaging substrate of the first packaging structure and the fourth surface of the second packaging substrate of the second packaging structure, respectively, or a first sub-conductive connection structure can be formed on a surface of the second packaging substrate of the first packaging device structure facing the second surface of the first packaging substrate, and the sixth sub-conductive connection structure is formed on the fourth surface of the second packaging substrate of the first packaging structure and the fourth surface of the second packaging substrate of the second packaging structure, and the fifth sub-conductive connection structure and the sixth sub-conductive connection structure constitute the fourth conductive connection structure.

[0209] As an example, the fourth conductive connection structure 215 is a solder ball or a bump. Accordingly, the fourth conductive connection structure 215 is formed by a ball implantation process or a conductive bump process.

[0210] The second chip 23 is electrically connected to the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22 , respectively, so as to achieve electrical connection between the first packaging structure 21 and the second packaging structure 21 .

[0211] The second chip 23 is respectively welded to the fourth surface of the second packaging substrate of the first packaging structure 21 and the fourth surface of the second packaging substrate 200 of the second packaging structure 22, and is respectively electrically connected to the second packaging substrate 200 of the first packaging structure 21 and the second packaging substrate 200 of the second packaging structure 22, which is beneficial to further improve the integration of the stacked packaging structure.

[0212] The above description is made by taking the third device structure as the second chip as an example to describe the packaging method in this embodiment. In other embodiments, the third device structure can also be a packaging structure or a passive component.

[0213] The above-mentioned embodiments of the present invention are combinations of elements and features of the present invention. Unless otherwise mentioned, elements or features may be considered as optional. Each element or feature may be put into practice without being combined with other elements or features. In addition, embodiments of the present invention may be constructed by combining some elements and / or features. The order of operations described in the embodiments of the present invention may be rearranged. Some configurations of any one embodiment may be included in another embodiment, and may be replaced by the corresponding configuration of another embodiment. It is obvious to those skilled in the art that claims that do not have a clear reference relationship to each other in the attached claims may be combined into embodiments of the present invention, or may be included as new claims in the amendment after submitting this application.

[0214] The above description of the disclosed embodiments enables those skilled in the art to implement or use the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.

[0215] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A stacked package structure, characterized in that: include: A first packaging substrate, comprising a first surface and a plurality of first welding surfaces, wherein a signal connection terminal is arranged on the first surface of the first packaging substrate; A plurality of device structures are arranged corresponding to the plurality of first welding surfaces one by one, welded on the first welding surface of the first packaging substrate, and electrically connected to the first packaging substrate.

2. The stacked package structure according to claim 1, wherein: The device structure includes any one of a packaging structure and a chip.

3. The stacked package structure according to claim 2, wherein: The plurality of first welding surfaces include a group of second surfaces and third surfaces that are arranged opposite to each other, and the device structure includes a first packaging structure and a second packaging structure; A first packaging structure, welded on the second surface of the first packaging substrate and electrically connected to the first packaging substrate; The second packaging structure is welded on the third surface of the first packaging substrate and is electrically connected to the first packaging substrate.

4. The stacked package structure according to claim 3, wherein: Also includes: A first conductive connection structure, located between the first packaging structure and the second surface of the first packaging substrate, used to weld the first packaging structure to the second surface of the first packaging substrate and realize electrical connection between the first packaging structure and the first packaging substrate; The second conductive connection structure is located between the second packaging structure and the third surface of the second packaging substrate, and is used to weld the second packaging structure to the third surface of the first packaging substrate and realize the electrical connection between the second packaging structure and the first packaging substrate.

5. The stacked package structure according to claim 3, wherein: The first surface is a side surface of the first packaging substrate, the second surface is a back surface of the first packaging substrate, and the third surface is a front surface of the first packaging substrate.

6. The stacked package structure according to claim 3, wherein: The first packaging structure and the second packaging structure respectively include: A second packaging substrate, comprising a second welding surface; A first chip is soldered on the second soldering surface of the second packaging substrate and is electrically connected to the second packaging substrate; The plastic packaging layer is located on the second packaging substrate and covers the first chip.

7. The stacked package structure according to claim 6, wherein: The first packaging structure and the second packaging structure also respectively include: a third conductive connection structure, located between the first chip and the second packaging substrate, used to weld the first chip to the second welding surface of the second packaging substrate, and used to achieve electrical connection between the first chip and the second packaging substrate.

8. The package stack structure according to claim 7, wherein: The first packaging structure and the second packaging structure further include: a bottom filling layer, which is located between the first chip and the second packaging substrate and also fills the gaps between the third conductive connection structures.

9. The package-on-package structure according to claim 6, wherein: The first packaging structure and the second packaging structure further include: a first passive component, which is located on the second packaging substrate where the first chip is exposed and is electrically connected to the second packaging substrate.

10. The package-on-package structure according to claim 6, wherein: The first packaging structure and the second packaging structure further include: a second passive element, which is located above the first chip and is electrically connected to the second packaging substrate.

11. The package-on-package structure according to claim 10, wherein: The first packaging structure and the second packaging structure further include: a connecting column, which is located on the second packaging substrate where the first chip is exposed, and is used to achieve electrical connection between the second passive component and the second packaging substrate.

12. The package stack structure according to claim 10, wherein: The first packaging structure and the second packaging structure further include: an adhesive layer, located between the second passive component and the first chip, for adhering the second passive component to the first chip.

13. The package stack structure according to claim 3, wherein: A surface of the second packaging substrate away from the first surface of the first packaging substrate is a fourth surface; The stacked packaging structure also includes: a third device structure, which is respectively welded to the fourth surface of the second substrate of the first packaging structure and the fourth surface of the second substrate of the second packaging structure, and is respectively electrically connected to the second packaging substrate of the first packaging structure and the second packaging substrate of the second packaging structure.

14. The package stack structure according to claim 13, wherein: Also includes: A fourth conductive connection structure is located between the third device structure and the fourth surface of the second packaging substrate of the first packaging structure and the fourth surface of the second packaging substrate of the second packaging structure, and is used to weld the third device structure and the fourth surface of the second packaging substrate of the first packaging structure and the fourth surface of the second packaging substrate of the second packaging structure, and to achieve electrical connection between the third device structure and the second packaging substrate of the first packaging structure and the second packaging substrate of the second packaging structure.

15. The package stack structure according to claim 13, wherein: The third device structure includes any one of a packaging structure, a chip or a passive component.

16. A packaging method, characterized in that: include: Providing a first packaging substrate, comprising a first surface and a plurality of first welding surfaces, wherein a signal connection terminal is arranged on the first surface of the first packaging substrate; Providing a plurality of device structures, wherein the plurality of device structures correspond one-to-one to the plurality of first welding surfaces; The plurality of device structures are respectively welded on the welding surface of the first packaging substrate, and electrical connection between the plurality of device structures and the first packaging substrate is achieved.

17. The packaging method according to claim 16, characterized in that: The device structure includes any one of a packaging structure and a chip.

18. The packaging method according to claim 17, characterized in that: The plurality of first welding surfaces include a second surface and a third surface that are arranged opposite to each other; The providing of multiple device structures includes: providing a first packaging structure and a second packaging structure; The step of respectively welding the multiple device structures on the welding surface of the first packaging substrate and realizing electrical connection between the multiple device structures and the first packaging substrate includes: respectively welding the first packaging structure and the second packaging structure on the second surface and the third surface of the first packaging substrate, and respectively realizing electrical connection between the first packaging structure and the second packaging structure and the first packaging substrate.

19. The packaging method according to claim 18, characterized in that: In the step of providing a first packaging structure and a second packaging structure, the first packaging structure and the second packaging structure respectively include: a second packaging substrate, including a second welding surface; a first chip, welded on the second welding surface of the second packaging substrate and electrically connected to the second packaging substrate; a plastic packaging layer, located on the second packaging substrate and covering the first chip.

20. The packaging method according to claim 18, characterized in that: A surface of the second packaging substrate away from the first surface of the first packaging substrate is a fourth surface; The method also includes: providing a third device structure; welding the first packaging structure and the second packaging structure to the second surface and the third surface of the first packaging substrate, respectively, and realizing electrical connection between the first packaging structure and the second packaging structure and the first packaging substrate, respectively, and then welding the third device structure to the fourth surface of the second substrate of the first packaging structure and the fourth surface of the second substrate of the second packaging structure, respectively, and realizing electrical connection between the third device structure and the second packaging substrate of the first packaging structure and the second packaging substrate of the second packaging structure.

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