A rectifier bridge stack with controllable opening time

Abstract

The present invention relates to a rectifier bridge stack with controllable opening time, and belongs to the technical field of semiconductor devices. It comprises: a bridge rectifier bridge, an opening time controller, and a Q1 transistor switch. The position of the input sinusoidal voltage is identified by the opening time controller. When the sinusoidal voltage is at a lower position, the output signal of the time controller port D controls the opening of the Q1 transistor to establish a loop. The present invention realizes controllable opening time of the rectifier bridge through an innovative rectifier bridge stack design, stabilizes the opening time of the bridge stack at a lower voltage, reduces the generation of surge current, and can simultaneously realize parallel replacement of the existing rectifier bridge stacks that are already in use, without the need for engineers to redesign peripheral circuits or modify circuit designs, and can provide engineers with an efficient device replacement solution.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor devices, and mainly to a rectifier bridge stack with controllable opening time. Background Art

[0002] The rectifier bridges on the market are all ordinary bridges composed of 4 diodes. The advantage of this bridge is that it is cheap, but the disadvantage is that it does not identify the input signal at the input end, directly rectifies the input AC signal into a DC signal, and charges the capacitor and load at the load end, causing a large instantaneous surge current at the AC input end when the equipment using this rectifier bridge is turned on. In the worst case, the air switch at the front end of the equipment will trip. Figure 1 Input AC voltage waveform of the rectifier bridge.

[0003] Depend on Figure 1 It can be seen that the input AC voltage waveform changes from point A to point B during the entire AC cycle from point 0 to the highest point and then to point 0 repeatedly. Since the output end of the rectifier bridge is directly connected to the filter capacitor and the load, the surge current at the moment of charging the filter capacitor and the load can be calculated according to the following formula.

[0004] The transient current of the container can be calculated by the following formula:

[0005] i(t)=C(dv(t) / dt).

[0006] Where i(t) represents the instantaneous current at time t, C represents the capacitance of the capacitor, and dv(t) / dt represents the rate of change of voltage over time.

[0007] When the capacity of the filter capacitor remains unchanged after rectification, the magnitude of the instantaneous input voltage directly affects the magnitude of the input surge current. The higher the voltage at the moment of power-on, the greater the surge current generated, and vice versa. Therefore, under normal use, it is possible that the same AC input voltage will be powered on at the highest voltage, which will generate a surge current that is 40 to 50 times or even greater than the normal working current.

[0008] In order to solve this problem, there are also some external circuit solutions. For example, the prior art CN 106059295B uses a thyristor device as a switch to control the current. At the moment of power-on, the conduction angle of the thyristor device is controlled, so that the conduction angle is adjusted from small to large cycle by cycle until the thyristor is fully turned on, avoiding the occurrence of large surge currents caused by direct full conduction when the power is turned on, or using external high-power cement resistors and NTC resistors to suppress surge currents at the moment of startup, so that the current is limited by the resistor at the moment of power-on, and the resistor is bypassed by the MOS tube after the load is started.

[0009] Since the thyristor device itself needs a large driving current and the anode and cathode need sufficient conduction maintenance current, its own power consumption is relatively large when in use, and it cannot maintain normal conduction under small load current. High-power resistors and thermistors are large in size and occupy a lot of space, which is not conducive to miniaturization. At the same time, there is also the problem of uncontrollable risk of thermal runaway due to abnormal overheating. Since the rectifier bridge of the existing technology does not have the function of opening time control, and the existing external circuit has different degrees of efficiency and size problems, the technical innovation and economic value of this field need to be developed urgently. Summary of the invention

[0010] The purpose of the present invention is to provide a rectifier bridge stack with controllable opening time, which can stabilize the opening time of the bridge stack at a lower voltage and reduce the generation of surge current. At the same time, it can realize parallel replacement of the existing rectifier bridge stacks that are already in use, without the need for engineers to redesign peripheral circuits or modify circuit designs, and can provide engineers with an efficient device replacement solution.

[0011] To achieve the above object, the present invention provides the following solutions:

[0012] A rectifier bridge stack with controllable opening time includes a bridge rectifier bridge, an opening time controller, and a Q1 transistor switch; wherein:

[0013] The bridge rectifier is used to rectify the input AC signal and provide working voltage for the back-end controller;

[0014] Q1 transistor switch, used to control the closing and disconnection of the output end of the basic rectifier bridge and the load circuit;

[0015] The time controller is turned on to identify the position of the input sine wave voltage. When the sine wave voltage is at a lower position, the output signal of the time controller port controls the Q1 transistor to turn on and establish a loop.

[0016] Optionally, the turn-on time controller includes an input signal attenuator, which is used to attenuate and reduce the tested voltage to prevent excessive voltage from damaging the comparator; a reference voltage source, which provides a stable reference voltage for the comparator; a comparator, which compares the difference between the collected voltage and the reference voltage source and outputs a corresponding level signal based on the difference result; a pulse switch, which executes the comparator input signal and drives the Q1 transistor to turn on or off according to the input signal; and a power supply, which provides the energy required for the entire turn-on time controller and the Q1 transistor to work.

[0017] Optionally, the bridge rectifier integrates at least 4 bridge rectifier diodes.

[0018] Optionally, the Q1 transistor switch is arranged at the DC-end of the main loop or at one of the DC+, ACN, and ACL ends.

[0019] Optionally, the rectifier bridge stack has at least two AC input terminals and at least two DC output terminals.

[0020] Optionally, the comparator is configured such that when the voltage signal at the non-inverting input terminal of the comparator is higher than the voltage signal at the inverting input terminal, the comparator output terminal outputs a high level signal, otherwise it outputs a low level signal.

[0021] In another embodiment of the present invention, a rising and falling edge counter is further included, which is arranged between the output terminal of the comparator and the pulse switch.

[0022] In another embodiment of the present invention, the turn-on time controller includes an input signal attenuator, which is used to attenuate and reduce the tested voltage to prevent excessive voltage from damaging the comparator; a rising and falling edge counter, which detects the output signal of the input signal attenuator to identify the time; a pulse switch, which executes the comparator input signal and drives the Q1 transistor to turn on or off according to the input signal; a power supply, which provides the energy required for the entire turn-on time controller and the Q1 transistor to work; and a reference voltage source, which provides a stable reference voltage.

[0023] Optionally, the rising and falling edge counter uses a single chip microcomputer to collect input signals and control output.

[0024] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects:

[0025] (1) Under the same load condition, the surge current is greatly reduced, and the surge current is only 1 / 10 of that of traditional devices.

[0026] (2) The packaging form and size are the same as those of the prior art, and it is more versatile.

[0027] (3) Compared with existing surge protection technologies, the present invention does not require additional assembly space or the addition of additional devices.

[0028] (4) The present invention can replace the existing thermistor PTC and NTC technologies to achieve higher electrical efficiency.

[0029] (5) The present invention can be integrated into a silicon chip design for use in a small-package rectifier bridge, and can also be used to rapidly produce a large-package rectifier bridge through the use of thick-film technology that is easy to process. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0031] Figure 1 It is the input AC voltage waveform of the rectifier bridge;

[0032] Figure 2 This is a schematic diagram of the bridge stack circuit structure of Example 1 of the present invention;

[0033] Figure 3 A structural diagram of a rectifier bridge stack with controllable opening time provided in Example 1 of the present invention.

[0034] Figure 4 A structural diagram of the opening time controller provided in Example 1 of the present invention;

[0035] Figure 5 This is a waveform diagram of the original voltage signal of the AC voltage signal input from the signal attenuator to the non-inverting input terminal of the comparator in Example 1 of the present invention.

[0036] Figure 6 This is a diagram of the input and output states of the AC voltage signal in Example 1 of the present invention.

[0037] Figure 7 A schematic diagram of a rectifier bridge structure with controllable opening time provided in Example 2 of the present invention.

[0038] Figure 8 Schematic diagram of rising edge and falling edge in embodiment 2 of the present invention.

[0039] Fig. 9 This is a rising edge identification counting cycle waveform diagram in Example 2 of the present invention.

[0040] Fig.10 This is a circuit diagram of an internal time controller of a rectifier bridge stack according to Embodiment 2 of the present invention.

[0041] Fig.11 This is the output timing in each module of Example 2 of the present invention (configured for rising edge recognition).

[0042] Fig.12 This is the output timing in each module of Example 2 of the present invention (configured for falling edge recognition).

[0043] Fig.13 A schematic diagram of a rectifier bridge structure with controllable opening time provided in Example 3 of the present invention.

[0044] Fig.14 A circuit diagram of a rectifier bridge with controllable opening time provided in Example 3 of the present invention.

[0045] Fig.15 The timing waveform diagram of Example 3 of the present invention. DETAILED DESCRIPTION

[0046] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0047] The purpose of the present invention is to provide a rectifier bridge with controllable opening time. The opening time of the rectifier bridge can be controlled by innovating the design of the rectifier bridge stack, and the opening time of the bridge stack can be stabilized at a lower voltage to reduce the generation of surge current. At the same time, it can realize parallel replacement of the existing rectifier bridge stacks that are already in use, without the need for engineers to redesign peripheral circuits or modify circuit designs, and can provide engineers with an efficient device replacement solution.

[0048] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0049] Example 1

[0050] Combination Figure 2-3 Embodiment 1 of the present invention provides a rectifier bridge stack with controllable opening time, including a bridge rectifier bridge, an opening time controller, and a Q1 transistor switch; wherein the bridge rectifier bridge is used to rectify the input AC signal and provide a working voltage for the back-end controller; the Q1 transistor switch is used to control the closing and disconnection of the output end of the basic rectifier bridge and the load circuit; the opening time controller is used to identify the position of the input sinusoidal wave voltage by opening the time controller. When the sinusoidal wave voltage is at a lower position, the time controller port outputs a signal to control the Q1 transistor to open and establish a circuit.

[0051] Specifically, the present embodiment and the prior art are the same in product appearance, packaging form and input and output pin functions, and both have two AC input pins and two DC +- pole output pins. The main difference is that the chip in the package has an additional opening time controller and a Q1 transistor switch, which uses the opening time detection and output control signals to control the loop closure connection time point of the Q1 transistor switch. The controller includes four connection ports AB CD. The AB port is the power supply port of the controller, which is used to supply power to the controller to maintain the operation of the controller. The C port is the input signal detection port, which is used to identify the input signal. The D port is the output port of the controller, which is used to control the cut-off and conduction of the Q1 transistor switch.

[0052] Furthermore, combined with Figure 4In this embodiment, the turn-on time controller includes an input signal attenuator, which attenuates and reduces the tested voltage to prevent the comparator from being damaged by excessive voltage; a reference voltage source, which provides a stable reference voltage for the comparator, so that the comparator can more accurately determine the position of the tested voltage; a comparator, which compares the difference between the collected voltage and the reference voltage source and outputs a corresponding level signal according to the difference result; a power supply, which provides the energy required for the entire turn-on time controller and the Q1 transistor to work; and a pulse switch, which executes the comparator input signal and drives the Q1 transistor to turn on or off according to the input signal.

[0053] Combination Figure 4 The working principle of the opening time controller in this embodiment is as follows: First, the input signal attenuator inside the controller will attenuate and reduce the voltage value of the voltage signal input from port C to within the rated range within which the comparator can work normally, and then input it to the non-inverting input terminal of the comparator as an actual signal for comparison with the inverting input terminal of the comparator. Since the signal source of the inverting input terminal is a reference voltage source, this voltage is a fixed value that is not affected by the outside world and serves as the reference voltage source signal of the comparator. When the voltage signal at the non-inverting input terminal of the comparator is higher than the signal at the inverting input terminal, the comparator output terminal outputs a high-level signal, otherwise it outputs a low-level signal. Through this comparison logic, the present invention can control the output state of the comparator output port by adjusting and changing the size of the reference voltage signal, and finally realize controllable opening time. The level signal output by the comparator is processed by the pulse switch to form a stable level signal, which drives the Q1 crystal switch tube through port D to control the output state of the rectifier bridge.

[0054] Through the above structure, this embodiment identifies the position of the input sine wave voltage by turning on the time controller. When the sine wave voltage is at a low position, the output signal of the time controller port D controls the Q1 transistor to turn on and establish a loop, which is equivalent to changing the voltage change rate over time in the formula i(t)=C(dv(t) / dt) to achieve a slower and longer slope of the voltage extension time, so that the surge current generated by the rectified DC voltage when charging the subsequent capacitor and load is smaller. The start-up voltage of the sine wave can be set and adjusted according to specific needs, including at the zero crossing position of the sine wave or at a certain position on the rising and falling edges.

[0055] This embodiment specifically provides an original voltage signal of an AC voltage signal input from a signal attenuator to a non-inverting input terminal of a comparator, referring to Figure 5 . Figure 5 The input signal is an AC signal of 120V, and the voltage from 0 point to the highest point is 0V to 120V. This embodiment can realize the opening of Q1 transistor switch tube at any voltage to establish a load circuit to power the load by changing the voltage value of the reference voltage source as needed. Figure 6This is a typical input and output state. The B line waveform is the output waveform of port D, and the Y line is the AC waveform signal input to port C. By changing the reference voltage source in the turn-on time controller, the intersection point A of the Y line and the B line can be changed. The closer the position of point A is moved to point 0, the smaller the startup surge current generated. The reference voltage source of the turn-on time controller can be adjusted according to actual needs.

[0056] Example 2

[0057] This embodiment provides another solution for a rectifier bridge with controllable opening time, referring to Figure 7 In this embodiment, a rising and falling edge counter is added between the comparator output terminal and the pulse switch, which can realize the high-precision opening time control of the whole cycle. At the same time, after adding the rising and falling edge counter, the time controller can avoid the partial time offset that may occur when there is no rising and falling edge counter. The rest is the same as embodiment 1.

[0058] refer to Figure 8 Schematic diagram of rising and falling edges. After adding rising and falling edge counters, the rising and falling edges within the half cycle of the AC signal can be detected, and the falling edges can also be detected. At the same time, the counter can set the time controller according to the needs to perform the start control within the corresponding cycle number of the AC input signal to make the start time more accurate. The rising and falling edge counters will calibrate the set cycle number and output the control signal within the corresponding cycle. Fig. 9 is set to rising edge recognition count cycle 1 (O line is AC input signal, P line is counter output signal). Fig.10 This embodiment also provides a circuit structure for implementing the technical solution.

[0059] Further, refer to Fig.11 , the output timing in each module of the present invention (configured for rising edge recognition). and Fig.12 The output timing of each module in the Dian (configured as falling edge recognition).

[0060] Y line signal: AC half-wave signal input to the comparator module.

[0061] Line B signal: It is a square wave signal with a frequency duty cycle corresponding to the comparator output. This signal serves as the input signal of the rising and falling edge counter.

[0062] XR line signal: It is the periodic pulse signal output by the counter and is used as the input signal of the pulse switch.

[0063] G line signal: the output control signal of the pulse switch, used to drive the switch tube to conduct.

[0064] Example 3

[0065] This embodiment provides another solution for a rectifier bridge with controllable opening time, referring to Fig.13 , the input end of the rising and falling edge counter directly detects the output signal of the input signal attenuator to identify the time, and the same time control function can be achieved when the comparator is removed. The other structures are the same as those in embodiment 1.

[0066] The circuit structure of this embodiment refers to Fig.14 At the same time, the timing waveform after removing the comparator is as follows Fig.15 ,in,

[0067] Y line signal: half-wave AC signal input to the input signal attenuator.

[0068] O line signal: It is a square wave signal with the corresponding frequency duty cycle output by the input signal attenuator. This signal is used as the input signal of the rising and falling edge counter.

[0069] XR line signal: It is the periodic pulse signal output by the counter and is used as the input signal of the pulse switch.

[0070] G line signal: the output control signal of the pulse switch, used to drive the switch tube to conduct.

[0071] It should be noted that the rising and falling edge counter used in the present invention can use a single-chip microcomputer (MCU) to collect input signals and control output, because the MCU has complete comparison and reset counting functions, so this technical function can also be achieved. Of course, other structures that can achieve the above functions are also within the protection scope of the present invention.

[0072] This specification describes various embodiments in a progressive manner, and emphasizes the differences between each embodiment and other embodiments. The same or similar parts in various embodiments are referenced to each other.

[0073] The specific examples of the present invention are used to illustrate its principles and implementation methods, and are intended to help understand the methods and core ideas of the present invention. For those skilled in the art, according to the concepts of the present invention, the specific implementation methods and application scopes may be adjusted. Therefore, the contents of this specification should not be regarded as limiting the present invention.

Claims

1. A rectifier bridge stack with controllable opening time, characterized in that: include: Bridge rectifier, opening time controller, Q1 transistor switch; among them, The bridge rectifier is used to rectify the input AC signal and provide working voltage for the back-end controller; Q1 transistor switch, used to control the closing and disconnection of the output end of the basic rectifier bridge and the load circuit; The time controller is turned on to identify the position of the input sine wave voltage. When the sine wave voltage is at a lower position, the output signal of the time controller port controls the Q1 transistor to turn on and establish a loop.

2. A rectifier bridge stack with controllable opening time according to claim 1, characterized in that: The on-time controller includes an input signal attenuator for attenuating and reducing the tested voltage to prevent the comparator from being damaged by excessive voltage; a reference voltage source for providing a stable reference voltage for the comparator; The comparator compares the difference between the collected voltage and the reference voltage source and outputs the corresponding level signal according to the difference result; the pulse switch executes the comparator input signal and drives the Q1 transistor to turn on or off according to the input signal; the power supply provides the energy required for the entire turn-on time controller and the Q1 transistor to work.

3. A rectifier bridge stack with controllable opening time according to claim 1, characterized in that: The bridge rectifier integrates at least four bridge rectifier diodes.

4. A rectifier bridge stack with controllable opening time according to claim 1, characterized in that: The Q1 transistor switch is arranged at the DC-end of the main loop or at one of the DC+, ACN and ACL ends.

5. A rectifier bridge stack with controllable opening time according to claim 1, characterized in that: The rectifier bridge stack has at least two AC input terminals and at least two DC output terminals.

6. A rectifier bridge stack with controllable opening time according to claim 2, characterized in that: The comparator is configured such that when the voltage signal at the non-inverting input terminal of the comparator is higher than the voltage signal at the inverting input terminal, the comparator output terminal outputs a high level signal, otherwise it outputs a low level signal.

7. A rectifier bridge stack with controllable opening time according to claim 1 or 2, characterized in that: It also includes a rising and falling edge counter, which is arranged between the output end of the comparator and the pulse switch.

8. The rectifier bridge stack with controllable opening time according to claim 1, characterized in that: The on-time controller includes an input signal attenuator, which is used to attenuate and reduce the tested voltage to prevent excessive voltage from damaging the comparator; a rising and falling edge counter, which detects the output signal of the input signal attenuator to identify the time; a pulse switch, which executes the comparator input signal and drives the Q1 transistor to turn on or off according to the input signal; a power supply, which provides the energy required for the entire on-time controller and the Q1 transistor to work; and a reference voltage source, which provides a stable reference voltage.

9. A rectifier bridge stack with controllable opening time according to any one of claims 7 or 8, characterized in that: The rising and falling edge counter uses a single chip microcomputer to collect input signals and control output.

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