Pulse function controlled grid hidden multi-wing attractor chaotic system

Abstract

According to the grid hidden multi-wing attractor chaotic system controlled by the pulse function, continuous grid hidden multi-wing chaotic signals are output through the anti-phase integral summation operation circuit, the anti-phase proportion operation circuit and the pulse function operation circuit, on the basis that an original system is not changed, a two-dimensional equation is added by means of the pulse function of the same structure, and therefore the grid hidden multi-wing chaotic signals are obtained. Therefore, copying of the wings on the grid plane is achieved, and control over the number of the wings can be achieved only by changing the pulse function parameter N. Compared with an existing chaotic circuit, the control circuit of the system is simple in structure, the number of wings is flexibly regulated and controlled, the generated attractor topological structure is more complex, a circuit basis is provided for applying hidden multi-wing chaotic signals to the technical field of electronics, communication and information engineering, encrypted content is more difficult to decode to a certain extent, and the system has the advantages of being high in practicability and the like. And a new method is provided for research in the fields of image encryption and the like.

Description

Technical Field

[0001] The present invention relates to the field of chaos technology, belonging to the field of electronics, communications and information engineering, and specifically to a grid hidden multi-wing attractor chaotic system controlled by an impulse function. Background Art

[0002] In recent decades, with the rapid development of science and technology, the study of chaos has received great attention. Multi-wing / multi-scroll attractor chaotic systems have become a research hotspot because of their higher complexity than single-scroll or double-wing / double-scroll attractor chaotic systems. They have broad application prospects in image encryption, secure communications, machine learning and other fields.

[0003] In the past, the construction of multi-wing multi-scroll attractor chaotic systems was mainly based on double-scroll or double-wing systems. By introducing nonlinear functions, the number of unstable equilibrium points of index 2 was expanded to realize the generation of multi-scroll / multi-wing attractors. The introduced nonlinear functions include hyperbolic functions, trigonometric functions, sawtooth wave functions, hysteresis functions, sign functions, etc.

[0004] In 2011, GALeonov first proposed the concept of hidden attractors when analyzing Tsai circuits. Hidden attractors are attractors whose basin of attraction does not intersect with any small neighborhood of equilibrium points in the phase space of a dynamic system. This means that its existence has nothing to do with the equilibrium point of the system. Due to the unique characteristics of hidden attractors, the traditional method of predicting the motion trajectory of a system based on unstable equilibrium points cannot be applied to hidden chaotic systems. In other words, the motion trajectory of hidden attractor chaotic systems has a higher degree of unpredictability, which makes them show better performance in the field of information encryption.

[0005] Therefore, in order to make better use of the untraceability of the trajectory of the hidden attractor chaotic system and the higher complexity of the multi-wing / multi-scroll attractor chaotic system, experts and scholars began to study the hidden multi-scroll / multi-wing chaotic system. In the chaotic system studied in the past, we generated different numbers of multi-scroll self-excited attractors by changing the amplitude of the state variable, proposed the extension of the multi-scroll self-excited attractor in one dimension and multiple dimensions, and the multi-scroll hidden attractor generated by parameter control, but the extension of the multi-wing multi-scroll hidden attractor in one dimension and multiple dimensions has not been studied. Due to the unique equilibrium point characteristics of the hidden attractor system, the traditional unstable equilibrium point method through the expansion index 2 is not fully applicable to the construction of hidden multi-wing and multi-scroll chaotic systems; and there have been a lot of studies on the problem of multi-wing multi-scroll hidden attractor chaotic system, but there are generally problems such as complex nonlinear function structure, mutual coupling of parameters and change of the structure of the original system. Summary of the invention

[0006] In order to solve the problems of complex construction methods of existing hidden multi-wing multi-scroll chaotic systems, the present invention proposes a dimensionality expansion method based on pulse control. On the basis of the original system, the method of equilibrium point translation is used, and through combination with the pulse function, the wings can be extended in one or two directions, thereby constructing a chaotic system that can generate a grid hidden multi-wing attractor.

[0007] To achieve the above purpose, the technical solution provided by the present invention is: a grid hidden multi-wing attractor chaotic system controlled by an impulse function, including an x-product branch, a y-product branch, a z-product branch, a ψ 1 Expanded dimension product branch, ψ 2 Expanded dimension product branch, ψ 3 Expanded dimension product branch, F(ψ 1 ) operation circuit, F(ψ 2 ) operation circuit and F(ψ 3 ) operation circuit;

[0008] The x product branch includes two input terminals, signal x and signal -z. Signal x is connected to the input terminal of the operational amplifier U1 through R1, and signal -z is connected to the input terminal of the operational amplifier U1 through R2. The output terminal of the operational amplifier U1 is connected to the input terminal of the operational amplifier U2 through resistor R3, and finally outputs signal -x.

[0009] The y product branch includes three input terminals, namely, signal x, signal z, and voltage source VEE. Signal x and signal z are connected to the input terminal of operational amplifier U3 through R5. Signal VEE is connected to the input terminal of operational amplifier U3 through R6. The output terminal of operational amplifier U3 is connected to the input terminal of operational amplifier U4 through resistor R7, and finally outputs signal -y.

[0010] The z product branch includes three input terminals: signal x, signal y, and signal z. Signal x and signal y are connected to the input terminal of the operational amplifier U5 through R9, and signal z is connected to the input terminal of the operational amplifier U5 through R10. The output terminal of the operational amplifier U5 is connected to the input terminal of the operational amplifier U6 through the resistor R11, and finally the output signal -z is output;

[0011] ψ 1 The extended dimension product branch includes signal -x, signal F(ψ 1 ) two input terminals, the signal -x is connected to the input terminal of the operational amplifier U7 through R13, and the signal F(ψ 1 ) is connected to the input of the operational amplifier U7 through R14, and the output of the operational amplifier U7 is connected to the input of the operational amplifier U8 through resistor R15, and the final output signal is -ψ 1 ;

[0012] ψ 2The extended dimension product branch includes signal -y, signal F(ψ 2 ) two input terminals, the signal -y is connected to the input terminal of the operational amplifier U9 through R17, and the signal F(ψ 2 ) is connected to the input of the operational amplifier U9 through R18, and the output of the operational amplifier U9 is connected to the input of the operational amplifier U10 through resistor R19, and the final output signal is -ψ 2 ;

[0013] ψ 3 The extended dimension product branch includes signal -z, signal F(ψ 3 ) two input terminals, the signal -z is connected to the input terminal of the operational amplifier U11 through R21, and the signal F(ψ 3 ) is connected to the input of the operational amplifier U11 through R22, and the output of the operational amplifier U11 is connected to the input of the operational amplifier U12 through resistor R23, and the final output signal is -ψ 3 .

[0014] Furthermore, the x product branch includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; a signal x is connected to the reverse input terminal of the operational amplifier U1 via the resistor R1, a signal -z is connected to the reverse input terminal of the operational amplifier U1 via the resistor R2, the positive input terminal of the amplifier U1 is grounded, the reverse input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 via the capacitor C1, the output terminal of the amplifier U1 outputs the signal x, the output terminal of the amplifier U1 is connected to the reverse input terminal of the operational amplifier U2 via the resistor R3, the positive input terminal of the amplifier U2 is grounded, the reverse input terminal of the amplifier U2 is connected to the output terminal of the amplifier U4 via the resistor R4, and the output terminal of the amplifier U2 outputs the signal -x.

[0015] Furthermore, the y product branch includes an operational amplifier U3, an operational amplifier U4, a multiplier M1, a voltage source VEE, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2; signals x and z are connected to the input end of the multiplier M1, the output end of the multiplier M1 is connected to the reverse input end of the operational amplifier U3 via the resistor R5, the DC power supply VEE is connected to the reverse input end of the operational amplifier U3 via the resistor R6, the positive input end of the amplifier U3 is grounded, the reverse input end of the amplifier U3 is connected to the output end of the amplifier U3 via the capacitor C2, the output end of the amplifier U3 outputs a signal y, the output end of the amplifier U3 is connected to the reverse input end of the operational amplifier U4 via the resistor R7, the positive input end of the amplifier U4 is grounded, the reverse input end of the amplifier U4 is connected to the output end of the amplifier U4 via the resistor R8, and the output end of the amplifier U4 outputs a signal -y.

[0016] Furthermore, the z product branch includes an operational amplifier U5, an operational amplifier U6, a multiplier M1, a resistor R9, a resistor R10, a resistor R11, a resistor R12 and a capacitor C3; the signals x and y are connected to the input end of the multiplier M2, the output end of the multiplier M2 is connected to the reverse input end of the operational amplifier U5 via the resistor R9, the signal z is connected to the reverse input end of the operational amplifier U5 via the resistor R10, the positive input end of the amplifier U5 is grounded, the reverse input end of the amplifier U5 is connected to the output end of the amplifier U5 via the capacitor C3, the output end of the amplifier U5 outputs the signal z, the output end of the amplifier U5 is connected to the reverse input end of the operational amplifier U6 via the resistor R11, the positive input end of the amplifier U6 is grounded, the reverse input end of the amplifier U6 is connected to the output end of the amplifier U6 via the resistor R12, and the output end of the amplifier U6 outputs the signal -z.

[0017] Furthermore, the ψ 1 The extended dimension product branch includes an operational amplifier U7, an operational amplifier U8, a resistor R13, a resistor R14, a resistor R15, a resistor R16, and a capacitor C4; the signal -x is connected to the reverse input terminal of the operational amplifier U7 through the resistor R13, and the signal F(ψ 1 ) is connected to the reverse input terminal of the operational amplifier U7 through the resistor R14, the positive input terminal of the amplifier U7 is grounded, the reverse input terminal of the amplifier U7 is connected to the output terminal of the amplifier U7 through the capacitor C4, and the output terminal of the amplifier U7 outputs a signal ψ 1 The output of amplifier U7 is connected to the reverse input of operational amplifier U8 via resistor R15. The forward input of amplifier U8 is grounded. The reverse input of amplifier U8 is connected to the output of amplifier U8 via resistor R16. The output of amplifier U8 outputs a signal -ψ 1 .

[0018] Furthermore, the ψ 2 The extended dimension product branch includes an operational amplifier U9, an operational amplifier U10, a resistor R17, a resistor R18, a resistor R19, a resistor R20 and a capacitor C5. The signal -y is connected to the reverse input terminal of the operational amplifier U9 through the resistor R17. The signal F(ψ 2 ) is connected to the reverse input terminal of the operational amplifier U9 through the resistor R18, the positive input terminal of the amplifier U9 is grounded, the reverse input terminal of the amplifier U8 is connected to the output terminal of the amplifier U9 through the capacitor C5, and the output terminal of the amplifier U9 outputs the signal ψ 2 The output of amplifier U9 is connected to the reverse input of operational amplifier U10 via resistor R19. The forward input of amplifier U10 is grounded. The reverse input of amplifier U10 is connected to the output of amplifier U10 via resistor R20. The output of amplifier U10 outputs a signal -ψ 2 .

[0019] Furthermore, the ψ 3 The extended dimension product branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24 ​​and a capacitor C6; the signal -z is connected to the reverse input terminal of the operational amplifier U11 through the resistor R21, and the signal F(ψ 3 ) is connected to the reverse input terminal of the operational amplifier U11 through the resistor R22, the positive input terminal of the amplifier U11 is grounded, the reverse input terminal of the amplifier U11 is connected to the output terminal of the amplifier U11 through the capacitor C6, and the output terminal of the amplifier U11 outputs a signal ψ 3 The output of amplifier U11 is connected to the reverse input of operational amplifier U12 via resistor R23. The forward input of amplifier U12 is grounded. The reverse input of amplifier U12 is connected to the output of amplifier U12 via resistor R24. The output of amplifier U12 outputs a signal -ψ 3 .

[0020] Furthermore, the three F-function operation circuits include F(ψ 1 ) operation circuit, F(ψ 2 ) operation circuit and F(ψ 3 ) operation circuit;

[0021] The F(ψ 1) The operational circuit includes an operational amplifier U13, an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, an operational amplifier U19, an adder A1, an adder A2, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32 and a resistor R33; the input end of the sinusoidal signal source VSIN1 is grounded, the output end of the sinusoidal signal source VSIN1 is connected to the inverting input end of the operational amplifier U13, the positive input end of the amplifier U13 is grounded, the output end of the amplifier U13 is connected to the reverse input end of the operational amplifier U14 via the resistor R25, the positive input end of the amplifier U14 is grounded, the reverse input end of the amplifier U14 is connected to the output end of the amplifier U14 via the resistor R26, and the output end of the amplifier U14 is connected to one side input end of the adder A1; the input end of the sinusoidal signal source VSIN2 is grounded, and the sinusoidal signal source VSIN2 The output end is connected to the inverting input end of the operational amplifier U15, the positive input end of the amplifier U15 is grounded, the output end of the amplifier U15 is connected to the inverting input end of the operational amplifier U16 via a resistor R27, the positive input end of the amplifier U16 is grounded, the inverting input end of the amplifier U16 is connected to the output end of the amplifier U16 via a resistor R28, and the output end of the amplifier U16 is connected to one side input end of the adder A2; the input end of the sinusoidal signal source VSIN3 is grounded, the output end of the sinusoidal signal source VSIN3 is connected to the inverting input end of the operational amplifier U17, the positive input end of the amplifier U17 is grounded, the output end of the amplifier U17 is connected to the inverting input end of the operational amplifier U18 via a resistor R29, the positive input end of the amplifier U18 is grounded, the inverting input end of the amplifier U18 is connected to the output end of the amplifier U18 via a resistor R30, and the output end of the amplifier U18 is connected to the other side input end of the adder A2; the output end of the adder A2 is connected to one side input end of the adder A1; the signal -ψ 1 The output end of adder A1 is connected to the reverse input end of operational amplifier U19 through resistor R31, the output end of adder A1 is connected to the reverse input end of operational amplifier U19 through resistor R32, the positive input end of amplifier U19 is grounded, the reverse input end of amplifier U19 is connected to the output end of amplifier U19 through resistor R33, and the output end of amplifier U19 outputs signal F(ψ 1 );

[0022] The F(ψ 2) The operational circuit includes an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, an operational amplifier U24, an operational amplifier U25, an operational amplifier U26, an adder A3, an adder A4, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41 and a resistor R42, wherein the input end of the sinusoidal signal source VSIN4 is grounded, the output end of the sinusoidal signal source VSIN4 is connected to the inverting input end of the operational amplifier U20, the positive input end of the amplifier U20 is grounded, the output end of the amplifier U20 is connected to the reverse input end of the operational amplifier U21 via the resistor R34, the positive input end of the amplifier U21 is grounded, the reverse input end of the amplifier U21 is connected to the output end of the amplifier U21 via the resistor R35, and the output end of the amplifier U21 is connected to one side input end of the adder A3; the input end of the sinusoidal signal source VSIN2 is grounded, the output end of the sinusoidal signal source VSIN2 is connected to the reverse input end of the operational amplifier U21, the positive input end of the amplifier U21 is grounded, the reverse input end of the amplifier U21 is connected to the output end of the amplifier U21 via the resistor R35, and the output end of the amplifier U21 is connected to one side input end of the adder A3; the input end of the sinusoidal signal source VSIN2 is grounded, the output end of the sinusoidal signal source VSIN2 is connected to the reverse input end of the operational amplifier U21, The inverting input terminal of the operational amplifier U22 is terminated, the positive input terminal of the amplifier U22 is grounded, the output terminal of the amplifier U22 is connected to the reverse input terminal of the operational amplifier U23 via a resistor R36, the positive input terminal of the amplifier U23 is grounded, the reverse input terminal of the amplifier U23 is connected to the output terminal of the amplifier U23 via a resistor R37, and the output terminal of the amplifier U23 is connected to one side input terminal of the adder A4; the input terminal of the sinusoidal signal source VSIN6 is grounded, the output terminal of the sinusoidal signal source VSIN6 is connected to the inverting input terminal of the operational amplifier U24, the positive input terminal of the amplifier U24 is grounded, the output terminal of the amplifier U24 is connected to the reverse input terminal of the operational amplifier U25 via a resistor R38, the positive input terminal of the amplifier U25 is grounded, the reverse input terminal of the amplifier U25 is connected to the output terminal of the amplifier U25 via a resistor R39, and the output terminal of the amplifier U25 is connected to the other side input terminal of the adder A4; the output terminal of the adder A4 is connected to one side input terminal of the adder A3; the signal -ψ 2 The output end of adder A3 is connected to the reverse input end of operational amplifier U26 through resistor R41, the output end of adder A3 is connected to the reverse input end of operational amplifier U26 through resistor R40, the positive input end of amplifier U26 is grounded, the reverse input end of amplifier U26 is connected to the output end of amplifier U26 through resistor R42, and the output end of amplifier U26 outputs signal F(ψ 2 );

[0023] The F(ψ 3) The operational circuit includes an operational amplifier U27, an operational amplifier U28, an operational amplifier U29, an operational amplifier U30, an operational amplifier U31, an operational amplifier U32, an operational amplifier U33, an adder A5, an adder A6, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a resistor R48, a resistor R49, a resistor R50 and a resistor R51; the input end of the sinusoidal signal source VSIN7 is grounded, the output end of the sinusoidal signal source VSIN7 is connected to the inverting input end of the operational amplifier U27, the positive input end of the amplifier U27 is grounded, the output end of the amplifier U27 is connected to the reverse input end of the operational amplifier U28 via the resistor R43, the positive input end of the amplifier U28 is grounded, the reverse input end of the amplifier U28 is connected to the output end of the amplifier U28 via the resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5; the input end of the sinusoidal signal source VSIN8 is grounded, the output end of the sinusoidal signal source VSIN8 is connected to the inverting input end of the operational amplifier U27, the positive input end of the amplifier U28 is grounded, the reverse input end of the amplifier U28 is connected to the output end of the amplifier U28 via the resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5; the input end of the sinusoidal signal source VSIN8 is grounded, the output end of the sinusoidal signal source VSIN8 is connected to the inverting input end of the operational amplifier U28 The output terminal is connected to the inverting input terminal of the operational amplifier U29, the positive input terminal of the amplifier U29 is grounded, the output terminal of the amplifier U29 is connected to the reverse input terminal of the operational amplifier U30 through a resistor R45, the positive input terminal of the amplifier U30 is grounded, the reverse input terminal of the amplifier U30 is connected to the output terminal of the amplifier U30 through a resistor R46, and the output terminal of the amplifier U30 is connected to one side input terminal of the adder A6; the input terminal of the sinusoidal signal source VSIN9 is grounded, the output terminal of the sinusoidal signal source VSIN9 is connected to the inverting input terminal of the operational amplifier U31, the positive input terminal of the amplifier U31 is grounded, the output terminal of the amplifier U31 is connected to the reverse input terminal of the operational amplifier U32 through a resistor R47, the positive input terminal of the amplifier U32 is grounded, the reverse input terminal of the amplifier U32 is connected to the output terminal of the amplifier U32 through a resistor R48, and the output terminal of the amplifier U32 is connected to the other side input terminal of the adder A6; the output terminal of the adder A6 is connected to one side input terminal of the adder A5; the signal -ψ 3 The output end of the adder A5 is connected to the reverse input end of the operational amplifier U33 through the resistor R50, the output end of the adder A5 is connected to the reverse input end of the operational amplifier U33 through the resistor R49, the positive input end of the amplifier U33 is grounded, the reverse input end of the amplifier U33 is connected to the output end of the amplifier U33 through the resistor R51, and the output end of the amplifier U33 outputs the signal F(ψ 3 ).

[0024] Beneficial Effects

[0025] The present invention discloses a grid hidden multi-wing attractor chaotic system controlled by an impulse function. The system outputs a continuous grid hidden multi-wing chaotic signal through an inverted integral summation operation circuit, an inverted proportional operation circuit and an impulse function operation circuit. The system does not change the original system and increases a two-dimensional equation by using an impulse function of the same structure, thereby realizing the replication of wings on a grid plane. The number of wings can be controlled by only changing the impulse function parameter N.

[0026] This control method is simple. On the basis of not changing the original system structure, it uses the same mode of pulse signals to generate 1D or 2D multi-wing hidden attractors by expanding infinite stable equilibrium points, that is, to achieve the generation of hidden multi-wing attractors on the plane. And by simply adjusting the parameter N in the pulse signal, the number of wings can be flexibly controlled. The attractors generated by the grid hidden multi-wing hidden attractor chaotic system proposed in this system have higher complexity characteristics, providing a theoretical basis and technical support for the development of fields such as image encryption and secure communication. Among them, the hidden attractor is more complex than the self-excited attractor, and has richer dynamic characteristics. It has stronger security performance in the fields of image encryption and secure communication.

[0027] Compared with existing chaotic circuits, the control circuit structure of the system proposed in the present invention is simple, the number of wings can be flexibly adjusted, and the attractor topology generated is more complex, which provides a circuit basis for the application of hidden multi-wing chaotic signals in the technical fields of electronics, communications and information engineering, and makes the encrypted content more difficult to decipher to a certain extent, providing a new method for research in fields such as image encryption. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is the main circuit principle block diagram of the present invention.

[0029] Figure 2 is the extended dimensional nonlinear function F(ψ 1 ) Operational circuit principle block diagram.

[0030] Figure 3 is the extended dimensional nonlinear function F(ψ 2 ) Operational circuit principle block diagram.

[0031] Figure 4 is the extended dimensional nonlinear function F(ψ 3 ) Operational circuit principle block diagram.

[0032] Figure 5 is 1 -ψ 2 Phase diagram of a planar mesh multi-wing hidden attractor.

[0033] Figure 6 is 1 -ψ3 Phase diagram of a planar mesh multi-wing hidden attractor.

[0034] Figure 7 is 2 -ψ 3 Phase diagram of a planar mesh multi-wing hidden attractor. DETAILED DESCRIPTION

[0035] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments:

[0036] See also Figure 1-Figure 7 , a grid hidden multi-wing attractor chaotic system controlled by an impulse function, characterized in that the main circuit includes an x-product branch, a y-product branch, a z-product branch, ψ 1 The branch of the extended dimension product, ψ 2 The branch of the extended dimension product, ψ 3 Expand the dimension product branch, and there are three other operation circuits including F(ψ 1 ) operation circuit, F(ψ 2 ) operation circuit, F(ψ 3 ) operation circuit;

[0037] The x product branch includes two input terminals, signal x and signal -z. Signal x is connected to the input terminal of the operational amplifier U1 through R1, and signal -z is connected to the input terminal of the operational amplifier U1 through R2. The output terminal of the operational amplifier U1 is connected to the input terminal of the operational amplifier U2 through resistor R3, and finally outputs signal -x.

[0038] The y product branch includes three input terminals, namely, signal x, signal z, and voltage source VEE. Signal x and signal z are connected to the input terminal of operational amplifier U3 through R5. Signal VEE is connected to the input terminal of operational amplifier U3 through R6. The output terminal of operational amplifier U3 is connected to the input terminal of operational amplifier U4 through resistor R7, and finally outputs signal -y.

[0039] The z product branch includes three input terminals: signal x, signal y, and signal z. Signal x and signal y are connected to the input terminal of the operational amplifier U5 through R9, and signal z is connected to the input terminal of the operational amplifier U5 through R10. The output terminal of the operational amplifier U5 is connected to the input terminal of the operational amplifier U6 through the resistor R11, and finally the output signal -z is output;

[0040] ψ 1 The extended dimension product branch includes signal -x, signal F(ψ 1 ) two input terminals, the signal -x is connected to the input terminal of the operational amplifier U7 through R13, and the signal F(ψ 1) is connected to the input of the operational amplifier U7 through R14, and the output of the operational amplifier U7 is connected to the input of the operational amplifier U8 through resistor R15, and the final output signal is -ψ 1 ;

[0041] ψ 2 The extended dimension product branch includes signal -y, signal F(ψ 2 ) two input terminals, the signal -y is connected to the input terminal of the operational amplifier U9 through R17, and the signal F(ψ 2 ) is connected to the input of the operational amplifier U9 through R18, and the output of the operational amplifier U9 is connected to the input of the operational amplifier U10 through resistor R19, and the final output signal is -ψ 2 ;

[0042] ψ 3 The extended dimension product branch includes signal -z, signal F(ψ 3 ) two input terminals, the signal -z is connected to the input terminal of the operational amplifier U11 through R21, and the signal F(ψ 3 ) is connected to the input of the operational amplifier U11 through R22, and the output of the operational amplifier U11 is connected to the input of the operational amplifier U12 through resistor R23, and the final output signal is -ψ 3 .

[0043] The x product branch includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1. The signal x and the signal -z are connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U1, the resistor R1, the resistor R2 and the capacitor C1, and the output end of the inverting integral operation circuit outputs the signal x; the signal x is input to the input end of the inverting proportional operation circuit constructed by the operational amplifier U2, the resistor R3 and the resistor R4, and the output end of the inverting proportional operation circuit outputs the signal -x. Wherein, the signal x is connected to the reverse input terminal of the operational amplifier U1 via the resistor R1, the signal -z is connected to the reverse input terminal of the operational amplifier U1 via the resistor R2, the positive input terminal of the amplifier U1 is grounded, the reverse input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 via the capacitor C1, the output terminal of the amplifier U1 outputs the signal x, the output terminal of the amplifier U1 is connected to the reverse input terminal of the operational amplifier U2 via the resistor R3, the positive input terminal of the amplifier U2 is grounded, the reverse input terminal of the amplifier U2 is connected to the output terminal of the amplifier U4 via the resistor R4, and the output terminal of the amplifier U2 outputs the signal -x;

[0044] The y product branch includes an operational amplifier U3, an operational amplifier U4, a multiplier M1, a voltage source VEE, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2. The signal x and the signal z are connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U3, the resistor R5, the resistor R6 and the capacitor C2 via the multiplier M1, and the output end of the inverting integral operation circuit outputs the signal y; the signal y is input to the input end of the inverting proportional operation circuit constructed by the operational amplifier U4, the resistor R7 and the resistor R8, and the output end of the inverting proportional operation circuit outputs the signal -y. Wherein, signals x and z are connected to the input end of the multiplier M1, the output end of the multiplier M1 is connected to the reverse input end of the operational amplifier U3 via a resistor R5, the DC power supply VEE is connected to the reverse input end of the operational amplifier U3 via a resistor R6, the positive input end of the amplifier U3 is grounded, the reverse input end of the amplifier U3 is connected to the output end of the amplifier U3 via a capacitor C2, the output end of the amplifier U3 outputs a signal y, the output end of the amplifier U3 is connected to the reverse input end of the operational amplifier U4 via a resistor R7, the positive input end of the amplifier U4 is grounded, the reverse input end of the amplifier U4 is connected to the output end of the amplifier U4 via a resistor R8, and the output end of the amplifier U4 outputs a signal -y;

[0045] The z product branch includes an operational amplifier U5, an operational amplifier U6, a multiplier M1, a resistor R9, a resistor R10, a resistor R11, a resistor R12 and a capacitor C3, and the z product branch includes an operational amplifier U5, an operational amplifier U6, a multiplier M2, a resistor R9, a resistor R10, a resistor R11, a resistor R12 and a capacitor C3. The signal x and the signal y are connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U5, the resistor R9, the resistor R10 and the capacitor C3 through the multiplier M2, and the output end of the inverting integral operation circuit outputs the signal z; the signal z is input to the input end of the inverting proportional operation circuit constructed by the operational amplifier U6, the resistor R11 and the resistor R12, and the output end of the inverting proportional operation circuit outputs the signal -z. Wherein, signals x and y are connected to the input end of the multiplier M2, the output end of the multiplier M2 is connected to the reverse input end of the operational amplifier U5 via a resistor R9, signal z is connected to the reverse input end of the operational amplifier U5 via a resistor R10, the positive input end of the amplifier U5 is grounded, the reverse input end of the amplifier U5 is connected to the output end of the amplifier U5 via a capacitor C3, the output end of the amplifier U5 outputs signal z, the output end of the amplifier U5 is connected to the reverse input end of the operational amplifier U6 via a resistor R11, the positive input end of the amplifier U6 is grounded, the reverse input end of the amplifier U6 is connected to the output end of the amplifier U6 via a resistor R12, and the output end of the amplifier U6 outputs signal -z;

[0046] The ψ1 The extended dimension product branch includes an operational amplifier U7, an operational amplifier U8, a resistor R13, a resistor R14, a resistor R15, a resistor R16 and a capacitor C4, ψ 1 The extended dimension product branch includes an operational amplifier U7, an operational amplifier U8, a resistor R13, a resistor R14, a resistor R15, a resistor R16, and a capacitor C4. Signal -x, signal F(ψ 1 ) is connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U7, the resistor R13, the resistor R14, and the capacitor C4, and the output end of the inverting integral operation circuit outputs a signal ψ 1 ; Signal ψ 1 The input is the input end of the inverting proportional operational circuit constructed by operational amplifier U6, resistor R15, and resistor R16. The output end of the inverting proportional operational circuit outputs a signal -ψ 1 The signal -x is connected to the reverse input terminal of the operational amplifier U7 through the resistor R13, and the signal F(ψ 1 ) is connected to the reverse input terminal of the operational amplifier U7 through the resistor R14, the positive input terminal of the amplifier U7 is grounded, the reverse input terminal of the amplifier U7 is connected to the output terminal of the amplifier U7 through the capacitor C4, and the output terminal of the amplifier U7 outputs a signal ψ 1 The output end of the amplifier U7 is connected to the reverse input end of the operational amplifier U8 via the resistor R15, the positive input end of the amplifier U8 is grounded, the reverse input end of the amplifier U8 is connected to the output end of the amplifier U8 via the resistor R16, and the output end of the amplifier U8 outputs a signal -ψ 1 ;

[0047] The ψ 2 The extended dimension product branch includes an operational amplifier U9, an operational amplifier U10, a resistor R17, a resistor R18, a resistor R19, a resistor R20 and a capacitor C5, ψ 2 The extended dimension product branch includes an operational amplifier U9, an operational amplifier U10, a resistor R17, a resistor R18, a resistor R19, a resistor R20, and a capacitor C5. Signal -y, signal F(ψ 2 ) is connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U9, the resistor R17, the resistor R18, and the capacitor C5, and the output end of the inverting integral operation circuit outputs a signal ψ 2 ; Signal ψ 2 The input is the input end of the inverting proportional operational circuit constructed by operational amplifier U10, resistor R19, and resistor R20. The output end of the inverting proportional operational circuit outputs a signal -ψ 2 The signal -y is connected to the reverse input terminal of the operational amplifier U9 through the resistor R17, and the signal F(ψ 2) is connected to the reverse input terminal of the operational amplifier U9 through the resistor R18, the positive input terminal of the amplifier U9 is grounded, the reverse input terminal of the amplifier U8 is connected to the output terminal of the amplifier U9 through the capacitor C5, and the output terminal of the amplifier U9 outputs a signal ψ 2 The output end of the amplifier U9 is connected to the reverse input end of the operational amplifier U10 via the resistor R19, the positive input end of the amplifier U10 is grounded, the reverse input end of the amplifier U10 is connected to the output end of the amplifier U10 via the resistor R20, and the output end of the amplifier U10 outputs a signal -ψ 2 ;

[0048] The ψ 3 The extended dimension product branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24 ​​and a capacitor C6, ψ 3 The extended dimension product branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24, and a capacitor C6. Signal -z, signal F(ψ 3 ) is connected to the input end of the inverting integral operation circuit constructed by the operational amplifier U11, the resistor R121, the resistor R22, and the capacitor C6, and the output end of the inverting integral operation circuit outputs a signal ψ 3 ; Signal ψ 3 The input is the input end of the inverting proportional operational circuit constructed by operational amplifier U12, resistor R23, and resistor R24, and the output end of the inverting proportional operational circuit outputs a signal -ψ 3 The signal -z is connected to the reverse input terminal of the operational amplifier U11 through the resistor R21, and the signal F(ψ 3 ) is connected to the reverse input terminal of the operational amplifier U11 through the resistor R22, the positive input terminal of the amplifier U11 is grounded, the reverse input terminal of the amplifier U11 is connected to the output terminal of the amplifier U11 through the capacitor C6, and the output terminal of the amplifier U11 outputs a signal ψ 3 The output end of the amplifier U11 is connected to the reverse input end of the operational amplifier U12 via a resistor R23, the positive input end of the amplifier U12 is grounded, the reverse input end of the amplifier U12 is connected to the output end of the amplifier U12 via a resistor R24, and the output end of the amplifier U12 outputs a signal -ψ 3 .

[0049] The F(ψ 1) The operational circuit includes an operational amplifier U13, an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, an operational amplifier U19, an adder A1, an adder A2, a sinusoidal signal source VSIN1, a sinusoidal signal source VSIN2, a sinusoidal signal source VSIN3, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32, and a resistor R33, wherein the sinusoidal signal source VSIN1 input The input end is grounded, the output end of the sinusoidal signal source VSIN1 is connected to the inverting input end of the operational amplifier U13, the positive input end of the amplifier U13 is grounded, the output end of the amplifier U13 is connected to the reverse input end of the operational amplifier U14 via a resistor R25, the positive input end of the amplifier U14 is grounded, the reverse input end of the amplifier U14 is connected to the output end of the amplifier U14 via a resistor R26, and the output end of the amplifier U14 is connected to one side input end of the adder A1; the input end of the sinusoidal signal source VSIN2 is grounded, The output terminal of the sinusoidal signal source VSIN2 is connected to the inverting input terminal of the operational amplifier U15, the positive input terminal of the amplifier U15 is grounded, the output terminal of the amplifier U15 is connected to the reverse input terminal of the operational amplifier U16 via a resistor R27, the positive input terminal of the amplifier U16 is grounded, the reverse input terminal of the amplifier U16 is connected to the output terminal of the amplifier U16 via a resistor R28, and the output terminal of the amplifier U16 is connected to one side input terminal of the adder A2; the input terminal of the sinusoidal signal source VSIN3 is grounded, the sinusoidal signal The output terminal of source VSIN3 is connected to the inverting input terminal of operational amplifier U17, the positive input terminal of amplifier U17 is grounded, the output terminal of amplifier U17 is connected to the reverse input terminal of operational amplifier U18 via resistor R29, the positive input terminal of amplifier U18 is grounded, the reverse input terminal of amplifier U18 is connected to the output terminal of amplifier U18 via resistor R30, the output terminal of amplifier U18 is connected to the other side input terminal of adder A2; the output terminal of adder A2 is connected to one side input terminal of adder A1; signal -ψ 1 The output end of the adder A1 is connected to the reverse input end of the operational amplifier U19 through the resistor R31, the output end of the adder A1 is connected to the reverse input end of the operational amplifier U19 through the resistor R32, the positive input end of the amplifier U19 is grounded, the reverse input end of the amplifier U19 is connected to the output end of the amplifier U19 through the resistor R33, and the output end of the amplifier U19 outputs the signal F(ψ 1 );

[0050] The sinusoidal signal source VSIN1 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U13, the operational amplifier U14, the resistor R25, and the resistor R26. The output end of the pulse function operation circuit outputs the signal The sinusoidal signal source VSIN2 is connected to the input end of the pulse function operation circuit constructed by operational amplifier U15, operational amplifier U16, resistor R27, and resistor R28, and the output end of the pulse function operation circuit outputs a signal The sinusoidal signal source VSIN3 is connected to the input end of a pulse function operation circuit constructed by an operational amplifier U17, an operational amplifier U18, a resistor R29, and a resistor R30. The output end of the pulse function operation circuit outputs a signal sgn (sin (0.1t-π)); the signal The signal sgn (sin (0.1t-π)) is connected to the input end of adder A2, and the output end of adder A2, the signal Connect the input of adder A1, and the output of adder A1 to the signal -ψ 1 Connect the input end of the inverting proportional operation circuit constructed by operational amplifier U19, resistor R31, resistor R32, and resistor R33, and the output end of the inverting proportional operation circuit outputs the signal F(ψ 1 ).

[0051] The F(ψ 2) The operational circuit includes an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, an operational amplifier U24, an operational amplifier U25, an operational amplifier U26, an adder A3, an adder A4, a sinusoidal signal source VSIN4, a sinusoidal signal source VSIN5, a sinusoidal signal source VSIN6, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41, and a resistor R42, wherein the sinusoidal signal source VSIN4 is input The input end is grounded, the output end of the sinusoidal signal source VSIN4 is connected to the inverting input end of the operational amplifier U20, the positive input end of the amplifier U20 is grounded, the output end of the amplifier U20 is connected to the reverse input end of the operational amplifier U21 via a resistor R34, the positive input end of the amplifier U21 is grounded, the reverse input end of the amplifier U21 is connected to the output end of the amplifier U21 via a resistor R35, and the output end of the amplifier U21 is connected to one side input end of the adder A3; the input end of the sinusoidal signal source VSIN2 is grounded, The output end of the sinusoidal signal source VSIN2 is connected to the inverting input end of the operational amplifier U22, the positive input end of the amplifier U22 is grounded, the output end of the amplifier U22 is connected to the reverse input end of the operational amplifier U23 via a resistor R36, the positive input end of the amplifier U23 is grounded, the reverse input end of the amplifier U23 is connected to the output end of the amplifier U23 via a resistor R37, and the output end of the amplifier U23 is connected to one side input end of the adder A4; the input end of the sinusoidal signal source VSIN6 is grounded, and the sinusoidal signal The output terminal of source VSIN6 is connected to the inverting input terminal of operational amplifier U24, the positive input terminal of amplifier U24 is grounded, the output terminal of amplifier U24 is connected to the reverse input terminal of operational amplifier U25 via resistor R38, the positive input terminal of amplifier U25 is grounded, the reverse input terminal of amplifier U25 is connected to the output terminal of amplifier U25 via resistor R39, the output terminal of amplifier U25 is connected to the other side input terminal of adder A4; the output terminal of adder A4 is connected to one side input terminal of adder A3; signal -ψ 2 The output end of the adder A3 is connected to the reverse input end of the operational amplifier U26 through the resistor R41, the output end of the adder A3 is connected to the reverse input end of the operational amplifier U26 through the resistor R40, the positive input end of the amplifier U26 is grounded, the reverse input end of the amplifier U26 is connected to the output end of the amplifier U26 through the resistor R42, and the output end of the amplifier U26 outputs the signal F(ψ 2 );

[0052] The sinusoidal signal source VSIN4 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U20, the operational amplifier U21, the resistor R34, and the resistor R35. The output end of the pulse function operation circuit outputs the signal The sinusoidal signal source VSIN5 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U22, the operational amplifier U23, the resistor R36, and the resistor R37. The output end of the pulse function operation circuit outputs the signal The sinusoidal signal source VSIN6 is connected to the input end of a pulse function operation circuit constructed by an operational amplifier U24, an operational amplifier U25, a resistor R38, and a resistor R39. The output end of the pulse function operation circuit outputs a signal sgn (sin (0.4t-π)); the signal The signal sgn (sin (0.4t-π)) is connected to the input end of adder A4, and the output end of adder A4, the signal Connect the input end of adder A3, and the output end of adder A3 to the signal -ψ 2 Connect the input end of the inverting proportional operation circuit constructed by operational amplifier U26, resistor R40, resistor R41, and resistor R42, and the output end of the inverting proportional operation circuit outputs a signal F(ψ 2 ).

[0053] The F(ψ 3) The operational circuit includes an operational amplifier U27, an operational amplifier U28, an operational amplifier U29, an operational amplifier U30, an operational amplifier U31, an operational amplifier U32, an operational amplifier U33, an adder A5, an adder A6, a sine signal source VSIN7, a sine signal source VSIN8, a sine signal source VSIN9, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a resistor R48, a resistor R49, a resistor R50, and a resistor R51, wherein the sine signal source VSIN7 input The input end is grounded, the output end of the sinusoidal signal source VSIN7 is connected to the inverting input end of the operational amplifier U27, the positive input end of the amplifier U27 is grounded, the output end of the amplifier U27 is connected to the reverse input end of the operational amplifier U28 via a resistor R43, the positive input end of the amplifier U28 is grounded, the reverse input end of the amplifier U28 is connected to the output end of the amplifier U28 via a resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5; the input end of the sinusoidal signal source VSIN8 is grounded, The output terminal of the sinusoidal signal source VSIN8 is connected to the inverting input terminal of the operational amplifier U29, the positive input terminal of the amplifier U29 is grounded, the output terminal of the amplifier U29 is connected to the reverse input terminal of the operational amplifier U30 via a resistor R45, the positive input terminal of the amplifier U30 is grounded, the reverse input terminal of the amplifier U30 is connected to the output terminal of the amplifier U30 via a resistor R46, and the output terminal of the amplifier U30 is connected to one side input terminal of the adder A6; the input terminal of the sinusoidal signal source VSIN9 is grounded, the sinusoidal signal The output terminal of source VSIN9 is connected to the inverting input terminal of operational amplifier U31, the positive input terminal of amplifier U31 is grounded, the output terminal of amplifier U31 is connected to the reverse input terminal of operational amplifier U32 via resistor R47, the positive input terminal of amplifier U32 is grounded, the reverse input terminal of amplifier U32 is connected to the output terminal of amplifier U32 via resistor R48, the output terminal of amplifier U32 is connected to the other side input terminal of adder A6; the output terminal of adder A6 is connected to one side input terminal of adder A5; signal -ψ 3 The output end of the adder A5 is connected to the reverse input end of the operational amplifier U33 through the resistor R50, the output end of the adder A5 is connected to the reverse input end of the operational amplifier U33 through the resistor R49, the positive input end of the amplifier U33 is grounded, the reverse input end of the amplifier U33 is connected to the output end of the amplifier U33 through the resistor R51, and the output end of the amplifier U33 outputs the signal F(ψ 3 ).

[0054] The sinusoidal signal source VSIN7 is connected to the input end of the pulse function operation circuit constructed by operational amplifier U27, operational amplifier U28, resistor R43, and resistor R44, and the output end of the pulse function operation circuit outputs a signal The sinusoidal signal source VSIN8 is connected to the input end of the pulse function operation circuit constructed by the operational amplifier U29, the operational amplifier U30, the resistor R45, and the resistor R49, and the output end of the pulse function operation circuit outputs the signal The sinusoidal signal source VSIN9 is connected to the input end of a pulse function operation circuit constructed by an operational amplifier U31, an operational amplifier U32, a resistor R47, and a resistor R48, and the output end of the pulse function operation circuit outputs a signal sgn (sin (0.6t-π)); the signal The signal sgn (sin (0.6t-π)) is connected to the input end of adder A6, and the output end of adder A6, the signal Connect the input of adder A5, and the output of adder A5 to the signal -ψ 3 Connect the input end of the inverting proportional operation circuit constructed by operational amplifier U33, resistor R49, resistor R50, and resistor R51, and the output end of the inverting proportional operation circuit outputs the signal F(ψ 3 ).

[0055] Preferably, the voltage value of the voltage source VCC is 15V, and the voltage value of the voltage source VEE is -15V.

[0056] Preferably, the capacitances of the capacitors C1, C2 and C3 are all 300uF, and the capacitances of the capacitors C4, C5 and C6 are all 0.1uF.

[0057] Preferably, the resistance of resistor R1 in the main circuit is 7.1kΩ, the resistance of resistor R2 is 3.55kΩ, the resistance of resistor R3, resistor R4, resistor R7, resistor R8, resistor R11, resistor R12, resistor R15, resistor R16, resistor R19, resistor R20, resistor R23, and resistor R24 ​​are all 100kΩ, the resistance of resistor R5, resistor R9, and resistor R13 is 25kΩ, the resistance of resistor R6 is 133kΩ, the resistance of resistor R10 is 6.67kΩ, the resistance of resistor R14 is 2.5kΩ, the resistance of resistor R17 and resistor R21 is 12.5kΩ, and the resistance of resistor R18 and resistor R22 is 1.67kΩ. In the pulse function operation circuit, the resistance values ​​of resistors R25, R27, R29, R34, R36, R38, R43, R45, and R47 are 13.9 kΩ, the resistance values ​​of resistors R26, R28, R30, R35, R37, R39, R44, R46, and R48 are 1 kΩ, and the resistance values ​​of resistors R31, R32, R33, R40, R41, R42, R49, R50, and R51 are 100 kΩ.

[0058] Preferably, the multiplication coefficient m of the multiplier M1 is 1 is 1, the multiplication coefficient m of multiplier M2 2 is 1.

[0059] The dimensionless mathematical model of a grid hidden multi-wing attractor chaotic system controlled by an impulse function is as follows:

[0060]

[0061] Formula (1) can be realized by six integral operation circuits. The circuit equation is consistent with the dynamic equation. The coefficients of each feedback term in the system are realized by the joint setting of resistance and capacitance. The circuit equation corresponding to formula (1) is:

[0062]

[0063] Among them, the capacitor C 1 =C 2 =C 3 =300uF, C 4 =C 5 =C 6 =0.1uF The corresponding resistance value is R 1 =7.1kΩ,

[0064] R 2 =3.55kΩ, R 5 =R 9 =R 13 =25kΩ, R 6 =133kΩ, R 10 =6.67kΩ, R 14 =2.5kΩ,

[0065] R 17 =R 21 =12.5kΩ, R 18 =R 22 =1.67kΩ,

[0066] R 25 =R 27 =R 29 =R 34 =R 36 =R 38 =R 43 =R 45 =R 47 =13.9kΩ,

[0067] R 26 =R 28 =R 30 =R 35 =R 37 =R 39=R 44 =R 46 =R 48 =1kΩ.

[0068] like Figure 5 , Figure 6 , Figure 7 As shown, they are the chaotic attractor ψ 1 -ψ 2 , 1 -ψ 3 , 2 -ψ 3 Plane phase diagram, at this time the system can be 1 -ψ 2 , 1 -ψ 3 , 2 -ψ 3 Three planes generate 4×4 scrolls, which proves the feasibility of the proposed technical solution.

[0069] The specific implementation methods are only for illustrating the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.

Claims

1. A grid hidden multi-wing attractor chaotic system controlled by an impulse function, characterized in that: It includes an x-product branch, a y-product branch, a z-product branch, a ψ1 extended dimension product branch, a ψ2 extended dimension product branch, a ψ3 extended dimension product branch, an F(ψ1) operation circuit, an F(ψ2) operation circuit and an F(ψ3) operation circuit; The x product branch includes two input terminals, signal x and signal -z. Signal x is connected to the input terminal of the operational amplifier U1 through R1, and signal -z is connected to the input terminal of the operational amplifier U1 through R2. The output terminal of the operational amplifier U1 is connected to the input terminal of the operational amplifier U2 through resistor R3, and finally outputs signal -x. The y product branch includes three input terminals, namely, signal x, signal z, and voltage source VEE. Signal x and signal z are connected to the input terminal of operational amplifier U3 through R5. Signal VEE is connected to the input terminal of operational amplifier U3 through R6. The output terminal of operational amplifier U3 is connected to the input terminal of operational amplifier U4 through resistor R7, and finally outputs signal -y. The z product branch includes three input terminals: signal x, signal y, and signal z. Signal x and signal y are connected to the input terminal of the operational amplifier U5 through R9, and signal z is connected to the input terminal of the operational amplifier U5 through R10. The output terminal of the operational amplifier U5 is connected to the input terminal of the operational amplifier U6 through the resistor R11, and finally the output signal -z is output; The ψ1 extended dimension product branch includes two input terminals, signal -x and signal F(ψ1). Signal -x is connected to the input terminal of operational amplifier U7 through R13, signal F(ψ1) is connected to the input terminal of operational amplifier U7 through R14, and the output terminal of operational amplifier U7 is connected to the input terminal of operational amplifier U8 through resistor R15, and finally outputs signal -ψ1; The ψ2 extended dimension product branch includes two input terminals, signal -y and signal F (ψ2). Signal -y is connected to the input terminal of operational amplifier U9 through R17, signal F (ψ2) is connected to the input terminal of operational amplifier U9 through R18, and the output terminal of operational amplifier U9 is connected to the input terminal of operational amplifier U10 through resistor R19, and finally outputs signal -ψ2; The ψ3 extended product branch includes two input terminals, signal -z and signal F (ψ3). Signal -z is connected to the input terminal of operational amplifier U11 through R21, signal F (ψ3) is connected to the input terminal of operational amplifier U11 through R22, and the output terminal of operational amplifier U11 is connected to the input terminal of operational amplifier U12 through resistor R23, and finally the output signal -ψ3 is output.

2. A grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: The x product branch includes an operational amplifier U1, an operational amplifier U2, a resistor R1, a resistor R2, a resistor R3, a resistor R4 and a capacitor C1; a signal x is connected to the reverse input terminal of the operational amplifier U1 via the resistor R1, a signal -z is connected to the reverse input terminal of the operational amplifier U1 via the resistor R2, the positive input terminal of the amplifier U1 is grounded, the reverse input terminal of the amplifier U1 is connected to the output terminal of the amplifier U1 via the capacitor C1, the output terminal of the amplifier U1 outputs the signal x, the output terminal of the amplifier U1 is connected to the reverse input terminal of the operational amplifier U2 via the resistor R3, the positive input terminal of the amplifier U2 is grounded, the reverse input terminal of the amplifier U2 is connected to the output terminal of the amplifier U4 via the resistor R4, and the output terminal of the amplifier U2 outputs the signal -x.

3. A grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: The y product branch includes an operational amplifier U3, an operational amplifier U4, a multiplier M1, a voltage source VEE, a resistor R5, a resistor R6, a resistor R7, a resistor R8 and a capacitor C2; signals x and z are connected to the input end of the multiplier M1, the output end of the multiplier M1 is connected to the reverse input end of the operational amplifier U3 via the resistor R5, the DC power supply VEE is connected to the reverse input end of the operational amplifier U3 via the resistor R6, the positive input end of the amplifier U3 is grounded, the reverse input end of the amplifier U3 is connected to the output end of the amplifier U3 via the capacitor C2, the output end of the amplifier U3 outputs a signal y, the output end of the amplifier U3 is connected to the reverse input end of the operational amplifier U4 via the resistor R7, the positive input end of the amplifier U4 is grounded, the reverse input end of the amplifier U4 is connected to the output end of the amplifier U4 via the resistor R8, and the output end of the amplifier U4 outputs a signal -y.

4. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: The z product branch includes an operational amplifier U5, an operational amplifier U6, a multiplier M1, a resistor R9, a resistor R10, a resistor R11, a resistor R12 and a capacitor C3; signals x and y are connected to the input end of the multiplier M2, the output end of the multiplier M2 is connected to the reverse input end of the operational amplifier U5 via the resistor R9, the signal z is connected to the reverse input end of the operational amplifier U5 via the resistor R10, the positive input end of the amplifier U5 is grounded, the reverse input end of the amplifier U5 is connected to the output end of the amplifier U5 via the capacitor C3, the output end of the amplifier U5 outputs the signal z, the output end of the amplifier U5 is connected to the reverse input end of the operational amplifier U6 via the resistor R11, the positive input end of the amplifier U6 is grounded, the reverse input end of the amplifier U6 is connected to the output end of the amplifier U6 via the resistor R12, and the output end of the amplifier U6 outputs the signal -z.

5. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: The ψ1 extended dimension product branch includes an operational amplifier U7, an operational amplifier U8, a resistor R13, a resistor R14, a resistor R15, a resistor R16, and a capacitor C4; a signal -x is connected to the reverse input terminal of the operational amplifier U7 via the resistor R13, a signal F(ψ1) is connected to the reverse input terminal of the operational amplifier U7 via the resistor R14, the positive input terminal of the amplifier U7 is grounded, the reverse input terminal of the amplifier U7 is connected to the output terminal of the amplifier U7 via the capacitor C4, the output terminal of the amplifier U7 outputs the signal ψ1, the output terminal of the amplifier U7 is connected to the reverse input terminal of the operational amplifier U8 via the resistor R15, the positive input terminal of the amplifier U8 is grounded, the reverse input terminal of the amplifier U8 is connected to the output terminal of the amplifier U8 via the resistor R16, and the output terminal of the amplifier U8 outputs the signal -ψ1.

6. A grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: The ψ2 extended dimension product branch includes an operational amplifier U9, an operational amplifier U10, a resistor R17, a resistor R18, a resistor R19, a resistor R20 and a capacitor C5. The signal -y is connected to the reverse input terminal of the operational amplifier U9 via the resistor R17, the signal F(ψ2) is connected to the reverse input terminal of the operational amplifier U9 via the resistor R18, the positive input terminal of the amplifier U9 is grounded, the reverse input terminal of the amplifier U8 is connected to the output terminal of the amplifier U9 via the capacitor C5, the output terminal of the amplifier U9 outputs the signal ψ2, the output terminal of the amplifier U9 is connected to the reverse input terminal of the operational amplifier U10 via the resistor R19, the positive input terminal of the amplifier U10 is grounded, the reverse input terminal of the amplifier U10 is connected to the output terminal of the amplifier U10 via the resistor R20, and the output terminal of the amplifier U10 outputs the signal -ψ2.

7. A grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: The ψ3 extended dimension product branch includes an operational amplifier U11, an operational amplifier U12, a resistor R21, a resistor R22, a resistor R23, a resistor R24 ​​and a capacitor C6; a signal -z is connected to the reverse input terminal of the operational amplifier U11 via the resistor R21, a signal F(ψ3) is connected to the reverse input terminal of the operational amplifier U11 via the resistor R22, the positive input terminal of the amplifier U11 is grounded, the reverse input terminal of the amplifier U11 is connected to the output terminal of the amplifier U11 via the capacitor C6, the output terminal of the amplifier U11 outputs the signal ψ3, the output terminal of the amplifier U11 is connected to the reverse input terminal of the operational amplifier U12 via the resistor R23, the positive input terminal of the amplifier U12 is grounded, the reverse input terminal of the amplifier U12 is connected to the output terminal of the amplifier U12 via the resistor R24, and the output terminal of the amplifier U12 outputs the signal -ψ3.

8. The grid hidden multi-wing attractor chaotic system controlled by an impulse function as claimed in claim 1, characterized in that: The three F-function operation circuits include an F(ψ1) operation circuit, an F(ψ2) operation circuit and an F(ψ3) operation circuit; The F(ψ1) operational circuit includes an operational amplifier U13, an operational amplifier U14, an operational amplifier U15, an operational amplifier U16, an operational amplifier U17, an operational amplifier U18, an operational amplifier U19, an adder A1, an adder A2, a resistor R25, a resistor R26, a resistor R27, a resistor R28, a resistor R29, a resistor R30, a resistor R31, a resistor R32 and a resistor R33; an input end of a sinusoidal signal source VSIN1 is grounded, an output end of the sinusoidal signal source VSIN1 is connected to an inverting input end of the operational amplifier U13, and a positive input end of the amplifier U13 is connected to a positive input end of the amplifier U13. The input end is grounded, the output end of the amplifier U13 is connected to the reverse input end of the operational amplifier U14 via a resistor R25, the positive input end of the amplifier U14 is grounded, the reverse input end of the amplifier U14 is connected to the output end of the amplifier U14 via a resistor R26, and the output end of the amplifier U14 is connected to one side input end of the adder A1; the input end of the sinusoidal signal source VSIN2 is grounded, the output end of the sinusoidal signal source VSIN2 is connected to the inverting input end of the operational amplifier U15, the positive input end of the amplifier U15 is grounded, and the output end of the amplifier U15 is connected to the operational amplifier U1 via a resistor R27 6, the positive input terminal of the amplifier U16 is grounded, the negative input terminal of the amplifier U16 is connected to the output terminal of the amplifier U16 through the resistor R28, and the output terminal of the amplifier U16 is connected to one side input terminal of the adder A2; the input terminal of the sinusoidal signal source VSIN3 is grounded, the output terminal of the sinusoidal signal source VSIN3 is connected to the inverting input terminal of the operational amplifier U17, the positive input terminal of the amplifier U17 is grounded, the output terminal of the amplifier U17 is connected to the negative input terminal of the operational amplifier U18 through the resistor R29, the positive input terminal of the amplifier U18 is grounded, and the negative input terminal of the amplifier U18 is connected to the negative input terminal of the operational amplifier U18. The input end is connected to the output end of the amplifier U18 through the resistor R30, and the output end of the amplifier U18 is connected to the other side input end of the adder A2; the output end of the adder A2 is connected to one side input end of the adder A1; the signal -ψ1 is connected to the reverse input end of the operational amplifier U19 through the resistor R31, and the output end of the adder A1 is connected to the reverse input end of the operational amplifier U19 through the resistor R32, the positive input end of the amplifier U19 is grounded, and the reverse input end of the amplifier U19 is connected to the output end of the amplifier U19 through the resistor R33, and the output end of the amplifier U19 outputs the signal F(ψ1); The F(ψ2) operational circuit includes an operational amplifier U20, an operational amplifier U21, an operational amplifier U22, an operational amplifier U23, an operational amplifier U24, an operational amplifier U25, an operational amplifier U26, an adder A3, an adder A4, a resistor R34, a resistor R35, a resistor R36, a resistor R37, a resistor R38, a resistor R39, a resistor R40, a resistor R41 and a resistor R42, wherein the input end of the sinusoidal signal source VSIN4 is grounded, the output end of the sinusoidal signal source VSIN4 is connected to the inverting input end of the operational amplifier U20, and the amplifier U20 The positive input terminal is grounded, the output terminal of the amplifier U20 is connected to the reverse input terminal of the operational amplifier U21 via the resistor R34, the positive input terminal of the amplifier U21 is grounded, the reverse input terminal of the amplifier U21 is connected to the output terminal of the amplifier U21 via the resistor R35, and the output terminal of the amplifier U21 is connected to one side input terminal of the adder A3; the input terminal of the sinusoidal signal source VSIN2 is grounded, the output terminal of the sinusoidal signal source VSIN2 is connected to the inverting input terminal of the operational amplifier U22, the positive input terminal of the amplifier U22 is grounded, and the output terminal of the amplifier U22 is connected to the operational amplifier U23 via the resistor R36. The reverse input terminal of the amplifier U23 is connected to the ground, the positive input terminal of the amplifier U23 is connected to the output terminal of the amplifier U23 via a resistor R37, and the output terminal of the amplifier U23 is connected to one side input terminal of the adder A4; the input terminal of the sinusoidal signal source VSIN6 is grounded, the output terminal of the sinusoidal signal source VSIN6 is connected to the inverting input terminal of the operational amplifier U24, the positive input terminal of the amplifier U24 is grounded, the output terminal of the amplifier U24 is connected to the reverse input terminal of the operational amplifier U25 via a resistor R38, the positive input terminal of the amplifier U25 is grounded, and the reverse input terminal of the amplifier U25 is connected to the ground. The input end is connected to the output end of the amplifier U25 through the resistor R39, and the output end of the amplifier U25 is connected to the other side input end of the adder A4; the output end of the adder A4 is connected to one side input end of the adder A3; the signal -ψ2 is connected to the reverse input end of the operational amplifier U26 through the resistor R41, and the output end of the adder A3 is connected to the reverse input end of the operational amplifier U26 through the resistor R40, the positive input end of the amplifier U26 is grounded, and the reverse input end of the amplifier U26 is connected to the output end of the amplifier U26 through the resistor R42, and the output end of the amplifier U26 outputs the signal F(ψ2); The F(ψ3) operational circuit includes an operational amplifier U27, an operational amplifier U28, an operational amplifier U29, an operational amplifier U30, an operational amplifier U31, an operational amplifier U32, an operational amplifier U33, an adder A5, an adder A6, a resistor R43, a resistor R44, a resistor R45, a resistor R46, a resistor R47, a resistor R48, a resistor R49, a resistor R50 and a resistor R51; the input end of the sinusoidal signal source VSIN7 is grounded, the output end of the sinusoidal signal source VSIN7 is connected to the inverting input end of the operational amplifier U27, and the forward end of the amplifier U27 is connected to the ground. The input end is grounded, the output end of the amplifier U27 is connected to the reverse input end of the operational amplifier U28 via a resistor R43, the positive input end of the amplifier U28 is grounded, the reverse input end of the amplifier U28 is connected to the output end of the amplifier U28 via a resistor R44, and the output end of the amplifier U28 is connected to one side input end of the adder A5; the input end of the sinusoidal signal source VSIN8 is grounded, the output end of the sinusoidal signal source VSIN8 is connected to the inverting input end of the operational amplifier U29, the positive input end of the amplifier U29 is grounded, and the output end of the amplifier U29 is connected to the operational amplifier U30 via a resistor R45. The reverse input terminal of the amplifier U30 is connected to the ground, the positive input terminal of the amplifier U30 is connected to the output terminal of the amplifier U30 via a resistor R46, and the output terminal of the amplifier U30 is connected to one side input terminal of the adder A6; the input terminal of the sinusoidal signal source VSIN9 is grounded, the output terminal of the sinusoidal signal source VSIN9 is connected to the inverting input terminal of the operational amplifier U31, the positive input terminal of the amplifier U31 is grounded; the output terminal of the amplifier U31 is connected to the reverse input terminal of the operational amplifier U32 via a resistor R47, the positive input terminal of the amplifier U32 is grounded, and the reverse input terminal of the amplifier U32 is connected to the ground. The input end is connected to the output end of the amplifier U32 through the resistor R48, and the output end of the amplifier U32 is connected to the other side input end of the adder A6; the output end of the adder A6 is connected to one side input end of the adder A5; the signal -ψ3 is connected to the reverse input end of the operational amplifier U33 through the resistor R50, and the output end of the adder A5 is connected to the reverse input end of the operational amplifier U33 through the resistor R49, the positive input end of the amplifier U33 is grounded, and the reverse input end of the amplifier U33 is connected to the output end of the amplifier U33 through the resistor R51, and the output end of the amplifier U33 outputs the signal F(ψ3).

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