Impedance Matching Adjustment Method and Device for FPC High-Performance Computing Chip Interface
By establishing scalar differential equation systems and using Bezier curve fitting technology, combining dynamic compensation parameter matrix and recurrent neural network model, the problem that traditional FPC interface impedance matching methods cannot cope with complex environments is solved, and efficient and real-time impedance matching is achieved.
Patent Information
- Application Number
- CN202510261231.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-03-06
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2045-03-06
AI Technical Summary
The traditional FPC interface impedance matching method cannot effectively deal with impedance changes in complex working environments, resulting in reduced signal integrity and reduced transmission performance.
By establishing a scalar differential equation system including impedance change rate, temperature change rate and signal characteristic change rate, precise modeling of the dynamic impedance characteristics of the FPC interface is achieved, and the spatial curvature distribution of the multi-layer structure is described using Bezier curve fitting technology, and impedance matching parameter optimization is performed in combination with dynamic compensation parameter matrix and recurrent neural network model.
It improves the adaptability of the FPC high-performance computing chip interface to complex working conditions, improves the convergence speed of impedance matching parameters, and significantly improves the real-time and accuracy of impedance matching.
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Figure CN119767546B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of interface impedance adjustment, and in particular to an impedance matching adjustment method and device for an FPC high-performance computing chip interface. Background Art
[0002] Traditional FPC interface impedance matching methods mainly rely on static compensation and fixed parameter adjustment, which cannot effectively cope with impedance changes in complex working environments, resulting in reduced signal integrity and transmission performance.
[0003] During high-speed data transmission, external factors such as temperature changes, mechanical stress, and electromagnetic interference can cause deformation of the FPC multilayer structure, resulting in impedance mismatch between layers. This dynamically changing impedance mismatch problem is difficult to solve with traditional passive compensation methods. In addition, there is a complex coupling relationship between the spatial curvature distribution and the impedance characteristics of the FPC multilayer structure, and there is a lack of effective mathematical models to describe this coupling effect. When dealing with the dynamic impedance changes of the FPC high-performance computing chip interface, the current impedance matching technology has problems such as slow response speed, insufficient accuracy, and poor reliability. Especially under extreme environmental conditions, traditional impedance matching methods cannot accurately capture and compensate for rapidly changing impedance characteristics, resulting in unstable system performance. Summary of the invention
[0004] The present invention provides an impedance matching adjustment method and device for an FPC high-performance computing chip interface, which improves the adaptability of the FPC high-performance computing chip interface to complex working conditions and increases the convergence speed of impedance matching parameters.
[0005] In a first aspect, the present invention provides an impedance matching adjustment method for an FPC high-performance computing chip interface, the impedance matching adjustment method for the FPC high-performance computing chip interface comprising:
[0006] Collect impedance parameters of the FPC high-performance computing chip interface, obtain impedance data, and establish a mathematical model of impedance characteristics;
[0007] Constructing a set of scalar differential equations including impedance change rate, temperature change rate and signal characteristic change rate according to the impedance characteristic mathematical model, and solving the set of scalar differential equations to obtain a dynamic compensation parameter matrix;
[0008] Based on the dynamic compensation parameter matrix, the interlayer relative position of the FPC multilayer structure is adjusted and controlled, and the impedance gradient parameter is adjusted in the interlayer transition area of the FPC multilayer structure to obtain initial impedance optimization data;
[0009] The initial impedance optimization data and historical temperature data are input into a recurrent neural network model to perform impedance matching parameter optimization calculations to generate an impedance matching optimization parameter group.
[0010] In a second aspect, the present invention provides an impedance matching adjustment device for an FPC high-performance computing chip interface, the impedance matching adjustment device for an FPC high-performance computing chip interface comprising:
[0011] The acquisition module is used to collect impedance parameters of the FPC high-performance computing chip interface, obtain impedance data, and establish a mathematical model of impedance characteristics;
[0012] A construction module, used to construct a scalar differential equation group including impedance change rate, temperature change rate and signal characteristic change rate according to the impedance characteristic mathematical model, and solve the scalar differential equation group to obtain a dynamic compensation parameter matrix;
[0013] An adjustment module, for adjusting and controlling the interlayer relative positions of the FPC multilayer structure based on the dynamic compensation parameter matrix, adjusting the impedance gradient parameters in the interlayer transition region of the FPC multilayer structure, and obtaining initial impedance optimization data;
[0014] A generation module is used to input the initial impedance optimization data and historical temperature data into a recurrent neural network model to perform impedance matching parameter optimization calculation and generate an impedance matching optimization parameter group.
[0015] The third aspect of the present invention provides a computer device, comprising: a memory and at least one processor, wherein the memory stores instructions; the at least one processor calls the instructions in the memory so that the computer device executes the above-mentioned impedance matching adjustment method of the FPC high-performance computing chip interface.
[0016] A fourth aspect of the present invention provides a computer-readable storage medium, in which instructions are stored, which, when executed on a computer, enable the computer to execute the impedance matching adjustment method for the FPC high-performance computing chip interface.
[0017] In the technical solution provided by the present invention, by establishing a group of scalar differential equations including the impedance change rate, temperature change rate and signal characteristic change rate, accurate modeling of the dynamic impedance characteristics of the FPC interface is achieved, thereby improving the impedance matching accuracy. The Bessel curve fitting technology is used to accurately describe the spatial curvature distribution of the FPC multilayer structure, and combined with the dynamic compensation parameter matrix, the interlayer impedance mismatch is reduced. The introduction of a recurrent neural network model for impedance matching parameter optimization shortens the system's response time to temperature changes, significantly improving the real-time performance of impedance matching. The hybrid architecture based on the multi-head self-attention mechanism and the deep residual network improves the system's adaptability to complex working conditions and the convergence speed of the impedance matching parameters. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.
[0019] Figure 1 A schematic diagram of the steps of the impedance matching adjustment method of the FPC high-performance computing chip interface in an embodiment of the present invention;
[0020] Figure 2 It is a structural schematic diagram of an impedance matching adjustment device of an FPC high-performance computing chip interface in an embodiment of the present invention;
[0021] Figure 3 It is a schematic block diagram of the structure of a computer device in an embodiment of the present invention. DETAILED DESCRIPTION
[0022] The embodiment of the present invention provides an impedance matching adjustment method and device for an FPC high-performance computing chip interface. The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present invention and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments described herein can be implemented in an order other than that illustrated or described herein. In addition, the terms "including" or "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0023] For ease of understanding, the specific process of the embodiment of the present invention is described below. Figure 1 , an embodiment of the impedance matching adjustment method of the FPC high-performance computing chip interface in the embodiment of the present invention includes:
[0024] Step S1, collecting impedance parameters of the FPC high-performance computing chip interface, obtaining impedance data, and establishing an impedance characteristic mathematical model;
[0025] It is understandable that the execution subject of the present invention may be an impedance matching adjustment device for an FPC high-performance computing chip interface, or a terminal or a server, which is not specifically limited here. The embodiment of the present invention is described by taking a server as an execution subject.
[0026] Specifically, the characteristic impedance value, reflection coefficient and signal integrity index of the FPC interface are collected to obtain an initial impedance parameter set, which reflects the electrical characteristics of the interface in the initial state. The characteristic impedance value reflects the resistance characteristics in the circuit, the reflection coefficient indicates the proportion of the signal reflected during the transmission process, and the signal integrity index evaluates the quality of signal transmission, including key signal characteristics such as signal delay and signal amplitude attenuation. The FPC interface is divided into regions. The FPC interface is divided into multiple impedance detection areas, and four impedance detection points are set at the turning point of the signal line and the via hole of the signal transmission layer in each area. The turning point and the via hole are usually areas where the impedance changes are more significant. Accurately measuring the impedance values of these points can effectively capture the impedance mismatch problem that occurs during signal transmission. Through these impedance detection points, an impedance detection point distribution map is obtained. Real-time monitoring is performed by installing an impedance sensor at each impedance detection point. A three-dimensional packaging structure is designed and configured, in which an impedance sensor, a built-in impedance detection chip and a temperature sensor are integrated. In the acquisition configuration of these sensors, the sampling frequency is set. A frequency that is too low will affect the real-time and accuracy of the data, while a frequency that is too high will lead to unnecessary calculation burden. By accurately setting the working parameters of the sensor, the temperature and impedance data can be collected more precisely and reliably. Based on the initial impedance parameter set and the sensor acquisition configuration data, the temperature data and impedance data are normalized to eliminate the influence of different data scales and dimensions, and the data from different sources are converted into a standardized data matrix. By performing principal component analysis on the standardized data matrix, the matching uncertainty features related to temperature changes and the mismatching uncertainty features related to signal characteristic changes are extracted. In this way, the multidimensional data is reduced in dimension, focusing on the most representative uncertainty features, and a dual uncertainty feature vector is obtained. Based on the dual uncertainty feature vector, a temperature-impedance correlation function is constructed. This function is used to describe the relationship between temperature change and impedance change, and can capture the impedance change trend caused by temperature fluctuations. After the temperature-impedance correlation function is established, the least squares method is used for fitting to obtain the mapping relationship between temperature and impedance change. The least squares method finds the best temperature-impedance mapping model by minimizing the sum of squared errors. The impedance change mapping model is analyzed in time series to reveal the dynamic characteristics of impedance change over time. In actual applications, the influence of temperature change and other environmental factors will gradually accumulate over time. The impedance change trend in the future is predicted through time series analysis to provide a basis for dynamic adjustment. The impedance change mapping model is combined with the dynamic impedance prediction model, and mathematical modeling is performed through the state space equation to describe the dynamic change process of the impedance characteristics. The state space equation can effectively capture the state changes of the system and provide real-time feedback for the impedance matching adjustment process, so as to achieve the goal of accurately adjusting the impedance matching of the FPC high-performance computing chip interface.
[0027] Perform singular value decomposition on the standardized data matrix to help reveal the main change pattern in the data by decomposing the original data matrix into a series of feature matrices. Through singular value decomposition, the data feature decomposition matrix is obtained, which contains the main components and corresponding singular values in the data, reflecting the main change direction of the data. Based on the data feature decomposition matrix, the cumulative contribution rate is calculated, which reflects the contribution of each feature dimension to the overall data variance. By setting the eigenvalue screening threshold, the features with higher contribution rates can be selected, so as to perform dimensionality reduction processing, retain the most representative features, and remove redundant and noise information to obtain the reduced dimension feature matrix. Perform autocorrelation analysis on the temperature data sequence in the reduced dimension feature matrix to obtain the influence of temperature change on impedance. Autocorrelation analysis reveals the dependence between temperature fluctuation and impedance change by calculating the correlation coefficient between temperature and impedance change, and extracts the temperature correlation feature matrix, which contains the relationship characteristics between temperature change and impedance. At the same time, the signal characteristic data is analyzed in the reduced dimension feature matrix. By performing wavelet transform, the frequency, amplitude and phase characteristics of the signal are effectively extracted from the signal. Wavelet transform is a multi-scale analysis method that can handle instantaneous changes in signals and help capture detailed features in signal spectra. The extracted signal characteristics form a signal characteristic feature matrix. The temperature-related feature matrix and the signal characteristic feature matrix are orthogonally transformed, and the correlation between the two feature matrices is eliminated by mathematical means, and the data is mapped to a new feature space. In the new feature space, the features are no longer interdependent and have higher separability and independence. Cluster analysis is performed by analyzing the orthogonal feature space, and the temperature-related features and signal characteristic-related features are clustered separately to obtain dual feature clustering results. Different types of features are classified to reveal the influence pattern of temperature change and signal characteristics on impedance matching. Based on the dual feature clustering results, a feature importance scoring function is constructed to quantify the importance of each feature in the entire impedance matching adjustment process. By calculating the weight coefficient of each feature, it is determined which features have the greatest impact on impedance matching. The weight coefficient is calculated based on the variance contribution of the feature, the clustering result, and its relationship with the impedance matching performance to obtain a feature weight vector. The feature weight vector is weighted and combined with the orthogonal feature space to generate a dual uncertainty feature vector containing temperature matching uncertainty and signal mismatch uncertainty.
[0028] Step S2, constructing a scalar differential equation group including impedance change rate, temperature change rate and signal characteristic change rate according to the impedance characteristic mathematical model, and solving the scalar differential equation group to obtain a dynamic compensation parameter matrix;
[0029] Specifically, based on the mathematical model of impedance characteristics, a differential equation describing impedance change is constructed to obtain an impedance change rate function, which can reflect the rate of change of impedance under different working conditions. The temperature sensitivity of the impedance change rate function is analyzed. By calculating the partial derivative of the effect of temperature on impedance change, the temperature change rate function is obtained to describe the degree of influence of temperature fluctuation on the impedance change rate and quantify the specific effect of temperature change on the impedance matching performance of the system. The temperature change rate function is associated with the signal transmission characteristic parameters. Signal transmission characteristics include key parameters such as signal frequency, signal amplitude, and signal phase, which will change with changes in temperature and other environmental factors. By associating the temperature change rate with the signal characteristic parameters, the signal characteristic change rate function is obtained to describe the rate of change during signal transmission. Based on the impedance change rate function, the temperature change rate function and the signal characteristic change rate function, a three-variable coupled differential equation group is constructed. The equation group simultaneously considers the relationship between temperature, signal characteristics and impedance change, and describes the complex dynamic change process through coupling effect. In order to ensure that the equation group can be effectively solved in practical applications, its stability is analyzed. Through eigenvalue analysis, the stability conditions of the system of equations are determined to ensure that unstable solutions will not appear in actual operation, avoiding errors and non-convergence in numerical calculations. Eigenvalue analysis can reveal the stable region of the solution of the system of equations, thereby providing necessary constraints for the solution process and obtaining the scalar differential equation system. The scalar differential equation system is solved by the fourth-order Runge-Kutta method. In order to ensure the accuracy and stability of the solution, appropriate integral step size and error control parameters are set. The integral step size determines the calculation accuracy of the numerical solution, while the error control parameter ensures that the calculation result will not deviate too much from the true solution during the solution process. Through the iterative calculation of the Runge-Kutta method, the numerical solution matrix is obtained, which contains the solutions of the differential equations at different time points and reflects the behavior of the system under dynamic conditions. The numerical solution matrix is transformed to generate the eigentransformation matrix, which converts the numerical solution matrix into a more operational and physically meaningful form, which is convenient for subsequent compensation analysis and parameter optimization. The eigentransformation matrix maps and adjusts the structure of the numerical solution to ensure that the final result conforms to the physical characteristics of the actual system and has strong applicability. Based on the eigentransformation matrix, the compensation weight coefficient is calculated to optimize the impedance matching performance of the system. According to the relationship between the numerical solution matrix and the characteristic transformation matrix, the compensation weight coefficient is calculated to quantify the contribution of each factor to the impedance matching, which is convenient for targeted optimization and adjustment in actual operation. The compensation weight coefficient is subjected to tensor operation with the numerical solution matrix. The tensor operation can process data of multiple dimensions at the same time, accurately adjust the impedance matching parameters, and obtain the final dynamic compensation parameter matrix.
[0030] Step S3, based on the dynamic compensation parameter matrix, adjusting and controlling the relative positions between layers of the FPC multilayer structure, adjusting the impedance gradient parameters in the interlayer transition region of the FPC multilayer structure, and obtaining initial impedance optimization data;
[0031] Specifically, the dynamic compensation parameter matrix is input into the interlayer position controller. The interlayer position controller adjusts the physical layout of the FPC multilayer structure according to the compensation parameters, especially the precise adjustment of the interlayer position. The micro-stepping drive algorithm is used to control the bending angle and bending radius of the FPC multilayer structure. The micro-stepping drive algorithm has the advantages of high precision and low vibration, and can control each position fine-tuning very accurately, so that each level of the multilayer structure is kept within the precise position range during the adjustment process. Through adjustment, the initial interlayer position parameters are obtained. Based on the initial interlayer position parameters, geometric optimization calculations are performed. The spatial curvature of the FPC multilayer structure is optimized by a mathematical model to ensure the optimal design of the signal transmission path. The Bessel curve fitting technology is used to effectively describe the spatial curvature distribution of the FPC multilayer structure, especially the curvature change on the signal transmission path. The application of the Bessel curve can ensure the smoothness and stability of the signal transmission path at different interlayer positions, thereby avoiding unnecessary distortion or attenuation of the signal during transmission. In this way, the spatial curvature distribution diagram of the FPC multilayer structure is obtained, showing the geometric characteristics of the signal transmission path between each layer. Based on the distribution diagram, the signal transmission path of the multilayer structure is reconstructed to optimize the path parameters, so that the signal transmission is more stable and lossless, and the compensated transmission path parameters are obtained. The compensated transmission path parameters are controlled in the transition area. The transition area is the area where the impedance changes significantly in the FPC multilayer structure. The impedance gradient curve of the interlayer transition area is calculated by the impedance step function. By accurately adjusting the impedance between each layer, it is ensured that the signal will not encounter severe reflection or attenuation when passing through the transition area. The impedance gradient parameters obtained by accurate calculation provide an accurate numerical basis for optimizing impedance matching, ensuring the smooth transition of the impedance gradient in each area, and minimizing the signal loss and interference. According to the impedance gradient parameters, the electromagnetic field distribution of the FPC multilayer structure is characterized and analyzed to help the system understand the propagation and distribution of electromagnetic waves in the multilayer structure under different operating frequencies and environmental conditions. Through analysis, the uneven areas and high interference areas in the electromagnetic field distribution are identified, providing specific directions for subsequent optimization. Based on the analysis results of the electromagnetic field distribution, the shielding layer parameters are calculated to ensure that external interference can be effectively shielded in the multilayer structure and reduce the impact of noise on the signal. The design and parameter calculation of the shielding layer can provide a more stable working environment and avoid the influence of external electromagnetic interference on signal transmission. The shielding structure parameters and the impedance gradient parameters are jointly optimized to achieve a better overall impedance matching effect. Through the optimization algorithm, the thickness and material of the shielding layer and its coordination with the impedance gradient are accurately adjusted to minimize energy loss and reflection while ensuring signal integrity, and obtain a comprehensive optimization parameter set. The impedance characteristics of the comprehensive optimization parameter set are verified to ensure that all optimization measures achieve the expected results and obtain the initial impedance optimization data.
[0032] The initial interlayer position parameters are transformed into spatial coordinates. The initial interlayer position parameters provide the positional relationship of each layer in the FPC multilayer structure, and the position parameters are converted into specific three-dimensional coordinate data through spatial coordinate transformation. The transformed coordinate data contains the three-dimensional coordinates of each impedance detection point in the multilayer structure. The transformed coordinate data is substituted into the cubic Bezier curve control equation to determine the initial control point coordinate set of the Bezier curve. The selection of the Bezier curve control point directly affects the shape of the fitting curve. Through this step, the curve model of the multilayer structure is established. Based on the initial control point coordinate set, a Bezier curve equation group containing 4×n control points is constructed. The number and distribution of these control points determine the accuracy and fitting effect of the Bezier curve. The position of the control point is optimized and calculated by the least squares method to obtain the optimized Bezier curve equation. The least squares method can minimize the error between the fitting curve and the actual impedance detection point by adjusting the position of the control point, thereby ensuring that the fitting curve can reflect the spatial curvature distribution of the FPC multilayer structure as accurately as possible. The optimized Bezier curve equation is used to describe the spatial morphology of the multilayer structure. The optimized Bezier curve equation is uniformly sampled. In the interval [0,1], the Bezier curve is uniformly sampled with a step size of 0.01 to ensure that each sampling point has sufficient accuracy to calculate the curvature value and curvature change rate. By calculating the curvature value for each sampling point, a set of discrete curvature data points are obtained to describe the curvature distribution characteristics of the signal transmission path in space. The discrete curvature data points are smoothly interpolated using cubic spline interpolation to construct a continuous curvature distribution function to describe the changes of the curve at different positions. The curvature value is calculated on each cross section of the FPC multilayer structure to generate three-dimensional curvature distribution data to show the curvature distribution of each area in the entire structure. On this basis, spatial curvature fitting is performed to fit the curvature characteristics of the structure through a mathematical model to generate a spatial curvature distribution map to help identify high curvature areas in the FPC multilayer structure, which usually have a greater impact on signal transmission. Contour line analysis is performed to extract the area with the largest curvature gradient as the target deformation area. The path deformation feature point is obtained by calculating the intersection of the target deformation area and the signal transmission path. These characteristic points mark the areas where the signal transmission path needs to be adjusted, because these points have a greater impact on the delay and attenuation of the signal. A segmented transmission compensation function is constructed based on the path deformation characteristic points. The compensation function performs compensation calculations for the length and transmission delay of each transmission path, and uses the equal phase principle to determine the compensation amount for each path. The equal phase principle ensures that the phase difference of the signal on different paths is as small as possible, thereby avoiding unnecessary interference and phase confusion of the signal on different paths. In this way, the compensation function can effectively adjust the propagation characteristics of the signal on different paths and ensure the efficient transmission of the signal in the entire FPC multi-layer structure. The path compensation parameters are fused and optimized with the original transmission path parameters.Combining the structural characteristics of the original path and the characteristics of the compensated path, a more ideal signal transmission path is obtained. The optimization process adopts the minimum transmission delay criterion, which ensures that the signal can be transmitted efficiently and quickly in the multi-layer structure by minimizing the delay of the signal during transmission, and obtains the compensated transmission path parameters.
[0033] Step S4: input the initial impedance optimization data and the historical temperature data into the recurrent neural network model to perform impedance matching parameter optimization calculation to generate an impedance matching optimization parameter group.
[0034] Specifically, the initial impedance optimization data and historical temperature data are input into the feature extraction layer of the recurrent neural network model, which uses three one-dimensional convolution layers. The convolution kernel size of each convolution layer is 3 and the step size is 1. The purpose of the convolution operation is to extract features from the original data. The input signal is filtered layer by layer through a series of convolution operations to capture the spatial and temporal features. Each convolution layer uses the ReLU activation function and batch normalization. The ReLU activation function helps introduce nonlinear features, while batch normalization accelerates the training process and improves the stability of the model. Through this step, the initial feature matrix is generated. The initial feature matrix is input into the long short-term memory (LSTM) network layer in the recurrent neural network model. LSTM is an effective tool for processing time series data. It can filter time series features through its gating mechanism and selectively retain important information. Through this mechanism, the LSTM layer performs time series analysis on the input data, captures the long-term and short-term dependencies, and outputs the time series state vector. The time series features are used to reflect the dynamic process of impedance and temperature changing over time. The advantage of LSTM is that it can effectively memorize and transmit long-term dependencies and is good at processing tasks containing time information. The temporal state vector is input into the multi-head self-attention calculation layer, which contains 8 attention heads. Each attention head calculates the relative importance between features through the scaled dot product attention mechanism to ensure that the model can focus on the most relevant features. In order to obtain more accurate feature weights, the calculated attention scores are normalized using the softmax function to obtain a weighted feature sequence. The influence of each feature is reasonably distributed, thereby improving the feature selection ability of the model. The weighted feature sequence is input into the bidirectional gated recurrent unit (GRU) layer. This layer contains 128 hidden units in the forward and reverse directions, and controls the flow of information through reset gates and update gates to encode the temporal features in both directions. The bidirectional GRU layer can simultaneously process the information flow from the past to the future (forward) and from the future to the past (reverse), thereby capturing more contextual information and obtaining the encoded feature tensor. The encoded feature tensor is input into the deep residual network layer. The network contains 6 residual blocks, each of which consists of two convolutional layers, two ReLU activation layers, and two batch normalization layers. The design of the residual network adopts a skip connection structure, which can effectively avoid the gradient vanishing problem in the deep network, so that the model can better transfer gradients and improve training efficiency. Through this structure, the deep residual network can learn richer high-order features from complex features and generate a residual feature matrix, which reflects the fine features obtained after the deep learning process. Global average pooling and maximum pooling operations are performed on the residual feature matrix to extract the most representative features. These two pooling methods focus on the global average information of the features and the strongest local features respectively, and obtain the parameter prediction vector. The parameter prediction vector is input into the Bayesian optimization layer for processing.The Bayesian optimization method is used to model parameter distribution. Through the expected improvement criterion, Bayesian optimization can select the optimal parameter point. The expected improvement criterion guides the search process by measuring the relationship between the current model performance and the potential improvement space, thereby continuously optimizing the parameter selection and finally obtaining the impedance matching optimization parameter group.
[0035] In an embodiment of the present invention, by establishing a set of scalar differential equations including the impedance change rate, temperature change rate and signal characteristic change rate, accurate modeling of the dynamic impedance characteristics of the FPC interface is achieved, thereby improving the impedance matching accuracy. The Bessel curve fitting technology is used to accurately describe the spatial curvature distribution of the FPC multilayer structure, and combined with the dynamic compensation parameter matrix, the interlayer impedance mismatch is reduced. The introduction of a recurrent neural network model for impedance matching parameter optimization shortens the system's response time to temperature changes, significantly improving the real-time performance of impedance matching. The hybrid architecture based on the multi-head self-attention mechanism and the deep residual network improves the system's adaptability to complex working conditions and the convergence speed of the impedance matching parameters.
[0036] In a specific embodiment, the process of executing step S1 may specifically include the following steps:
[0037] Collect the characteristic impedance value, reflection coefficient and signal integrity index of the FPC high-performance computing chip interface to obtain the initial impedance parameter set;
[0038] The FPC high-performance computing chip interface is divided into n impedance detection areas, and four impedance detection points are respectively set at the turning point of the signal line and the via hole of the signal transmission layer in each impedance detection area to obtain an impedance detection point distribution map;
[0039] An impedance sensor with a three-dimensional packaging structure is installed at a position determined by the impedance detection point distribution map, and a sampling frequency of an impedance detection chip and a temperature sensor built into the impedance sensor is set to obtain sensor acquisition configuration data;
[0040] Based on the initial impedance parameter set and the sensor acquisition configuration data, the temperature data and the impedance data are normalized to obtain a standardized data matrix;
[0041] Principal component analysis is performed on the standardized data matrix to extract the matching uncertainty features related to temperature and the mismatching uncertainty features related to signal characteristics, and a dual uncertainty feature vector is obtained;
[0042] The temperature-impedance correlation function is constructed based on the dual uncertainty eigenvector, and the mapping relationship between temperature and impedance change is fitted by the least square method to obtain the impedance change mapping model.
[0043] The impedance change mapping model is subjected to time series analysis to obtain a dynamic impedance prediction model, and the dynamic impedance prediction model and the impedance change mapping model are mathematically modeled. The state space equation is used to describe the dynamic change process of the impedance characteristic to obtain the impedance characteristic mathematical model.
[0044] Specifically, the characteristic impedance value, reflection coefficient and signal integrity index of the FPC high-performance computing chip interface are collected. The characteristic impedance value represents the impedance characteristics of the signal on the transmission line, the reflection coefficient is the proportion of the signal reflected at the interface, and the signal integrity index is used to describe the quality and stability of the signal. These preliminary data form the initial impedance parameter set. Multiple impedance detection areas are divided for the FPC high-performance computing chip interface. The impedance characteristics of the FPC interface are most critical at the turning point of the signal line and the via of the signal transmission layer, because these areas are often prone to signal reflection and distortion. In each impedance detection area, four impedance detection points are set, which are located at the turning point of the signal line and the via position of the signal transmission layer. By collecting impedance data in these key areas, an impedance detection point distribution map is obtained, and the impedance value of each point in the map reflects the electrical characteristics of the area. An impedance sensor with a three-dimensional packaging structure is installed at the position determined by the impedance detection point distribution map. The impedance sensor has a built-in impedance detection chip and a temperature sensor, so that it can collect impedance data and temperature data at the same time. In order to ensure the accuracy of the data, the sampling frequency of these sensors is set. The sampling frequency determines the accuracy and real-time performance of data acquisition. According to the needs of actual applications, a suitable sampling frequency is set. Through these operations, the sensor acquisition configuration data is obtained. The temperature data and impedance data are normalized. Data of different dimensions are converted to a unified scale to avoid the impact of different dimensions on the analysis results of the data. The normalization function is set to standardize each set of data to a value between 0 and 1 to obtain a standardized data matrix. The principal component analysis (PCA) method is used to perform dimensionality reduction analysis on the standardized data matrix. Principal component analysis extracts the most representative features of the data by performing singular value decomposition (SVD) on the data. The goal of PCA is to convert high-dimensional data into low-dimensional data while retaining the original information of the data as much as possible. Suppose there is a standardized data matrix , whose size is (in is the sample size, is the number of features), Calculate the covariance matrix:
[0045] ;
[0046] By changing the covariance matrix Perform eigenvalue decomposition to obtain the eigenvector matrix and the eigenvalue matrix . Then, the main eigenvectors are selected according to the size of the eigenvalues to reduce the dimension. The matching uncertainty features related to temperature and the mismatch uncertainty features related to signal characteristics are extracted through principal component analysis to generate a dual uncertainty feature vector, which simultaneously considers the relationship between temperature fluctuations and signal transmission characteristics. Based on the dual uncertainty feature vector, a temperature-impedance correlation function is constructed to describe the mapping relationship between temperature and impedance. Fitting is performed using the least squares method. Set the temperature data to And the impedance data is , the goal of the least squares method is to minimize the objective function:
[0047] ;
[0048] in, is the fitting function between temperature and impedance, It is The impedance value of each sample, is the corresponding temperature value. By optimizing the function with the least square method, an impedance change mapping model of temperature and impedance change is obtained to describe the effect of temperature change on impedance. The impedance change mapping model is extended by timing analysis to obtain a dynamic impedance prediction model. The dynamic model can predict the trend of impedance change over time, taking into account the non-steady-state behavior of the system. Assume that the impedance changes over time. Time is , the dynamic behavior of the system is described by defining the state space equation:
[0049] ;
[0050] in, is the state matrix of the system, is the control input matrix, For external inputs (such as temperature changes or signal inputs), the state-space equations can effectively capture the law of impedance changes over time by describing the dynamic evolution of the system. By performing a timing analysis on the impedance change mapping model, a complete dynamic impedance prediction model is obtained. The dynamic impedance prediction model is combined with the impedance change mapping model to improve the accuracy of the model through mathematical modeling. The state-space equation is used to describe the dynamic change process of the impedance characteristics. This process not only takes into account the change of impedance over time, but also optimizes the impedance matching through precise modeling of each parameter. Finally, the mathematical model of the impedance characteristics is obtained, which can predict the impedance change in real time and adjust it to ensure the signal transmission performance and stability of the FPC high-performance computing chip interface.
[0051] In a specific embodiment, the execution step performs principal component analysis on the standardized data matrix, extracts the matching uncertainty features related to temperature and the mismatching uncertainty features related to signal characteristics, and obtains the dual uncertainty feature vector, which may specifically include the following steps:
[0052] Perform singular value decomposition on the standardized data matrix to obtain the data feature decomposition matrix, calculate the cumulative contribution rate based on the data feature decomposition matrix, set the eigenvalue screening threshold to perform dimensionality reduction processing, and obtain the reduced dimension feature matrix;
[0053] Perform autocorrelation analysis on the temperature data sequence in the reduced dimension feature matrix, calculate the correlation coefficient between temperature and impedance change, obtain the temperature correlation feature matrix, and perform wavelet transform on the signal characteristic data in the reduced dimension feature matrix to extract the signal frequency, amplitude and phase characteristics to obtain the signal characteristic feature matrix;
[0054] The temperature-related feature matrix and the signal characteristic feature matrix are orthogonally transformed to obtain an orthogonal feature space, and cluster analysis is performed on the orthogonal feature space to cluster the temperature-related features and the signal characteristic features separately to obtain a dual feature clustering result;
[0055] Based on the dual feature clustering results, a feature importance scoring function is constructed, and the weight coefficient of each feature is calculated to obtain the feature weight vector. The feature weight vector is weighted combined with the orthogonal feature space to generate a dual uncertainty feature vector containing temperature matching uncertainty and signal mismatch uncertainty.
[0056] Specifically, the singular value decomposition operation is performed on the standardized data matrix to reveal the most representative features in the data and remove the features with smaller contributions, thereby simplifying the dimension of the data. In the singular value decomposition, it is assumed that there is a standardized data matrix , whose size is ,in is the sample size, is the number of features. The singular value decomposition transforms the data matrix Decomposed into the product of three matrices:
[0057] ;
[0058] in, for The left singular vector matrix of , for The diagonal matrix of , whose elements on the diagonal are singular values, represents the importance of each feature in the data, for The right singular vector matrix of . By calculating the singular values, we can evaluate the contribution of each feature to the overall structure of the data. Based on the singular values, we can calculate the cumulative contribution rate. The cumulative contribution rate indicates the previous The ratio of the total information contained in the features to the total information is calculated as follows:
[0059] ;
[0060] in, Indicates singular values, Before The cumulative contribution rate of singular values. By setting a feature value screening threshold, we can decide how many features to retain in order to achieve the desired dimensionality reduction effect. When the cumulative contribution rate reaches a certain threshold (for example, 95%), select the top The features corresponding to the singular values are removed by screening, and the reduced-dimensional feature matrix is obtained. Autocorrelation analysis is performed on the temperature data sequence in the reduced-dimensional feature matrix. Autocorrelation analysis is used to study the correlation between each data point in the sequence and its own past value, which can reveal the regularity in the time series. Suppose the temperature data sequence is , its autocorrelation function Calculated by the following formula:
[0061] ;
[0062] in, is the mean of the temperature series, is the delay time, Describes the temperature over time delay The correlation under different delays is obtained. By calculating the autocorrelation function under different delays, the temperature change pattern is analyzed and basic data is provided for the subsequent temperature-impedance change analysis. The temperature correlation feature matrix is obtained to capture the dynamic characteristics of temperature change. At the same time, for the signal characteristic data in the reduced dimension feature matrix, wavelet transform is performed to extract the frequency, amplitude and phase characteristics of the signal. Wavelet transform is an effective signal processing method that can analyze the signal in both the time domain and the frequency domain. Assume that the signal characteristic data is , the result of wavelet transform is:
[0063] ;
[0064] in, is the wavelet basis function, is the scale factor, is the translation factor, is the coefficient of wavelet transform, which represents the characteristics of the signal at different scales and positions. By analyzing the results of wavelet transform, the frequency components of the signal (for example, periodic changes in the signal), amplitude (intensity changes in the signal) and phase (phase shift of the signal) are extracted. These extracted signal characteristics form a signal characteristic feature matrix, which reflects the changing characteristics of the signal at different frequencies and amplitudes. An orthogonal transformation is performed on the temperature correlation feature matrix and the signal characteristic feature matrix, and the data is projected into a new feature space, in which different features are orthogonal, that is, independent of each other. Through orthogonal transformation, redundant information between features is eliminated so that each feature has independent explanatory significance. Orthogonal transformation is performed by methods such as principal component analysis or singular value decomposition. Set the feature matrix obtained after orthogonal transformation to be , where each Represents an independent feature in the orthogonal space. Cluster analysis is performed on the orthogonal feature space to identify the potential patterns between temperature-related features and signal characteristic features. Clustering algorithms include K-means clustering, hierarchical clustering, etc. In this process, the temperature-related features and signal characteristic features after orthogonal transformation are clustered separately. Through clustering, temperature-related features and signal characteristic features are divided into different categories, so that similar features are classified into one category, and dual feature clustering results are obtained. Based on the dual feature clustering results, a feature importance scoring function is constructed. This function is used to evaluate the contribution of each feature to impedance matching. The importance of the feature is determined by calculating the information gain or variance contribution of each feature. For example, suppose For the The weight of each feature is calculated by information gain or other weight functions. By calculating the weight of each feature, we get the feature weight vector , which reflects the relative importance of each feature in impedance matching. The feature weight vector is weighted and combined with the orthogonal feature space to generate a dual uncertainty feature vector containing temperature matching uncertainty and signal mismatch uncertainty.
[0065] In a specific embodiment, the process of executing step S2 may specifically include the following steps:
[0066] Based on the mathematical model of impedance characteristics, a differential equation is constructed to obtain the impedance change rate function, and the temperature sensitivity analysis of the impedance change rate function is performed. The influence coefficient of temperature on impedance change is calculated using partial derivatives to obtain the temperature change rate function.
[0067] The temperature change rate function is correlated with the signal transmission characteristic parameter to obtain the signal characteristic change rate function;
[0068] A three-variable coupled differential equation group is constructed based on the impedance change rate function, the temperature change rate function and the signal characteristic change rate function, and the stability condition of the equation group is determined by eigenvalue analysis to obtain a scalar differential equation group;
[0069] Solve the scalar differential equations by the fourth-order Runge-Kutta method, set the integration step size and error control parameters, obtain the numerical solution matrix, and transform the numerical solution matrix to obtain the characteristic transformation matrix;
[0070] The compensation weight coefficients are calculated based on the feature transformation matrix to obtain the weight optimization matrix, and tensor operations are performed on the weight optimization matrix and the numerical solution matrix to obtain the dynamic compensation parameter matrix.
[0071] Specifically, suppose that in a complex FPC high-performance computing chip interface system, the impedance of the system is expressed as a time-dependent and temperature Function The impedance change rate function By differentiating the impedance model, the impedance change caused by time and temperature is reflected. Temperature sensitivity analysis is performed. The influence coefficient of temperature on impedance change is obtained by calculating the partial derivative of the impedance change rate function. , which reflects the sensitivity of the impedance change to the temperature change. Temperature change rate function The rate of change of temperature over time is described by the heat conduction equation. In practical applications, the change of temperature is caused by the heat source, and its rate of change is derived by factors such as the heat source distribution in the control system, the heat conductivity coefficient, and the heat convection of the surrounding environment. In the impedance characteristic model, the effect of temperature change is expressed by the following formula:
[0072] ;
[0073] in, is the sensitivity coefficient of impedance to temperature, and is the rate of change of temperature. Temperature change rate function It is obtained through the heat conduction equation, which involves the thermal conductivity characteristics of the system (such as thermal conductivity, heat capacity, etc.). The relationship between temperature and impedance is linked through these coefficients to obtain the temperature change rate function, that is, Correlation with impedance change. The temperature change rate function is correlated with the signal transmission characteristic parameters. The signal transmission characteristic parameters include the frequency, amplitude and phase of the signal, which are closely related to the impedance change. Assume that the signal transmission characteristic is represented by a function Description, the rate of change function of the signal Considering the influence of temperature change and impedance change together, the signal characteristic change rate function is obtained. This function is expressed by the following correlation formula:
[0074] ;
[0075] in, is an unknown function that describes the specific relationship between impedance change and signal characteristics. This function is derived through experimental data or simulation methods to adapt to different hardware or signal characteristics. Signal characteristic change rate function It is an important parameter that reflects the change of signal transmission performance with impedance and temperature. The impedance change rate function, temperature change rate function and signal characteristic change rate function are combined to establish a three-variable coupled differential equation group. This differential equation group can simultaneously describe the mutual influence between impedance, temperature and signal characteristics. Assume that represents impedance, Indicates temperature, Represents the signal characteristics, and the three-variable coupled differential equations are expressed as:
[0076] ;
[0077] ;
[0078] ;
[0079] in, and are functions of impedance, temperature, and signal characteristics, respectively, involving multiple parameters, such as thermal conductivity, material properties, signal propagation rate, etc. The stability of this system of equations is analyzed by eigenvalue analysis. Eigenvalue analysis is to obtain the eigenvalues of the system by linearizing the system of equations and use them to evaluate the stability of the system. For example, for a linear system, the eigenvalue Satisfies the following characteristic equation:
[0080] ;
[0081] in, is the system matrix, is the identity matrix, is the eigenvalue of the system. By calculating the eigenvalue, the stability of the system is determined. For example, if the real part of all eigenvalues is negative, the system is stable. After obtaining the stability condition, the fourth-order Runge-Kutta method is used to solve the scalar differential equations. The fourth-order Runge-Kutta method uses multiple intermediate steps to improve the calculation accuracy. Assume that the system of equations is ,in is the state variable vector, is the right-hand side of the differential equation, and the update formula of the fourth-order Runge-Kutta method is:
[0082] ;
[0083] ;
[0084] ;
[0085] ;
[0086] ;
[0087] in, is the step length, and is the slope of different stages. Through continuous iteration, the numerical solution matrix of the system state changing with time is obtained. The numerical solution matrix is transformed to obtain the characteristic transformation matrix , which reflects the main characteristic modes of the system. The calculation of the characteristic transformation matrix usually involves principal component analysis or other transformation techniques of the system solution. Through the characteristic transformation matrix, the main dynamic characteristics of the system are obtained. Based on the characteristic transformation matrix, the compensation weight coefficients are calculated, which are used to optimize the system performance. In impedance matching adjustment, the compensation weight coefficients Calculated by the following formula:
[0088] ;
[0089] in, is the feature transformation matrix, is the state solution of the system, is the norm of the matrix. The weight coefficients calculated are Used to construct the weight optimization matrix, which is used to optimize the performance of the system. The weight optimization matrix is combined with the numerical solution matrix through tensor operations to obtain the final dynamic compensation parameter matrix.
[0090] In a specific embodiment, the process of executing step S3 may specifically include the following steps:
[0091] The dynamic compensation parameter matrix is input into the interlayer position controller, and the bending angle and bending radius of the FPC multilayer structure are controlled by a micro-stepping drive algorithm to obtain the initial interlayer position parameters;
[0092] The initial interlayer position parameters are geometrically optimized and calculated, and the spatial curvature distribution of the FPC multilayer structure is fitted by the Bezier curve to obtain a spatial curvature distribution map. Based on the spatial curvature distribution map, the signal transmission path of the FPC multilayer structure is reconstructed to obtain the compensated transmission path parameters.
[0093] The compensated transmission path parameters are controlled in the transition region, and the impedance gradient curve of the interlayer transition region is calculated by the impedance step function to obtain the impedance gradient parameters;
[0094] The electromagnetic field distribution of the FPC multilayer structure is analyzed according to the impedance gradient parameter to obtain the electromagnetic field distribution data, and the shielding layer parameters are calculated based on the electromagnetic field distribution data to obtain the shielding structure parameters;
[0095] The shielding structure parameters and the impedance gradient parameters are jointly optimized to obtain a comprehensive optimization parameter set, and the impedance characteristics of the comprehensive optimization parameter set are verified to obtain initial impedance optimization data.
[0096] Specifically, the dynamic compensation parameter matrix is input into the interlayer position controller, and the bending angle and bending radius of the FPC multilayer structure are controlled by the micro-stepping drive algorithm to obtain the initial interlayer position parameters. The dynamic compensation parameter matrix is obtained through the previous signal transmission characteristic analysis and impedance matching adjustment, which contains multi-dimensional information such as temperature change, impedance change and signal characteristic change. These data can reflect the dynamic change characteristics of the FPC multilayer structure in the actual working environment. The micro-stepping drive algorithm is used to finely control the adjustment of the FPC interlayer position to ensure accurate displacement adjustment between each layer of the multilayer structure. Assume that the dynamic compensation parameter matrix is After being input into the control system, the driving algorithm calculates the interlayer position parameters through the control signal , the specific calculation formula is:
[0097] ;
[0098] in, It means that the driving algorithm is based on the compensation matrix The initial interlayer position parameters are obtained by control calculation. Perform geometric optimization calculations to reduce the impact of structural bending on the signal transmission path and ensure the stability of impedance matching to obtain more accurate inter-layer position arrangement. The geometric optimization calculation is performed through Bezier curve fitting. Bezier curve is a mathematical tool used to describe space curves. By fitting the spatial curvature distribution of the FPC multilayer structure, the curvature change characteristics of the structure are obtained. Assume that the control point set in space is , then the Bezier curve It is expressed by the following formula:
[0099] ;
[0100] in, is the Bessel basis function, is the parameter of the control point. By fitting the set of control points in space, a spatial curvature distribution map is obtained, which reflects the bending characteristics of the FPC multilayer structure at different interlayer positions. Based on the spatial curvature distribution map, the signal transmission path of the FPC multilayer structure is reconstructed. By optimizing the bending angle and bending radius of the FPC multilayer structure, unnecessary signal loss in the transmission path is reduced. The core of path reconstruction is to ensure the stability of the signal and the continuity of impedance. Therefore, the relationship between impedance gradient and curvature change needs to be considered in the optimization process. Assume that the parameters of the reconstructed signal transmission path are , then its calculation formula is expressed as:
[0101] ;
[0102] in, Represents the function of path reconstruction based on the initial position parameters and Bezier curve fitting results. is the signal transmission path parameter after reconstruction. , and perform transition area control. Transition area control refers to the gradual adjustment of impedance at the interlayer contact surface or interlayer transition area to ensure that the impedance gradient between different layers can transition smoothly. In order to calculate the impedance gradient in the transition area, the impedance gradient function is defined , describing the impedance change at different locations. The impedance step function is used to simulate the impedance gradient between different layers:
[0103] ;
[0104] in, and are the impedance between the two layers, is the time or position of transition, indicating the transition point from one layer to another. The impedance gradient control formula can ensure that the impedance changes smoothly and continuously in the transition area without causing signal reflection or loss. The impedance gradient parameter calculated by this method Further optimize the electromagnetic characteristics of the multilayer structure. Perform electromagnetic field distribution characteristic analysis on the impedance gradient parameters. The electromagnetic field distribution data reflects the propagation of electromagnetic waves generated by the FPC multilayer structure during signal transmission. By analyzing the electromagnetic field distribution data, the interference or signal attenuation areas generated during signal transmission can be identified. The characteristic analysis of electromagnetic field distribution involves calculating the intensity distribution of electric and magnetic fields, and the formula is as follows:
[0105] ;
[0106] in, is the electric field strength, is the magnetic field strength, is the electric potential vector. By calculating the electromagnetic field distribution, the hot spots in signal transmission are identified, so that the design can be adjusted to avoid excessive signal interference. Based on the electromagnetic field distribution data, the shielding layer parameters are calculated. The shielding layer is a key part used to reduce external electromagnetic interference and ensure signal integrity. The shielding layer parameter calculation mainly considers the thickness of the shielding layer, the conductivity of the material, and the ability to attenuate the signal. Assume that the thickness of the shielding layer is , the conductivity is , the attenuation factor of the shielding layer The calculation is done by the following formula:
[0107] ;
[0108] in, It is the magnetic permeability of the material. The calculation of the shielding layer parameters can provide data support for the shielding design in actual production, ensuring effective shielding of external interference in the FPC multi-layer structure. The shielding structure parameters and the impedance gradient parameters are jointly optimized to obtain a comprehensive optimization parameter set. The optimization process combines multiple factors (such as electromagnetic field distribution, impedance gradient and shielding effect) to obtain the best impedance matching and signal transmission performance. The optimized comprehensive parameter set is used for subsequent impedance characteristic verification, and the verification results are verified by impedance testing instruments or simulation software to ensure the effectiveness of the optimized design. After verification, the initial impedance optimization data is finally obtained.
[0109] In a specific embodiment, the execution step performs geometric optimization calculation on the initial interlayer position parameters, fits the spatial curvature distribution of the FPC multilayer structure by a Bezier curve, obtains a spatial curvature distribution map, and reconstructs the signal transmission path of the FPC multilayer structure based on the spatial curvature distribution map. The process of obtaining the compensated transmission path parameters can specifically include the following steps:
[0110] Perform spatial coordinate transformation on the initial interlayer position parameters, substitute the three-dimensional coordinate data of n impedance detection points into the cubic Bezier curve control equation to obtain the initial control point coordinate set;
[0111] Based on the initial control point coordinate set, a Bezier curve equation group containing 4×n control points is constructed, and the control point positions are optimized by the least square method to obtain the optimized Bezier curve equation;
[0112] The optimized Bezier curve equation is uniformly sampled in the interval [0,1] with a step size of 0.01, and the curvature value and curvature change rate are calculated for each sampling point to obtain discrete curvature data points;
[0113] The discrete curvature data points are interpolated by cubic spline to construct a continuous curvature distribution function, and the curvature value is calculated on each cross section of the FPC multilayer structure to obtain three-dimensional curvature distribution data;
[0114] Based on the three-dimensional curvature distribution data, spatial curvature fitting is performed to obtain a spatial curvature distribution map, and contour analysis is performed on the spatial curvature distribution map. The area with the largest curvature gradient is extracted as the target deformation area, and the intersection point between the signal transmission path and the target deformation area is calculated to obtain the path deformation feature point;
[0115] Based on the path deformation feature points, a segmented transmission compensation function is constructed to calculate the length and transmission delay of each transmission path, and the compensation amount is determined using the equal phase principle to obtain the path compensation parameters.
[0116] The path compensation parameters are fused and optimized with the original transmission path parameters, and the signal transmission path is reconstructed according to the minimum transmission delay criterion to obtain the compensated transmission path parameters.
[0117] Specifically, the initial interlayer position parameters are transformed into spatial coordinates to adapt to the relative displacement changes between layers in the multilayer structure. The original three-dimensional spatial data is mapped to a new coordinate system for subsequent calculations. Assume that the initial interlayer position parameters are , and through the space coordinate transformation matrix Convert it to the new coordinates The coordinates of all impedance detection points in the original coordinates will be updated according to this transformation. Based on the new coordinate data, the three-dimensional coordinates of each impedance detection point are substituted into the cubic Bezier curve control equation to obtain the initial control point set. The equation of the Bezier curve in three-dimensional space is expressed as:
[0118] ;
[0119] in, is a parameter, They are four control points that determine the shape of the curve. Substitute the coordinates of the impedance detection points into the equation to obtain a set of initial control points Based on the initial control point coordinate set, construct The Bezier curve equations are composed of control points. In order to improve the fitting accuracy of the curve, the least squares method is used to optimize the positions of these control points. The least squares method finds the optimal solution by minimizing the objective function. The objective function is expressed as:
[0120] ;
[0121] in, Is the Bezier curve in The value at is the position of the target control point. By minimizing , and obtain the optimized Bezier curve equation, which is The distribution of impedance detection points can be accurately fitted in the interval. The optimized Bezier curve equation is uniformly sampled in the interval [0,1] with a step size of 0.01, and each sampling point can provide the corresponding curve position. For each sampling point , calculate its curvature value and the curvature change rate , and get discrete curvature data points. The curvature value is calculated as follows:
[0122] ;
[0123] in, and are the first and second order derivatives of the Bezier curve, representing the changes in the tangent and normal of the curve. By calculating the curvature of each sampling point, a set of discrete data points of the curvature is obtained. These discrete curvature data points are smoothed by cubic spline interpolation to construct a continuous curvature distribution function , this function can more accurately describe the curvature change of the signal transmission path. The corresponding curvature value is calculated on each cross section of the FPC multilayer structure to obtain the three-dimensional curvature distribution data and identify the deformation area in the signal transmission path. Based on the three-dimensional curvature distribution data, spatial curvature fitting is performed to obtain the spatial curvature distribution map of the entire structure. The spatial curvature distribution map shows the curvature gradient changes in different areas. Through contour analysis, the area with the largest curvature gradient is identified. These areas usually indicate parts of the signal path where obvious deformation occurs and need to be compensated. These areas are called target deformation areas, and the characteristic points of the path deformation are obtained by calculating the intersection of the target deformation area and the signal transmission path. Assume that these characteristic points are , then the deformation feature points of the path are expressed as:
[0124] ;
[0125] in, Represents the intersection of the signal transmission path and the target deformation zone. Through these characteristic points, a segmented transmission compensation function is established to compensate for the length and transmission delay of each transmission path. In order to compensate for the transmission delay, the equal phase principle is used. This principle points out that during the transmission of the signal, the change in path length will cause signal delay, thereby affecting the synchronization of the signal. By calculating the delay compensation amount of each transmission path, the path compensation parameter is obtained. . These compensation parameters are expressed as:
[0126] ;
[0127] in, is the change in length of the path, is the signal propagation speed. The calculation of path compensation parameters can ensure that the propagation time of signals on different paths is consistent, thereby avoiding signal asynchrony. The path compensation parameters are fused and optimized with the original transmission path parameters, and the signal transmission path is reconstructed by the minimum transmission delay criterion. The goal of the minimum transmission delay criterion is to minimize the signal transmission delay when the signal propagates along the optimized path. Its optimization formula is expressed as:
[0128] ;
[0129] in, is the optimized transmission path, is the delay compensation amount of each transmission path. Through the optimization process, the compensated signal transmission path parameters are obtained. These parameters can effectively improve the signal transmission performance of the FPC multi-layer structure and ensure the integrity and stability of the signal.
[0130] In a specific embodiment, the process of executing step S4 may specifically include the following steps:
[0131] The initial impedance optimization data and historical temperature data are input into the feature extraction layer of the recurrent neural network model. The feature extraction layer includes three one-dimensional convolution layers. The convolution kernel size of each layer is 3 and the step size is 1. The initial feature matrix is obtained through the ReLU activation function and batch normalization processing.
[0132] The initial feature matrix is input into the long short-term memory network layer of the recurrent neural network model, and the time series features are screened through the gating mechanism of the long short-term memory network layer to obtain the time series state vector;
[0133] Perform multi-head self-attention calculation on the time series state vector. The multi-head self-attention layer contains 8 attention heads. Each attention head calculates the feature weight through the scaled dot product attention mechanism, and uses the softmax function to normalize the attention score to obtain a weighted feature sequence.
[0134] The weighted feature sequence is input into the bidirectional gated recurrent unit layer of the recurrent neural network model. The bidirectional gated recurrent unit layer contains 128 hidden units in the forward direction and 128 hidden units in the reverse direction. The information flow is controlled by the reset gate and the update gate, and the time series features are bidirectionally encoded to obtain the encoded feature tensor.
[0135] The encoded feature tensor is input into the deep residual network layer. The deep residual network layer contains 6 residual blocks. Each residual block contains two batch normalization layers, two ReLU activation layers and two convolutional layers. The skip connection structure is used to prevent the gradient from disappearing, and the residual feature matrix is obtained.
[0136] The residual feature matrix is subjected to global average pooling and maximum pooling operations to obtain a parameter prediction vector, which is then input into the Bayesian optimization layer of the recurrent neural network model for parameter distribution modeling. The optimal parameter point is selected by the expected improvement criterion to obtain the impedance matching optimization parameter group.
[0137] Specifically, the initial impedance optimization data and historical temperature data are input into the feature extraction layer for preprocessing. The feature extraction layer consists of three one-dimensional convolutional layers, each with a convolution kernel size of 3 and a step size of 1. The ReLU activation function and batch normalization are used to improve the efficiency and accuracy of feature extraction. After these data are processed by the convolutional layer, an initial feature matrix is generated, which contains important time series features in the original data. The output of the convolutional layer is calculated using the following formula:
[0138] ;
[0139] in, is the input data (including initial impedance optimization data and historical temperature data), is the convolution kernel weight, Bias Conv represents the convolution operation, BatchNorm represents batch normalization, and ReLU is the activation function. After three layers of one-dimensional convolution processing, the initial feature matrix is obtained. The initial feature matrix is input into the long short-term memory (LSTM) layer in the recurrent neural network. The LSTM layer is used to filter the time series features and extract and memorize the time series information through its internal gating mechanism. The main structure of LSTM includes input gate, forget gate and output gate. These gates automatically adjust the memory content according to the input time series data to effectively capture the long-term and short-term dependencies. The update formula of LSTM is as follows:
[0140] ;
[0141] ;
[0142] ;
[0143] ;
[0144] ;
[0145] in, is the input data, is the hidden state at the current time step, is the cell state, is the sigmoid activation function, , ,and is the weight matrix and bias term. The LSTM layer filters the time series data through the gating mechanism and outputs the time series state vector , which contains the effective memory of historical data. The input is processed by the multi-head self-attention mechanism. The multi-head self-attention layer captures the correlation between each position in the input sequence through parallel calculation of multiple attention heads, and weights the features through the scaled dot product attention mechanism. The calculation formula for each attention head is as follows:
[0146] ;
[0147] in, is the query matrix, is the key matrix, is the value matrix, is the dimension of the key. Through parallel computation of multiple attention heads, the output of each attention head is concatenated and then linearly transformed to obtain a weighted feature sequence The weighted feature sequence is input into the bidirectional gated recurrent unit (GRU) layer in the recurrent neural network. The bidirectional GRU layer contains 128 hidden units in the forward and reverse directions, and controls the flow of information through the reset gate and the update gate, thereby encoding the time series data in both directions. The update formula of GRU is as follows:
[0148] ;
[0149] ;
[0150] ;
[0151] in, It is the reset gate. It is the update gate. is the current hidden state. The bidirectional GRU layer can capture the information in the time series data more comprehensively through forward and reverse calculations. After passing through the bidirectional GRU layer, the encoded feature tensor is obtained. . Input the encoded feature tensor into the deep residual network layer. The deep residual network prevents the gradient vanishing problem through the skip connection structure and can effectively train the deep network. Each residual block contains two batch normalization layers, two ReLU activation layers and two convolutional layers. The calculation formula of the residual block is as follows:
[0152] ;
[0153] in, are input features, It is the feature after processing by the residual block. After processing by six residual blocks, the residual feature matrix is obtained Perform global average pooling and maximum pooling operations on the residual feature matrix to extract the global information of the features and generate a parameter prediction vector The calculation formula for the pooling operation is as follows:
[0154] ;
[0155] The prediction vector Input to the Bayesian optimization layer. The goal of Bayesian optimization is to select the optimal parameter point through the expected improvement criterion to optimize the performance of the model. Bayesian optimization explores the parameter space to find the most suitable impedance matching parameters and generate the final impedance matching optimization parameter set. , in order to optimize and adjust the impedance of the FPC high-performance computing chip interface.
[0156] The impedance matching adjustment method of the FPC high-performance computing chip interface in the embodiment of the present invention is described above. The impedance matching adjustment device of the FPC high-performance computing chip interface in the embodiment of the present invention is described below. Figure 2 In one embodiment of the present invention, an impedance matching adjustment device for an FPC high-performance computing chip interface includes:
[0157] The acquisition module is used to collect impedance parameters of the FPC high-performance computing chip interface, obtain impedance data, and establish a mathematical model of impedance characteristics;
[0158] A construction module is used to construct a scalar differential equation group including impedance change rate, temperature change rate and signal characteristic change rate according to the impedance characteristic mathematical model, and solve the scalar differential equation group to obtain a dynamic compensation parameter matrix;
[0159] An adjustment module is used to adjust and control the relative positions between layers of the FPC multilayer structure based on a dynamic compensation parameter matrix, and to adjust impedance gradient parameters in an interlayer transition region of the FPC multilayer structure to obtain initial impedance optimization data;
[0160] The generation module is used to input the initial impedance optimization data and historical temperature data into the recurrent neural network model to perform impedance matching parameter optimization calculation and generate an impedance matching optimization parameter group.
[0161] Through the collaborative cooperation of the above components, by establishing a set of scalar differential equations including the impedance change rate, temperature change rate and signal characteristic change rate, the dynamic impedance characteristics of the FPC interface are accurately modeled and the impedance matching accuracy is improved. The Bessel curve fitting technology is used to accurately describe the spatial curvature distribution of the FPC multi-layer structure, and the inter-layer impedance mismatch is reduced by combining the dynamic compensation parameter matrix. The recurrent neural network model is introduced to optimize the impedance matching parameters, and the response time of the system to temperature changes is shortened, which significantly improves the real-time performance of impedance matching. The hybrid architecture based on the multi-head self-attention mechanism and the deep residual network improves the system's adaptability to complex working conditions and the convergence speed of the impedance matching parameters.
[0162] Reference Figure 3 In an embodiment of the present invention, a computer device is also provided. The computer device may be a server, and its internal structure may be as follows: Figure 3 As shown. The computer device includes a processor, a memory, a display screen, an input device, a network interface and a database connected through a system bus. Among them, the processor designed by the computer is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program and a database. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The database of the computer device is used to store the corresponding data in this embodiment. The network interface of the computer device is used to communicate with an external terminal through a network connection. When the computer program is executed by the processor, the above method is implemented.
[0163] Those skilled in the art will understand that Figure 3 The structure shown in the figure is merely a block diagram of a portion of the structure related to the solution of the present invention, and does not constitute a limitation on the computer device to which the solution of the present invention is applied.
[0164] An embodiment of the present invention further provides a computer-readable storage medium on which a computer program is stored, and when the computer program is executed by a processor, the above method is implemented. It can be understood that the computer-readable storage medium in this embodiment can be a volatile readable storage medium or a non-volatile readable storage medium.
[0165] Those skilled in the art can understand that all or part of the processes in the above-mentioned embodiment methods can be completed by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, storage, database or other media provided by the present invention and used in the embodiments may include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM) or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. As an illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double-speed data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link (Synchlink) DRAM (SLDRAM), memory bus (Rambus) direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM.
[0166] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described systems, systems and units can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.
[0167] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art or the whole or part of the technical solution can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions to enable a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM), random access memory (RAM), disk or optical disk and other media that can store program code.
[0168] As described above, the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. An impedance matching adjustment method for an FPC high-performance computing chip interface, characterized in that: The method comprises: The impedance parameters of the FPC high-performance computing chip interface are collected to obtain impedance data, and a mathematical model of impedance characteristics is established; specifically, the following steps are performed: characteristic impedance values, reflection coefficients and signal integrity indicators of the FPC high-performance computing chip interface are collected to obtain an initial impedance parameter set; the FPC high-performance computing chip interface is divided into n impedance detection areas, four impedance detection points are respectively set at the signal line turning points and signal transmission layer vias of each impedance detection area to obtain an impedance detection point distribution map; an impedance sensor with a three-dimensional packaging structure is installed at a position determined by the impedance detection point distribution map, and the sampling frequencies of the impedance detection chip and the temperature sensor built in the impedance sensor are set to obtain sensor acquisition configuration data; based on the initial impedance parameter set and the The sensor collects configuration data, normalizes the temperature data and the impedance data, and obtains a standardized data matrix; performs principal component analysis on the standardized data matrix, extracts matching uncertainty features related to temperature and mismatch uncertainty features related to signal characteristics, and obtains a dual uncertainty feature vector; constructs a temperature-impedance correlation function based on the dual uncertainty feature vector, and fits the mapping relationship between temperature and impedance change by the least squares method to obtain an impedance change mapping model; performs time series analysis on the impedance change mapping model to obtain a dynamic impedance prediction model, and mathematically models the dynamic impedance prediction model and the impedance change mapping model, and uses state space equations to describe the dynamic change process of impedance characteristics to obtain an impedance characteristic mathematical model; Constructing a set of scalar differential equations including impedance change rate, temperature change rate and signal characteristic change rate according to the impedance characteristic mathematical model, and solving the set of scalar differential equations to obtain a dynamic compensation parameter matrix; Based on the dynamic compensation parameter matrix, the interlayer relative position of the FPC multilayer structure is adjusted and controlled, and the impedance gradient parameter is adjusted in the interlayer transition area of the FPC multilayer structure to obtain initial impedance optimization data; The initial impedance optimization data and historical temperature data are input into a recurrent neural network model to perform impedance matching parameter optimization calculations to generate an impedance matching optimization parameter group.
2. The impedance matching adjustment method of the FPC high performance computing chip interface according to claim 1, characterized in that: The principal component analysis is performed on the standardized data matrix to extract the matching uncertainty features related to temperature and the mismatching uncertainty features related to signal characteristics to obtain a dual uncertainty feature vector, including: Performing a singular value decomposition operation on the standardized data matrix to obtain a data feature decomposition matrix, calculating a cumulative contribution rate based on the data feature decomposition matrix, setting an eigenvalue screening threshold to perform dimensionality reduction processing, and obtaining a reduced-dimensional feature matrix; Performing autocorrelation analysis on the temperature data sequence in the reduced dimension feature matrix, calculating the correlation coefficient between temperature and impedance change, obtaining a temperature correlation feature matrix, and performing wavelet transform on the signal characteristic data in the reduced dimension feature matrix, extracting signal frequency, amplitude and phase characteristics, and obtaining a signal characteristic feature matrix; Performing orthogonal transformation on the temperature-related feature matrix and the signal characteristic feature matrix to obtain an orthogonal feature space, and performing cluster analysis on the orthogonal feature space to cluster the temperature-related features and the signal characteristic features respectively to obtain a dual feature clustering result; A feature importance scoring function is constructed based on the dual feature clustering result, and the weight coefficient of each feature is calculated to obtain a feature weight vector. The feature weight vector is weightedly combined with the orthogonal feature space to generate a dual uncertainty feature vector containing temperature matching uncertainty and signal mismatch uncertainty.
3. The impedance matching adjustment method of the FPC high performance computing chip interface according to claim 2 is characterized in that: The method of constructing a scalar differential equation group including the impedance change rate, the temperature change rate and the signal characteristic change rate according to the impedance characteristic mathematical model, and solving the scalar differential equation group to obtain a dynamic compensation parameter matrix includes: A differential equation is constructed based on the impedance characteristic mathematical model to obtain an impedance change rate function, and a temperature sensitivity analysis is performed on the impedance change rate function, and a partial derivative is used to calculate the influence coefficient of temperature on impedance change to obtain a temperature change rate function; Performing an associative operation on the temperature change rate function and the signal transmission characteristic parameter to obtain a signal characteristic change rate function; Constructing a ternary coupled differential equation group based on the impedance change rate function, the temperature change rate function and the signal characteristic change rate function, using eigenvalue analysis to determine the stability condition of the equation group, and obtaining a scalar differential equation group; Performing a fourth-order Runge-Kutta solution on the scalar differential equation group, setting an integration step and an error control parameter to obtain a numerical solution matrix, and transforming the numerical solution matrix to obtain a characteristic transformation matrix; The compensation weight coefficients are calculated based on the feature transformation matrix to obtain a weight optimization matrix, and tensor operations are performed on the weight optimization matrix and the numerical solution matrix to obtain a dynamic compensation parameter matrix.
4. The impedance matching adjustment method of the FPC high-performance computing chip interface according to claim 3 is characterized in that: The method of adjusting and controlling the interlayer relative positions of the FPC multilayer structure based on the dynamic compensation parameter matrix, adjusting the impedance gradient parameters in the interlayer transition region of the FPC multilayer structure, and obtaining the initial impedance optimization data includes: The dynamic compensation parameter matrix is input into the interlayer position controller, and the bending angle and bending radius of the FPC multilayer structure are controlled by a micro-stepping drive algorithm to obtain initial interlayer position parameters; Performing geometric optimization calculation on the initial interlayer position parameters, fitting the spatial curvature distribution of the FPC multilayer structure by Bezier curve to obtain a spatial curvature distribution map, and reconstructing the signal transmission path of the FPC multilayer structure based on the spatial curvature distribution map to obtain compensated transmission path parameters; Performing transition region control on the compensated transmission path parameters, and calculating the impedance gradient curve of the interlayer transition region by using an impedance step function to obtain impedance gradient parameters; Performing characteristic analysis on the electromagnetic field distribution of the FPC multilayer structure according to the impedance gradient parameter to obtain electromagnetic field distribution data, and calculating shielding layer parameters based on the electromagnetic field distribution data to obtain shielding structure parameters; The shielding structure parameters and the impedance gradient parameters are jointly optimized to obtain a comprehensive optimization parameter set, and the impedance characteristics of the comprehensive optimization parameter set are verified to obtain initial impedance optimization data.
5. The impedance matching adjustment method of the FPC high performance computing chip interface according to claim 4, characterized in that: The geometric optimization calculation of the initial interlayer position parameters is performed, the spatial curvature distribution of the FPC multilayer structure is fitted by a Bezier curve to obtain a spatial curvature distribution map, and the signal transmission path of the FPC multilayer structure is reconstructed based on the spatial curvature distribution map to obtain the compensated transmission path parameters, including: Performing spatial coordinate transformation on the initial interlayer position parameters, substituting the three-dimensional coordinate data of the n impedance detection points into the cubic Bezier curve control equation to obtain an initial control point coordinate set; Based on the initial control point coordinate set, a Bezier curve equation group including 4×n control points is constructed, and the positions of the control points are optimized by using the least square method to obtain an optimized Bezier curve equation; The optimized Bezier curve equation is uniformly sampled in the interval [0,1] with a step size of 0.01, and the curvature value and curvature change rate are calculated for each sampling point to obtain discrete curvature data points; Performing cubic spline interpolation on the discrete curvature data points to construct a continuous curvature distribution function, and calculating the curvature value on each cross section of the FPC multilayer structure to obtain three-dimensional curvature distribution data; Performing spatial curvature fitting based on the three-dimensional curvature distribution data to obtain a spatial curvature distribution map, performing contour analysis on the spatial curvature distribution map, extracting an area with the largest curvature gradient as a target deformation area, calculating an intersection point between a signal transmission path and the target deformation area, and obtaining a path deformation feature point; Based on the path deformation feature points, a segmented transmission compensation function is constructed, the length and transmission delay of each transmission path are compensated and calculated, and the compensation amount is determined by using the equal phase principle to obtain the path compensation parameters; The path compensation parameters are fused and optimized with the original transmission path parameters, and the signal transmission path is reconstructed according to the minimum transmission delay criterion to obtain the compensated transmission path parameters.
6. The impedance matching adjustment method of the FPC high performance computing chip interface according to claim 5, characterized in that: The initial impedance optimization data and historical temperature data are input into a recurrent neural network model to perform impedance matching parameter optimization calculation to generate an impedance matching optimization parameter group, including: Input the initial impedance optimization data and historical temperature data into the feature extraction layer of the recurrent neural network model, wherein the feature extraction layer includes three one-dimensional convolution layers, each with a convolution kernel size of 3 and a step size of 1, and obtains an initial feature matrix through ReLU activation function and batch normalization processing; Inputting the initial feature matrix into the long short-term memory network layer of the recurrent neural network model, screening the time series features through the gating mechanism of the long short-term memory network layer, and obtaining a time series state vector; Performing multi-head self-attention calculation on the time series state vector, the multi-head self-attention layer includes 8 attention heads, each attention head calculates feature weights through a scaled dot product attention mechanism, and uses a softmax function to normalize the attention scores to obtain a weighted feature sequence; Input the weighted feature sequence into the bidirectional gated recurrent unit layer of the recurrent neural network model, wherein the bidirectional gated recurrent unit layer includes 128 hidden units in the forward direction and 128 hidden units in the reverse direction, controls the information flow through the reset gate and the update gate, performs bidirectional encoding on the time series features, and obtains the encoded feature tensor; Input the encoded feature tensor into a deep residual network layer, wherein the deep residual network layer includes 6 residual blocks, each residual block includes two batch normalization layers, two ReLU activation layers and two convolutional layers, and a skip connection structure is used to prevent gradient disappearance, thereby obtaining a residual feature matrix; The residual feature matrix is subjected to global average pooling and maximum pooling operations to obtain a parameter prediction vector, and the parameter prediction vector is input into the Bayesian optimization layer of the recurrent neural network model for parameter distribution modeling, and the optimal parameter point is selected by the expected improvement criterion to obtain an impedance matching optimization parameter group.
7. An impedance matching adjustment device for an FPC high-performance computing chip interface, characterized in that: The impedance matching adjustment method for the FPC high-performance computing chip interface according to any one of claims 1 to 6 is used, and the impedance matching adjustment device for the FPC high-performance computing chip interface comprises: The acquisition module is used to collect impedance parameters of the FPC high-performance computing chip interface, obtain impedance data, and establish a mathematical model of impedance characteristics; A construction module, used to construct a scalar differential equation group including impedance change rate, temperature change rate and signal characteristic change rate according to the impedance characteristic mathematical model, and solve the scalar differential equation group to obtain a dynamic compensation parameter matrix; An adjustment module, for adjusting and controlling the interlayer relative positions of the FPC multilayer structure based on the dynamic compensation parameter matrix, adjusting the impedance gradient parameters in the interlayer transition region of the FPC multilayer structure, and obtaining initial impedance optimization data; A generation module is used to input the initial impedance optimization data and historical temperature data into a recurrent neural network model to perform impedance matching parameter optimization calculation and generate an impedance matching optimization parameter group.
8. A computer device, characterized in that: It comprises a memory and a processor, wherein the memory stores a computer program that can be run on the processor, and is characterized in that when the processor executes the computer program, the impedance matching adjustment method of the FPC high-performance computing chip interface described in any one of claims 1 to 6 is implemented.
9. A computer-readable storage medium having a computer program stored thereon, wherein when the computer program is executed by a processor, the processor executes the impedance matching adjustment method for the FPC high-performance computing chip interface according to any one of claims 1 to 6.
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