Preparation method of gate structure

Abstract

The invention provides a preparation method of a gate structure. The preparation method of the gate structure comprises the following steps: S1, growing a Si3N4 / Ti / Al three-layer structure on an epitaxial wafer, then spin-coating photoresist, and photoetching a gate pin window with a required size; s2, removing the Al layer below the gate pin window, performing self-alignment plasma etching on the Ti layer and the Si3N4 layer below the gate pin window, and removing the photoresist to form a gate pin groove; s3, photoresist is spin-coated, and a grid cap window with the required size is photoetched; and S4, depositing gate metal, and then sequentially removing the photoresist, the Al layer and the Ti layer to form a gate structure. According to the preparation method disclosed by the invention, the gate groove structure is generated by adopting different sacrificial layer structures and developing modes, so that the photoetching time is greatly shortened, the cost is reduced, the qualified rate of the gate structure is ensured, and the manufacturing requirements of high-frequency performance microwave and millimeter wave devices can be well met.

Description

Technical Field

[0001] The present invention relates to the technical field of device manufacturing, and in particular to a method for preparing a gate structure. Background Art

[0002] The rapid development of modern wireless communication technology has had a significant impact on social development and human lifestyle. With the rapid development of technologies such as 5G, higher requirements are placed on RF circuit indicators based on millimeter wave devices (such as transmit power, receive sensitivity, bandwidth, channel consistency and other important indicators), which means that the demand for device performance is constantly increasing, and it is urgent to optimize and improve RF technology.

[0003] The third-generation semiconductor GaN is a landmark wide bandgap material with the characteristics of large bandgap width, strong polarization effect, high 2DEG concentration, high breakdown field strength, high thermal conductivity, stable chemical properties, and high electron saturation drift rate. It is an excellent choice for manufacturing high-performance microwave and millimeter-wave devices.

[0004] HEMT devices with high-concentration 2DEG on the heterojunction surface using the polarization effect between different materials (such as AlGaN / GaN) are currently the most commonly used structures. Their working principle is: a gate metal is placed above the formed 2DEG channel, that is, between the source and drain to form a Schottky contact, and the electron concentration under the gate is controlled by applying different voltages to the gate. When the applied voltage is less than the turn-on voltage, the electrons in the channel are depleted and the device is turned off; when the applied gate voltage is greater than the turn-on voltage, the electrons in the channel are not depleted and the device is turned on. T-type gate is a very important part of microwave and millimeter wave devices, and it is also different from power devices.

[0005] The T-type gate structure has many advantages as follows: 1) The T-type gate has a smaller gate length and a shorter electron transit time (t = Lg / v, Lg is the gate length, v is the electron drift rate); 2) The T-type gate has a smaller gate-source capacitance Cgs and gate-drain capacitance Cgd between the source and drain; 3) The T-type gate has a smaller gate resistance Rg. In the DC state, the current will be evenly distributed over the entire conductor cross section; in the AC state, the alternating charged particle flow forms an alternating magnetic field, which will excite an electric field (according to Faraday's law of electromagnetic induction), and the current associated with this electric field is opposite to the direction of the initial current. At the center of the conductor, the electrons increase significantly. As a result, as the frequency increases, the current tends to the outer surface of the conductor. When a very high frequency current passes through a conductor, it can be considered that the current only flows in a very thin layer on the surface of the wire, which is equivalent to a reduction in the cross section of the wire and an increase in resistance, which is called the skin effect.

[0006] The skin depth can be calculated according to the formula:

[0007] δ=(πfμσcond ) -1 / 2

[0008] Where: δ is the skin depth, f is the frequency, and u is the magnetic permeability. Within the skin depth, the thicker the gate metal, the smaller the gate resistance Rg. Compared with the I-type gate, the T-type gate has a smaller resistance while ensuring gate control.

[0009] The cut-off frequency ft and the maximum oscillation frequency fmax are two important criteria for measuring device performance.

[0010]

[0011] Where: gm is the transconductance, Cgs and Cgd are the gate-source capacitance and gate-drain capacitance respectively.

[0012]

[0013] Where: Rg is the gate resistance.

[0014] From the above two formulas, we can know that the smaller Cgd, Cgs and Rg are, the larger ft and fmax are, and the better the device frequency performance is. Therefore, the growth technology of T-type gate is very important.

[0015] like Figure 1 As shown, the commonly used T-gate growth method is to coat PMMA / Al / UVIII (polymethyl methacrylate / aluminum / deep ultraviolet positive photoresist) on the epitaxial wafer 11 as a sacrificial layer. PMMA / Al / UVIII includes a PMMA layer 12, an Al layer 13 and a UVIII layer 14 arranged in sequence. The Al layer 13 is extremely thin, and the upper and lower layers are separated by photoresist to prevent the two from dissolving each other. Subsequently, the UVIII layer 14 and the PMMA layer 12 are exposed separately by electron beam exposure. After two developments, a T-gate pattern is obtained. Then, the gate metal is deposited, and finally, the excess photoresist is removed. The disadvantage of the above growth method is that it needs to undergo two electron beam exposures. The principle of electron beam exposure is: extremely fine electron beams are sequentially hit on the photoresist one by one until the required width is hit, so the exposure time is extremely slow and the cost is very expensive. In addition, the electron beam alignment requirements are also extremely strict. A slight deviation will greatly reduce the qualified rate of the T-gate.

[0016] In view of this, the present invention is proposed. Summary of the invention

[0017] The object of the present invention is to provide a method for preparing a gate structure, which greatly shortens the photolithography time, reduces the cost, and ensures the qualified rate of the gate structure by adopting different sacrificial layer structures and developing methods to generate a gate groove structure.

[0018] The present invention provides a method for preparing a gate structure, comprising the following steps:

[0019] S1: Growing Si on epitaxial wafer 3 N 4 / Ti / Al three-layer structure, followed by spin coating of photoresist and photolithography of gate foot windows of the required size;

[0020] S2: Remove the Al layer under the gate foot window, and then self-aligned plasma etch the Ti layer and Si layer under the gate foot window. 3 N 4 layer, and then remove the photoresist to form a gate foot groove;

[0021] S3: Spin-coat photoresist and photolithograph a gate cap window of a required size;

[0022] S4: depositing gate metal, and then removing the photoresist, Al layer and Ti layer in sequence to form a gate structure.

[0023] In the present invention, the gate structure is a T-type gate.

[0024] In one embodiment, the gate foot of the T-type gate may be a vertical gate foot; in this case, the gate foot windows in steps S1 and S2 are vertical gate foot windows, and the formed gate foot grooves are vertical gate foot grooves.

[0025] In another embodiment, the gate foot of the T-type gate may also be a stepped gate foot; in this case, after forming the gate foot groove (vertical gate foot groove), step S2 further includes:

[0026] Spin-coat the photoresist and photolithograph the stepped gate foot window of the required size;

[0027] The Al layer below the stepped gate foot window is removed, and then the Ti layer below the stepped gate foot window is etched by self-aligned plasma to form a stepped gate foot groove.

[0028] Specifically, in step S1, Si 3 N 4 The three-layer structure of / Ti / Al includes Si 3 N 4 The photoresist is ZEP520A. Since the gate length of the T-type gate is very small, there is a risk of falling off. It cannot be stressed before passivation. The gate metal grown by the above method has Si at the gate foot. 3 N 4 The protection greatly ensures the qualification rate of the gate structure.

[0029] In step S2, the Al layer is removed by etching with a developer, and then the Ti layer and Si layer below the gate foot window are etched by self-aligned plasma. 3 N4 The traditional method uses electron beam exposure, which requires beams of electrons to be accurately projected onto the photoresist. This method is extremely costly, time-consuming, and requires high alignment, and does not allow for large deviations. 3 N 4 The method of growing gate metal with a three-layer structure of Ti / Al only requires optical exposure, corrosion and etching operations. This method greatly reduces costs, shortens the R&D cycle, and improves the yield of gate metal growth.

[0030] In step S3, the photoresist is 9920 photoresist. Different from the traditional PMMA / Al / UVIII three-layer sacrificial layer structure, the present invention uses Si 3 N 4 / Ti / Al three-layer structure is used as the gate foot sacrificial layer, and 9920 photoresist is used as the mask of the gate cap layer. The above four-layer structure is used to make T-type gate grooves, and finally metal is deposited at the formed gate groove to grow a metal gate, which greatly shortens the photolithography time and reduces the cost.

[0031] In step S4, acetone is used to remove the photoresist; a developer is used to remove the Al layer; and hydrofluoric acid or sulfur hexafluoride (SF6) dry etching is used to remove the Ti layer.

[0032] The present invention generates a T-type gate groove structure by adopting different sacrificial layer structures and development methods to grow a T-type gate, which greatly shortens the photolithography time, reduces the cost, ensures the qualified rate of the gate structure, and can well meet the manufacturing requirements of high-frequency performance microwave and millimeter wave devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0034] Figure 1 A schematic diagram of the process of preparing a T-type gate structure using an existing growth method;

[0035] Figure 2 A schematic diagram of the process for preparing a T-type gate vertical gate foot window according to the present invention;

[0036] Figure 3 A schematic diagram of the process for preparing a T-shaped gate vertical gate foot groove according to the present invention;

[0037] Figure 4 A schematic diagram of the process for preparing a gate cap window according to the present invention;

[0038] Figure 5 is a schematic structural diagram of a T-type gate structure with vertical gate feet according to Example 1;

[0039] Figure 6 Schematic diagram of the structure of a T-type gate structure with a stepped gate foot according to Example 2.

[0040] Description of reference numerals:

[0041] 11: epitaxial wafer; 12: PMMA layer; 13: Al layer; 14: UVIII layer;

[0042] 21: epitaxial wafer; 22: Si 3 N 4 layer; 23: Ti layer; 24: Al layer; 25: ZEP520A photoresist; 26: 9920 photoresist; 27: vertical gate foot; 28: gate cap; 29: stepped gate foot. DETAILED DESCRIPTION

[0043] It should be noted that the following detailed descriptions are illustrative and are intended to provide further explanation of the present application. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present application belongs.

[0044] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form also includes the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this description, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.

[0045] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0046] Example 1

[0047] Combination Figures 2 to 5 As shown, this embodiment provides a method for preparing a T-type gate structure with a vertical gate foot 27, comprising the following steps:

[0048] S11: Si is grown on the epitaxial wafer 21 in sequence 3 N 4 The layer 22, the Ti layer 23 and the Al layer 24 form a Si3 N 4 / Ti / Al three-layer structure; then, on Si 3 N 4 A layer of ZEP520A photoresist 25 is spin-coated on the Al layer 24 of the / Ti / Al three-layer structure, and a vertical gate foot window of a required size is photolithographically formed.

[0049] S12: The Al layer 24 below the vertical gate foot window is etched by a developer, and then the Ti layer 23 and Si layer below the vertical gate foot window are etched by self-aligned plasma. 3 N 4 Layer 22, and then remove the ZEP520A photoresist 25 to form a vertical gate foot groove.

[0050] S13: Spin-coat a layer of 9920 photoresist 26 on the Al layer 24, and photolithographically develop a gate cap window of a required size.

[0051] S14: depositing gate metal, then removing the 9920 photoresist 26 with acetone, removing the Al layer 24 with a developer, and removing the Ti layer 23 with hydrofluoric acid to form a T-type gate structure consisting of a vertical gate foot 27 and a gate cap 28.

[0052] Example 2

[0053] Combination Figures 2 to 6 As shown, this embodiment provides a method for preparing a T-type gate structure with a stepped gate foot 29, comprising the following steps:

[0054] S21: Si is grown on the epitaxial wafer 21 in sequence 3 N 4 The layer 22, the Ti layer 23 and the Al layer 24 form a Si 3 N 4 / Ti / Al three-layer structure; then, on Si 3 N 4 A layer of ZEP520A photoresist 25 is spin-coated on the Al layer 24 of the / Ti / Al three-layer structure, and a vertical gate foot window of a required size is photolithographically formed.

[0055] S22: The Al layer 24 below the vertical gate foot window is etched by a developer, and then the Ti layer 23 and Si layer below the vertical gate foot window are etched by self-aligned plasma. 3 N 4 Layer 22, and then remove the ZEP520A photoresist 25 to form a vertical gate foot groove.

[0056] S23: Spin-coat a layer of ZEP520A photoresist on the Al layer 24, and continue to photolithograph a stepped gate foot window of a required size.

[0057] S24: the Al layer below the stepped gate foot window is etched by a developer, and then the Ti layer below the stepped gate foot window is etched by self-aligned plasma to form a stepped gate foot groove.

[0058] S25: Spin-coat a layer of 9920 photoresist on the Al layer, and photolithographically develop a gate cap window of a required size.

[0059] S26: depositing gate metal, then removing the 9920 photoresist with acetone, removing the Al layer with a developer, and removing the Ti layer with sulfur hexafluoride dry etching to form a T-type gate structure consisting of a stepped gate foot 29 and a gate cap 28.

[0060] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A method for preparing a gate structure, characterized in that: The steps include: S1: growing a Si3N4 / Ti / Al three-layer structure on the epitaxial wafer, then spin-coating photoresist and photolithography out a gate foot window of the required size; S2: removing the Al layer below the gate foot window, then self-aligned plasma etching the Ti layer and Si3N4 layer below the gate foot window, and then removing the photoresist to form a gate foot groove; S3: Spin-coat photoresist and photolithograph a gate cap window of a required size; S4: depositing gate metal, and then removing the photoresist, Al layer and Ti layer in sequence to form a gate structure.

2. The preparation method according to claim 1, characterized in that: The gate structure is a T-type gate, and the gate foot of the T-type gate is a vertical gate foot or a step gate foot.

3. The preparation method according to claim 1, characterized in that: Step S2 also includes: Spin-coat the photoresist and photolithograph the stepped gate foot window of the required size; The Al layer below the stepped gate foot window is removed, and then the Ti layer below the stepped gate foot window is etched by self-aligned plasma to form a stepped gate foot groove.

4. The preparation method according to claim 1, characterized in that: In step S1, the Si3N4 / Ti / Al three-layer structure includes a Si3N4 layer, a Ti layer and an Al layer sequentially grown on the epitaxial wafer.

5. The preparation method according to claim 1, characterized in that: In step S1, the photoresist is ZEP520A photoresist.

6. The preparation method according to claim 1, characterized in that: In step S2, the Al layer is removed by etching with a developer.

7. The preparation method according to claim 1, characterized in that: In step S3, the photoresist is 9920 photoresist.

8. The preparation method according to claim 1, characterized in that: In step S4, acetone is used to remove the photoresist.

9. The preparation method according to claim 1, characterized in that: In step S4, the Al layer is removed using a developing solution.

10. The preparation method according to claim 1, characterized in that: In step S4, the Ti layer is removed by dry etching using hydrofluoric acid or sulfur hexafluoride.

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