Display panel, preparation method thereof and display device

Abstract

The invention relates to a display panel, a preparation method thereof and a display device. The display panel comprises a substrate, a first active layer, a first gate metal layer, a second active layer, a second gate metal layer, a first insulating layer and a second insulating layer, the first insulating layer is located between the first active layer and the first gate metal layer, and the second insulating layer is located between the second active layer and the second gate metal layer; the first insulating layer is made of a first type of insulating material, and the second insulating layer is made of a second type of insulating material; the oxygen content of the first insulating material is smaller than that of the second insulating material. According to the display panel provided by the invention, the insulating layer which has less oxygen content and is more compact is arranged between the active layer and the gate metal layer of the TFT, so that the insulating layer has insulating performance and hydrogen resistance, the problems of threshold voltage offset and conduction current reduction of a TFT device caused by contact between free hydrogen atoms and the active layer are avoided, and the display effect of the TFT device is improved. Therefore, the stability of the TFT device is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to a display panel and a manufacturing method thereof, and a display device. Background Art

[0002] Thin-Film Transistor (TFT) is a key component in display panels, used to control the lighting state of each pixel. It is widely used in display devices such as organic light-emitting diodes (OLEDs) because of its high mobility, large current switching ratio, good device uniformity, good flexibility, and thinness. TFT is mainly composed of semiconductor materials and has three electrodes: source, gate, and drain. When a voltage is applied to the gate, the TFT is turned on, allowing current to pass through the source and drain, thereby lighting up the corresponding pixel. Summary of the invention

[0003] In order to solve the above technical problems, the present disclosure provides a display panel and a manufacturing method thereof, and a display device.

[0004] The present disclosure provides a display panel, comprising: a substrate; a first active layer, a first gate metal layer, a second active layer, a second gate metal layer, a first insulating layer and a second insulating layer located on one side of the substrate, wherein the first insulating layer is located between the first active layer and the first gate metal layer, and the second insulating layer is located between the second active layer and the second gate metal layer; the first insulating layer is composed of a first type of insulating material, and the second insulating layer is composed of a second type of insulating material; the oxygen content of the first type of insulating material is less than the oxygen content of the second type of insulating material.

[0005] Based on the same inventive concept, the present disclosure also provides a method for preparing a display panel, including: providing a substrate; generating a first active layer, a first gate metal layer, a second active layer, a second gate metal layer, a first insulating layer and a second insulating layer on one side of the substrate, wherein the first insulating layer is located between the first active layer and the first gate metal layer, and the second insulating layer is located between the second active layer and the second gate metal layer; the first insulating layer is composed of a first type of insulating material, and the second insulating layer is composed of a second type of insulating material; the oxygen content of the first type of insulating material is less than the oxygen content of the second type of insulating material.

[0006] Based on the same inventive concept, the present disclosure also provides a display device, including the display panel.

[0007] The display panel provided by the present invention has the following advantages over the prior art: the display panel provided by the present invention provides an insulating layer with less oxygen content and more density between the active layer and the gate metal layer of the TFT, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, thereby avoiding the problems of threshold voltage shift and reduced on-current of the TFT device caused by contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0009] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0010] Figure 1 A schematic diagram of a TFT cross-sectional structure in the related art;

[0011] Figure 2 A partial cross-sectional structural schematic diagram of a display panel provided in an embodiment of the present disclosure;

[0012] Figure 3 A schematic diagram of a planar structure of a display panel provided in an embodiment of the present disclosure;

[0013] Figure 4 A circuit schematic diagram of a pixel driving circuit provided in an embodiment of the present disclosure;

[0014] Figure 5 A partial cross-sectional structural schematic diagram of another display panel provided in an embodiment of the present disclosure;

[0015] Figure 6 A partial cross-sectional structural schematic diagram of another display panel provided in an embodiment of the present disclosure;

[0016] Figure 7 A partial cross-sectional structural schematic diagram of another display panel provided in an embodiment of the present disclosure;

[0017] Figure 8 A partial cross-sectional structural schematic diagram of another display panel provided in an embodiment of the present disclosure;

[0018] Fig. 9 A partial cross-sectional structural schematic diagram of another display panel provided in an embodiment of the present disclosure;

[0019] Fig.10A partial cross-sectional structural schematic diagram of another display panel provided in an embodiment of the present disclosure;

[0020] Fig.11 A schematic diagram of a process for preparing a display panel provided in an embodiment of the present disclosure;

[0021] Fig.12 A schematic diagram of the planar structure of a display device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0022] In order to more clearly understand the above-mentioned purposes, features and advantages of the embodiments of the present disclosure, the scheme of the embodiments of the present disclosure will be further described below. It should be noted that the embodiments of the present disclosure and the features therein can be combined with each other without conflict.

[0023] In the following description, many specific details are set forth to facilitate a full understanding of the embodiments of the present disclosure, but the embodiments of the present disclosure may also be implemented in other ways different from those described herein; obviously, the embodiments in the specification are only part of the embodiments of the present disclosure, rather than all of the embodiments.

[0024] like Figure 1 As shown, in the related art, a TFT is mainly composed of an active layer 10 made of semiconductor, a gate metal layer MG, and a source-drain metal layer M2. In the direction z perpendicular to the plane where the substrate 1 is located, the area where the active layer 10 and the gate metal layer MG overlap is the active area 100 of the TFT. In the energy band structure of the semiconductor, the band gap is small, and the electrons or holes in the active area 100 can jump from the valence band to the conduction band under the action of the electric field applied by the gate metal layer MG, and then to the source s and drain d of the conductive TFT.

[0025] The display panel further includes a plurality of insulating layers between the active layer 10, the gate metal layer MG and the source / drain metal layer M2, wherein Figure 1 As shown, a gate insulating layer GI (Gate Insulators) is included between the active layer 10 and the gate metal layer MG, and an inter-layer dielectric layer ILD (Inter-Layer Dielectric) is included between the source-drain metal layer M2 and the gate metal layer MG and the active layer 10. The gate insulating layer GI and the inter-layer dielectric layer ILD are used to isolate the semiconductor layer from the metal layer, and are also used to reduce the leakage current generated between the source and the drain when the TFT is in the off state.

[0026] In the related art, the material of the above-mentioned gate insulating layer GI is usually silicon oxide or silicon nitride, and silicon oxide and silicon nitride are usually made of silane. During the preparation process, free hydrogen atoms will be generated in the material. These free hydrogen atoms can act as fixed oxidized positive charges to form weak -OH bonds at the interface between the active layer 10 and the gate insulating layer GI, or diffuse into the active layer 10 as shallow negative charges and combine with the semiconductor material.

[0027] At the same time, under the action of positive bias temperature stress (PBTS), hydrogen atoms in the gate insulating layer GI move toward the active layer 10 following the electric field formed by the gate voltage, and the hydrogen atoms near the source s and the drain d of the active layer 10 have a higher concentration than the hydrogen atoms in the active area 100. This difference in hydrogen concentration leads to the formation of sub-channels in the active area 100, which allows electrons or holes to be transmitted through the sub-channels, thereby causing the threshold voltage of the TFT to shift, the on-current to decrease, and the transmission characteristics of the TFT device to be affected.

[0028] In view of this, an embodiment of the present disclosure provides a display panel, such as Figure 2 As shown, it includes a substrate 1, a first active layer 101 located on one side of the substrate 1, a first gate metal layer MG1, a second active layer 102, a second gate metal layer MG2, a first insulating layer 201 and a second insulating layer 202, wherein the first insulating layer 201 is located between the first active layer 101 and the first gate metal layer MG1, and the second insulating layer 202 is located between the second active layer 102 and the second gate metal layer MG2.

[0029] Specifically, Figure 2 The display panel shown includes two TFT devices (a first transistor TFT1 and a second transistor TFT2 ), wherein the first transistor TFT1 is composed of a first active layer 101 and a first gate metal layer MG1 , and the second transistor TFT2 is composed of a second active layer 102 and a second gate metal layer MG2 .

[0030] The first insulating layer 201 is made of a first type of insulating material, and the second insulating layer 202 is made of a second type of insulating material; the oxygen content of the first type of insulating material is less than that of the second type of insulating material.

[0031] Specifically, the first insulating layer 201 and the second insulating layer 202 are both gate insulating layers between the gate metal layer and the active layer, wherein the oxygen content of the first insulating layer 201 is lower. When the oxygen content in the insulating layer is reduced, the pores and defects in the insulating layer can be reduced, thereby improving the compactness of the film layer; at the same time, reducing the oxygen content can optimize the grid structure composed of the atoms of the insulating layer material, making the bonding between the atoms of the insulating layer material more uniform and tight, further improving the compactness of the film layer.

[0032] When the density of the insulating layer is improved, free hydrogen atoms can be prevented from shuttling in the first insulating layer 201, thereby preventing free hydrogen atoms from contacting the first active layer 101, avoiding the resulting threshold voltage shift and reduced on-current problems of the TFT device, thereby improving the stability of the TFT device.

[0033] Furthermore, reducing the oxygen content in the insulating layer can also avoid the introduction of interface states and fixed charges, and further avoid the problems caused by free hydrogen atoms. Specifically, reducing the oxygen content can reduce the chance of hydrogen atoms combining with oxygen atoms, thereby reducing the formation of positive ions (i.e., fixed charges); reducing the oxygen content can also reduce the dangling bonds in the interface between the insulating layer and the active layer. Dangling bonds are the main binding sites for hydrogen atoms. Reducing dangling bonds can reduce the chance of hydrogen atoms combining, thereby reducing the formation of interface states.

[0034] In the related art, the problem of over-etching will also occur in the process of TFT. Over-etching usually etches away the active layer under the gate insulating layer. After the via hole overlaps the electrode of the source and drain metal layer, it will cause a sharp increase in contact resistance, and finally deteriorate the turn-on current of the TFT in the over-etched area. Reducing the oxygen content can improve the uniformity of the film layer of the insulating layer, reduce the fluctuation of thickness and composition, and avoid the problem of over-etching of the film layer in subsequent processes.

[0035] The display panel provided by the embodiment of the present disclosure arranges an insulating layer with less oxygen content and more density between the active layer and the gate metal layer of the TFT, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, thereby avoiding the problems of threshold voltage shift and reduced on-current of the TFT device caused by contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device and avoiding excessive etching of the TFT.

[0036] exist Figure 2 In the illustrated embodiment, the first gate metal layer MG1 and the second gate metal layer MG2 are respectively located on the side of the first active layer 101 and the second active layer 102 away from the substrate 1. In other embodiments not shown, the first gate metal layer MG1 and the second gate metal layer MG2 may also be located on the side of the first active layer 101 and the second active layer 102 close to the substrate 1, i.e., a back-gate structure. The above embodiments of the present disclosure may also be applied to a TFT with a back-gate structure, and are also within the protection scope of the present disclosure.

[0037] In the related art, the material of the gate insulating layer can be silicon nitride, but silicon nitride will produce ammonia during the preparation process, bringing more free hydrogen atoms. In view of this, in some embodiments of the present disclosure, the second type of insulating material includes silicon oxide. The use of silicon oxide can reduce the content of free hydrogen atoms in the insulating layer as much as possible without reducing the oxygen content of the insulating layer.

[0038] In other embodiments of the present disclosure, the above-mentioned second type of insulating material, in addition to being used as the material of the second insulating layer 202, can also be used as the material of other film layers in contact with the first insulating layer 201. In this case, the second type of insulating material is selected from silicon oxide, which can cooperate with the first insulating layer 201 with a lower oxygen content to reduce the content of free hydrogen atoms in the insulating layer, thereby improving the stability of the TFT device.

[0039] The display panel in the above-mentioned embodiments of the present disclosure may be an LTPO (Low-Temperature Polycrystalline Oxide) display panel. LTPO technology is a display panel technology that combines low-temperature polysilicon (LTPS) and oxide semiconductors (such as indium gallium zinc oxide, Indium Gallium Zinc Oxide, IGZO), which combines the advantages of the two materials to achieve higher energy efficiency and better display performance. Among them, LTPS transistors have the advantage of strong driving capability, and IGZO transistors have the advantage of low leakage current. The LTPO pixel driving circuit can achieve very low and very high refresh rates at the same time. At the same time, because the LTPO pixel driving circuit combines the good electron mobility of the LTPS transistor and the low leakage current characteristics of the IGZO transistor, it can reduce the power consumption of the display panel without affecting the display effect, and significantly improve the endurance of the display device while ensuring high-quality display effects.

[0040] In some embodiments, Figure 2 As shown, the first active layer 101 is an oxide semiconductor layer, and the second active layer 102 is a polysilicon semiconductor layer. In a more specific embodiment, the first active layer 101 is an indium gallium zinc oxide semiconductor. That is, the first transistor TFT1 is an IGZO transistor, and the second transistor TFT2 is an LTPS transistor.

[0041] Since the first active layer 101 is an oxide semiconductor layer, it has many oxygen vacancies inside and is more susceptible to free hydrogen ions. Therefore, a denser insulating layer (ie, the first insulating layer 201 with lower oxygen content) needs to be provided between the first active layer 101 and the first gate metal layer MG1.

[0042] In a specific embodiment, for example Figure 2In the embodiment shown, since the manufacturing cost of a dense insulating layer with a low oxygen content is relatively high, in the above-mentioned LTPO display panel, only the gate insulating layer of the IGZO transistor (i.e., the first insulating layer 201 of the above-mentioned first transistor TFT1) can be set as a dense insulating layer with a low oxygen content, and the gate insulating layer of the LTPS transistor (i.e., the second insulating layer 202 of the above-mentioned second transistor TFT2) is a relatively conventional insulating layer composed of the above-mentioned second type of insulating material. In another specific embodiment, without considering the production cost, in order to achieve a better display effect, the gate insulating layer of some LTPS transistors can also be set as an insulating layer composed of the above-mentioned first type of insulating material.

[0043] When implementing it, Figure 3 As shown, the display panel includes a plurality of arranged pixel driving circuits C and light emitting elements D in the display area AA. The light emitting elements D are electrically connected to the pixel driving circuits C. The pixel driving circuits C drive the light emitting elements D to emit light according to driving signals.

[0044] Specifically, Figure 4 As shown, the pixel driving circuit C includes a driving transistor T0, a gate reset transistor T1, a threshold compensation transistor T2, an anode reset transistor T3, a data writing transistor T4, a first light emission control transistor T5, a second light emission control transistor T6, a bias transistor T8 and a storage capacitor Cst.

[0045] The gate of the gate reset transistor T1 is electrically connected to the first scan signal line Scan1, the first electrode of the gate reset transistor T1 is electrically connected to the reset signal line Vref and is used to receive a reset signal, and the second electrode of the gate reset transistor T1 is electrically connected to the gate of the driving transistor T0. The gate reset transistor T1 is used to provide a reset signal to the gate of the driving transistor T0 when it is turned on.

[0046] The gate of the threshold compensation transistor T2 is electrically connected to the second scan signal line Scan2, the first electrode of the threshold compensation transistor T2 is electrically connected to the second electrode of the driving transistor T0, and the second electrode of the gate reset transistor T1 is electrically connected to the gate of the driving transistor T0. The threshold compensation transistor T2 is used to provide threshold compensation for the gate of the driving transistor T0 when it is turned on.

[0047] The gate of the anode reset transistor T3 is electrically connected to the third scan signal line Scan3, the first electrode of the anode reset transistor T3 can be electrically connected to the reset signal line Vref and receive the reset signal, and the second electrode of the anode reset transistor T3 is electrically connected to the anode of the light emitting element D. The anode reset transistor T3 is used to provide a reset signal to the anode of the light emitting element D when turned on. It should be noted that, in other optional embodiments, the anode reset transistor T3 and the gate reset transistor T1 can be connected to different reset signal lines to receive different reset voltage signals.

[0048] The gate of the data writing transistor T4 is electrically connected to the fourth scanning signal line Scan4, the first electrode of the data writing transistor T4 is electrically connected to the data line Data and receives the data signal, and the second electrode of the data writing transistor T4 is electrically connected to the first electrode of the driving transistor T0. The data writing transistor T4 is used to provide the data signal to the first electrode of the driving transistor T0 when it is turned on.

[0049] The gate of the first light-emitting control transistor T5 is electrically connected to the light-emitting control signal line Emit, the first electrode of the first light-emitting control transistor T5 is electrically connected to the power signal line PVDD and receives the power signal, and the second electrode of the first light-emitting control transistor T5 is electrically connected to the first electrode of the driving transistor T0. The first light-emitting control transistor T5 is used to provide the power signal to the first electrode of the driving transistor T0 when turned on. The driving transistor T0 is used to provide a driving signal to the anode of the light-emitting element D according to the above power signal and the data signal.

[0050] The gate of the second light emitting control transistor T6 is electrically connected to the light emitting control signal line Emit, the first electrode of the second light emitting control transistor T6 is electrically connected to the second electrode of the driving transistor T0, and the second electrode of the second light emitting control transistor T6 is electrically connected to the anode of the light emitting element D. The second light emitting control transistor T6 is used to provide a driving signal to the anode of the light emitting element D when it is turned on.

[0051] The gate of the bias transistor T8 is electrically connected to the third scan signal line Scan3, the first electrode of the bias transistor T8 is electrically connected to the bias signal line DVH and receives the bias signal, and the second electrode of the bias transistor T8 is electrically connected to the first electrode of the drive transistor T0 and the second electrode of the data writing transistor T4. The bias transistor T8 is used to provide the bias signal to the first electrode of the drive transistor T0 when it is turned on.

[0052] The storage capacitor Cst is electrically connected between the power signal line PVDD and the gate of the driving transistor T0 .

[0053] In one embodiment, Figure 4The pixel driving circuit C shown is an LTPO pixel driving circuit, wherein the driving transistor T0, the anode reset transistor T3, the data writing transistor T4, the first light emitting control transistor T5, the second light emitting control transistor T6, and the bias transistor T8 are the above-mentioned LTPS transistors, and the gate reset transistor T1 and the threshold compensation transistor T2 are the above-mentioned IGZO transistors.

[0054] In some embodiments, the first type of insulating material is formed by atomic layer deposition (ALD) or high density plasma chemical vapor deposition (HDPCVD).

[0055] ALD is a thin film deposition technology that deposits atomic-level thin films layer by layer through self-limiting surface chemical reactions. It has good conformality, can accurately control film thickness, and obtain high-quality film properties.

[0056] In specific implementation, the process of preparing an insulating layer by ALD includes: 1. Substrate preparation: placing a substrate including a lower structure into a reaction chamber, and this step is usually performed in a vacuum or inert gas; 2. Introduction of precursor: a first precursor gas is introduced into the reaction chamber, and attached to the surface of the substrate by physical adsorption or chemical adsorption to form a monomolecular layer. The precursor gas is introduced in excess to ensure that the surface is completely saturated, and then the excess gas is removed by vacuuming or purging; 3. Chemical reaction: a second precursor gas is introduced to react chemically with the first precursor to generate the desired insulating material, and the reaction only occurs on the surface where the first precursor is adsorbed; 4. Removal of excess precursor: removal of excess second precursor gas by vacuuming or purging; 5. Repeating the cycle: repeating the above steps, depositing a thin film each time a cycle is completed, and by controlling the number of cycles, the thickness of the generated insulating layer can be precisely controlled.

[0057] ALD deposits only one atomic layer or molecular layer in each cycle through layer-by-layer deposition. This self-limiting reaction mechanism ensures that each deposition only reacts on the exposed surface, thus avoiding unnecessary oxidation reactions. In addition, ALD is usually carried out in a high vacuum or low-pressure environment. In each deposition, the precursor gas is introduced in excess to ensure that the surface is fully saturated. In the process of introducing and removing the precursor gas, an inert gas (such as nitrogen or argon) is usually used for purging, thereby reducing the introduction of impurities such as oxygen. Furthermore, the insulating material and insulating layer generated by ALD have a lower oxygen content, which can provide a denser insulating layer, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, avoiding the threshold voltage shift and reduced on-current of the TFT device caused by the contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device.

[0058] In addition, since ALD deposits only one atomic layer or molecular layer in each cycle through layer-by-layer deposition, it can ensure the uniformity of the final film layer, reduce fluctuations in thickness and composition, and thus avoid the problem of over-etching of the film layer in subsequent processes.

[0059] HDPCVD is another thin film deposition technology that uses high-density plasma to promote chemical reactions to deposit high-quality thin films on substrates.

[0060] In specific implementation, the process of preparing an insulating layer by HDPCVD includes: 1. Plasma generation: high-density plasma is generated by methods such as inductive coupling or capacitive coupling. These plasmas have high ion density and low electron temperature and can provide an efficient chemical reaction environment; 2. Chemical reaction: the reaction precursor gas is introduced into the reaction chamber, and the active particles (such as ions, free radicals and electrons) in the high-density plasma react with the precursor gas to form the desired insulating material; 3. Control parameters: the density and activity of the plasma are adjusted by controlling the plasma power, the reaction conditions are optimized by controlling the pressure of the reaction chamber, and the crystallinity and stress of the film are affected by controlling the substrate temperature.

[0061] The active particles in high-density plasma can efficiently promote chemical reactions and reduce unnecessary oxidation reactions. HDPCVD is carried out in a high vacuum or low-pressure environment, which can remove oxygen and other impurity gases in the reaction chamber. When introducing the precursor gas, an inert gas (such as nitrogen or argon) is usually used for purging, thereby reducing the introduction of impurities such as oxygen. Furthermore, the insulating material and insulating layer generated by HDPCVD have a lower oxygen content, which can provide a denser insulating layer, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, avoiding the contact between free hydrogen atoms and the active layer, which may cause the threshold voltage shift and on-current reduction of the TFT device, thereby improving the stability of the TFT device.

[0062] In addition, since plasma activation can promote uniform chemical reactions, it can ensure the uniformity of the final film layer, reduce fluctuations in thickness and composition, and thus avoid the problem of over-etching of the film layer in subsequent processes.

[0063] In the above embodiment of generating the first type of insulating material by atomic layer deposition or high density plasma chemical vapor deposition, the first type of insulating material may include silicon oxide or silicon nitride to reduce material cost and also ensure that the first type of insulating material has a lower oxygen content. The above second type of insulating material may include silicon oxide or silicon nitride generated by conventional chemical vapor deposition (CVD), preferably silicon oxide.

[0064] In some embodiments, the first type of insulating material includes aluminum oxide (Al2O3) or hafnium oxide (HfO2).

[0065] First, silicon nitride will produce ammonia during the preparation process, bringing more free hydrogen atoms, so silicon oxide has better hydrogen resistance than silicon nitride. Secondly, compared with silicon oxide, aluminum oxide and hafnium oxide have lower oxygen atom density (in aluminum oxide, each aluminum atom is combined with three oxygen atoms, while in silicon oxide, each silicon atom is combined with two oxygen atoms; although the chemical formulas of hafnium oxide and silicon oxide both indicate that each metal atom is combined with two oxygen atoms, the atomic weight of hafnium atoms (178.49) is much greater than the atomic weight of silicon atoms (28.09)). Therefore, on the basis of the same thickness, the oxygen content of the insulating layer composed of aluminum oxide or hafnium oxide is lower than that of the insulating layer composed of silicon oxide, which can provide a denser insulating layer, so that the insulating layer has both insulating properties and hydrogen resistance, avoiding the problem of threshold voltage shift and reduced on-current of TFT devices caused by contact between free hydrogen atoms and the active layer, thereby improving the stability of TFT devices.

[0066] In specific implementation, when the first type of insulating material is aluminum oxide or hafnium oxide, the corresponding insulating layer can be prepared by the above-mentioned atomic layer deposition method or high-density plasma chemical vapor deposition method, or by conventional chemical vapor deposition method or other related technologies to generate an insulating layer.

[0067] In some embodiments, Figure 5 As shown, the display panel also includes a third insulating layer 203, which is located on a side of the first active layer 101 away from the first gate metal layer MG1. The third insulating layer is also composed of the first type of insulating material. The third insulating layer 203 and the first insulating layer 201 together wrap the first active layer 101, further preventing free hydrogen atoms in the insulating layer from contacting the first active layer 101, thereby improving the stability of the TFT device.

[0068] In specific implementation, the third insulating layer 203 can have the same material and preparation process as the first insulating layer 201 to ensure process consistency; in other embodiments, it can also be different within the range of the first type of insulating material provided in the above embodiments.

[0069] In some embodiments, Figure 5As shown, the display panel further includes a sixth insulating layer 206, which is located on a side of the third insulating layer 203 away from the first active layer 101, and only the third insulating layer 203 is included between the first active layer 101 and the sixth insulating layer 206; the sixth insulating layer 206 includes silicon nitride. Specifically, the sixth insulating layer 206 is an interlayer dielectric layer ILD, which is usually made of silicon nitride material and contains a large number of free hydrogen atoms. At this time, the third insulating layer 203 is provided to further prevent the free hydrogen atoms in the insulating layer from contacting the first active layer 101, thereby improving the stability of the TFT device.

[0070] Understandably, Figure 5 The entire cross-sectional structure of the display panel in a specific implementation is not shown. Figure 5 On the basis of the illustrated embodiment, the display panel provided by the embodiment of the present disclosure may further include a film layer in other related technologies. The same is true for other embodiments of the present disclosure and will not be described in detail.

[0071] In some embodiments, Figure 6 As shown, the display panel further includes a fourth insulating layer 204, which is located on a side of the third insulating layer 203 away from the first active layer 101, and the fourth insulating layer 204 is made of the second type of insulating material. Specifically, when the display panel includes the sixth insulating layer 206, the fourth insulating layer 204 is located between the third insulating layer 203 and the sixth insulating layer 206.

[0072] In order to generate a denser insulating layer, the insulating layer generated by the above-mentioned first type of insulating material requires a higher production cost than the second type of insulating material. At the same time, the insulating layer in the display panel needs to have a certain thickness to ensure that the insulating layer has a certain breakdown voltage, control leakage current, reduce the influence of interface states and fixed charges, and improve the mechanical strength and reliability of the device.

[0073] In view of this, in order to reduce the manufacturing cost while ensuring the thickness of the insulating layer, the above-mentioned embodiment of the present disclosure arranges a fourth insulating layer 204 generated by the second type of insulating material under the third insulating layer 203 to reduce the use of the first type of insulating material; at the same time, the third insulating layer 203 is located between the fourth insulating layer 204 and the first active layer 101, thereby ensuring the insulation performance and hydrogen barrier capability of the stacked insulating structure formed by the third insulating layer 203 and the fourth insulating layer 204, avoiding the threshold voltage shift and on-current reduction of the TFT device caused by the contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device.

[0074] In specific implementation, the fourth insulating layer 204 can have the same material and preparation process as the second insulating layer 202 to ensure process consistency; in other embodiments, it can also be different within the scope of the first type of insulating material provided in the above embodiment.

[0075] In some embodiments, Figure 7 As shown, the display panel further includes a fifth insulating layer 205 , which is located between the first insulating layer 201 and the first gate metal layer MG1 ; the fifth insulating layer 205 is made of the second type of insulating material.

[0076] In order to reduce the manufacturing cost while ensuring the thickness of the insulating layer, the above-mentioned embodiment of the present disclosure arranges a fifth insulating layer 205 generated by the second type of insulating material on the upper layer of the first insulating layer 201 to reduce the amount of the first type of insulating material; at the same time, between the first insulating layer 201 and the first gate metal layer MG1, the insulation performance and hydrogen barrier ability of the stacked insulating structure composed of the first insulating layer 201 and the fifth insulating layer 205 are guaranteed, avoiding the threshold voltage shift and the reduction of the on-state current of the TFT device caused by the contact between the free hydrogen atoms and the active layer, thereby improving the stability of the TFT device.

[0077] In specific implementation, the fifth insulating layer 205 can have the same material and preparation process as the fourth insulating layer 204 and the second insulating layer 202 to ensure process consistency; in other embodiments, it can also be different within the scope of the first type of insulating material provided in the above embodiments.

[0078] In a specific embodiment, Figure 8 As shown, the display panel also includes the first active layer 101, the first gate metal layer MG1, the first insulating layer 201, the third insulating layer 203, the fourth insulating layer 204, the fifth insulating layer 205 and the sixth insulating layer 206. Those skilled in the art can also obtain more embodiment combinations based on the above content of the present disclosure, which are all within the protection scope of the present disclosure.

[0079] When implementing it, Fig. 9 As shown, each insulating layer in the display panel is deposited as a whole layer, and the display panel also includes the third insulating layer 203, the fourth insulating layer 204, the fifth insulating layer 205 and / or the sixth insulating layer 206 at the position corresponding to the second transistor TFT2.

[0080] Specifically, in Figure 5 and Figure 6 In the illustrated embodiment, when only the first insulating layer 201 is included between the first active layer 101 and the first gate metal layer MG1 , a thickness d1 of the first insulating layer 201 in a direction z perpendicular to the plane of the substrate 1 is between 100 nm and 400 nm.

[0081] The insulating layer in the display panel needs to have a certain thickness to ensure that the insulating layer has a certain breakdown voltage, control leakage current, reduce the influence of interface states and fixed charges, and improve the mechanical strength and reliability of the device. When the first insulating layer 201 is generated using the above-mentioned first type of insulating material, a thickness of 100nm can ensure its basic insulation, structural reliability and hydrogen barrier ability. As the thickness increases, the performance of the insulating layer is correspondingly improved. In order to reduce the overall thickness of the display panel and save production costs, the thickness of the first insulating layer 201 should not exceed 400nm.

[0082] Specifically, in Figure 7 and Figure 8 In the illustrated embodiment, when a stacked insulating structure consisting of a first insulating layer 201 and a fifth insulating layer 205 is included between the first active layer 101 and the first gate metal layer MG1, a thickness d2 of the first insulating layer 201 in a direction z perpendicular to the plane of the substrate 1 is between 20 nm and 200 nm.

[0083] In order to save production costs, when the stacked insulation structure composed of the first insulation layer 201 and the fifth insulation layer 205 is used, the amount of the first type of insulation material can be reduced. Figure 5 and Figure 6 The embodiment shown, Figure 7 and Figure 8 In the embodiment shown, the thickness of the first insulating layer 201 formed of the first type of insulating material can be reduced. When the thickness is 20nm, the first insulating layer 201 has a basic hydrogen barrier capability and can effectively prevent free hydrogen atoms from contacting the active layer. At the same time, in order to reduce the overall thickness of the display panel and save production costs, Figure 7 and Figure 8 In the illustrated embodiment, the thickness of the first insulating layer 201 should not exceed 200 nm.

[0084] exist Figure 7 and Figure 8 In the illustrated embodiment, in the direction z perpendicular to the plane of the substrate 1 , the sum d3 of the thickness of the first insulating layer 201 and the fifth insulating layer 205 is between 200 nm and 500 nm.

[0085] When the stacked insulating structure composed of the first insulating layer 201 and the fifth insulating layer 205 is used, the total thickness of 200 nm can ensure the basic insulation, structural reliability and hydrogen barrier capability of the stacked insulating structure. As the thickness increases, the performance of the insulating layer is correspondingly improved. At the same time, in order to reduce the overall thickness of the display panel, the total thickness of the stacked insulating structure should not exceed 500 nm.

[0086] exist Figure 5In the illustrated embodiment, when only the third insulating layer 203 is included between the first active layer 101 and the sixth insulating layer 206 , a thickness d4 of the third insulating layer 203 in a direction z perpendicular to the plane of the substrate 1 is between 100 nm and 400 nm.

[0087] The insulating layer in the display panel needs to have a certain thickness to ensure that the insulating layer has a certain breakdown voltage, control leakage current, reduce the influence of interface states and fixed charges, and improve the mechanical strength and reliability of the device. When the third insulating layer 203 is generated using the above-mentioned first type of insulating material, a thickness of 100nm can ensure its basic insulation, structural reliability and hydrogen barrier ability. As the thickness increases, the performance of the insulating layer is correspondingly improved. In order to reduce the overall thickness of the display panel and save production costs, the thickness of the third insulating layer 203 should not exceed 400nm.

[0088] In some embodiments, Figure 6 and Figure 8 As shown, the display panel includes the sixth insulating layer 206 mentioned above, and also includes the fourth insulating layer 204 mentioned above. The fourth insulating layer 204 and the third insulating layer 203 are located between the first active layer 101 and the sixth insulating layer 206. In the direction z perpendicular to the plane of the substrate 1, the thickness d5 of the third insulating layer 203 is between 20nm and 200nm.

[0089] In order to save production costs, when the stacked insulation structure composed of the fourth insulation layer 204 and the third insulation layer 203 is used, the amount of the first type of insulation material can be reduced. Figure 5 The embodiment shown, Figure 6 and Figure 8 In the embodiment shown, the thickness of the third insulating layer 203 formed of the first type of insulating material can be reduced. When the thickness is 20nm, the third insulating layer 203 has a basic hydrogen barrier capability and can effectively prevent free hydrogen atoms from contacting the active layer. At the same time, in order to reduce the overall thickness of the display panel and save production costs, Figure 6 and Figure 8 In the illustrated embodiment, the thickness of the third insulating layer 203 should not exceed 200 nm.

[0090] exist Figure 6 and Figure 8 In the illustrated embodiment, in a direction perpendicular to the substrate plane, a total thickness d6 of the third insulating layer 203 and the fourth insulating layer 204 is between 200 nm and 500 nm.

[0091] When the stacked insulating structure composed of the fourth insulating layer 204 and the third insulating layer 203 is used, the total thickness of 200 nm can ensure the basic insulation, structural reliability and hydrogen barrier capability of the stacked insulating structure. As the thickness increases, the performance of the insulating layer is correspondingly improved. At the same time, in order to reduce the overall thickness of the display panel, the total thickness of the stacked insulating structure should not exceed 500 nm.

[0092] In a specific embodiment, Fig.10 As shown, the display panel provided by the embodiment of the present disclosure also includes a protective metal layer M0, which is at least partially located between the second active layer 102 and the substrate 1, that is, located at the bottom of the second transistor TFT, thereby shielding static electricity coming from the back of the display panel and protecting the TFT from static electricity.

[0093] When implementing it, Fig.10 As shown, since the IGZO transistor (ie, the first transistor TFT1 ) is farther away from the substrate 1 than the LTPS transistor (ie, the second transistor TFT2 ), the protective metal layer M0 may not be provided at the position corresponding to the IGZO transistor.

[0094] Specifically, in order to achieve better electrostatic protection effect, Fig.10 As shown, the protective metal layer M0 is also connected to the fixed potential signal line through the metal via SCNT, and receives the substrate voltage (which can be equal to the power supply voltage) provided by the fixed potential signal line, avoiding the bottom electric field caused by the accumulation of electrostatic charges and improving the anti-static ability of the protective metal layer M0.

[0095] In a specific embodiment, Fig.10 As shown, the display panel provided by the embodiment of the present disclosure further includes a light emitting element D composed of an anode metal RE and an organic light emitting layer 30. The anode metal layer RE is electrically connected to a TFT device in a pixel driving circuit, so that the organic light emitting layer 30 is electroluminescent.

[0096] Based on the same inventive concept, corresponding to the display panel of any of the above embodiments, the present application also provides a method for preparing a display panel, such as Fig.11 As shown, including:

[0097] S1. Provide a substrate.

[0098] S2, generating a first active layer, a first gate metal layer, a second active layer, a second gate metal layer, a first insulating layer and a second insulating layer on one side of the substrate. The first insulating layer is located between the first active layer and the first gate metal layer, and the second insulating layer is located between the second active layer and the second gate metal layer. The display panel is as follows: Figure 2As shown; the first insulating layer is composed of a first type of insulating material, and the second insulating layer is composed of a second type of insulating material; the oxygen content of the first type of insulating material is less than the oxygen content of the second type of insulating material. In specific implementation, each film layer in the above embodiment is deposited in sequence according to its position in the cross-sectional structure of the display panel.

[0099] The preparation method provided by the embodiment of the present disclosure sets an insulating layer with less oxygen content and more density between the active layer and the gate metal layer of the TFT, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, thereby avoiding the problems of threshold voltage shift and reduced on-current of the TFT device caused by contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device and avoiding excessive etching of the TFT.

[0100] In some embodiments, the process of generating the first insulating layer in S2 includes:

[0101] The first insulating layer composed of the first type of insulating material is formed by atomic layer deposition or high-density plasma chemical vapor deposition.

[0102] The atomic layer deposition method deposits only one atomic layer or molecular layer in each cycle through layer-by-layer deposition. This self-limiting reaction mechanism ensures that each deposition only reacts on the exposed surface, thereby avoiding unnecessary oxidation reactions. In addition, the atomic layer deposition method is usually carried out in a high vacuum or low pressure environment. In each deposition, the precursor gas is introduced in excess to ensure that the surface is fully saturated. In the process of introducing and removing the precursor gas, an inert gas (such as nitrogen or argon) is usually used for purging, thereby reducing the introduction of impurities such as oxygen. Furthermore, the insulating material and the insulating layer generated by the atomic layer deposition method have a low oxygen content, which can provide a denser insulating layer, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, avoiding the threshold voltage shift and reduced on-current of the TFT device caused by the contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device.

[0103] The active particles in high-density plasma can efficiently promote chemical reactions and reduce unnecessary oxidation reactions. High-density plasma chemical vapor deposition is carried out in a high vacuum or low-pressure environment, which can eliminate oxygen and other impurity gases in the reaction chamber. When introducing the precursor gas, an inert gas (such as nitrogen or argon) is usually used for purging, thereby reducing the introduction of impurities such as oxygen. Furthermore, the insulating material and insulating layer generated by high-density plasma chemical vapor deposition have a lower oxygen content, which can provide a denser insulating layer, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, avoiding the contact between free hydrogen atoms and the active layer, which may cause the threshold voltage shift and reduced on-current of the TFT device, thereby improving the stability of the TFT device.

[0104] When the first insulating layer is generated by atomic layer deposition or high-density plasma chemical vapor deposition, the first type of insulating material may include silicon oxide or silicon nitride to reduce material costs while also ensuring that the first insulating layer has a lower oxygen content.

[0105] In a specific implementation, the process of generating the second insulating layer in S2 includes:

[0106] The second insulating layer composed of the second type of insulating material is generated by a conventional chemical vapor deposition method. At this time, the second type of insulating material can be silicon oxide or silicon nitride, preferably silicon oxide.

[0107] In some embodiments, the process of generating the first insulating layer in S2 includes:

[0108] A first insulating layer composed of aluminum oxide or hafnium oxide is formed.

[0109] Compared with silicon oxide, aluminum oxide and hafnium oxide have a lower oxygen atom density (in aluminum oxide, each aluminum atom is bonded to three oxygen atoms, while in silicon oxide, each silicon atom is bonded to two oxygen atoms; although the chemical formulas of hafnium oxide and silicon oxide both indicate that each metal atom is bonded to two oxygen atoms, the atomic weight of hafnium atoms (178.49) is much greater than the atomic weight of silicon atoms (28.09)). Therefore, on the basis of the same thickness, the oxygen content of the insulating layer composed of aluminum oxide or hafnium oxide is lower than that of the insulating layer composed of silicon oxide, which can provide a denser insulating layer, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, avoiding the threshold voltage shift and on-current reduction of the TFT device caused by the contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device.

[0110] In specific implementation, when the first type of insulating material is aluminum oxide or hafnium oxide, the corresponding first insulating layer can be prepared by the above-mentioned atomic layer deposition method or high-density plasma chemical vapor deposition method, or by conventional chemical vapor deposition or other related technologies to generate an insulating layer.

[0111] In some embodiments, the above method further comprises:

[0112] A third insulating layer 203 is formed on a side of the first active layer 101 away from the first gate metal layer MG1. Figure 5 The third insulating layer is also made of the first type of insulating material, and the third insulating layer 203 and the first insulating layer 201 together wrap the first active layer 101, further preventing the free hydrogen atoms in the insulating layer from contacting the first active layer 101, thereby improving the stability of the TFT device.

[0113] In some embodiments, the above method further comprises:

[0114] A fourth insulating layer 204 is formed on a side of the third insulating layer 203 away from the first active layer 101, such as Figure 6 The fourth insulating layer 204 is made of the second type of insulating material.

[0115] In the above-mentioned embodiment of the present disclosure, a fourth insulating layer 204 made of the second type of insulating material is arranged under the third insulating layer 203 to reduce the usage of the first type of insulating material; at the same time, the third insulating layer 203 is located between the fourth insulating layer 204 and the first active layer 101, thereby ensuring the insulating performance and hydrogen barrier capability of the stacked insulating structure formed by the third insulating layer 203 and the fourth insulating layer 204, avoiding the problem of threshold voltage shift and on-current reduction of the TFT device caused by the contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device.

[0116] In some embodiments, the above method further comprises:

[0117] A fifth insulating layer 205 is formed between the first insulating layer 201 and the first gate metal layer MG1. Figure 7 The fifth insulating layer 205 is made of the second type of insulating material.

[0118] In order to reduce the manufacturing cost while ensuring the thickness of the insulating layer, the above-mentioned embodiment of the present disclosure arranges a fifth insulating layer 205 generated by the second type of insulating material on the upper layer of the first insulating layer 201 to reduce the amount of the first type of insulating material; at the same time, between the first insulating layer 201 and the first gate metal layer MG1, the insulation performance and hydrogen barrier ability of the stacked insulating structure composed of the first insulating layer 201 and the fifth insulating layer 205 are guaranteed, avoiding the threshold voltage shift and the reduction of the on-state current of the TFT device caused by the contact between the free hydrogen atoms and the active layer, thereby improving the stability of the TFT device.

[0119] It should be noted that the method of the embodiment of the present application can be performed by a single device, such as a computer or server. The method of this embodiment can also be applied to a distributed scenario and completed by multiple devices cooperating with each other. In the case of such a distributed scenario, one of the multiple devices can only perform one or more steps in the method of the embodiment of the present application, and the multiple devices will interact with each other to complete the above method.

[0120] It should be noted that the above describes some embodiments of the present application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in an order different from that in the above embodiments and still achieve the desired results. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or continuous order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0121] The method of the above embodiment is used to prepare the corresponding display panel in any of the above embodiments, and has the beneficial effects of the corresponding embodiment, which will not be described in detail here.

[0122] Based on the same inventive concept, corresponding to the display panel of any of the above embodiments, the present application also provides a display device, such as Fig.12 As shown, the display device 40 includes a display panel 41 in any one of the above embodiments.

[0123] The display panel of the display device provided by the embodiment of the present disclosure arranges an insulating layer with less oxygen content and more density between the active layer and the gate metal layer of the TFT, so that the insulating layer has both insulating properties and hydrogen barrier capabilities, thereby avoiding the problems of threshold voltage shift and reduced on-current of the TFT device caused by contact between free hydrogen atoms and the active layer, thereby improving the stability of the TFT device and avoiding excessive etching of the TFT.

[0124] Specifically, the display device can be a 3C electronic product such as a computer and its peripherals, communications and consumer electronics, for example, a smart phone, a laptop computer, a tablet computer, a smart wearable device, a home appliance, a gaming device, etc. In addition, the display device can also be applied to other types of electronic devices such as automotive electronics.

[0125] The device of the above embodiment includes the corresponding display panel in any of the above embodiments, and has the beneficial effects of the corresponding embodiments, which will not be described in detail here.

[0126] It should be noted that, in this article, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "including a..." do not exclude the existence of other identical elements in the process, method, article or device including the above elements.

[0127] The above are only specific embodiments of the present disclosure, which enable those skilled in the art to understand or implement the present disclosure. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present disclosure. Therefore, the present disclosure will not be limited to the embodiments described above, but will conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A display panel, characterized in that: include: substrate; A first active layer, a first gate metal layer, a second active layer, a second gate metal layer, a first insulating layer and a second insulating layer located on one side of the substrate, wherein the first insulating layer is located between the first active layer and the first gate metal layer, and the second insulating layer is located between the second active layer and the second gate metal layer; The first insulating layer is made of a first type of insulating material, and the second insulating layer is made of a second type of insulating material; The oxygen content of the first type of insulating material is less than that of the second type of insulating material.

2. The display panel according to claim 1, characterized in that: The first active layer is an oxide semiconductor layer.

3. The display panel according to claim 1, characterized in that: The first type of insulating material is generated by atomic layer deposition or high density plasma chemical vapor deposition.

4. The display panel according to claim 3, characterized in that: The first type of insulating material includes silicon oxide or silicon nitride.

5. The display panel according to claim 1 or 3, characterized in that: The first type of insulating material includes aluminum oxide or hafnium oxide.

6. The display panel according to claim 1, characterized in that: Also comprising a third insulating layer, the third insulating layer is located on a side of the first active layer away from the first gate metal layer; The third insulating layer is made of the first type of insulating material.

7. The display panel according to claim 6, characterized in that: Also comprising a fourth insulating layer, the fourth insulating layer being located on a side of the third insulating layer away from the first active layer; The fourth insulating layer is made of the second-type insulating material.

8. The display panel according to claim 1, characterized in that: Also comprising a fifth insulating layer, the fifth insulating layer being located between the first insulating layer and the first gate metal layer; The fifth insulating layer is made of the second-type insulating material.

9. The display panel according to claim 1, characterized in that: The second type of insulating material includes silicon oxide.

10. The display panel according to claim 1, characterized in that: The first active layer and the first gate metal layer only include the first insulating layer; In a direction perpendicular to the substrate plane, the thickness of the first insulating layer is between 100 nm and 400 nm.

11. The display panel according to claim 8, characterized in that: In a direction perpendicular to the substrate plane, the thickness of the first insulating layer is between 20 nm and 200 nm.

12. The display panel according to claim 11, characterized in that: In a direction perpendicular to the substrate plane, the total thickness of the first insulating layer and the fifth insulating layer is between 200 nm and 500 nm.

13. The display panel according to claim 6, characterized in that: Also comprising a sixth insulating layer, the sixth insulating layer being located on a side of the third insulating layer away from the first active layer; The sixth insulating layer comprises silicon nitride; The first active layer and the sixth insulating layer only include the third insulating layer; In a direction perpendicular to the substrate plane, the thickness of the third insulating layer is between 100 nm and 400 nm.

14. The display panel according to claim 7, characterized in that: In a direction perpendicular to the substrate plane, the thickness of the third insulating layer is between 20 nm and 200 nm.

15. The display panel according to claim 14, characterized in that: In a direction perpendicular to the substrate plane, a total thickness of the third insulating layer and the fourth insulating layer is between 200 nm and 500 nm.

16. A method for preparing a display panel, characterized in that: include: providing a substrate; A first active layer, a first gate metal layer, a second active layer, a second gate metal layer, a first insulating layer and a second insulating layer are generated on one side of the substrate, wherein the first insulating layer is located between the first active layer and the first gate metal layer, and the second insulating layer is located between the second active layer and the second gate metal layer; the first insulating layer is composed of a first type of insulating material, and the second insulating layer is composed of a second type of insulating material; the oxygen content of the first type of insulating material is less than the oxygen content of the second type of insulating material.

17. The method according to claim 16, characterized in that Generating the first insulating layer includes: The first insulating layer made of the first type of insulating material is formed by atomic layer deposition or high-density plasma chemical vapor deposition.

18. A display device, characterized in that: A display panel comprising any one of claims 1 to 15.

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