Display substrate and display device

Abstract

The invention discloses a display substrate and a display device. The display substrate is provided with a first side and a second side, the display substrate comprises a display area, the display area comprises a first display area and a second display area, and the first display area allows light from the first side to be at least partially transmitted to the second side; the first display area comprises a plurality of first sub-pixels arranged in an array, each first sub-pixel comprises a first light-emitting device, the second display area comprises a plurality of first pixel circuits, and the plurality of first pixel circuits are electrically connected with the plurality of first light-emitting devices respectively; the display area further comprises a first light shielding layer, the first light shielding layer and the second display area are at least partially overlapped in the direction perpendicular to the plate face of the display substrate, and the first light shielding layer and the first display area are not overlapped. Therefore, the first light shielding layer can shield light entering the second display area to prevent the light from entering an under-screen sensor, such as an under-screen camera, through the second display area, so that the shooting quality of the under-screen camera is improved.

Description

[0001] This application is a divisional application of the Chinese invention patent application (application number: 202010479765.3, application date: May 29, 2020, invention name: display substrate and display device). Technical Field

[0002] Embodiments of the present disclosure relate to a display substrate and a display device. Background Art

[0003] With the development of display electronic products such as mobile phones, the increase in the screen-to-body ratio of display screens has become a product trend, and the functional components that are essential for mobile phones, such as front cameras, have become a major factor restricting the increase in the screen-to-body ratio. In response to this problem, the industry has proposed a solution called "under-screen camera" that combines the camera and the display panel into a display device. In such a solution, the display device includes a display panel and a camera located under the display panel. The area of ​​the display device with the under-screen camera can emit light and display like other areas, and at the same time have a camera function. Summary of the invention

[0004] At least one embodiment of the present disclosure provides a display substrate, which has a first side for display and a second side opposite to the first side, wherein the display substrate includes a display area, wherein the display area includes a first display area and a second display area at least partially surrounding the first display area, and the first display area allows light from the first side to be at least partially transmitted to the second side; the first display area includes a plurality of first sub-pixels arranged in an array, each first sub-pixel includes a first light-emitting device, and the second display area includes a plurality of first pixel circuits, and the plurality of first pixel circuits are respectively electrically connected to the plurality of first light-emitting devices of the plurality of first sub-pixels to respectively drive the plurality of first light-emitting devices; wherein the display area also includes a first light-shielding layer, and in a direction perpendicular to the surface of the display substrate, the first light-shielding layer at least partially overlaps with the second display area, and the first light-shielding layer does not overlap with the first display area.

[0005] For example, the display substrate provided by at least one embodiment of the present disclosure further includes a power line and a reset voltage line, wherein the first light shielding layer is electrically connected to the power line or the reset voltage line.

[0006] For example, in the display substrate provided by at least one embodiment of the present disclosure, each of the multiple first pixel circuits includes a first thin film transistor, the first thin film transistor includes a first active layer, a first gate and a first source and drain electrode; the first light shielding layer is arranged on the same layer as the first source and drain electrode.

[0007] For example, in the display substrate provided in at least one embodiment of the present disclosure, the second display area includes a first sub-area at least partially surrounding the first display area and a second sub-area at least partially surrounding the first sub-area, the first light-shielding layer is arranged in the first sub-area, and the plurality of first pixel circuits are arranged in the second sub-area.

[0008] For example, the display substrate provided by at least one embodiment of the present disclosure also includes a plurality of signal lines electrically connected to the plurality of first pixel circuits respectively, the plurality of signal lines extending through the first sub-area, the first pixel circuit also includes a first storage capacitor, the first storage capacitor includes a first capacitor plate and a second capacitor plate, the first capacitor plate is arranged on the same layer as the first gate, and the plurality of signal lines are arranged on the same layer as the first capacitor plate or the second capacitor plate.

[0009] For example, the display substrate provided by at least one embodiment of the present disclosure also includes a base substrate and a second light-shielding layer, wherein the multiple first sub-pixels are arranged on the base substrate, and the second light-shielding layer is arranged between the multiple first pixel circuits and the base substrate to shield at least part of the circuit structure of the multiple first pixel circuits; the first light-shielding layer and the second light-shielding layer are arranged on the same layer.

[0010] For example, in the display substrate provided in at least one embodiment of the present disclosure, the first light-shielding layer and the second light-shielding layer are continuously arranged integrated film layers, and the integrated film layer has an opening in the first display area so that the first light-shielding layer and the first display area do not overlap in a direction perpendicular to the panel surface of the display substrate.

[0011] For example, the display substrate provided by at least one embodiment of the present disclosure also includes a base substrate and a heat dissipation layer, wherein the multiple first sub-pixels are arranged on the first side of the base substrate, the heat dissipation layer is arranged on the second side of the base substrate, and the first side and the second side are opposite to each other; the first light shielding layer is arranged on the same layer as the heat dissipation layer.

[0012] For example, in the display substrate provided in at least one embodiment of the present disclosure, the first light-shielding layer and the heat dissipation layer are continuously arranged as an integrated film layer, and the integrated film layer has an opening in the first display area so that the first light-shielding layer and the first display area do not overlap in a direction perpendicular to the panel surface of the display substrate.

[0013] For example, in the display substrate provided in at least one embodiment of the present disclosure, the second display area also includes a plurality of second sub-pixels, each second sub-pixel includes a second light-emitting device and a second pixel circuit electrically connected to the second light-emitting device, the second pixel circuit is configured to drive the second light-emitting device, and in the second display area, the plurality of second pixel circuits are arranged in a first array, the plurality of first pixel circuits are arranged in the gaps of the first array, and are arranged as a second array as a whole with the plurality of second pixel circuits.

[0014] For example, in the display substrate provided by at least one embodiment of the present disclosure, the first pixel circuit includes a first thin film transistor, the first thin film transistor includes a first active layer, a first gate and a first source-drain electrode, the first light-emitting device includes a first electrode, a second electrode and a first light-emitting layer between the first electrode and the second electrode, and the first electrode of the first light-emitting device is electrically connected to the first source-drain electrode through a first via hole; the second pixel circuit includes a second thin film transistor, the second thin film transistor includes a second active layer, a second gate and a second source-drain electrode, the second light-emitting device includes a first electrode, a second electrode and a second light-emitting layer between the first electrode and the second electrode, and the first electrode of the second light-emitting device is electrically connected to the second source-drain electrode through a second via hole; within the plane where the display substrate is located, the shortest distance between the first via hole and the light-emitting area of ​​the first light-emitting layer is smaller than the shortest distance between the second via hole and the light-emitting area of ​​the second light-emitting layer.

[0015] For example, in the display substrate provided by at least one embodiment of the present disclosure, the orthographic projection of the first via hole in the plane where the display substrate is located at least partially overlaps with the orthographic projection of the light-emitting region of the first light-emitting layer in the plane where the display substrate is located.

[0016] For example, in the display substrate provided in at least one embodiment of the present disclosure, the display area includes a third display area at least partially surrounding the second display area, and the third display area includes a plurality of third sub-pixels arranged in an array, wherein an arrangement density of the plurality of third sub-pixels in the third display area is greater than an arrangement density of the plurality of first sub-pixels in the first display area, and also greater than an arrangement density of the plurality of second sub-pixels in the second display area.

[0017] For example, in the display substrate provided by at least one embodiment of the present disclosure, the arrangement density of the plurality of first sub-pixels in the first display area is equal to the arrangement density of the plurality of second sub-pixels in the second display area.

[0018] For example, the display substrate provided by at least one embodiment of the present disclosure also includes a first scanning drive circuit and a second scanning drive circuit, respectively located on opposite sides of the display area, wherein the first scanning drive circuit and the second scanning drive circuit jointly provide electrical signals for multiple third sub-pixels in the third display area; the first scanning drive circuit also provides electrical signals for multiple second sub-pixels and multiple first pixel circuits in the second display area located in the first display area on a side close to the first scanning drive circuit, and the second scanning drive circuit also provides electrical signals for multiple second sub-pixels and multiple first pixel circuits in the second display area located in the first display area on a side close to the second scanning drive circuit.

[0019] At least one embodiment of the present disclosure provides a display device, comprising any of the above-mentioned display substrates, and a sensor, wherein the sensor is disposed on the second side of the display substrate, and the sensor is configured to receive light from the first side.

[0020] For example, in the display device provided by at least one embodiment of the present disclosure, in a direction perpendicular to the surface of the display substrate, the sensor at least partially overlaps with the first display area of ​​the display substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, but are not intended to limit the present disclosure.

[0022] Figure 1A is a schematic plan view of a display substrate;

[0023] Figure 1B It is a partial enlarged schematic diagram of a display substrate;

[0024] Figure 2 for Figure 1B A schematic cross-sectional view of a display substrate along line AA;

[0025] Figure 3 A schematic plan view of a display substrate provided in at least one embodiment of the present disclosure;

[0026] Figure 4A A partially enlarged schematic diagram of a display substrate provided by at least one embodiment of the present disclosure;

[0027] Figure 4B A schematic diagram of arrangement of sub-pixels in a first display area and a second display area in a display substrate provided in at least one embodiment of the present disclosure;

[0028] Figure 5A schematic plan view of a display substrate provided in at least one embodiment of the present disclosure;

[0029] Figure 6 for Figure 5 A schematic cross-sectional view of a display substrate along line CC;

[0030] Figure 7 A schematic plan view of a first display area and a portion of a second display area in a display substrate provided in at least one embodiment of the present disclosure;

[0031] Figure 8 Another schematic plan view of a first display area and a portion of a second display area in a display substrate provided in at least one embodiment of the present disclosure;

[0032] Fig. 9 for Figure 3 A schematic cross-sectional view of the display substrate along line BB;

[0033] Fig.10 for Figure 3 Another cross-sectional schematic diagram of the display substrate along line BB;

[0034] Fig.11 A schematic plan view of a first light shielding layer in a display substrate provided by at least one embodiment of the present disclosure;

[0035] Fig.12 for Figure 3 Another cross-sectional schematic diagram of the display substrate along line BB;

[0036] Fig.13 A schematic cross-sectional view of a second display area in a display substrate provided in at least one embodiment of the present disclosure;

[0037] Fig.14 A schematic diagram of arrangement of seed pixels in a first display area of ​​a display substrate provided in at least one embodiment of the present disclosure;

[0038] Fig.15 A schematic diagram of arrangement of seed pixels in the second display area of ​​a display substrate provided in at least one embodiment of the present disclosure;

[0039] Fig.16 A schematic plan view of a display substrate provided in at least one embodiment of the present disclosure;

[0040] Fig.17 A pixel circuit diagram of a display substrate provided by at least one embodiment of the present disclosure;

[0041] Fig.18A A cross-sectional schematic diagram of a display device provided by at least one embodiment of the present disclosure;

[0042] Fig.18BA cross-sectional schematic diagram of another display device provided by at least one embodiment of the present disclosure;

[0043] Fig.19A and Fig.19B They are respectively point spread function simulation diagrams of imaging of a point light source of the display device when there is no first light shielding layer and when there is the first light shielding layer;

[0044] Fig. 20A and Fig. 20B Two modulation transfer function diagrams of imaging of a point light source of a display device when there is no first light shielding layer and when there is the first light shielding layer; and

[0045] Fig.21A and Fig. 21B The pictures are actual glare photos of point light source imaging when the display device has no first shading layer and has the first shading layer, respectively. DETAILED DESCRIPTION

[0046] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0047] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. "Include" or "comprise" and similar words mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0048] In the design of the "under-screen camera", in order to allow more light to enter the camera located under the display panel, the display panel can be designed to have a high pixel density area and a low pixel density area, and the camera is set under the low pixel density area that allows more light to pass through.

[0049] For example, Figure 1A shows a schematic plan view of a display substrate, Figure 1B for Figure 1A A partial enlarged schematic diagram of a display substrate is shown. Figure 2 Shows Figure 1B Schematic cross-sectional view of the display substrate along line AA.

[0050] like Figure 1A , Figure 1B and Figure 2 As shown, the display area of ​​the display substrate includes a light-transmitting display area 1, a peripheral display area 2 and a main display area 3 which are arranged in parallel.

[0051] For example, the main display area 3 is the main display area and has a high resolution (PPI, Pixel Per Inch), that is, the main display area 3 is arranged with high density sub-pixels for display. Each sub-pixel includes a light-emitting device and a pixel circuit for driving the light-emitting device. The light-transmitting display area 1 can allow light incident from the display side of the display substrate to pass through the display substrate and reach the back side of the display substrate, so as to be used for the normal operation of components such as sensors (such as image sensors) arranged on the back side of the display substrate.

[0052] The light-transmitting display area 1 and the peripheral display area 2 also include a plurality of sub-pixels for display. However, since the pixel circuit of the sub-pixel includes metal wiring, metal electrodes, and an active layer, etc., it is usually at least partially opaque, or its light transmittance cannot meet the requirements of the light-transmitting display area 1. In order to ensure the light transmittance of the light-transmitting display area 1, the sub-pixels (e.g. Figure 1B The pixel circuit of the peripheral display area 2 (shown as a box in the middle light-transmitting display area 1) can be arranged in the peripheral display area 2, as shown by the gray box in the peripheral display area 2, thereby occupying part of the space of the peripheral display area 2. The remaining space of the peripheral display area 2 is used to set the sub-pixels of the peripheral display area 2 itself, for example, each white box in the peripheral display area 2 represents a sub-pixel. At this time, for example, the sub-pixel ( Figure 1B The white box in the figure) and the pixel circuit of the sub-pixel in the light-transmitting display area 1 ( Figure 1B The gray boxes in the figure are arranged as an array in the peripheral display area 2 as a whole. Therefore, the resolution of the light-transmitting display area 1 and the peripheral display area 2 is lower than that of the main display area 3, that is, the density of the sub-pixels arranged in the light-transmitting display area 1 and the peripheral display area 2 for display is lower than that of the sub-pixels in the main display area 3.

[0053] like Figure 2As shown, the light emitting device 4 of a sub-pixel in the light-transmitting display area 1 includes an anode 4A, a cathode 4C, and a light emitting layer 4B between the anode 4A and the cathode 4C. The anode 4A is connected to the pixel circuit 5 in the peripheral display area 2 through a wiring 6, so that the light emitting device 4 is controlled and driven by the pixel circuit 5. The pixel circuit 5 includes one or more thin film transistors, capacitors and other structures. In the plane of the display substrate, there is a certain gap between the film layers of these structures, that is, many narrow gaps are formed. The light on the display side of the display substrate may be obliquely incident into the peripheral display area 2 through the light-transmitting display area 1, and enter the sensor (such as an image sensor) arranged on the back side of the display substrate through the slits in the peripheral display area 2, which is equivalent to the light passing through the grating with a very low aperture ratio, so a strong diffraction phenomenon will occur, resulting in aggravated glare phenomenon of the sensor during imaging, and reduced resolution, thereby affecting the normal function of the sensor.

[0054] At least one embodiment of the present disclosure provides a display substrate and a display device, wherein the display substrate has a first side for display and a second side opposite to the first side, the display substrate includes a display area, the display area includes a first display area and a second display area at least partially surrounding the first display area, the first display area allows light from the first side to at least partially transmit to the second side; the first display area includes a plurality of first sub-pixels arranged in an array, each first sub-pixel includes a first light-emitting device, the second display area includes a plurality of first pixel circuits, the plurality of first pixel circuits are respectively electrically connected to the plurality of first light-emitting devices of the plurality of first sub-pixels to respectively drive the plurality of first light-emitting devices; the display area also includes a first light-shielding layer, in a direction perpendicular to the plate surface of the display substrate, the first light-shielding layer at least partially overlaps with the second display area, and the first light-shielding layer does not overlap with the first display area. Thus, in this embodiment, the first light-shielding layer can block the light entering the second display area to prevent the light from passing through the second display area and entering the sensor disposed on the second side of the display substrate, thereby improving the sensing effect of the sensor.

[0055] The display substrate and the display device disclosed in the present invention are exemplarily described below through several specific embodiments.

[0056] At least one embodiment of the present disclosure provides a display substrate. Figure 3 FIG. 4 shows a schematic plan view of the display substrate. Figure 3As shown, the display substrate has a first side for display (i.e., the display side) and a second side opposite to the first side (i.e., the non-display side, also referred to as the back side). The display substrate includes a display area, which includes a first display area 10 and a second display area 20 at least partially surrounding the first display area 10. The first display area 10 allows light from the first side to at least partially transmit to the second side, that is, the first display area 10 is a transparent display area, and light can pass from the display side of the display substrate through the transparent display area to the non-display side. For example, a sensor such as a camera or an infrared sensing device can be set on the non-display side, and the sensor can collect and use the light transmitted from the first display area 10 to the non-display side for sensing, such as imaging.

[0057] For example, Figure 4A Schematic diagram showing the arrangement of sub-pixels in the display area. Figure 4A As shown, the first display area 10 includes a plurality of first sub-pixels P1 arranged in an array, each first sub-pixel P1 includes a first light-emitting device EM1, and the plurality of first light-emitting devices EM1 are arranged in an array; the second display area 20 includes a plurality of first pixel circuits D1, and the plurality of first pixel circuits D1 are respectively electrically connected to the plurality of first light-emitting devices EM1 of the plurality of first sub-pixels P1 to respectively drive the plurality of first light-emitting devices EM1. That is, the pixel circuits of the plurality of first sub-pixels P1 in the first display area 10 are arranged in the second display area 20, thereby avoiding too many structures or opaque structures arranged in the first display area 10, thereby ensuring the light transmittance of the first display area 10, facilitating the transmission of more light for being sensed by the sensor, and improving the sensing quality. For example, the second display area 20 also includes a plurality of second sub-pixels P2, each second sub-pixel P2 includes a second light-emitting device EM2 and a second pixel circuit D2 electrically connected to the second light-emitting device EM2, and the second pixel circuit D2 is configured to drive the second light-emitting device EM2. In the second display area 20, the plurality of second pixel circuits D2 are arranged in a first array, the plurality of first pixel circuits D1 are disposed in the gaps of the first array, and are arranged as a second array as a whole with the plurality of second pixel circuits D2, that is, the first array is a subarray of the second array. For example, the plurality of first light-emitting devices EM1 and the plurality of second subpixels P2 (i.e., the plurality of second light-emitting devices EM2) are arranged uniformly in the first display area 10 and the second display area 20, respectively, thereby achieving uniform light emission and display in the first display area 10 and the second display area 20 as a whole.

[0058] For example, Figure 4B A schematic diagram of the arrangement of sub-pixels in a specific first display area and a second display area is shown. Figure 4BAs shown, the left side of the arc dotted line is the second display area 20, and the right side of the arc dotted line is the first display area 10. In the second display area 20, the second pixel circuits D2 of the plurality of second sub-pixels P2 are arranged in a first array, and the plurality of first pixel circuits D1 are arranged in the gaps of the first array, for example, in the portion framed by the dotted circle, so as to be arranged as a second array with the plurality of second pixel circuits D2 as a whole, thereby the plurality of first light-emitting devices EM1 of the plurality of sub-pixels P1 and the plurality of second sub-pixels P2 (i.e., the plurality of second light-emitting devices EM2) are evenly arranged in the first display area 10 and the second display area 20, respectively.

[0059] For example, the display area further includes a first light shielding layer, and in a direction perpendicular to the surface of the display substrate, the first light shielding layer at least partially overlaps with the second display area 20, and the first light shielding layer does not overlap with the first display area 10. Thus, the first light shielding layer can shield light that enters the second display area 20 and passes through the slits between various wirings, electrodes or active layers in the second display area 20, so as to prevent the light from passing through the second display area 20 to reach the second side of the display substrate, thereby improving the sensing quality of the sensor, for example, improving the shooting quality of the under-screen camera.

[0060] For example, Figure 5 A schematic plan view of a display substrate provided by at least one embodiment of the present disclosure is shown. Figure 6 FIG. 4 shows a schematic cross-sectional view of the display substrate along line CC. Figure 5 and Figure 6 As shown, each of the multiple first pixel circuits includes a first thin film transistor 12, and the first thin film transistor 12 includes a first active layer 121, a first gate 122, and first source and drain electrodes 123 and 124; for example, the first light shielding layer S1 can be arranged in the same layer as the first source and drain electrodes 123 and 124, thereby simplifying the preparation process of the display substrate.

[0061] It should be noted that in the embodiments of the present disclosure, "same-layer arrangement" means that two functional layers or structural layers are in the same layer and are formed of the same material in the hierarchical structure of the display substrate. For example, in the preparation process, the two functional layers or structural layers can be formed by the same material layer, and the required patterns and structures can be formed by the same composition process.

[0062] For example, in some embodiments, Figure 5 and Figure 6As shown, the second display area 20 includes a first sub-area 20A that at least partially surrounds the first display area 10 and a second sub-area 20B that at least partially surrounds the first sub-area 20A, that is, the second sub-area 20B is farther away from the first display area 10 than the first sub-area 20A. The first light shielding layer S1 is disposed in the first sub-area 20A, and the plurality of first pixel circuits are disposed in the second sub-area 20B. For example, the first light shielding layer S1 at least partially covers the first sub-area 20A. For example, in some examples, the first light shielding layer S1 completely covers the first sub-area 20A, thereby completely shielding the light entering the second sub-area 20B.

[0063] For example, Figure 7 As shown, the display substrate further includes a plurality of signal lines L, which extend in the display area along the vertical direction in the figure. In order to avoid crossing the first display area 10 in the extending direction, the plurality of signal lines L bend and extend through the first sub-area 20A, thereby bypassing the first display area 10. In the first sub-area 20A, the plurality of signal lines L extend in parallel with each other and have slits between them. For another example, the plurality of signal lines L may also extend in the display area along the horizontal direction in the figure. In order to avoid crossing the first display area 10 in the extending direction, the plurality of signal lines L bend and extend through the first sub-area 20A, thereby bypassing the first display area 10. In the first sub-area 20A, the plurality of signal lines L extend in parallel with each other and have slits between them. As shown Figure 6 As shown, the first pixel circuit further includes a first storage capacitor 13, the first storage capacitor 13 includes a first capacitor plate 131 and a second capacitor plate 132, the first capacitor plate 131 and the first gate electrode 122 are arranged in the same layer, and the plurality of signal lines L are arranged in the same layer as the first capacitor plate 131 or the second capacitor plate 132. For example, the plurality of signal lines L may be data lines, scanning lines (such as gate lines, reset lines, light-emitting control lines, etc.), power supply voltage lines, etc.

[0064] For example, in some embodiments, Figure 8 As shown, the orthographic projection of the first shading layer S1 on the plane where the display substrate is located completely covers the orthographic projection of multiple signal lines L running in the first sub-area 20A on the plane where the display substrate is located, or completely covers the orthographic projection of the first sub-area 20A itself on the plane where the display substrate is located, so that in the direction perpendicular to the surface of the display substrate, the first shading layer S1 overlaps with the multiple signal lines L, thereby blocking one or more slits between these signal lines L.

[0065] For example, in some examples, the first display area 10 can be a suitable shape such as a circle, a rectangle, a runway, etc., and a circle is shown in the figure as an example. For example, the size D of the first display area 10 can be 3 mm-4 mm, such as 3.2 mm, 3.4 mm, 3.6 mm, etc., so that enough light can pass through, such as for imaging. For example, the size of the first display area 10 can be the diameter of a circle, the diagonal of a square or a rectangle, etc. For example, the width A of the first sub-area 20A, that is, the setting width of the first shading layer S1 can be 0.1 mm-0.3 mm, such as 0.1 mm or 0.2 mm, etc., so as to achieve a certain shading effect without affecting the normal display of the display area.

[0066] For example, in some embodiments, the display substrate further includes a power line and a reset voltage line (described later in detail), and the first light shielding layer S1 is electrically connected to the power line or the reset voltage line. Thus, a certain DC signal can be input into the first light shielding layer S1 to prevent the first light shielding layer S1 from being suspended, thereby avoiding affecting the signal transmission on the display substrate.

[0067] For example, in some other embodiments, the first light shielding layer S1 may also be disposed at other positions of the display substrate.

[0068] For example, Fig. 9 yes Figure 3 A schematic cross-sectional view of the display substrate along line BB in FIG. Fig. 9 As shown, the display substrate further includes a base substrate 14 and a second light shielding layer S2, a plurality of first sub-pixels are arranged on the base substrate 14, and the second light shielding layer S2 is arranged between the plurality of first pixel circuits and the base substrate 14 to shield at least part of the circuit structure of the plurality of first pixel circuits, or shield at least part of the circuit structure of the plurality of second pixel circuits. For example, the second light shielding layer S2 at least shields the active layer 121 of the first thin film transistor 12 to prevent light from entering the active layer 121 from the second side of the display substrate and affecting the normal operation of the first thin film transistor 12. For example, the second light shielding layer S2 is covered with an insulating layer 14A to be spaced from the plurality of first pixel circuits; for another example, the second light shielding layer S2 at least shields the slits between different electrodes of the first pixel circuit or the second pixel circuit, or the slits between the electrodes and the signal lines (such as gate lines, data lines, power lines), etc. For example, the first light shielding layer S1 and the second light shielding layer S2 are arranged in the same layer. For example, the first light shielding layer S1 is arranged in the first sub-area 20A as in the above embodiment, so as to shield one or more slits between the plurality of signal lines L. Note that here A occluding B means that the orthographic projection of B on the plane where the display substrate is located is within the orthographic projection of A on the plane where the display substrate is located.

[0069] For example, Fig. 9As shown, the first light shielding layer S1 and the second light shielding layer S2 may be arranged at intervals, or, in some embodiments, as Fig.10 As shown, the first shading layer S1 and the second shading layer S2 are continuously provided integrated film layers, and the integrated film layer has an opening in the first display area 10 so that the first shading layer S1 and the first display area 10 do not overlap in the direction perpendicular to the board surface of the display substrate.

[0070] For example, Fig.11 As shown, the integrated film layer of the first light shielding layer S1 and the second light shielding layer S2 can completely cover the display area except the first display area 10 to fully achieve the light shielding effect.

[0071] For example, in this example, the first light shielding layer S1 and the second light shielding layer S2 may be made of metal materials or alloy materials with good light shielding properties, such as copper (Cu), aluminum (Al), and titanium (Ti).

[0072] For example, in other embodiments, Fig.12 As shown, the display substrate further includes a base substrate 14 and a heat dissipation layer SCF, a plurality of first sub-pixels are arranged on a first side of the base substrate 14 (shown as the upper side of the base substrate 14 in the figure), and the heat dissipation layer SCF is arranged on a second side of the base substrate 14 (shown as the lower side of the base substrate 14 in the figure), and the first side and the second side are opposite. For example, the first light shielding layer S1 is arranged on the same layer as the heat dissipation layer SCF. For example, the first light shielding layer S1 is arranged in the first sub-area 20A as in the above embodiment, so as to shield one or more slits between the plurality of signal lines L.

[0073] For example, the first light shielding layer S1 and the heat dissipation layer SCF may be arranged at intervals, or, referring to Fig.11 and Fig.12 The first shading layer S1 and the heat dissipation layer SCF may be an integrated film layer continuously arranged, and the integrated film layer has an opening in the first display area 10 so that the first shading layer S1 and the first display area 10 do not overlap in a direction perpendicular to the board surface of the display substrate.

[0074] For example, in this example, the first light shielding layer S1 and the heat dissipation layer SCF can be made of metal layers such as copper foil to have good light shielding effect and heat dissipation effect. For example, in the preparation process of the display substrate, a certain shape and size (such as Fig.11 A copper foil (of the shape and size shown in the figure) is then attached to the second side of the base substrate 14 to achieve good light shielding and heat dissipation effects at the same time.

[0075] In the embodiments of the present disclosure, Fig.11As shown, the first light-shielding layer S1 and the second light-shielding layer S2 are set as a continuous integrated film layer, or the first light-shielding layer S1 and the heat dissipation layer SCF are set as a continuous integrated film layer, which can achieve the technical effect of completely shielding the second display area 20, thereby achieving a more sufficient light-shielding effect and improving the working quality of the under-screen sensor, such as improving the photo-taking effect of the under-screen camera.

[0076] For example, in some embodiments, different first light shielding layers S1 may be used simultaneously, for example Figure 6 , Fig. 9 , Fig.10 as well as Fig.12 Any two or more of the first light shielding layers S1 shown in the figure can be used simultaneously to further improve the light shielding effect. For example, in some embodiments, Fig.10 and Fig.11 The first light shielding layer S1 shown, or using Figure 6 and Fig.11 The first light shielding layer S1 shown, or using Figure 6 and Fig.10 The first light shielding layer S1, or use Fig. 9 and Fig.11 The first light shielding layer S1 shown, that is, the display substrate has two or more first light shielding layers S1 at the same time, so as to further improve the light shielding effect.

[0077] For example, in some embodiments, Figure 6 , Fig. 9 , Fig.10 as well as Fig.12 As shown, the first pixel circuit includes a first thin film transistor 12, the first thin film transistor 12 includes a first active layer 121, a first gate 122, and first source-drain electrodes 123 and 124, the first light-emitting device 11 includes a first electrode 111, a second electrode 113, and a first light-emitting layer 112 between the first electrode 111 and the second electrode 113, and the first electrode 111 of the first light-emitting device 11 is electrically connected to the first source-drain electrode 124 through a first via hole V1. For example, the first electrode 111 of the first light-emitting device 11 is first electrically connected to the transparent connection electrode 15 through the first via hole V1, and then electrically connected to the first source-drain electrode 124 through the transparent connection electrode 15.

[0078] For example, the transparent connecting electrode 15 may be made of a transparent conductive material, such as a transparent metal oxide, such as indium tin oxide (ITO), etc., to have good light transmittance. Generally, the transparent connecting electrode 15 has better light transmittance than the first electrode 111, so the use of the transparent connecting electrode 15 to electrically connect the first electrode 111 to the first source-drain electrode 124 can further improve the light transmittance of the first display area 10.

[0079] like Fig.13 As shown, the second pixel circuit includes a second thin film transistor 22, the second thin film transistor 22 includes a second active layer 221, a second gate 222 and second source-drain electrodes 223 and 224, the second light-emitting device 21 includes a first electrode 211, a second electrode 213 and a second light-emitting layer 212 between the first electrode 211 and the second electrode 213, and the first electrode 211 of the second light-emitting device 21 is electrically connected to the second source-drain electrode 223 through a second via hole V2.

[0080] For example, in an embodiment of the present disclosure, the display substrate also includes a first gate insulating layer 141, a second gate insulating layer 142, an interlayer insulating layer 143, a first planarizing layer 144, a second planarizing layer 145, a pixel defining layer 146, and an encapsulation layer 147. The embodiment of the present disclosure does not specifically limit other structures of the display substrate.

[0081] For example, each of the above-mentioned active layers may be made of an amorphous silicon layer, a polycrystalline silicon layer or a metal oxide semiconductor material. For example, polycrystalline silicon may be high temperature polycrystalline silicon or low temperature polycrystalline silicon, and the oxide semiconductor may be indium gallium zinc oxide (IGZO), indium zinc oxide (IZO), zinc oxide (ZnO) or gallium zinc oxide (GZO), etc. Each gate may be made of a metal material or alloy material such as copper (Cu), aluminum (Al), titanium (Ti), for example, formed into a single-layer metal layer structure or a multi-layer metal layer structure, such as a multi-layer metal layer structure such as titanium / aluminum / titanium. Each drain may be made of a metal material or alloy material such as copper (Cu), aluminum (Al), titanium (Ti), for example, formed into a single-layer metal layer structure or a multi-layer metal layer structure, such as a multi-layer metal layer structure such as titanium / aluminum / titanium.

[0082] For example, the material of the first electrode of each light-emitting device can be a transparent metal oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), gallium zinc oxide (GZO), etc., and the material of the second electrode can be a metal material such as lithium (Li), aluminum (Al), magnesium (Mg), silver (Ag), etc.

[0083] The base substrate 14 can be a rigid base substrate such as glass, quartz, or a flexible base substrate such as polyimide. The first gate insulating layer 141, the second gate insulating layer 142, and the interlayer insulating layer 143 can be made of inorganic insulating materials such as silicon oxide, silicon nitride, or silicon oxynitride. The first planarizing layer 144, the second planarizing layer 145, and the pixel defining layer 146 can be made of organic insulating materials such as polyimide and resin.

[0084] The encapsulation layer 147 may include a stack of a plurality of organic encapsulation layers and an inorganic encapsulation layer. The embodiments of the present disclosure do not specifically limit the material and structure of each functional layer of the display substrate.

[0085] For example, each light-emitting layer can be an organic light-emitting layer or a quantum dot light-emitting layer, etc. Thus, the display substrate can be implemented as an organic light-emitting diode (OLED) display substrate or a quantum dot light-emitting diode (QLED) display substrate, etc. The embodiments of the present disclosure do not specifically limit the type of display substrate.

[0086] For example, in the plane where the display substrate is located, that is, in the plane parallel to the base substrate 14, the shortest distance between the first via hole V1 and the light-emitting area of ​​the first light-emitting layer 112 (that is, the area of ​​the first light-emitting layer 112 directly sandwiched between the first electrode 111 and the second electrode 113) is smaller than the shortest distance between the second via hole V2 and the light-emitting area of ​​the second light-emitting layer 212 (that is, the area of ​​the second light-emitting layer 212 directly sandwiched between the first electrode 211 and the second electrode 213). In this way, the distance between the first electrode 111 in the first display area 10 and the via hole V1 through which it passes is shortened, thereby minimizing the space occupied by the first electrode 111 and increasing the light transmittance of the first display area 10.

[0087] For example, Fig.14 A schematic plan view of the light-emitting area and the first electrode via of the light-emitting device of four sub-pixels in the first display area 10 is shown, and the four sub-pixels constitute a pixel unit in the first display area 10. For example, the four sub-pixels include a red sub-pixel R, a blue sub-pixel B, and two green sub-pixels G. For example, Fig.15 A schematic plan view of the light-emitting area and the first electrode via hole of the light-emitting device of four sub-pixels in the second display area 20 is shown, and the four sub-pixels constitute a pixel unit in the second display area 00. For example, the four sub-pixels include a red sub-pixel R, a blue sub-pixel B and two green sub-pixels G.

[0088] For example, taking the red sub-pixel R as an example, combined with Figure 12-Figure 15 , the shortest distance d between the first via hole V1 and the light emitting region R1 of the first light emitting layer 112 is smaller than the shortest distance d between the second via hole V2 and the light emitting region R2 of the second light emitting layer 212 .

[0089] For example, in some embodiments, Fig.12 and Fig.14 As shown, the orthographic projection of the first via hole V1 in the plane where the display substrate is located at least partially overlaps with the orthographic projection of the light-emitting region R1 of the first light-emitting layer 112 in the plane where the display substrate is located. At this time, the shortest distance between the first via hole V1 and the light-emitting region R1 of the first light-emitting layer 112 is 0. Fig.13 and Fig.15As shown, the orthographic projection of the second via hole V2 in the plane where the display substrate is located does not overlap with the orthographic projection of the light-emitting area R2 of the second light-emitting layer 212 in the plane where the display substrate is located, and the shortest distance between the second via hole V2 and the light-emitting area R2 of the first light-emitting layer 112 is d, and d is greater than 0.

[0090] Therefore, in the first display region 10 , the first via hole V1 is closer to the light emitting region R1 of the first light emitting layer 112 , which can prevent the first electrode 111 from extending too long and affecting the light transmittance of the first display region 10 .

[0091] For example, in some embodiments, Figure 3 and Figure 4A As shown, the display area also includes a third display area 30 at least partially surrounding the second display area 20, and the third display area 30 includes a plurality of third sub-pixels P3 arranged in an array. For example, the arrangement density of the plurality of third sub-pixels P3 in the third display area 30 is greater than the arrangement density of the plurality of first sub-pixels P1 in the first display area 10, and is also greater than the arrangement density of the plurality of second sub-pixels P2 in the second display area 20, so that the third display area 30 has a higher resolution than the first display area 10 and the second display area 20. In addition, the area occupied by the third display area 30 is greater than the area occupied by the first display area 10 and the second display area 20, and the third display area 30 is implemented as the main display area of ​​the display substrate.

[0092] For example, in some examples, the arrangement density of the plurality of first sub-pixels P1 in the first display area 10 is equal to the arrangement density of the plurality of second sub-pixels P2 in the second display area 20. For example, in one example, the arrangement density of the plurality of third sub-pixels P3 in the third display area 30 is twice the arrangement density of the plurality of first sub-pixels P1 in the first display area 10.

[0093] For example, each third sub-pixel P3 in the third display area 30 includes a third pixel circuit and a third light-emitting device. The specific structures of the third pixel circuit and the third light-emitting device are similar to those of the second pixel circuit and the second light-emitting device. Fig.13 , I will not go into details here.

[0094] For example, in some embodiments, Fig.16 As shown, the display substrate further includes a first scanning driving circuit (Gate on Array) GOA1 and a second scanning driving circuit GOA2 respectively located on opposite sides of the display area. The first scanning driving circuit GOA1 and the second scanning driving circuit GOA2 jointly provide electrical signals for a plurality of third sub-pixels in the third display area 30, that is, in the third display area 30, the GOA driving circuit adopts a bilateral driving mode, and the scanning driving circuits on the left and right sides of the third display area 30 are interconnected.

[0095] For example, the first scan driving circuit GOA1 also provides electrical signals to a plurality of second sub-pixels and a plurality of first pixel circuits in a second display area 20 located on a side of the first display area 10 close to the first scan driving circuit GOA1, for example: Figure 8 The second scanning driving circuit GOA2 also provides electrical signals to the plurality of second sub-pixels and the plurality of first pixel circuits in the second display area 20 located on the side of the first display area 10 close to the second scanning driving circuit GOA2, for example. Figure 8 The plurality of second sub-pixels and the plurality of first pixel circuits in the second display area 20 on the right side of the middle dotted line provide electrical signals. That is, for the first display area 10 and the second display area 20, the GOA driving circuit adopts a unilateral driving mode, and the scanning driving circuits on both sides of the first display area 10 and the second display area 20 for providing electrical signals to the first display area 10 and the second display area 20 are not connected to each other.

[0096] For example, as described above, the display substrate further includes a power line and a reset voltage line, and the first light shielding layer S1 is electrically connected to the power line or the reset voltage line to prevent the first light shielding layer S1 from being suspended. The following is an exemplary description of the driving circuit of the display substrate and the connection relationship between the power line and the reset voltage line in conjunction with the accompanying drawings.

[0097] For example, in some examples, the first pixel circuit, the second pixel circuit, and the third pixel circuit in the display substrate may adopt pixel driving circuits such as 2T1C and 7T1C. Fig.17 FIG. 1 shows a circuit diagram of a 7T1C pixel circuit. Fig.17 As shown, the pixel circuit includes a driving transistor T1, a data writing transistor T2, a compensation transistor T3, a storage capacitor C, a first light emission control transistor T4, a second light emission control transistor T5, a first reset transistor T6 and a second reset transistor T7.

[0098] For example, the driving transistor T1 includes a control end, a first end, and a second end, which is configured to control a driving current flowing through the light-emitting device EM, and the control end of the driving transistor T1 is connected to the first node N1, the first end of the driving transistor T1 is connected to the second node N2, and the second end of the driving transistor T1 is connected to the third node N3.

[0099] For example, the data writing transistor T2 includes a control end, a first end, and a second end, wherein the control end is configured to receive a first scanning signal Ga1, the first end is configured to receive a data signal, and the second end is connected to the first end (second node N2) of the driving transistor T1, and is configured to write the data signal to the first end of the driving transistor T1 in response to the first scanning signal Ga1. For example, the first end of the data writing transistor T2 is connected to the data line to receive the data signal, and the control end is connected to the scanning line to receive the first scanning signal Ga1.

[0100] For example, in the data writing stage, the data writing transistor T2 can be turned on in response to the first scanning signal Ga1, so that the data signal can be written into the first end (the second node N2) of the driving transistor T1, and the data signal can be stored in the storage capacitor C, so that in the light emitting stage, for example, a driving current for driving the light emitting device EM to emit light can be generated according to the data signal.

[0101] For example, the compensation transistor T3 includes a control end, a first end and a second end, wherein the control end is configured to receive a second scanning signal Ga2, and the first end and the second end are electrically connected to the control end and the second end of the driving transistor T1, respectively, and the compensation circuit is configured to perform threshold compensation in response to the second scanning signal.

[0102] For example, the storage capacitor C is electrically connected to the control terminal and the first voltage terminal VDD of the driving transistor T1, and is configured to store the data signal written by the data writing transistor T2. For example, in the data writing and compensation stage, the compensation transistor T3 can be turned on in response to the second scanning signal Ga2, so that the data signal written by the data writing transistor T2 can be stored in the storage capacitor C. For example, in the data writing and compensation stage, the compensation transistor T3 can electrically connect the control terminal and the second terminal of the driving transistor T1, so that the relevant information of the threshold voltage of the driving transistor T1 can also be stored in the storage circuit accordingly, so that, for example, in the light emitting stage, the stored data signal and the threshold voltage can be used to control the driving transistor T1, so that the output of the driving transistor T1 is compensated.

[0103] For example, the first light emission control transistor T4 is connected to the first terminal (second node N2) of the driving transistor T1 and the first voltage terminal VDD, and is configured to apply the first power supply voltage of the first voltage terminal VDD to the first terminal of the driving transistor T1 in response to the first light emission control signal. For example, the first light emission control transistor T4 is connected to the first light emission control terminal Em1, the first voltage terminal VDD and the second node N2.

[0104] For example, the second light emission control transistor T5 is connected to the second light emission control terminal Em2, the first terminal of the light emitting device EM and the second terminal of the driving transistor T1, and is configured to respond to the second light emission control signal so that the driving current can be applied to the light emitting device EM.

[0105] For example, in the light-emitting stage, the second light-emitting control transistor T5 is turned on in response to the second light-emitting control signal provided by the second light-emitting control terminal Em2, so that the driving transistor T1 can apply the driving current to the light-emitting device EM through the second light-emitting control transistor T5 to make it emit light; while in the non-light-emitting stage, the second light-emitting control transistor T5 is turned off in response to the second light-emitting control signal, thereby preventing current from flowing through the light-emitting device EM to make it emit light, which can improve the contrast of the corresponding display device.

[0106] For another example, in the initialization phase, the second light emitting control transistor T5 may also be turned on in response to the second light emitting control signal, so that the reset circuit may be combined to perform a reset operation on the driving transistor T1 and the light emitting device EM.

[0107] For example, the second light emitting control signal Em2 may be the same as or different from the first light emitting control signal Em1 , for example, the two may be connected to the same or different signal output terminals.

[0108] For example, the first reset transistor T6 is configured to apply the first reset voltage Vini1 to the first node N1 in response to the first reset signal Rst1, and the second reset transistor T7 is configured to apply the second reset voltage Vini2 to the fourth node N4 in response to the second reset signal Rst2. For example, in the initialization stage, the first reset transistor T6 and the second reset transistor T7 can be turned on in response to the reset signal, so that the reset voltage can be applied to the first end of the light emitting device EM and the first node N1, so that the driving transistor T1, the compensation transistor T3 and the light emitting device EM can be reset, eliminating the influence of the previous light emitting stage.

[0109] For example, the light emitting device EM includes a first terminal and a second terminal, the first terminal of the light emitting device EM is configured to receive the driving current from the second terminal of the driving transistor T1, and the second terminal of the light emitting device EM is configured to be connected to the second voltage terminal VSS. For example, the first terminal of the light emitting device EM can be connected to the third node N3.

[0110] It should be noted that the first node N1, the second node N2, the third node N3 and the fourth node N4 do not necessarily represent actual components, but represent the junction point of related circuit connections in the circuit diagram. The symbol Vd can represent both the data signal terminal and the level of the data signal. Similarly, Ga1 and Ga2 can represent both the first scan signal and the second scan signal, and can also represent the first scan signal terminal and the second scan signal terminal. Rst can represent both the reset control terminal and the reset signal. The symbol Vinit can represent both the reset voltage terminal and the reset voltage. The symbol VDD can represent both the first voltage terminal and the first power supply voltage. The symbol VSS can represent both the second voltage terminal and the second power supply voltage. The following embodiments are the same as this and will not be repeated. For example, in some cases, the second voltage terminal can be grounded, that is, VSS can be 0V.

[0111] For example, the first light shielding layer S1 can be electrically connected to a power line that transmits the first power supply voltage VDD or the second power supply voltage VSS, or electrically connected to a reset voltage line that transmits a reset voltage Vini1 or Vini2. For example, when the first light shielding layer S1 and the power line or the reset voltage line are arranged in the same layer, the first light shielding layer S1 can be directly electrically connected to the power line or the reset voltage line through a connecting line, or, when the first light shielding layer S1 and the power line or the reset voltage line are arranged in different layers, the first light shielding layer S1 can be electrically connected to the power line or the reset voltage line through a via.

[0112] For example, when the first light shielding layer S1 overlaps with the power line or the reset voltage line in a direction perpendicular to the surface of the display substrate, a via hole can be directly formed between the first light shielding layer S1 and the power line or the reset voltage line, so that the first light shielding layer S1 is electrically connected to the power line or the reset voltage line through the via hole. Alternatively, when the first light shielding layer S1 does not overlap with the power line or the reset voltage line in a direction perpendicular to the surface of the display substrate, the light shielding layer S1 can be extended to a position overlapping with the power line or the reset voltage line, and a via hole is formed between the two, and an electrical connection is made; or, the power line or the reset voltage line is extended to a position overlapping with the first light shielding layer S1, and a via hole is formed between the two, and an electrical connection is made. For example, a connecting line can also be used to introduce the power line or the reset voltage line to a position overlapping with the first light shielding layer S1, and a via hole is formed between the connecting line and the first light shielding layer S1, and an electrical connection is made. In the embodiment of the present disclosure, the first light shielding layer S1 can be electrically connected to the power line or the reset voltage line in any suitable manner, and the embodiment of the present disclosure does not specifically limit the manner in which the first light shielding layer S1 is electrically connected to the power line or the reset voltage line. Thus, a certain power supply voltage or reset voltage can be transmitted to the first light shielding layer S1, which can prevent the first light shielding layer S1 from being suspended and affecting the signal transmission on the display substrate.

[0113] In summary, in the display substrate provided by at least one embodiment of the present disclosure, the first light-shielding layer can effectively block at least part of the light entering the second display area to prevent the light from passing through the second display area and entering the under-screen sensor, such as a camera, thereby improving the sensing effect, such as improving the shooting quality of the under-screen camera. Moreover, a certain electrical signal can be input to the first light-shielding layer so as not to affect the normal operation of the driving circuit in the display substrate. In addition, the first light-shielding layer can be arranged in the same layer as certain existing functional layers in the display substrate, so that the same material can be used in the preparation process to form it by the same process, thereby simplifying the preparation process of the display substrate, that is, without increasing the difficulty of preparing the display substrate, the working fluid quality of the under-screen sensor of the display substrate, such as the camera, is improved, and a narrow bezel design of the display substrate is also realized.

[0114] At least one embodiment of the present disclosure further provides a display device, such as Fig.18A As shown, the display device includes any of the above display substrates ( Fig.18A It is shown as Figure 6 The display substrate in FIG. 1 is taken as an example) and a sensor 19. The sensor 19 is disposed on the second side (non-display side) of the display substrate, and the sensor is configured to receive light from the first side (display side). For example, the sensor 19 can be any form of sensor such as a camera, an infrared sensor, etc.

[0115] For example, Fig.18B FIG. 2 shows a cross-sectional schematic diagram of another display device provided by at least one embodiment of the present disclosure. Fig.18B As shown, the first light shielding layer S1 in the display device is arranged on the same layer as the heat dissipation layer SCF, for example, Fig.12 The arrangement of the first light shielding layer S1 in the display substrate shown in FIG. Fig.12 The display substrate shown is different in that Fig.18B In the embodiment, the first electrode 111 of the first light emitting device is directly electrically connected to the first source and drain electrode 124 through the via hole exposing the source and drain electrode 124, thereby saving the transparent connecting electrode 15 and the second planarization layer 145 and simplifying the film structure of the display substrate.

[0116] For example, in some embodiments, in a direction perpendicular to the surface of the display substrate, the sensor 19 at least partially overlaps with the first display area 10 of the display substrate, so that the sensor 19 can fully receive light from the first side and work based on the light. Since the display substrate has a first light shielding layer that shields the second display area, the sensor 19 only receives light transmitted from the first display area, which can prevent light from passing through the second display area to reach the sensor 19 and affect the operation of the sensor 19. Therefore, the sensor 19 of the display device has a higher working quality. For example, when the sensor 19 is a camera, the camera has a higher photo quality.

[0117] For example, the display device provided in at least one embodiment of the present disclosure may be a display substrate, display panel, electronic paper, mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, navigator, or any other product or component with a display function, and the embodiments of the present disclosure are not limited to this.

[0118] For example, Fig.19A and Fig.19B The point spread function simulation diagrams of the point light source imaging of the display device with and without the first shading layer are shown respectively. The simulation diagrams describe the energy distribution state on the imaging surface after the under-screen camera images through the point light source, that is, the diffuse distribution of energy in various directions such as up, down, left, and right (reflected in the XY coordinates), which can intuitively characterize the glare of the point light source. Fig.19A As shown, when the first light shielding layer is not provided in the second display area, at an oblique viewing angle, light passes through the second display area, similar to passing through a grating with a very small aperture ratio. At this time, the central energy peak of the point light source imaging is only 10.5, and the point light source glare phenomenon is serious. Fig.19B As shown, after the first shading layer is set in the second display area, under the oblique viewing angle, the light can only pass through the first display area, the central energy peak of the point light source imaging is greater than 11, and the point light source glare phenomenon is significantly improved.

[0119] Fig. 20A and Fig. 20B The figure shows the modulation transfer function (MTF) of the point light source imaging on the meridian plane and arc plane when the display device has no first shading layer and has the first shading layer. The horizontal axis value in the figure represents the spatial frequency (i.e., spatial line pairs per millimeter, the unit is lp / mm), and the vertical axis is the MTF value, which is used to characterize the resolution under different spatial frequencies. Under the same spatial frequency, the higher the MTF value, the higher the imaging resolution. Fig.19A and Fig.19BIn the figure, the F0 curve is the modulation transfer function curve of the point light source imaging of the display device when there is no first shading layer, and the F1 curve is the modulation transfer function curve of the point light source imaging of the display device after the first shading layer is set. It can be seen that under the same spatial frequency, the MTF value of the F1 curve is higher than the MTF value of the F0 curve, that is, after setting the first shading layer, the resolution of the point light source imaging of the display device is significantly improved.

[0120] For example, Fig.21A The figure shows a real shot of glare caused by imaging of a point light source when the display device does not have the first light shielding layer. Fig. 21B The glare photos of the point light source imaging of the display device after the first shading layer is provided are shown. Fig.21A and Fig. 21B It can be seen that after the first shading layer is provided, the glare phenomenon of imaging of point light sources of the display device is significantly improved.

[0121] There are a few points to note:

[0122] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure. Other structures may refer to the general design.

[0123] (2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions is exaggerated or reduced, that is, these drawings are not drawn according to the actual scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "under" another element, the element may be "directly" "on" or "under" the other element or there may be intermediate elements.

[0124] (3) In the absence of conflict, the embodiments of the present disclosure and the features therein may be combined with each other to obtain new embodiments.

[0125] The above are only specific implementations of the present disclosure, but the protection scope of the present disclosure is not limited thereto, and the protection scope of the present disclosure shall be based on the protection scope of the claims.

Claims

1. A display substrate having a first side for display and a second side opposite to the first side, the display substrate comprising a display area, in, The display area includes a first display area and a second display area at least partially surrounding the first display area, the first display area allowing light from the first side to at least partially transmit to the second side; The first display area includes a plurality of first sub-pixels arranged in an array, at least one first sub-pixel of the plurality of first sub-pixels includes a first light-emitting device, The second display area includes a plurality of first pixel circuits, at least one of the plurality of first pixel circuits is electrically connected to the first light emitting device to drive the first light emitting device; The display area further includes a first light shielding layer. In a direction perpendicular to the surface of the display substrate, the first light shielding layer at least partially overlaps with the second display area, and the first light shielding layer does not overlap with the first display area.

2. The display substrate according to claim 1, further comprising a power supply line and a reset voltage line, in, The first light shielding layer is electrically connected to the power line or the reset voltage line.

3. The display substrate according to claim 2, wherein: The first light shielding layer is disposed in the same layer as the power line or the reset voltage line.

4. The display substrate according to claim 1, wherein: The second display area includes a first sub-area at least partially surrounding the first display area and a second sub-area at least partially surrounding the first sub-area, The first light shielding layer is disposed in the first sub-region, and the plurality of first pixel circuits are disposed in the second sub-region.

5. The display substrate according to claim 4, further comprising a plurality of signal lines electrically connected to the plurality of first pixel circuits respectively, wherein the plurality of signal lines extend through the first sub-area, The plurality of signal lines include at least one of a data line, a scan line, and a power supply voltage line.

6. The display substrate according to claim 5, wherein: In a direction perpendicular to a surface of the display substrate, the first light shielding layer at least partially overlaps with the plurality of signal lines.

7. The display substrate according to claim 1, further comprising a base substrate and a second light shielding layer, wherein: The plurality of first sub-pixels are arranged on the base substrate, and the second light shielding layer is arranged between the plurality of first pixel circuits and the base substrate to shield at least a part of the circuit structure of the plurality of first pixel circuits; The first light shielding layer and the second light shielding layer are arranged on the same layer.

8. The display substrate according to claim 7, wherein: The first light-shielding layer and the second light-shielding layer are continuously arranged integrated film layers, and the integrated film layer has an opening in the first display area so that the first light-shielding layer and the first display area do not overlap in a direction perpendicular to the board surface of the display substrate.

9. The display substrate according to claim 1, further comprising a base substrate and a heat dissipation layer, wherein: The plurality of first sub-pixels are arranged on a first side of the base substrate, the heat dissipation layer is arranged on a second side of the base substrate, and the first side and the second side are opposite to each other; The first light shielding layer is arranged on the same layer as the heat dissipation layer.

10. The display substrate according to claim 9, wherein: The first shading layer and the heat dissipation layer are continuously provided as an integrated film layer, and the integrated film layer has an opening in the first display area so that the first shading layer and the first display area do not overlap in a direction perpendicular to the board surface of the display substrate.

11. The display substrate according to claim 1, wherein: The second display area further includes a plurality of second sub-pixels, each of which includes a second light-emitting device and a second pixel circuit electrically connected to the second light-emitting device, wherein the second pixel circuit is configured to drive the second light-emitting device. In the second display area, the plurality of second pixel circuits are arranged in a first array, the plurality of first pixel circuits are disposed in gaps of the first array, and are arranged as a whole with the plurality of second pixel circuits to form a second array.

12. The display substrate according to claim 11, wherein: The first pixel circuit includes a first thin film transistor, the first thin film transistor includes a first active layer, a first gate and a first source-drain electrode, the first light-emitting device includes a first electrode, a second electrode and a first light-emitting layer between the first electrode and the second electrode, and the first electrode of the first light-emitting device is electrically connected to the first source-drain electrode through a first via hole; The second pixel circuit includes a second thin film transistor, the second thin film transistor includes a second active layer, a second gate and a second source-drain electrode, the second light emitting device includes a first electrode, a second electrode and a second light emitting layer between the first electrode and the second electrode, and the first electrode of the second light emitting device is electrically connected to the second source-drain electrode through a second via hole; In a plane where the display substrate is located, the shortest distance between the first via hole and the light-emitting area of ​​the first light-emitting layer is smaller than the shortest distance between the second via hole and the light-emitting area of ​​the second light-emitting layer.

13. The display substrate according to claim 12, wherein: An orthographic projection of the first via hole in the plane where the display substrate is located at least partially overlaps with an orthographic projection of the light-emitting region of the first light-emitting layer in the plane where the display substrate is located.

14. The display substrate according to claim 1, wherein: The display area includes a third display area at least partially surrounding the second display area, the third display area includes a plurality of third sub-pixels, each of the plurality of third sub-pixels includes a third pixel circuit and a third light-emitting device, and an area occupied by the third display area is greater than an area occupied by the first display area and the second display area.

15. The display substrate according to claim 14, wherein: The arrangement density of the plurality of first sub-pixels in the first display area is equal to the arrangement density of the plurality of second sub-pixels in the second display area.

16. A display device, comprising: The display substrate according to any one of claims 1 to 15, and sensor, The sensor is disposed on the second side of the display substrate, and the sensor is configured to receive light from the first side.

17. The display device according to claim 16, wherein: In a direction perpendicular to a plane of the display substrate, the sensor at least partially overlaps with a first display area of ​​the display substrate.

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