Method for testing high-temperature-resistant thermal shock resistance of circuit board

Abstract

The invention discloses a method for testing the high-temperature-resistant thermal shock performance of a circuit board, and the method comprises the steps: obtaining the graphic data of an aperture a, a hole pitch b, a hole ring c and a graphic pitch d in a to-be-manufactured circuit board, carrying out the testing of a sample, carrying out the high and low-temperature impact environment test of the test sample, determining the cause of a hole copper crack, and improving the to-be-manufactured circuit board. According to the application, the test sample is subjected to high and low temperature environment simulation test, the thermal fatigue resistance, the thermal stress bearing capacity, the electrical performance stability and other key indexes of the circuit board to be manufactured can be evaluated, and the material, the structure and the manufacturing process of the circuit board to be manufactured are at least improved according to the test result.

Description

Technical Field

[0001] The invention relates to the field of PCB board processing, and in particular to a method for testing the high temperature thermal shock resistance performance of a circuit board. Background Art

[0002] With the rapid development of automotive electronic technology, automotive printed circuit boards (PCBs) are increasingly used in vehicles, especially in key components such as engine control units and brake systems. These components are often in high temperature and rapid temperature change environments, which places extremely high demands on the high temperature thermal shock resistance of the circuit board. Substrates with excellent high temperature resistance can maintain stable physical and chemical properties in high temperature environments, ensuring the long-term reliability of the circuit board.

[0003] In the process of implementing the prior art, the inventor discovered that:

[0004] When existing circuit boards are exposed to high temperatures and rapid temperature changes for a long time, the circuits and plated holes or vias (through holes, blind holes, buried holes, and stacked holes) on the circuit boards are prone to expansion and contraction, and then the plated holes or vias break or crack, causing the circuits to short circuit or increase in resistance. Over time, the circuit boards lose their effectiveness.

[0005] Therefore, the present application provides a circuit board technical solution with high temperature and thermal shock resistance to solve the problem in the prior art that the circuit board is broken or cracked due to temperature and thus cannot be used. Summary of the invention

[0006] The embodiment of the present application provides a technical solution for a circuit board with high temperature and thermal shock resistance to solve the problem in the prior art that the circuit board may break or crack due to temperature influence and thus become unusable.

[0007] A method for testing the high temperature thermal shock resistance of a circuit board, comprising:

[0008] Obtaining graphic data of all hole diameters a, hole spacings b, hole rings c, and pattern spacings d in the circuit board to be manufactured;

[0009] Calculate the average values ​​of all the graphic data of the aperture a, the hole spacing b, the hole ring c, and the graphic spacing d respectively, and generate the average value a1 of the aperture, the average value b1 of the hole spacing, the average value c1 of the hole ring, and the average value d1 of the graphic spacing;

[0010] Based on the average value a1 of the aperture, the average value b1 of the hole spacing, the average value c1 of the hole ring, and the average value d1 of the pattern spacing, at least a first test sample with the aperture a1, the hole spacing b1, the hole ring c1, and the pattern spacing c1, a second test sample with the aperture a2, the hole spacing b2, the hole ring c2, and the pattern spacing d2, and a third test sample with the aperture a3, the hole spacing b3, the hole ring c3, ​​and the pattern spacing d3 are prepared;

[0011] Connecting the first test sample, the second test sample, and the third test sample respectively, and placing them in a high and low temperature shock environment for testing;

[0012] Perform resistance tests on the first test sample, the second test sample, and the third test sample placed in the high and low temperature impact environment at predetermined intervals;

[0013] When the resistance change rate of the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the test sample with the resistance change rate higher than the predetermined threshold is sliced ​​and the cause of the hole copper crack is analyzed;

[0014] Based on the causes of copper cracks in the test samples, improve the circuit board to be manufactured;

[0015] A2≤a1≤a3, b2≤b1≤3, c2=c1=c3, c2=c1=c3, when a1 is equal to a2 or a3, b1 is not equal to b2 or b3.

[0016] Furthermore, the first test sample specifically includes:

[0017] A number of holes with a diameter of a1 arranged in a row;

[0018] A plurality of connection ends are alternately connected to both sides of the holes arranged in a row.

[0019] Furthermore, the holes arranged in rows are connected in series.

[0020] Furthermore, the values ​​of a1 and b1 increase in equal proportion to the values ​​of a2 and b2.

[0021] Further, when the resistance change rate of the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the test sample with the resistance change rate higher than the predetermined threshold is sliced ​​and the hole copper crack is observed, specifically including:

[0022] Connecting the connection ends of the start holes and the end holes of the first test sample, the second test sample, and the third test sample respectively and testing the resistance values;

[0023] When the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the conductivity of the connection end of the hole in the sample and the connection end of the adjacent hole are tested respectively to determine the failed hole;

[0024] Slicing the failed hole and analyzing the cause of the hole copper crack;

[0025] The predetermined threshold is a resistance change rate lower than 10%.

[0026] Further, the failed hole is sliced ​​and the cause of the hole copper crack is analyzed, specifically including:

[0027] Cut the test sample into thin slices along a specific direction;

[0028] Use a microscope to observe and determine the cause of copper cracks in thin sheet holes;

[0029] The causes of the copper cracks in the holes include at least improper material selection, electroplating process, excessive thermal stress or unreasonable structural design.

[0030] Furthermore, based on the cause of the hole copper cracks in the test sample, the circuit board to be manufactured is improved, at least including the improvement of the material of the circuit board to be manufactured.

[0031] The test method for high temperature thermal shock resistance of a circuit board provided in this application has the following effects:

[0032] By simulating high and low temperature environment tests on test samples in this application, key indicators such as thermal fatigue resistance, thermal stress tolerance, and electrical performance stability of the circuit board to be manufactured can be evaluated. Based on the test results, at least the material, structure, and manufacturing process of the circuit board to be manufactured can be improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0034] Figure 1 A schematic diagram of a method for testing the high temperature thermal shock resistance of a circuit board provided in an embodiment of the present application;

[0035] Figure 2 This is a schematic diagram of the structure of the first test sample provided in an embodiment of the present application. DETAILED DESCRIPTION

[0036] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in combination with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.

[0037] Please refer to Figure 1 , a method for testing the high temperature thermal shock resistance of a circuit board provided in this application, comprising the following steps:

[0038] S100: Obtaining graphic data of all hole diameters a, hole spacings b, hole rings c, and pattern spacings d in the circuit board to be manufactured.

[0039] Specifically, the circuit board to be manufactured is a circuit board that is to be used in a car and has set the aperture, hole spacing, hole ring, and pattern spacing. The aperture, hole spacing, hole ring, and pattern spacing data in the circuit board to be manufactured can be measured through the measurement software. It can be understood that this step can obtain the data of all apertures, hole spacing, hole rings, and pattern spacings from small to large in the circuit board to be manufactured, thereby ensuring the integrity of subsequent tests, so as to facilitate the improvement of the circuit board to be manufactured.

[0040] S110: Calculate the average values ​​of all the graphic data of the aperture a, the hole spacing b, the hole ring c, and the graphic spacing d respectively, and generate the average aperture value a1, the average hole spacing value b1, the average hole ring value c1, and the graphic spacing value d1.

[0041] It is understandable that the data of aperture a and hole spacing b in the graphic data contain multiple types, such as at least 4 or 5 types of aperture a data, and more types of hole spacing data, while the hole ring c and graphic spacing d remain basically unchanged. For the accuracy of subsequent tests, this application performs an average operation, and then processes it based on the average, thereby ensuring the accuracy of the high temperature thermal shock resistance test of the circuit board to be manufactured.

[0042] S120: Based on the average value a1 of the aperture, the average value b1 of the hole spacing, the average value c1 of the hole ring, and the average value d1 of the pattern spacing, at least a first test sample with aperture a1, hole spacing b1, hole ring c1, and pattern spacing c1, a second test sample with aperture a2, hole spacing b2, hole ring c2, and pattern spacing d2, and a third test sample with aperture a3, hole spacing b3, hole ring c3, ​​and pattern spacing d3 are produced.

[0043] Specifically, the present application prepares a first test sample based on the average value a1 of the aperture, the average value b1 of the hole spacing, the average value c1 of the hole ring, and the average value d1 of the pattern spacing. Based on the first test sample, a second test sample and a third test sample are prepared. It should be noted that this application only cites three test samples for ease of understanding. Of course, in order to ensure the accuracy of the test, more test sample data can also be prepared to determine.

[0044] It should be noted that the production of the test sample is determined based on the obtained graphic data of the circuit board to be manufactured. For example, the data of the aperture a in the graphic data include: 0.2, 0.5, 0.3, 0.8, and the average value is 0.45, then the aperture of the first test sample is 0.45, and the aperture data of the second test sample and the third test sample should be around 0.45 and larger than the aperture range of the circuit board to be manufactured, for example, the aperture in the second test sample is 0.1, and the aperture in the third test sample is 0.9. Of course, more test samples between 0.1-0.9 can also be produced to ensure their subsequent accuracy.

[0045] a2≤a1≤a3, b2≤b1≤b3, c2=c1=c3, c2=c1=c3, when a1 is equal to a2 or a3, b1 is not equal to b2 or b3. It can be understood that the values ​​of the aperture and the hole spacing in the first test sample, the second test sample, and the third test sample can be proportional. Then, the high temperature thermal shock resistance of the test sample is determined on this basis.

[0046] Of course, in order to further improve the accuracy of the data, different spacings of the same aperture can be added on the basis of the above to ensure the integrity of the high temperature resistance test of the circuit board, so as to further obtain the test results of the high temperature thermal shock resistance of the circuit board and better correct it.

[0047] Furthermore, in the present application, the holes in the first test sample, the second test sample, and the third test sample are arranged in rows and connected in series, and then connection ends are alternately arranged on both sides of the holes. The hole diameters in each test sample are the same, the spacing between the holes is fixed, and the spacing between the hole rings and the patterns are the same. Figure 2 As shown, the holes in the first test sample, the second test sample, and the third test sample and the connection ends connected to the holes are designed as a daisy chain. In a preferred embodiment provided in the present application, each test sample has 16 holes, and connection ends are alternately arranged on both sides of the holes to form a daisy chain.

[0048] S130: Connect the first test sample, the second test sample, and the third test sample respectively, and place them in a high and low temperature shock environment for testing.

[0049] Specifically, the starting hole at one end and the ending hole at the other end of the first test specimen, the second test specimen, and the third test specimen are energized respectively, and placed in a high and low temperature environment for experiments. It is understandable that the test conducted in the high and low temperature shock environment described in the present application may be a thermal shock test, and of course may also include a thermal stress test and a thermal storage test. It is understandable that the thermal shock test, the thermal stress test, and the thermal storage test are all for testing the high temperature resistance of the test specimens. Through the thermal shock test, it can be observed whether the test specimen has cracks, deformation or other functional failures after multiple temperature cycles. Of course, the thermal storage test can detect whether the test specimen also has problems with material degradation and decreased dimensional stability, and thus make improvements to the circuit board to be manufactured.

[0050] S140: performing resistance tests on the first test sample, the second test sample, and the third test sample placed in the high and low temperature impact environment at predetermined intervals.

[0051] Specifically, during the process of connecting the first test sample, the second test sample, and the third test sample and conducting the test, the resistance is also tested at intervals. It can be understood that the test can determine the process of resistance value change under high temperature and high and low temperature conversion environments. Then determine whether the resistance value exceeds a predetermined threshold.

[0052] S150: When the resistance change rate of the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the test sample having the resistance change rate higher than the predetermined threshold is sliced ​​and the cause of the hole copper crack is analyzed.

[0053] Specifically, when the resistance change rate is higher than a predetermined threshold, it indicates that a hole copper crack or a short circuit problem occurs in the test sample. In a preferred embodiment provided by the present application, the predetermined threshold is 10%, that is, when the resistance change rate is higher than 10%, it is considered that a crack or a short circuit occurs.

[0054] Further, when the resistance change rate of the resistance value of the resistance test of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the test sample with the resistance change rate higher than the predetermined threshold is sliced ​​and the hole copper cracks are observed, specifically including: respectively connecting the connection ends of the starting holes and the connection ends of the ending holes of the first test sample, the second test sample, and the third test sample and testing the resistance values; when the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than the predetermined threshold, respectively testing the conductivity of the connection ends of the holes in the sample and the connection ends of the adjacent holes to determine the failed holes; slicing the failed holes and analyzing the causes of the hole copper cracks.

[0055] Specifically, when the resistance change rate is higher than a predetermined threshold or is 0, it may indicate that cracks have occurred in the hole of the test sample or that a short circuit exists in the test sample.

[0056] Specifically, when the resistance change rate of the test sample is high or the resistance is 0, the resistance values ​​of several connection sections of the test sample are tested in combination, so that the failed position or failed hole can be identified, which is convenient for slicing and analyzing the failure cause.

[0057] Furthermore, the failed holes are sliced ​​and the causes of the copper cracks in the holes are analyzed, specifically including: cutting the test sample into thin slices along a specific direction; using a microscope to observe and determine the causes of the copper cracks in the thin slice holes; wherein the causes of the copper cracks in the holes include at least improper material selection, electroplating process, excessive thermal stress or unreasonable structural design.

[0058] Specifically, the failed position or failed hole is cut into thin slices along a specific direction to facilitate subsequent observation of the crack position. The cause of the hole copper crack can be determined through observation, which may be improper material selection, electroplating process, excessive thermal stress or unreasonable structural design.

[0059] S160: Based on the cause of the hole copper cracks in the test sample, improve the circuit board to be manufactured.

[0060] After determining the test problems of the test samples, the materials and structures of the corresponding apertures and hole spacing positions in the circuit board to be manufactured are improved, thereby ensuring that the circuit board to be manufactured has better physical and chemical properties during actual application and ensuring the long-term reliability of the circuit board.

[0061] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0062] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment or an embodiment in combination with software and hardware. Moreover, the present application may adopt the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0063] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A method for testing the high temperature thermal shock resistance of a circuit board, characterized in that: The following steps are involved: Obtaining graphic data of all hole diameters a, hole spacings b, hole rings c, and pattern spacings d in the circuit board to be manufactured; Calculate the average values ​​of all the graphic data of the aperture a, the hole spacing b, the hole ring c, and the graphic spacing d respectively, and generate the average value a1 of the aperture, the average value b1 of the hole spacing, the average value c1 of the hole ring, and the average value d1 of the graphic spacing; Based on the average value a1 of the aperture, the average value b1 of the hole spacing, the average value c1 of the hole ring, and the average value d1 of the pattern spacing, at least a first test sample with the aperture a1, the hole spacing b1, the hole ring c1, and the pattern spacing c1, a second test sample with the aperture a2, the hole spacing b2, the hole ring c2, and the pattern spacing d2, and a third test sample with the aperture a3, the hole spacing b3, the hole ring c3, ​​and the pattern spacing d3 are prepared; Connecting the first test sample, the second test sample, and the third test sample respectively, and placing them in a high and low temperature shock environment for testing; Perform resistance tests on the first test sample, the second test sample, and the third test sample placed in the high and low temperature impact environment at predetermined intervals; When the resistance change rate of the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the test sample with the resistance change rate higher than the predetermined threshold is sliced ​​and the cause of the hole copper crack is analyzed; Based on the causes of copper cracks in the test samples, improve the circuit board to be manufactured; A2≤a1≤a3, b2≤b1≤b3, c2=c1=c3, c2=c1=c3, when a1 is equal to a2 or a3, b1 is not equal to b2 or b3.

2. The method for testing the high temperature thermal shock resistance of a circuit board according to claim 1, characterized in that: The first test sample specifically includes: A number of holes with a diameter of a1 arranged in a row; A plurality of connection ends are alternately connected to both sides of the holes arranged in a row.

3. The method for testing the high temperature thermal shock resistance of a circuit board according to claim 2, characterized in that: The holes arranged in a row are connected in series.

4. The method for testing the high temperature thermal shock resistance of a circuit board according to claim 1, characterized in that: The values ​​of a1 and b1 increase in equal proportion to the values ​​of a2 and b2.

5. The method for testing the high temperature thermal shock resistance of a circuit board according to claim 1, characterized in that: When the resistance change rate of the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the test sample with the resistance change rate higher than the predetermined threshold is sliced ​​and the hole copper crack is observed, specifically including: Connecting the connection ends of the start holes and the end holes of the first test sample, the second test sample, and the third test sample respectively and testing the resistance values; When the resistance value of one of the first test sample, the second test sample, and the third test sample is higher than a predetermined threshold, the conductivity of the connection end of the hole in the sample and the connection end of the adjacent hole are tested respectively to determine the failed hole; Slicing the failed hole and analyzing the cause of the hole copper crack; The predetermined threshold is a resistance change rate lower than 10%.

6. The method for testing the high temperature thermal shock resistance of a circuit board according to claim 5, characterized in that: The failed hole is sliced ​​and the cause of the hole copper crack is analyzed, which specifically includes: Cut the test sample into thin slices along a specific direction; Use a microscope to observe and determine the cause of copper cracks in thin sheet holes; The causes of the copper cracks in the holes include at least improper material selection, electroplating process, excessive thermal stress or unreasonable structural design.

7. The method for testing the high temperature thermal shock resistance of a circuit board according to claim 1, characterized in that: Based on the cause of the hole copper cracks in the test sample, the circuit board to be manufactured is improved, at least including the improvement of the material of the circuit board to be manufactured.

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