Microcontrol circuit, analysis system, and control method

Abstract

The invention discloses a micro-control circuit, an analysis system and a control method. The micro-control circuit comprises a detection circuit, a storage circuit, an error counting circuit, a comparison circuit and a processing circuit. When an error event occurs, the detection circuit enables a trigger signal and outputs an error message. The storage circuit records error information. The error counting circuit adjusts a counting value according to the number of times that the detection circuit enables the trigger signal. When the count value reaches a critical value, the comparison circuit enables an interrupt signal. The processing circuit executes a specified action according to the interrupt signal.

Description

Technical Field

[0001] The present invention relates to a micro-control circuit, in particular to a micro-control circuit for recording the number of occurrences of error events. Background Art

[0002] System errors can often be reset by setting the watchdog timer (WDT) or brownout detection (BOD) circuit to resolve the error state and prevent unexpected errors. Although the system can still work normally, it may be in an error state again in a short period of time, thus increasing the risk of product malfunction. Summary of the invention

[0003] An embodiment of the present invention provides a microcontroller circuit, comprising a detection circuit, a storage circuit, an error counting circuit, a comparison circuit, and a processing circuit. When an error event occurs, the detection circuit enables a trigger signal and outputs an error message. The storage circuit records the error message. The error counting circuit adjusts a count value according to the number of times the detection circuit enables the trigger signal. When the count value reaches a critical value, the comparison circuit enables an interrupt signal. The processing circuit performs a specified action according to the interrupt signal.

[0004] The present invention further provides an analysis system, including a measuring instrument and a microcontroller circuit. The measuring instrument has a debugging tool. The microcontroller circuit is coupled to the measuring instrument and includes a detection circuit, a debugging interface, a storage circuit, an error counting circuit, a comparison circuit, and a processing circuit. The detection circuit has a first output terminal and a second output terminal. When an error event occurs, the detection circuit outputs a trigger signal through the first output terminal and outputs an error message through the second output terminal. The debugging interface is coupled between the first output terminal and the measuring instrument. The storage circuit is coupled to the first and second output terminals and records the error message. The error counting circuit is coupled to the first output terminal and adjusts a count value according to the trigger signal. When the count value reaches a critical value, the comparison circuit enables an interrupt signal. The processing circuit performs a reset operation according to the interrupt signal.

[0005] The present invention further provides a control method, which is applicable to a microcontroller circuit and includes: determining whether an error event occurs. When an error event occurs, adjusting a count value, generating an error message and recording the error message in a storage circuit. When the count value reaches a critical value, instructing a processing circuit to perform a reset operation. After the processing circuit completes the reset operation, providing the error message to the processing circuit.

[0006] The control method of the present invention can be implemented through the micro-control circuit and analysis system of the present invention, which is hardware or software that can perform specific functions, and can also be recorded in a recording medium in the form of program code and implemented in combination with specific hardware. When the program code is loaded and executed by an electronic device, processor, computer or machine, the electronic device, processor, computer or machine becomes a micro-control circuit and analysis system for implementing the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Figure 1 Schematic diagram of the analysis system of the present invention.

[0008] Figure 2A Schematic diagram of the microcontroller circuit of the present invention.

[0009] Figure 2B Schematic diagram of the microcontroller circuit of the present invention.

[0010] Figure 2C Schematic diagram of the microcontroller circuit of the present invention.

[0011] Figure 3 It is a flow chart of the control method of the present invention.

[0012] Description of Figure Numbers:

[0013] 100: Analysis System

[0014] 110: Measuring instruments

[0015] 111: Debugging tools

[0016] 112: Host

[0017] 120, 200A, 200B, 200C: Microcontroller circuits

[0018] 113, 121: Debug interface

[0019] 210: Detection circuit

[0020] 220: Error counting circuit

[0021] 230: Comparison Circuit

[0022] 240: Processing circuit

[0023] 250: Storage circuit

[0024] STG: trigger signal

[0025] VAL: count value

[0026] TH: Threshold

[0027] SIR, SI: interrupt signal

[0028] ENM: Error message

[0029] O1, O2: output terminals

[0030] 251: Control circuit

[0031] 252, 253: Memory

[0032] 255: Remap Circuit

[0033] SOT: Control Signal

[0034] 260: Input and output pins

[0035] 265: Reset Circuit

[0036] 270: Power-on reset circuit

[0037] 275: Timer

[0038] 280: Error flag

[0039] 285: Logic Circuits

[0040] 286, 287: AND gate

[0041] 290: Interrupt Circuit

[0042] 291~293: Temporary register

[0043] 294: Selector

[0044] SRT, SR: reset signal

[0045] UV: User Vector

[0046] SV: Security Vector

[0047] IV: Interrupt Vector

[0048] SS1, SS2: Setting signal

[0049] S311~S315: Steps DETAILED DESCRIPTION

[0050] In order to make the purpose, features and advantages of the present invention more obvious and easy to understand, the following examples are specifically cited and described in detail with the accompanying drawings. The present invention specification provides different examples to illustrate the technical features of different implementations of the present invention. Among them, the configuration of each element in the example is for illustrative purposes and is not intended to limit the present invention. In addition, some repetitions of the figure numbers in the examples are for the purpose of simplifying the description and do not mean the correlation between different examples.

[0051] Figure 1Schematic diagram of the analysis system of the present invention. Figure 1 As shown, the analysis system 100 includes a measuring instrument 110 and a microcontroller circuit 120. The measuring instrument 110 includes a debugging tool 111 and a host 112. The host 112 uses the debugging tool 111 to measure the microcontroller circuit 120 and perform debugging on the microcontroller circuit 120. The present invention does not limit the type of the host 112. In a possible embodiment, the host 112 can be a computer / electronic device such as a personal computer (PC), a tablet or a mobile phone.

[0052] The debugging tool 111 has a debugging interface 113 for coupling to the microcontroller circuit 120. In one embodiment, the debugging interface 113 is a serial wire debug interface (SWD). The debugging tool 111 communicates with the microcontroller circuit 120 through the debugging interface 113. The present invention does not limit the type of the debugging tool 111. In one embodiment, the debugging tool 111 may be a Joint Test Action Group (JTAG) tool or an In-Circuit Emulator (ICE).

[0053] The microcontrol circuit 120 is coupled to the measuring instrument 110. In one possible embodiment, the microcontrol circuit 120 includes a debugging interface 121. The type of the debugging interface 121 is the same as the type of the debugging interface 113. For example, the debugging interface 121 may be a SWD interface. In this embodiment, the microcontrol circuit 120 collects information or the number of times an error occurs. The microcontrol circuit 120 generates and presents a health level through the collected information. In one possible embodiment, when the health level of the microcontrol circuit 120 is not good, the microcontrol circuit 120 may perform an interrupt operation or a reset operation according to the hardware setting, and automatically enter an error analysis mode. In the error analysis mode, the microcontrol circuit 120 analyzes the collected error information. The microcontrol circuit 120 may issue a warning message or perform debugging to further protect the entire analysis system.

[0054] In other embodiments, whenever an error event occurs in the microcontroller 120, the microcontroller 120 notifies the measuring instrument 110 through the debugging interface 121. The measuring instrument 110 may collect error information, or debug the microcontroller 120 according to the error information collected by the microcontroller 120. Therefore, the designer can know the health of the microcontroller 120 and further decide whether to spend time to solve the unexpected error. For example, the user may reset the microcontroller 120 to put the microcontroller 120 in a safe state.

[0055] Figure 2A Schematic diagram of the microcontroller circuit of the present invention. Figure 2A As shown, the microcontroller circuit 200A includes a detection circuit 210, an error counting circuit 220, a comparison circuit 230, and a processing circuit 240. In one possible embodiment, the microcontroller circuit 200A is integrated into a control chip. In this example, the microcontroller circuit 200A may be used as a microcontroller unit (MCU).

[0056] The detection circuit 210 is used to detect whether an error event occurs. When an error event occurs, the detection circuit 210 enables a trigger signal STG. The present invention does not limit the architecture of the detection circuit 210. Any circuit with a detection function can be used as the detection circuit 210. In a possible embodiment, the detection circuit 210 has an output terminal O1. The output terminal O1 is used to output the trigger signal STG.

[0057] The error counting circuit 220 adjusts a count value VAL according to the number of times the detection circuit 210 enables the trigger signal STG. In one possible embodiment, the error counting circuit 220 is coupled to the output terminal O1, and adjusts the count value VAL according to the trigger signal STG. For example, each time the detection circuit 210 enables the trigger signal STG, the error counting circuit 220 increases the count value VAL by 1. The present invention does not limit the architecture of the error counting circuit 220. In one possible embodiment, the error counting circuit 220 has a counter.

[0058] The comparison circuit 230 compares the count value VAL with a threshold value TH. When the count value VAL reaches the threshold value TH, it indicates that the number of error events is large. Therefore, the comparison circuit 230 enables an interrupt signal SIR. In a possible embodiment, when the interrupt signal SIR is set to a high level, it indicates that the comparison circuit 230 enables the interrupt signal SIR. However, when the count value VAL does not reach the threshold value TH, the comparison circuit 230 does not enable the interrupt signal SIR. At this time, the comparison circuit 230 may set the interrupt signal SIR to a low level.

[0059] The present invention does not limit the architecture of the comparison circuit 230. In one possible embodiment, the comparison circuit 230 includes a comparator for determining whether the count value VAL reaches the threshold value TH. In addition, the present invention does not limit the source of the threshold value TH. The threshold value TH may be stored in a register. In one possible embodiment, the processing circuit 240 writes the threshold value TH into the register.

[0060] The processing circuit 240 performs a specified action according to the interrupt signal SIR. For example, when the interrupt signal SIR is enabled, it indicates that the number of error events is too high. Therefore, the processing circuit 240 may perform a specific operation. The present invention does not limit the type of the specific operation. In one possible embodiment, the specific operation sends a warning message to notify the user that the operation of the micro-control circuit 200A is abnormal. The present invention does not limit the type of the warning message. In one possible embodiment, the warning message may be an image screen or a sound.

[0061] In other embodiments, when the number of error events is too high, the specific operation performed by the processing circuit 240 is an interrupt operation or a reset operation. After completing the reset operation, the processing circuit 240 may automatically enter an error analysis mode. In the error analysis mode, the processing circuit 240 may notify an external measuring instrument. Therefore, the external measuring instrument starts to measure the micro-control circuit 200A to protect the operation of the micro-control circuit 200A.

[0062] In other embodiments, the microcontroller circuit 200A further includes a storage circuit 250. The storage circuit 250 records the error information ENM. The processing circuit 240 analyzes the cause of the error event according to the error information ENM recorded by the storage circuit 250. The present invention does not limit the source of the error information ENM. In one possible embodiment, the error information ENM is provided by the detection circuit 210. In one possible embodiment, the detection circuit 210 has an output terminal O2. The output terminal O2 is used to output the error information ENM. The detection circuit 210 sends out error information ENM with different characteristics according to different error events.

[0063] For example, when the detection circuit 210 finds that a pulse width modulation (PWM) circuit is abnormal, the error information ENM issued by the detection circuit 210 has a first code value (such as 0). When the detection circuit 210 finds that a specific current is abnormal, the error information ENM issued by the detection circuit 210 has a second code value (such as 1). When the detection circuit 210 finds that a specific voltage is abnormal, the error information ENM issued by the detection circuit 210 has a third code value (such as 2).

[0064] The present invention does not limit the types of error events. In a possible embodiment, the error event may include a hardware fault, a parity error of the memory, a cyclic redundancy check (CRC) error, an abnormal reset, etc. The detection circuit 210 issues error information ENM with different electrical characteristics for different types of error events.

[0065] The processing circuit 240 can determine the error state of the micro-control circuit 200A according to the error information ENM recorded by the storage circuit 250, and further protect the micro-control circuit 200A. For example, when the interrupt signal SIR is enabled, it means that the number of error events is too high, and the processing circuit 240 enters an error analysis mode. In the error analysis mode, the processing circuit 240 reads the error information ENM recorded by the storage circuit 250 to determine the error state, such as 20 abnormal resets occurred in one day.

[0066] In another possible embodiment, the microcontroller circuit 200A further includes a debugging interface (not shown). In this example, an external measuring instrument may read the error information ENM recorded by the storage circuit 250 through the debugging interface and analyze the error information ENM to determine the error state of the microcontroller circuit 200A.

[0067] In this embodiment, the storage circuit 250 is coupled to the output terminals O1 and O2. Whenever the detection circuit 210 enables the trigger signal STG, the storage circuit 250 records the error information ENM. In some embodiments, the error information ENM may indicate the type of error, such as current abnormality, voltage abnormality. In other embodiments, the error information ENM further includes detailed information, such as current abnormality, and the current value is 3A, the time point when the error occurs, etc.

[0068] The present invention does not limit the architecture of the storage circuit 250. In one possible embodiment, the storage circuit 250 includes a control circuit 251 and a memory 252. The control circuit 251 stores the error information ENM in a storage block of the memory 252. The present invention does not limit the type of the memory 252. In one possible embodiment, the memory 252 may be a non-volatile memory or a volatile memory. In other embodiments, the storage circuit 250 further includes a memory 253. In this case, the control circuit 251 stores the error information ENM in the memory 252 or 253 according to a control signal SOT. In some embodiments, the memory 253 may be a non-volatile memory or a volatile memory.

[0069] In some embodiments, the microcontroller circuit 200A further includes a remap circuit 255. The remap circuit 255 generates a control signal SOT according to the count value VAL. In this example, the control circuit 251 specifies a storage address according to the control signal SOT and records the error information ENM in the memory corresponding to the storage address.

[0070] In other embodiments, the microcontroller circuit 200A further includes an input / output pin 260. The input / output pin 260 is coupled to the output terminal O1 to receive the trigger signal STG. When an error event occurs, the detection circuit 210 enables the trigger signal STG. Therefore, the voltage level of the input / output pin 260 is a specific level, such as a high level. In one possible embodiment, the input / output pin 260 is coupled to a debugging interface (such as Figure 1 121). In this example, when an error event occurs in the microcontroller circuit 200A, a specific pin of the debug interface (coupled to the input / output pin 260) is at a specific level. Therefore, the measuring instrument 110 starts to monitor the operation and setting of the microcontroller circuit 200A to find out the cause of the error event. The present invention does not limit the number of the input / output pins 260. In other embodiments, the detection circuit 210 sets the voltage level of different input / output pins to a specific level according to different error events.

[0071] Figure 2B Schematic diagram of the microcontroller circuit of the present invention. Figure 2B Similar to Figure 2A , the difference is that the micro-control circuit 200B further includes a reset circuit 265. When the reset circuit 265 is triggered, the reset circuit 265 sends a reset signal SRT to reset the error counting circuit 220. When the error counting circuit 220 is reset, the count value VAL is equal to a preset value, such as 0.

[0072] In some embodiments, the microcontroller circuit 200B further includes a power-on reset (POR) circuit 270. The power-on reset circuit 270 is used to detect an operating voltage (not shown). When the operating voltage reaches a target value, the power-on reset circuit 270 triggers the reset circuit 265, so that the reset circuit 265 sends a reset signal SRT. In one possible embodiment, the operating voltage is the operating voltage of the microcontroller circuit 200B.

[0073] In other embodiments, the processing circuit 240 triggers the reset circuit 265 at regular intervals. In this example, the processing circuit 240 triggers the reset circuit 265 according to the counting result of a timer 275. For example, when the count value of the timer 275 reaches a preset value, the processing circuit 240 triggers the reset circuit 265 and resets the timer 275, so that the timer 275 starts counting again. Therefore, the processing circuit 240 can count the number of errors in a regular cycle according to the error information ENM recorded by the storage circuit 250. In another possible embodiment, the processing circuit 240 executes a plurality of program codes stored in a memory (not shown). When the processing circuit 240 executes a specific program code, the processing circuit 240 triggers the reset circuit 265.

[0074] In some embodiments, Figure 2A The storage circuit 250 and one of the input / output pins 260 may be integrated into the microcontroller circuit 200B. In another possible embodiment, Figure 2A The storage circuit 250 and the remapping circuit 255 may be integrated into the micro-control circuit 200B at the same time.

[0075] Figure 2C FIG. 4 is another schematic diagram of the micro-control circuit of the present invention. Figure 2C Similar to Figure 2A , the difference is that, Figure 2C The microcontroller circuit 200C further includes an error flag 280. The error flag 280 is coupled to the comparison circuit 230 to store the interrupt signal SIR. In one possible embodiment, when the count value VAL reaches the threshold value TH, the comparison circuit 230 enables the interrupt signal SIR. At this time, the error flag 280 may store a specific value, such as the value 1. When the count value VAL does not reach the threshold value TH, the comparison circuit 230 does not enable the interrupt signal SIR. At this time, the value of the error flag 280 is not the specific value. The processing circuit 240 acts according to the value of the error flag 280. For example, when the error flag 280 stores a specific value, it indicates that the number of error events is too high. Therefore, the processing circuit 240 performs a specific operation, such as an interrupt or reset operation. When the error flag 280 does not store the specific value, it indicates that the number of error events is small. Therefore, the processing circuit 240 continues the operation being executed.

[0076] In some embodiments, the microcontroller circuit 200C further includes a logic circuit 285. The logic circuit 285 receives setting signals SS1 and SS2, and is coupled between the error flag 280 and the processing circuit 240. When the setting signal SS1 is enabled, it indicates that when the number of error events is too high, the processing circuit 240 needs to perform an interrupt operation. When the setting signal SS1 is not enabled, even if the number of error events is too high, the processing circuit 240 does not need to perform the interrupt operation. In addition, when the setting signal SS2 is enabled, it indicates that when the number of error events is too high, the processing circuit 240 needs to perform a reset operation. When the setting signal SS2 is not enabled, even if the number of error events is too high, the processing circuit 240 does not perform a reset operation.

[0077] In the present embodiment, the logic circuit 285 includes AND gates 286 and 287. The AND gate 286 is coupled to the error flag 280 and receives the setting signal SS1. When the error flag 280 stores a specific value and the setting signal SS1 is enabled, the AND gate 286 enables an interrupt signal SI. Therefore, the processing circuit 240 performs an interrupt operation. When the error flag 280 does not store a specific value or the setting signal SS1 is not enabled, the AND gate 286 does not enable the interrupt signal SI.

[0078] The AND gate 287 is coupled to the error flag 280 and receives the setting signal SS2. When the error flag 280 stores a specific value and the setting signal SS2 is enabled, the AND gate 287 enables a reset signal SR. Therefore, the processing circuit 240 performs a reset operation. When the error flag 280 does not store a specific value or the setting signal SS2 is not enabled, the AND gate 287 does not enable the reset signal SR.

[0079] In some embodiments, the microcontroller circuit 200C further includes an interrupt circuit 290. When the value of the error flag 280 is a specific value, the interrupt circuit 290 uses a safety vector SV as an interrupt vector IV. When the value of the error flag 280 is not a specific value, the interrupt circuit 290 uses a user vector UV as the interrupt vector IV.

[0080] The present invention does not limit the structure of the interrupt circuit 290. In one possible embodiment, the interrupt circuit 290 includes registers 291-293 and a selector 294. The register 291 stores the security vector SV. The register 292 stores the user vector UV. The selector 294 uses the security vector SV or the user vector UV as the interrupt vector IV according to the value of the error flag 280, and stores the interrupt vector IV in the register 293.

[0081] After the processing circuit 240 completes the reset action, it executes the program code corresponding to the interrupt vector IV. In some embodiments, when the selector 294 uses the security vector SV as the interrupt vector IV, after the processing circuit 240 executes the program code corresponding to the interrupt vector IV, the processing circuit 240 enters the error analysis mode to analyze the cause of the error event.

[0082] In other embodiments, Figure 2A The storage circuit 250 and one of the input / output pins 260 may be integrated into the microcontroller circuit 200C. In another possible embodiment, Figure 2A The storage circuit 250 and the remapping circuit 255 may be integrated into the microcontroller circuit 200C at the same time. Figure 2A The reset circuit 265, the power-on reset circuit 270 and the timer 275 may be integrated into the micro-control circuit 200C.

[0083] Figure 3 The control method of the present invention can be implemented in the form of program code. When the program code is loaded and executed by a machine, the machine becomes a micro-control circuit and analysis system for implementing the present invention.

[0084] First, determine whether an error event occurs (step S311). The present invention does not limit the type of error event. In one possible embodiment, the microcontroller circuit has a plurality of detection circuits, each detection circuit detecting the electrical characteristics of a different object. When the electrical characteristics do not meet expectations, it indicates that an error event has occurred. Therefore, the detection circuit may enable a trigger signal. Therefore, by determining whether the trigger signal is enabled, it can be determined whether an error event has occurred.

[0085] When an error event occurs, a count value is adjusted and an error message is generated (step S312). In one possible embodiment, the error message includes a field for recording the type of the error event. In another possible embodiment, the error message includes a plurality of fields, which respectively indicate the type of the error event (e.g., abnormal current, abnormal voltage), the degree of abnormality (e.g., current is 3A, voltage is 1V), the time point when the error event occurs, etc.

[0086] In some embodiments, when an operating voltage reaches a target value, a power-on reset circuit resets the count value so that the count value is equal to an initial value, such as a value of 0. In another possible embodiment, the microcontroller circuit resets the count value every fixed period. In other embodiments, the microcontroller circuit resets the count value when it executes a reset program code.

[0087] The error information is recorded in a storage circuit (step S313). In one possible embodiment, all error information is sequentially stored in the same memory. In another possible embodiment, different types of error information may be stored in different memories. For example, more important error information may be stored in a non-volatile memory, while less important error information may be stored in a volatile memory.

[0088] Determine whether the count value reaches a critical value (step S314). When the count value reaches a critical value, it indicates that the number of errors is too high. Therefore, command a processing circuit to perform a reset operation (step S315). In a possible embodiment, after the processing circuit completes the reset operation, the processing circuit enters an error analysis mode. In the error analysis mode, the processing circuit analyzes the error information recorded in step S313.

[0089] In other embodiments, the error information recorded in step S313 may be provided to a measuring instrument. In this example, whenever an error event occurs, a measuring instrument is notified and the error information is provided to the measuring instrument. The measuring instrument analyzes the error information and provides an analysis report. Therefore, an external user can know the problem according to the analysis report.

[0090] It should be understood that when an element or layer is referred to as being "coupled" to another element or layer, it may be directly coupled or connected to the other element or layer, or have other elements or layers intervening therebetween. Conversely, if an element or layer is "connected" to another element or layer, there will be no other elements or layers intervening therebetween. In addition, "enable" shall mean changing the state of a Boolean signal. Boolean signals can be enabled to be high or have a higher voltage, and Boolean signals can be enabled to be low or have a lower voltage at the discretion of the circuit designer. Similarly, "disable" shall mean changing the state of a Boolean signal to a voltage level opposite to the enabled state.

[0091] The control method of the present invention, or a specific form or part thereof, may exist in the form of program code. The program code may be stored in a physical medium, such as a floppy disk, an optical disk, a hard disk, or any other machine-readable (such as computer-readable) storage medium, or a computer program product not limited to an external form, wherein when the program code is loaded and executed by a machine, such as a computer, the machine becomes used to participate in the micro-control circuit and analysis system of the present invention. The program code may also be transmitted through some transmission media, such as wires or cables, optical fibers, or any transmission mode, wherein when the program code is received, loaded and executed by a machine, such as a computer, the machine becomes used to participate in the micro-control circuit and analysis system of the present invention. When implemented in a general-purpose processing unit, the program code combines with the processing unit to provide a unique device that operates similarly to an application-specific logic circuit.

[0092] Unless otherwise defined, all words (including technical and scientific words) herein are generally understood by those skilled in the art to which the present invention belongs. In addition, unless expressly indicated, the definitions of words in general dictionaries should be interpreted as consistent with the meanings in articles in the relevant technical field, and should not be interpreted as ideal or overly formal. Although the terms "first", "second", etc. can be used to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element.

[0093] Although the present invention has been disclosed as above with preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. For example, the system, device or method described in the embodiments of the present invention may be implemented in a physical embodiment of hardware, software or a combination of hardware and software. Therefore, the scope of protection of the present invention shall be subject to the claims.

Claims

1. A microcontroller circuit, characterized in that: include: a detection circuit, which enables a trigger signal and outputs an error message when an error event occurs; a storage circuit for recording the error information; an error counting circuit, adjusting a count value according to the number of times the detection circuit enables the trigger signal; a comparison circuit, which enables an interrupt signal when the count value reaches a critical value; and A processing circuit executes a specified action according to the interrupt signal.

2. The microcontroller circuit according to claim 1, characterized in that: The designated action is a reset action.

3. The microcontroller circuit according to claim 2, wherein: After the processing circuit completes the resetting action, the processing circuit enters an error analysis mode to analyze the error information recorded by the storage circuit.

4. The microcontroller circuit according to claim 2, characterized in that: Also includes: an error flag coupled to the comparison circuit, in: When the count value reaches the critical value, the comparison circuit sets the value of the error flag to a specific value. When the value of the error flag is the specific value, the processing circuit executes the designated action.

5. The microcontroller circuit according to claim 1, wherein: Also includes: a remapping circuit, generating a control signal according to the count value, The storage circuit stores the error information according to the control signal.

6. An analysis system, characterized in that include: A measuring instrument having a debugging tool; as well as A microcontroller circuit is coupled to the measuring instrument and includes: A detection circuit having a first output terminal and a second output terminal, when an error event occurs, outputs a trigger signal through the first output terminal, and outputs an error message through the second output terminal; A debugging interface coupled between the first output terminal and the measuring instrument; a storage circuit coupled to the first and second output terminals and recording the error information; an error counting circuit, coupled to the first output terminal, and adjusting a counting value according to the trigger signal; a comparison circuit, which enables an interrupt signal when the count value reaches a critical value; and A processing circuit performs a reset operation according to the interrupt signal.

7. The analysis system according to claim 6, characterized in that When the detection circuit enables the trigger signal, the measuring instrument reads the error information recorded by the storage circuit.

8. The analysis system according to claim 6, characterized in that The microcontroller circuit further comprises: an interrupt circuit, providing an interrupt vector according to the interrupt signal, After the processing circuit completes the reset operation, the program code corresponding to the interrupt vector is executed.

9. The analysis system according to claim 6, characterized in that The microcontroller circuit further comprises: A reset circuit is used to reset the count value.

10. A control method, characterized in that: Suitable for a microcontroller circuit, and comprising: Determine whether an error event occurs; When an error event occurs, a count value is adjusted and an error message is generated; Recording the error information in a storage circuit; When the count value reaches a critical value, instructing a processing circuit to perform a reset operation; and After the processing circuit completes the reset operation, the error information is provided to the processing circuit.

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