Signal processing circuit, electronic equipment and communication system

Abstract

The utility model provides a signal processing circuit, electronic equipment and a communication system, and relates to the technical field of communication. The signal processing circuit comprises a differential conversion module, a synthesis module and a decoding module, the differential conversion module is connected with the synthesis module, and the synthesis module is further connected with the decoding module through a pair of differential signal lines. The differential conversion module is used for respectively converting the plurality of original signals into a plurality of original differential signal pairs and sending the original differential signal pairs to the synthesis module; wherein the amplitudes of the original differential signal pairs are the same. The synthesis module is used for converting the plurality of original differential signal pairs into a plurality of differential signal pairs with different amplitudes, and synthesizing the plurality of differential signal pairs into a composite differential signal pair. And the decoding module is used for decoding one composite differential signal pair into a plurality of original signals and sending the original signals to a signal receiving end. According to the signal processing circuit, the electronic equipment and the communication system, the number of signal lines can be reduced, and the cost is reduced.

Description

Technical Field

[0001] The present application relates to the field of communication technology, and in particular to a signal processing circuit, an electronic device and a communication system. Background Art

[0002] In signal or data transmission, facing the interference conditions of complex electromagnetic environments, differential signal line pairs have been widely used because they can effectively avoid interference when transmitting data and ensure signal and data quality.

[0003] However, since one signal of a differential signal line pair needs to use two lines in pair to form a differential line, the number of communication lines is multiplied, thereby increasing the cost.

[0004] In summary, how to reduce the number of signal lines and lower communication costs is a technical problem that needs to be urgently solved by those skilled in the art. Utility Model Content

[0005] The purpose of the present application is to provide a signal processing circuit, an electronic device and a communication system to solve the technical problem of how to reduce the number of signal lines and reduce the communication cost in the prior art.

[0006] In order to achieve the above purpose, the technical solution adopted in the embodiment of the present application is as follows:

[0007] In a first aspect, an embodiment of the present application provides a signal processing circuit, which includes: a differential conversion module, a synthesis module and a decoding module, wherein the differential conversion module is connected to the synthesis module, and the synthesis module is also connected to the decoding module via a pair of differential signal lines.

[0008] The differential conversion module is used to receive multiple original signals sent by the signal sending end, convert the multiple original signals into multiple original differential signal pairs respectively, and send them to the synthesis module; wherein the amplitude of each original differential signal pair is the same.

[0009] The synthesis module is used to convert the received multiple original differential signal pairs into multiple differential signal pairs with different amplitudes, synthesize the multiple differential signal pairs into a composite differential signal pair, and send it to the decoding module.

[0010] The decoding module is used to decode a received composite differential signal pair into multiple original signals and send the original signals to a signal receiving end.

[0011] Further, each original differential signal pair includes a positive original differential signal and a negative original differential signal, and each differential signal pair includes a positive differential signal and a negative differential signal.

[0012] Furthermore, the synthesis module includes a conversion unit, a first synthesis unit and a second synthesis unit, the input end of the conversion unit is connected to the output end of the differential conversion module, and the output end of the conversion unit is respectively connected to the input ends of the first synthesis unit and the second synthesis unit.

[0013] The conversion unit is used to convert multiple original differential signal pairs into multiple differential signal pairs with different amplitudes; the first synthesis unit is used to synthesize multiple positive differential signals into a positive composite differential signal, and the second synthesis unit is used to synthesize multiple negative differential signals into a negative composite differential signal; wherein a positive composite differential signal and a negative composite differential signal constitute a composite differential signal pair.

[0014] Furthermore, the differential conversion module includes multiple input terminals and multiple output terminals, and the number of output terminals of the differential conversion module is twice the number of input terminals; wherein the multiple input terminals are used to receive multiple original signals sent by the signal sending terminal, and the multiple output terminals are used to output multiple positive original differential signals and multiple negative original differential signals.

[0015] Further, the conversion unit includes a plurality of input terminals and a plurality of output terminals, the first synthesis unit includes a plurality of input terminals and one output terminal, and the second synthesis unit includes a plurality of input terminals and one output terminal.

[0016] Among them, the number of input terminals of the conversion unit and the number of output terminals of the conversion unit are the same as the number of output terminals of the differential conversion module, and the number of input terminals of the first synthesis unit and the number of input terminals of the second synthesis unit are both half of the number of output terminals of the conversion unit.

[0017] Furthermore, the decoding module includes two input terminals and multiple output terminals, and the number of the output terminals of the decoding module is the same as the number of the input terminals of the differential conversion module.

[0018] Furthermore, the conversion to differential module includes a plurality of conversion to differential units, each of which is used to convert an original signal into an original differential signal pair and send the original differential signal pair to the synthesis module.

[0019] Furthermore, the amplitude values ​​of the plurality of differential signal pairs are a geometric progression.

[0020] In a second aspect, an embodiment of the present application provides an electronic device, comprising a signal processing circuit as described in any one of the aforementioned embodiments.

[0021] In a third aspect, an embodiment of the present application provides a communication system, which includes a signal processing circuit as described in any one of the aforementioned embodiments.

[0022] Compared with the prior art, this application has the following beneficial effects:

[0023] The present application provides a signal processing circuit, an electronic device and a communication system, wherein the signal processing circuit includes: a differential conversion module, a synthesis module and a decoding module. The differential conversion module is connected to the synthesis module, and the synthesis module is also connected to the decoding module through a pair of differential signal lines. The differential conversion module is used to convert multiple original signals into multiple original differential signal pairs respectively, and send them to the synthesis module; wherein the amplitude of each original differential signal pair is the same. The synthesis module is used to convert multiple original differential signal pairs into multiple differential signal pairs with different amplitudes, and synthesize the multiple differential signal pairs into a composite differential signal pair. The decoding module is used to decode a composite differential signal pair into multiple original signals, and send them to a signal receiving end.

[0024] By converting multiple original signals into multiple original differential signal pairs through the differential conversion module, and then converting multiple original differential signal pairs into multiple differential signal pairs with different amplitudes through the synthesis module, and synthesizing a composite differential signal pair, multiple original signals can be transmitted in real time through a pair of differential signal lines. This avoids the complex protocol processing and real-time delay of time-division multiplexing, reduces the number of signal lines, and reduces costs.

[0025] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians of the art without making creative work are within the scope of protection of the present application.

[0027] Figure 1 It is a structural schematic diagram of a signal processing circuit in the prior art;

[0028] Figure 2 A schematic diagram of the structure of a signal processing circuit provided in an embodiment of the present application;

[0029] Figure 3 One of the structural schematic diagrams of another signal processing circuit provided in an embodiment of the present application;

[0030] Figure 4 A second structural diagram of another signal processing circuit provided in an embodiment of the present application;

[0031] Figure 5 A signal level diagram of a composite differential signal pair synthesized from two original signals provided in an embodiment of the present application.

[0032] Icon: 10-signal processing circuit; 110-differential conversion module; 111-first differential conversion unit; 112-second differential conversion unit; 120-synthesis module; 121-conversion unit; 122-first synthesis unit; 123-second synthesis unit; 130-decoding module; 210-signal sending end; 220-signal receiving end. DETAILED DESCRIPTION

[0033] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, rather than all the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations.

[0034] The technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0035] It should be noted that similar numbers and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in the subsequent figures. At the same time, in the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, and it can be the internal connection of two elements. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0036] The signal processing circuit in the prior art is as follows Figure 1 As shown, the two original signals a and b sent by the signal transmitting end are converted by the differential conversion module. The first original signal a is converted into a differential signal pair (i.e., a+ and a-), and the second original signal b is also converted into a differential signal pair (i.e., b+ and b-). The two differential signal pairs are transmitted to the decoding module through two pairs of differential signal lines. The decoding module then restores the two differential signal pairs to the original two original signals a and b, and transmits them to the signal receiving end.

[0037] It can be seen that in the current differential communication, one original signal requires a pair of differential signal lines, that is, two signal lines for transmission. Two original signals require two pairs of differential signal lines, that is, four signal lines for transmission. In other words, the number of signal lines is twice the number of original signals. Therefore, in the differential transmission of multiple original signals, there are problems such as complex wiring, large number of signal lines, and high cost.

[0038] In summary, how to reduce the number of signal lines and lower communication costs is a technical problem that needs to be urgently solved by those skilled in the art.

[0039] In conjunction with the accompanying drawings, some embodiments of the present application are described in detail below. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0040] See also Figure 2 , Figure 2 The structure diagram of a signal processing circuit 10 provided in an embodiment of the present application is shown. The signal processing circuit 10 includes a differential conversion module 110, a synthesis module 120 and a decoding module 130. The differential conversion module 110 is connected to the synthesis module 120, and the synthesis module 120 is also connected to the decoding module 130 through a pair of differential signal lines.

[0041] Specifically, the differential conversion module 110 is used to receive multiple original signals (i.e., A, B, ..., N) sent by the signal transmitting end 210, convert the multiple original signals into multiple original differential signal pairs (i.e., A+ and A-, B+ and B-, ..., N+ and N-), and send them to the synthesis module 120. The amplitude of each original differential signal pair is the same.

[0042] The synthesis module 120 is used to convert the received multiple original differential signal pairs with the same amplitude into multiple differential signal pairs with different amplitudes, and then synthesize the multiple differential signal pairs into a composite differential signal pair (ie, SO+ and SO-), and send it to the decoding module 130.

[0043] The decoding module 130 is used to decode a received composite differential signal pair into multiple original signals and send the original signals to the signal receiving end 220 .

[0044] Based on the above design, multiple original signals are converted into multiple original differential signal pairs respectively through the differential conversion module 110, and then the multiple original differential signal pairs are converted into multiple differential signal pairs with different amplitudes through the synthesis module 120, and a composite differential signal pair SO± is synthesized. In this way, multiple original signals can be transmitted simultaneously through a pair of differential signal lines, thereby reducing the number of signal lines and reducing costs.

[0045] It should be noted that the number of the multiple original signals sent by the signal transmitting end 210 can be two, three, four or even more. Moreover, the multiple original signals can be periodic signals or non-periodic signals. The present application does not impose any specific restrictions on the number and type of the original signals.

[0046] In order to better understand the technical solution of the embodiment of the present application, the following will be explained by taking the signal sending end 210 sending two periodic original signals as an example.

[0047] See also Figure 3 , Figure 3 Schematic diagram of the structure of another signal processing circuit 10 provided in an embodiment of the present application. As an optional implementation, the synthesis module 120 includes a conversion unit 121, a first synthesis unit 122 and a second synthesis unit 123. The input end of the conversion unit 121 is connected to the output end of the differential conversion module 110, and the output end of the conversion unit 121 is connected to the input end of the first synthesis unit 122 and the second synthesis unit 123 respectively.

[0048] The conversion unit 121 is used to convert multiple original differential signal pairs into multiple differential signal pairs with different amplitudes, wherein each original differential signal pair includes a positive original differential signal and a negative original differential signal, and each differential signal pair includes a positive differential signal and a negative differential signal.

[0049] The first synthesis unit 122 is used to synthesize multiple positive differential signals into a positive composite differential signal SO+, and the second synthesis unit 123 is used to synthesize multiple negative differential signals into a negative composite differential signal SO-. The positive composite differential signal SO+ and the negative composite differential signal SO- form a composite differential signal pair SO±.

[0050] The differential conversion module 110 includes multiple input terminals and multiple output terminals, and the number of output terminals of the differential conversion module 110 is twice the number of input terminals. The multiple input terminals are used to receive multiple original signals sent by the signal sending terminal 210, and the multiple output terminals are used to output multiple positive original differential signals and multiple negative original differential signals.

[0051] Accordingly, the conversion unit 121 includes multiple input terminals and multiple output terminals, the first synthesis unit 122 includes multiple input terminals and one output terminal, and the second synthesis unit 123 includes multiple input terminals and one output terminal. The number of input terminals and the number of output terminals of the conversion unit 121 are the same as the number of output terminals of the differential conversion module 110, and the number of input terminals of the first synthesis unit 122 and the number of input terminals of the second synthesis unit 123 are both half of the number of output terminals of the conversion unit 121.

[0052] The decoding module 130 includes two input terminals and multiple output terminals. The number of the output terminals of the decoding module 130 is the same as the number of the input terminals of the differential conversion module 110 .

[0053] For example, when the signal sending end 210 sends two original signals, namely, a first original signal A and a second original signal B, to the differential conversion module 110, the differential conversion module 110 includes two input ends and four output ends, the conversion unit 121 includes four input ends and four output ends, the first synthesis unit 122 includes two input ends and one output end, the second synthesis unit 123 includes two input ends and one output end, and the decoding module 130 includes two input ends and two output ends.

[0054] The differential conversion module 110 converts the received first original signal A and second original signal B into a first original differential signal pair A± and a second original differential signal pair B±, respectively. Moreover, the first original differential signal pair A± and the second original differential signal pair B± have the same amplitude and different phases.

[0055] The first original differential signal pair A± includes a first positive original differential signal A+ and a first negative original differential signal A- with the same amplitude and opposite phases. The second original differential signal pair B± includes a second positive original differential signal B+ and a second negative original differential signal B- with the same amplitude and opposite phases.

[0056] The conversion unit 121 converts the received first original differential signal pair A± and second original differential signal pair B± into a first differential signal pair SA± and a second differential signal pair SB±, respectively. The first differential signal pair SA± and the second differential signal pair SB± have different amplitudes and phases.

[0057] The first differential signal pair SA± includes a first positive differential signal SA+ and a first negative differential signal SA- with the same amplitude and opposite phases. The second differential signal pair SB± includes a second positive differential signal SB+ and a second negative differential signal SB- with the same amplitude and opposite phases.

[0058] The first synthesis unit 122 synthesizes the received first positive differential signal SA+ and the second positive differential signal SB+ into a positive composite differential signal SO+. The second synthesis unit 123 synthesizes the received first negative differential signal SA- and the second negative differential signal SB- into a negative composite differential signal SO-. The positive composite differential signal SO+ and the negative composite differential signal SO- form a composite differential signal pair SO±, which is transmitted to the decoding module 130 through a pair of differential signal lines.

[0059] The decoding module 130 decodes a received composite differential signal pair SO± into a first original signal A and a second original signal B, and sends the signals to the signal receiving end 220 .

[0060] To more clearly explain the working principle of the signal processing circuit 10, please refer to Figure 4 As an optional implementation, the differential conversion module 110 includes a plurality of differential conversion units, each of which is used to convert an original signal into an original differential signal pair and send the original differential signal pair to the synthesis module 120.

[0061] Specifically, when the signal transmitting end 210 sends two original signals, namely, the first original signal A and the second original signal B, to the differential conversion module 110, the differential conversion module 110 includes two differential conversion units, namely, the first differential conversion unit 111 and the second differential conversion unit 112. The first differential conversion unit 111 and the second differential conversion unit 112 each include an input end and two output ends.

[0062] The first differential conversion unit 111 is used to convert the received first original signal A into a first original differential signal pair A±. The second differential conversion unit 112 is used to convert the received second original signal B into a second original differential signal pair B±.

[0063] In order to ensure that the conversion unit 121 can convert the first original differential signal pair A± and the second original differential signal pair B± with the same amplitude into the first differential signal pair SA± and the second differential signal pair SB± with different amplitudes, as an optional implementation, the conversion unit 121 includes a first resistor R1, a second resistor R2, a third resistor R3 and a fourth resistor R4. The two output ends of the first differential conversion unit 111 are respectively connected to the first resistor R1 and the second resistor R2, and the two output ends of the second differential conversion unit 112 are respectively connected to the third resistor R3 and the fourth resistor R4.

[0064] The first positive original differential signal A+ is converted into a first positive differential signal SA+ through the first resistor R1, and the first negative original differential signal A- is converted into a first negative differential signal SA- through the second resistor R2. The first positive differential signal SA+ and the first negative differential signal SA- have the same amplitude and opposite phase. The first positive differential signal SA+ and the first negative differential signal SA- form a first differential signal pair SA±.

[0065] The second positive original differential signal B+ is converted into a second positive differential signal SB+ through the third resistor R3, and the second negative original differential signal B- is converted into a second negative differential signal SB- through the fourth resistor R4. The second positive differential signal SB+ and the second negative differential signal SB- have the same amplitude and opposite phases. The second positive differential signal SB+ and the second negative differential signal SB- form a second differential signal pair SB±.

[0066] Furthermore, the first differential signal pair SA± and the second differential signal pair SB± have different amplitudes and different phases.

[0067] In order to facilitate the subsequent decoding module 130 to more easily decode the composite differential signal pair SO±, as an optional implementation, the amplitude values ​​of the plurality of differential signal pairs are a geometric progression, and the present application does not impose any specific limitation on the common ratio.

[0068] The inventors have found that when the common ratio is 0.5 or 2, the decoding module can more easily decode the composite differential signal pair SO±. For example, when the amplitude of the first differential signal pair SA± is 10, the amplitude of the second differential signal pair SB± can be 5 or 20.

[0069] In the embodiment of the present application, the amplitude of the second differential signal pair SB± is half of the amplitude of the first differential signal pair SA±. Accordingly, the first resistor R1 and the second resistor R2 in the conversion unit 121 have the same resistance value, and the third resistor R3 and the fourth resistor R4 have the same resistance value. In addition, the resistance value of the first resistor R1 and the second resistor R2 is half of the resistance value of the third resistor R3 and the fourth resistor R4.

[0070] Of course, if the signal transmitting end 210 also transmits a third original signal, the amplitude of the third differential signal pair obtained after conversion by the conversion unit 121 is half the amplitude of the second differential signal pair SB±.

[0071] It should be noted that the specific structure of the conversion unit 121 includes but is not limited to a resistor structure, and may also be other structures, and the present application does not impose any specific limitation on this.

[0072] See also Figure 5 , Figure 5The signal level diagram of the synthesis of two differential signal pairs is shown. The signal transmitting end 210 transmits a first original signal A and a second original signal B, wherein the first original signal A and the second original signal B have the same amplitude and different phases.

[0073] The first differential conversion unit 111 converts the received first original signal A into a first original differential signal pair A±, wherein the first original differential signal pair A± includes a first positive original differential signal A+ and a first negative original differential signal A- with the same amplitude and opposite phases. The second differential conversion unit 112 converts the received second original signal B into a second original differential signal pair B±, wherein the second original differential signal pair B± includes a second positive original differential signal B+ and a second negative original differential signal B- with the same amplitude and opposite phases. In addition, the first original differential signal pair A± and the second original differential signal pair B± have the same amplitude and different phases.

[0074] The conversion unit 121 converts the received first original differential signal pair A± and second original differential signal pair B± into a first differential signal pair SA± and a second differential signal pair SB±, respectively, wherein the amplitude of the second differential signal pair SB± is half of the amplitude of the first differential signal pair SA±.

[0075] The first positive differential signal SA+ and the second positive differential signal SB+ are synthesized into a positive composite differential signal SO+ by the first synthesizing unit 122, and the first negative differential signal SA- and the second negative differential signal SB- are synthesized into a negative composite differential signal SO- by the second synthesizing unit 123. The positive composite differential signal SO+ and the negative composite differential signal SO- are combined into a composite differential signal pair SO±.

[0076] It can be seen that the positive composite differential signal SO+ and the negative composite differential signal SO- have the same amplitude and opposite phase, and each includes four voltage signals. Finally, the first original signal A and the second original signal B can be restored by the decoding module 130.

[0077] Furthermore, an embodiment of the present application also provides an electronic device, which includes the signal processing circuit 10 as described in any of the above-mentioned implementation modes.

[0078] Furthermore, an embodiment of the present application also provides a communication system, which includes the signal processing circuit 10 as described in any of the aforementioned implementations.

[0079] In summary, the present application provides a signal processing circuit, an electronic device, and a communication system. By converting a plurality of original signals into a plurality of original differential signal pairs through a differential conversion module, and then converting the plurality of original differential signal pairs into a plurality of differential signal pairs with different amplitudes through a synthesis module, and synthesizing a composite differential signal pair, a plurality of original signals can be transmitted in real time through a pair of differential signal lines. The complex protocol processing and real-time delay of time-division multiplexing are avoided, the number of signal lines is reduced, and the cost is reduced.

[0080] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0081] It will be apparent to those skilled in the art that the present application is not limited to the details of the exemplary embodiments described above, and that the present application can be implemented in other specific forms without departing from the spirit or essential features of the present application. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the present application is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims be included in the present application. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A signal processing circuit, characterized in that: The signal processing circuit includes: a differential conversion module, a synthesis module and a decoding module, wherein the differential conversion module is connected to the synthesis module, and the synthesis module is also connected to the decoding module through a pair of differential signal lines; The differential conversion module is used to receive multiple original signals sent by the signal sending end, convert the multiple original signals into multiple original differential signal pairs respectively, and send them to the synthesis module; wherein the amplitude of each original differential signal pair is the same; The synthesis module is used to convert the received multiple original differential signal pairs into multiple differential signal pairs with different amplitudes, synthesize the multiple differential signal pairs into a composite differential signal pair, and send it to the decoding module; The decoding module is used to decode a received composite differential signal pair into multiple original signals and send the original signals to a signal receiving end.

2. The signal processing circuit according to claim 1, characterized in that: Each original differential signal pair includes a positive original differential signal and a negative original differential signal, and each differential signal pair includes a positive differential signal and a negative differential signal.

3. The signal processing circuit according to claim 2, characterized in that: The synthesis module comprises a conversion unit, a first synthesis unit and a second synthesis unit, the input end of the conversion unit is connected to the output end of the differential conversion module, and the output end of the conversion unit is connected to the input end of the first synthesis unit and the input end of the second synthesis unit respectively; The conversion unit is used to convert a plurality of original differential signal pairs into a plurality of differential signal pairs with different amplitudes; The first synthesis unit is used to synthesize multiple positive differential signals into a positive composite differential signal, and the second synthesis unit is used to synthesize multiple negative differential signals into a negative composite differential signal; wherein a positive composite differential signal and a negative composite differential signal constitute a composite differential signal pair.

4. The signal processing circuit according to claim 3, characterized in that: The differential conversion module includes multiple input terminals and multiple output terminals, and the number of output terminals of the differential conversion module is twice the number of input terminals; wherein the multiple input terminals are used to receive multiple original signals sent by the signal sending terminal, and the multiple output terminals are used to output multiple positive original differential signals and multiple negative original differential signals.

5. The signal processing circuit according to claim 4, characterized in that: The conversion unit includes a plurality of input terminals and a plurality of output terminals, the first synthesis unit includes a plurality of input terminals and an output terminal, and the second synthesis unit includes a plurality of input terminals and an output terminal; Among them, the number of input terminals of the conversion unit and the number of output terminals of the conversion unit are the same as the number of output terminals of the differential conversion module, and the number of input terminals of the first synthesis unit and the number of input terminals of the second synthesis unit are both half of the number of output terminals of the conversion unit.

6. The signal processing circuit according to claim 4, characterized in that: The decoding module includes two input terminals and multiple output terminals, and the number of the output terminals of the decoding module is the same as the number of the input terminals of the differential conversion module.

7. The signal processing circuit according to claim 1, characterized in that: The conversion-to-differential module includes a plurality of conversion-to-differential units, each of which is used to convert an original signal into an original differential signal pair and send the original differential signal pair to the synthesis module.

8. The signal processing circuit according to claim 1, characterized in that: The amplitude values ​​of the plurality of differential signal pairs are a geometric progression.

9. An electronic device, characterized in that: The electronic device comprises the signal processing circuit according to any one of claims 1 to 8.

10. A communication system, characterized in that: The communication system comprises the signal processing circuit according to any one of claims 1 to 8.

Images