Quick-response linear voltage regulator

Abstract

The invention relates to the technical field of low-dropout linear voltage regulators, in particular to a fast-response linear voltage regulator which comprises a biasing circuit, a large-bandwidth source follower, a reference circuit, an operational amplifier circuit, a voltage-regulator tube D1, a capacitor C2 and a load resistor RLoad. One end of the load resistor RLoad is used as the output end of the linear voltage regulator; the output end of the biasing circuit and the cathode of the voltage-regulator tube D1 are electrically connected with the input end of the large-bandwidth source follower, the output end of the large-bandwidth source follower is electrically connected with the input end of the reference circuit, and the output end of the reference circuit is electrically connected with the input end of the operational amplifier circuit. The output end of the operational amplifier circuit and one end of the capacitor C2 are electrically connected with one end of the load resistor RLoad; the anode of the voltage-regulator tube D1, the other end of the capacitor C2 and the other end of the load resistor RLoad are grounded; therefore, the problem that the response speed of an existing linear voltage regulator is too low due to the fact that the bandwidth of an integrated source follower is limited is solved.

Description

Technical Field

[0001] The invention relates to the technical field of low voltage difference linear regulators, in particular to a fast response linear regulator. Background Art

[0002] In application scenarios that require high precision and stability, such as communication systems and industrial control equipment, the fast response speed of the linear regulator is particularly important; it can quickly respond to changes in input voltage and load, and quickly adjust the output voltage so that the system always operates within a stable voltage range, which helps to reduce system instability caused by voltage fluctuations or sudden load changes, such as voltage overshoot, undervoltage, etc., thereby improving the overall stability of the system.

[0003] However, the source follower commonly used in linear regulators is Figure 1 As shown in the figure, a linear regulator can be constructed by building a simple peripheral circuit. Since this source follower has high input impedance and low output impedance, small bandwidth, and long linear settling time, it is suitable for acting as a voltage buffer. Therefore, when the input voltage of the linear regulator undergoes a rapid large jump, the output voltage is limited by the bandwidth of the source follower, and the conversion rate is limited, resulting in the linear regulator's response speed being too slow. Summary of the invention

[0004] In view of the above defects, the purpose of the present invention is to provide a fast-response linear regulator, which solves the problem that the current linear regulator has a slow response speed due to the limited bandwidth of the integrated source follower.

[0005] To achieve this object, the present invention adopts the following technical solutions:

[0006] A fast-response linear regulator comprises a bias circuit, a wide-bandwidth source follower, a reference circuit, an operational amplifier circuit, a voltage regulator D1, a capacitor C2 and a load resistor RLoad; one end of the load resistor RLoad is used as an output end of the linear regulator;

[0007] The output end of the bias circuit and the cathode of the voltage regulator D1 are electrically connected to the input end of the wide-bandwidth source follower, the output end of the wide-bandwidth source follower is electrically connected to the input end of the reference circuit, the output end of the reference circuit is electrically connected to the input end of the operational amplifier circuit, the output end of the operational amplifier circuit and one end of the capacitor C2 are electrically connected to one end of the load resistor RLoad, and the anode of the voltage regulator D1, the other end of the capacitor C2 and the other end of the load resistor RLoad are grounded.

[0008] Furthermore, the high-bandwidth source follower includes a MOS tube M1, a capacitor CL, a current mirror circuit and a bias constant current source; the gate of the MOS tube M1 is used as the input end of the high-bandwidth source follower, and the source of the MOS tube M1 is used as the output end of the high-bandwidth source follower;

[0009] The control end of the current mirror circuit is electrically connected to the output end of the bias constant current source, the first end of the current mirror circuit is electrically connected to the drain of the MOS tube M1, the second end of the current mirror circuit and one end of the capacitor CL are both electrically connected to the source of the MOS tube M1, and the other end of the capacitor CL is grounded.

[0010] Further, the current mirror circuit includes MOS tube M2, MOS tube M3, MOS tube M4, MOS tube M5, MOS tube M6 and MOS tube M7; the drain of the MOS tube M4 is used as the control end of the current mirror circuit, the drain of the MOS tube M3 is used as the first end of the current mirror circuit, and the drain of the MOS tube M2 is used as the second end of the current mirror circuit;

[0011] The drain and gate of the MOS tube M3 are electrically connected to the gate of the MOS tube M4, the drain and gate of the MOS tube M5 are electrically connected to the drain of the MOS tube M4, the drain and gate of the MOS tube M7 are electrically connected to the drain of the MOS tube M6, the gate of the MOS tube M7 is electrically connected to the gate of the MOS tube M2, the source of the MOS tube M3, the source of the MOS tube M4, the source of the MOS tube M5 and the source of the MOS tube M6 are all connected to the VDD power supply, and the source of the MOS tube M2 and the source of the MOS tube M7 are both grounded.

[0012] Furthermore, the bandwidth of the large bandwidth source follower is: Wherein, CL is the capacitance value of the capacitor CL, gm1 is the transconductance of the MOS tube M1, gm2 is the transconductance of the MOS tube M2, gm3 is the transconductance of the MOS tube M3, gm4 is the transconductance of the MOS tube M4, gm5 is the transconductance of the MOS tube M5, gm6 is the transconductance of the MOS tube M6, and gm7 is the transconductance of the MOS tube M7.

[0013] Furthermore, the operational amplifier circuit includes a MOS tube M10, a resistor R4, a resistor R2 and an operational amplifier A1; the negative input terminal of the operational amplifier A1 is used as the input terminal of the operational amplifier circuit, and the drain of the MOS tube M10 is used as the output terminal of the operational amplifier circuit;

[0014] The source of the MOS tube M10 is connected to the VDD power supply, the gate of the MOS tube M10 is electrically connected to the output end of the operational amplifier A1, the source of the MOS tube M10 is electrically connected to one end of the resistor R4, the other end of the resistor R4 and the positive input end of the operational amplifier A1 are electrically connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

[0015] Furthermore, the reference circuit is a bandgap reference circuit.

[0016] Furthermore, the bias constant current source includes a current source A2, a MOS tube M8 and a MOS tube M9; the drain of the MOS tube M8 is used as the output end of the bias constant current source;

[0017] The drain and gate of the MOS tube M8 are electrically connected to the gate of the MOS tube M9, the source of the MOS tube M8 and the source of the MOS tube M9 are grounded, and the drain of the MOS tube M9 is electrically connected to the output end of the current source A2.

[0018] Furthermore, the MOS tube M1 and the MOS tube M10 are both high-voltage LDMOS tubes.

[0019] Furthermore, the voltage regulator tube D1 is a Zener voltage regulator diode.

[0020] The technical solution provided by the present invention may include the following beneficial effects: a startup circuit composed of a bias circuit and a voltage regulator tube D1 generates a stable bias voltage, and after being buffered and isolated by a large-bandwidth source follower, the bias voltage is provided to the reference circuit, so that it works at the required static working point, and the reference circuit may not enter a zero bias current state, that is, the working current in the circuit is zero and cannot work normally; the reference circuit 3 then generates a reference voltage and provides it to the operational amplifier circuit, and the operational amplifier circuit uses this to achieve voltage linear adjustment; and because a large-bandwidth source follower is used, the time for the operational amplifier circuit to establish linearity is greatly shortened, so that the time for the operational amplifier circuit to respond to the output voltage is greatly shortened, and the final output voltage is filtered by the capacitor C2, and the load resistor RLoad absorbs excess power to maintain the stability of the voltage, and then the desired stable voltage is obtained. In summary, by taking measures to improve the stability of the input voltage and the output voltage, and cooperating with the large-bandwidth characteristics of the large-bandwidth source follower, the linear establishment time is shortened, so that the linear voltage regulator can maintain the stability of the output voltage while accelerating the response speed of the output voltage. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is the circuit diagram of the current source follower.

[0022] Figure 2 The schematic diagram of a fast-response linear regulator according to one embodiment of the present invention is shown in FIG.

[0023] Figure 3 Yes Figure 2 The circuit diagram of a high bandwidth source follower is shown.

[0024] Among them: bias circuit 1, high-bandwidth source follower 2, reference circuit 3, operational amplifier circuit 4, voltage regulator D1, capacitor C2, load resistor RLoad, MOS tube M1, capacitor CL, current mirror circuit 21, bias constant current source 22, MOS tube M2, MOS tube M3, MOS tube M4, MOS tube M5, MOS tube M6, MOS tube M7, MOS tube M10, resistor R4, resistor R2, operational amplifier A1, current source A2, MOS tube M8, MOS tube M9. DETAILED DESCRIPTION

[0025] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0026] In the description of the embodiments of the present invention, the terms "first" and "second" are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Thus, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the embodiments of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0027] In the description of the embodiments of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be directly connected or indirectly connected through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present invention can be understood according to specific circumstances.

[0028] Combine the following Figures 2 to 3 , describing a fast response linear regulator according to an embodiment of the present invention.

[0029] A fast-response linear regulator comprises a bias circuit 1, a wide-bandwidth source follower 2, a reference circuit 3, an operational amplifier circuit 4, a voltage regulator D1, a capacitor C2 and a load resistor RLoad; one end of the load resistor RLoad is used as an output end of the linear regulator;

[0030] The output end of the bias circuit 1 and the cathode of the voltage regulator D1 are electrically connected to the input end of the wide bandwidth source follower 2, the output end of the wide bandwidth source follower 2 is electrically connected to the input end of the reference circuit 3, the output end of the reference circuit 3 is electrically connected to the input end of the operational amplifier circuit 4, the output end of the operational amplifier circuit 4 and one end of the capacitor C2 are electrically connected to one end of the load resistor RLoad, and the anode of the voltage regulator D1, the other end of the capacitor C2 and the other end of the load resistor RLoad are grounded.

[0031] The present invention proposes a preferred embodiment of a fast-response linear regulator, such as Figure 2 As shown, the startup circuit composed of the bias circuit 1 and the voltage regulator D1 generates a stable bias voltage. After being buffered and isolated by the large-bandwidth source follower 2, the bias voltage is provided to the reference circuit 3, so that it works at the required static working point, avoiding the reference circuit 3 from entering the zero bias current state, that is, the working current in the circuit is zero and cannot work normally; the reference circuit 3 then generates a reference voltage and provides it to the operational amplifier circuit 4, and the operational amplifier circuit 4 uses this to achieve voltage linear adjustment; and because the large-bandwidth source follower 2 is used, the linear establishment time of the operational amplifier circuit 4 is greatly shortened, so that the time for the operational amplifier circuit 4 to respond to the output voltage is greatly shortened, and the final output voltage is filtered by the capacitor C2, and the load resistor RLoad absorbs the excess power to maintain the stability of the voltage, and then the desired stable voltage is obtained. In summary, by taking measures to improve the stability of the input voltage and the output voltage, and cooperating with the large-bandwidth characteristics of the large-bandwidth source follower 2, the linear establishment time is shortened, so that the linear regulator can maintain the output voltage stability while accelerating the response speed of the output voltage.

[0032] Furthermore, the high bandwidth source follower 2 includes a MOS tube M1, a capacitor CL, a current mirror circuit 21 and a bias constant current source 22; the gate of the MOS tube M1 is used as the input end of the high bandwidth source follower 2, and the source of the MOS tube M1 is used as the output end of the high bandwidth source follower 2;

[0033] The control end of the current mirror circuit 21 is electrically connected to the output end of the bias constant current source 22, the first end of the current mirror circuit 21 is electrically connected to the drain of the MOS tube M1, the second end of the current mirror circuit 21 and one end of the capacitor CL are electrically connected to the source of the MOS tube M1, and the other end of the capacitor CL is grounded.

[0034] In this embodiment, Figure 3 As shown, by providing a closed-loop current mirror circuit 21 between the drain and source of the MOS tube M1, the current mirror circuit 21 can effectively improve the small signal output impedance of the MOS tube M1 when the bias constant current source 22 provides a bias voltage, thereby having a larger bandwidth and making its intrinsic gain much greater than 1.

[0035] Further, the current mirror circuit 21 includes MOS tube M2, MOS tube M3, MOS tube M4, MOS tube M5, MOS tube M6 and MOS tube M7; the drain of MOS tube M4 is used as the control end of the current mirror circuit 21, the drain of MOS tube M3 is used as the first end of the current mirror circuit 21, and the drain of MOS tube M2 is used as the second end of the current mirror circuit 21;

[0036] The drain and gate of the MOS tube M3 are electrically connected to the gate of the MOS tube M4, the drain and gate of the MOS tube M5 are electrically connected to the drain of the MOS tube M4, the drain and gate of the MOS tube M7 are electrically connected to the drain of the MOS tube M6, the gate of the MOS tube M7 is electrically connected to the gate of the MOS tube M2, the source of the MOS tube M3, the source of the MOS tube M4, the source of the MOS tube M5 and the source of the MOS tube M6 are all connected to the VDD power supply, and the source of the MOS tube M2 and the source of the MOS tube M7 are all grounded.

[0037] In this embodiment, Figure 3 As shown, the current mirror circuit 21 formed by the MOS transistor M2, the MOS transistor M3, the MOS transistor M4, the MOS transistor M5, the MOS transistor M6 and the MOS transistor M7 can have the following effects:

[0038] The open-loop conductance of the current from node 1 to node 2 is: Wherein, C1 represents the parasitic capacitance of the MOS tube M7, im2 is the current input to the MOS tube M2, gm2 is the transconductance of the MOS tube M2, gm4 is the transconductance of the MOS tube M4, gm5 is the transconductance of the MOS tube M5, gm6 is the transconductance of the MOS tube M6, and gm7 is the transconductance of the MOS tube M7. If Vin is a small signal voltage, im2 is the small signal current input to the MOS tube M2, if Vin is positive, then im2 increases; if Vin is negative, then im2 decreases; thus, the bidirectional voltage conversion rate of the source follower is improved.

[0039] The high-bandwidth source follower 2 uses current feedback to increase the conversion rate. The two main poles that affect the gain of the source follower are located at the output terminal Vout and the drain of the MOS tube M7. The closed-loop gain of the source follower is: Wherein gm1 is the transconductance of the MOS tube M1, gm3 is the transconductance of the MOS tube M3, and CL represents the capacitor CL.

[0040] And the main pole of the large bandwidth source follower 2 is also determined by its output point (Vout), so the bandwidth of the large bandwidth source follower 2 can be obtained as: Where CL is the capacitance value of capacitor CL. The bandwidth of the current source follower can be obtained by Figure 1 The analysis shows: Therefore, compared with the two, the bandwidth of the large bandwidth source follower 2 is the bandwidth of the current source follower. It is obvious that the bandwidth of the large-bandwidth source follower 2 is many times that of the current source follower, which greatly shortens the linear settling time.

[0041] Furthermore, the bandwidth of the large bandwidth source follower 2 is: Wherein, CL is the capacitance value of capacitor CL, gm1 is the transconductance of MOS tube M1, gm2 is the transconductance of MOS tube M2, gm3 is the transconductance of MOS tube M3, gm4 is the transconductance of MOS tube M4, gm5 is the transconductance of MOS tube M5, gm6 is the transconductance of MOS tube M6, and gm7 is the transconductance of MOS tube M7.

[0042] In this embodiment, through the analysis of the current mirror circuit 21, it can be known that the bandwidth of the large bandwidth source follower 2 can be expressed by the formula: Calculated, so that source followers with different bandwidths can be selected according to actual needs.

[0043] Furthermore, the operational amplifier circuit 4 includes a MOS tube M10, a resistor R4, a resistor R2 and an operational amplifier A1; the negative input terminal of the operational amplifier A1 is used as the input terminal of the operational amplifier circuit, and the drain of the MOS tube M10 is used as the output terminal of the operational amplifier circuit 4;

[0044] The source of the MOS tube M10 is connected to the VDD power supply, the gate of the MOS tube M10 is electrically connected to the output end of the operational amplifier A1, the source of the MOS tube M10 is electrically connected to one end of the resistor R4, the other end of the resistor R4 and the positive input end of the operational amplifier A1 are electrically connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

[0045] In this embodiment, the MOS tube M10, the resistor R4, the resistor R2 and the operational amplifier A1 form an operational amplifier circuit 4 with negative feedback, so that the output responds linearly to the input change while maintaining the balance between the output and the input.

[0046] Furthermore, the reference circuit 3 is a bandgap reference circuit.

[0047] In this embodiment, the bandgap reference circuit has the characteristics of low noise and high stability compared with the common reference circuit, and is more conducive to providing a stable reference voltage for the operational amplifier circuit 4 .

[0048] Furthermore, the bias constant current source 22 includes a current source A2, a MOS tube M8 and a MOS tube M9; the drain of the MOS tube M8 is used as the output end of the bias constant current source 22;

[0049] The drain and gate of the MOS tube M8 are electrically connected to the gate of the MOS tube M9, the source of the MOS tube M8 and the source of the MOS tube M9 are grounded, and the drain of the MOS tube M9 is electrically connected to the output end of the current source A2.

[0050] In this embodiment, the bias voltage signal quality generated by the bias constant current source composed of the MOS tube and the current source A2 is better.

[0051] Furthermore, both the MOS tube M1 and the MOS tube M10 are high-voltage LDMOS tubes.

[0052] In this embodiment, the high-voltage LDMOS tube has higher gain, faster response speed, and stronger voltage tolerance than ordinary MOS tubes, and is more suitable for a large-bandwidth source follower 2 and a linear regulator using the follower.

[0053] Furthermore, the voltage regulator D1 adopts a Zener voltage regulator diode.

[0054] In this embodiment, based on the fast response characteristics of the wide-bandwidth source follower 2, the wide-bandwidth source follower 2 will be used in application scenarios where the input voltage changes quickly. Therefore, the voltage regulator D1 at the input end of the wide-bandwidth source follower 2 should adopt a Zener voltage regulator diode, which has fast switching characteristics, strong resistance to overcharging and over-discharging, reduces the noise of the input voltage, and avoids introducing noise into the wide-bandwidth source follower 2.

[0055] Other structures and operations of a fast-response linear regulator according to an embodiment of the present invention are known to those skilled in the art and will not be described in detail here.

[0056] In the description of this specification, the description with reference to the terms "embodiment", "example", etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0057] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A fast response linear regulator, characterized in that: It includes a bias circuit, a wide bandwidth source follower, a reference circuit, an operational amplifier circuit, a voltage regulator D1, a capacitor C2 and a load resistor RLoad; one end of the load resistor RLoad is used as the output end of the linear regulator; The output end of the bias circuit and the cathode of the voltage regulator D1 are electrically connected to the input end of the wide-bandwidth source follower, the output end of the wide-bandwidth source follower is electrically connected to the input end of the reference circuit, the output end of the reference circuit is electrically connected to the input end of the operational amplifier circuit, the output end of the operational amplifier circuit and one end of the capacitor C2 are electrically connected to one end of the load resistor RLoad, and the anode of the voltage regulator D1, the other end of the capacitor C2 and the other end of the load resistor RLoad are grounded.

2. A fast response linear regulator according to claim 1, characterized in that: The high-bandwidth source follower includes a MOS tube M1, a capacitor CL, a current mirror circuit and a bias constant current source; the gate of the MOS tube M1 is used as the input end of the high-bandwidth source follower, and the source of the MOS tube M1 is used as the output end of the high-bandwidth source follower; The control end of the current mirror circuit is electrically connected to the output end of the bias constant current source, the first end of the current mirror circuit is electrically connected to the drain of the MOS tube M1, the second end of the current mirror circuit and one end of the capacitor CL are both electrically connected to the source of the MOS tube M1, and the other end of the capacitor CL is grounded.

3. A fast response linear regulator according to claim 2, characterized in that: The current mirror circuit includes MOS tube M2, MOS tube M3, MOS tube M4, MOS tube M5, MOS tube M6 and MOS tube M7; the drain of the MOS tube M4 is used as the control end of the current mirror circuit, the drain of the MOS tube M3 is used as the first end of the current mirror circuit, and the drain of the MOS tube M2 is used as the second end of the current mirror circuit; The drain and gate of the MOS tube M3 are electrically connected to the gate of the MOS tube M4, the drain and gate of the MOS tube M5 are electrically connected to the drain of the MOS tube M4, the drain and gate of the MOS tube M7 are electrically connected to the drain of the MOS tube M6, the gate of the MOS tube M7 is electrically connected to the gate of the MOS tube M2, the source of the MOS tube M3, the source of the MOS tube M4, the source of the MOS tube M5 and the source of the MOS tube M6 are all connected to the VDD power supply, and the source of the MOS tube M2 and the source of the MOS tube M7 are both grounded.

4. A fast response linear regulator according to claim 3, characterized in that: The bandwidth of the large bandwidth source follower is: Wherein, CL is the capacitance value of the capacitor CL, gm1 is the transconductance of the MOS tube M1, gm2 is the transconductance of the MOS tube M2, gm3 is the transconductance of the MOS tube M3, gm4 is the transconductance of the MOS tube M4, gm5 is the transconductance of the MOS tube M5, gm6 is the transconductance of the MOS tube M6, and gm7 is the transconductance of the MOS tube M7.

5. A fast response linear regulator according to claim 2, characterized in that: The operational amplifier circuit includes a MOS tube M10, a resistor R4, a resistor R2 and an operational amplifier A1; the negative input terminal of the operational amplifier A1 is used as the input terminal of the operational amplifier circuit, and the drain of the MOS tube M10 is used as the output terminal of the operational amplifier circuit; The source of the MOS tube M10 is connected to the VDD power supply, the gate of the MOS tube M10 is electrically connected to the output end of the operational amplifier A1, the source of the MOS tube M10 is electrically connected to one end of the resistor R4, the other end of the resistor R4 and the positive input end of the operational amplifier A1 are electrically connected to one end of the resistor R2, and the other end of the resistor R2 is grounded.

6. A fast response linear regulator according to claim 1, characterized in that: The reference circuit is a bandgap reference circuit.

7. A fast response linear regulator according to claim 2, characterized in that: The bias constant current source includes a current source A2, a MOS tube M8 and a MOS tube M9; the drain of the MOS tube M8 is used as the output end of the bias constant current source; The drain and gate of the MOS tube M8 are electrically connected to the gate of the MOS tube M9, the source of the MOS tube M8 and the source of the MOS tube M9 are grounded, and the drain of the MOS tube M9 is electrically connected to the output end of the current source A2.

8. The fast response linear regulator according to claim 5, characterized in that: The MOS tube M1 and the MOS tube M10 are both high-voltage LDMOS tubes.

9. The fast response linear regulator according to claim 1, characterized in that: The voltage regulator tube D1 is a Zener voltage regulator diode.

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