Calculation power evaluation method, device, equipment, medium and program product
By dividing the running time of the target equipment into multiple sub-time areas, collecting and analyzing various performance and infrastructure data, and calculating the comprehensive computing power evaluation value, the inaccuracy and singularity of the traditional computing power evaluation methods are solved, and a more refined and comprehensive big data computing power evaluation is achieved.
Patent Information
- Application Number
- CN202411988820.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-31
- Publication Date
- 2025-04-08
AI Technical Summary
Traditional computing power evaluation methods rely on manual experience and static parameters, lack intelligence and dynamic adaptability, and are difficult to accurately reflect the actual performance of computing power resources under different workloads and environmental conditions.
By dividing the running time of the target device into multiple sub-time areas, the performance data of key components such as processors, memory, storage in each sub-time area, as well as infrastructure data such as power supply, heat dissipation, and environment are collected, the performance evaluation values and infrastructure comprehensive quality evaluation values of each sub-time area are calculated, and the comprehensive computing power evaluation values are finally calculated.
A more detailed and accurate computing power evaluation is achieved. Through the collection and analysis of multi-dimensional data, the singularity and inaccuracy of traditional evaluation methods are made up for the comprehensiveness and accuracy of the evaluation, and an early warning mechanism is introduced to promptly detect performance degradation or resource shortage.
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Figure CN119782121A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to the field of big data technology, and in particular to a method, apparatus, device, medium and program product. Background Art
[0002] In related technologies, with the rapid development of information technology, the role of computing resources in modern society has become increasingly prominent. Whether it is cloud computing, big data processing, or artificial intelligence, the Internet of Things and other fields, strong computing support is needed to ensure the smooth execution of various tasks. As a result, the evaluation and management of computing resources have become particularly important. Traditional computing power evaluation methods often rely on manual experience and fixed parameters, lack intelligence and dynamic adaptability, and are difficult to accurately reflect the performance and status of actual computing resources, resulting in low accuracy of computing power evaluation methods. Summary of the invention
[0003] The present disclosure provides a computing power evaluation method, device, equipment, medium and program product. The technical solution of the present disclosure is as follows:
[0004] In a first aspect, the present disclosure provides a computing power evaluation method, comprising:
[0005] Divide the target device's operating time into multiple sub-time zones;
[0006] Collecting performance data of the target device in each sub-time zone; wherein the performance data includes processor performance data, memory performance data and storage performance data;
[0007] Based on the performance data in each sub-time zone, calculating the performance evaluation value of each sub-time zone; wherein the performance evaluation value includes a processor performance evaluation value, a memory performance evaluation value, and a storage performance evaluation value;
[0008] Collecting system monitoring data of the target device in each of the sub-time zones;
[0009] Calculate the comprehensive quality assessment value of the infrastructure in each of the sub-time zones based on the system monitoring data of the target device in each of the sub-time zones;
[0010] Based on the comprehensive quality assessment value of the infrastructure, the processor performance assessment value, the memory performance assessment value, and the storage performance assessment value in each sub-time zone, the comprehensive computing power assessment value of the target device during the running time is calculated.
[0011] In a possible implementation manner, collecting the performance data of the target device in each sub-time zone includes:
[0012] Collecting processor performance data of the target device in each sub-time zone; wherein the processor performance data includes at least one of a transistor current leakage rate, a power waste ratio, a number of instruction pipeline pauses, and a Thespansky entropy value;
[0013] Collecting memory performance data of the target device in each sub-time zone; wherein the memory performance data includes at least one of cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity;
[0014] Collect storage performance data of the target device in each sub-time zone; wherein the storage performance data includes at least one of the following: disk detection arm vibration frequency, solid state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time.
[0015] In a possible implementation manner, calculating the performance evaluation value of each sub-time zone based on the performance data in each sub-time zone includes:
[0016] Calculate the processor performance evaluation value of the target device in each sub-time zone by using a processor data analysis model based on the transistor current leakage rate, power waste ratio, instruction pipeline pause times, and Therspansky entropy value of the target device in each sub-time zone;
[0017] Calculate the memory performance evaluation value of the target device in each sub-time zone based on the cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity of the target device in each sub-time zone through a memory data analysis model;
[0018] The storage performance evaluation value of the target device in each sub-time zone is calculated through a storage data analysis model based on the disk detection arm vibration frequency, solid state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time of the target device in each sub-time zone.
[0019] In a possible implementation, the system monitoring data includes power supply data, heat dissipation data, and environmental data;
[0020] The calculating the comprehensive quality assessment value of the infrastructure in each of the sub-time zones based on the system monitoring data of the target device in each of the sub-time zones comprises:
[0021] Calculate the power quality assessment value, the heat dissipation quality assessment value, and the environmental quality assessment value of each of the sub-time zones based on the power data, heat dissipation data, and environmental data of the target device in each of the sub-time zones;
[0022] Based on the power quality assessment value, heat dissipation quality assessment value, and environment quality assessment value of each of the sub-time zones, a comprehensive infrastructure quality assessment value of each of the sub-time zones is calculated.
[0023] In a possible implementation, the power supply data includes harmonic distortion rate, surge current peak value, insulation resistance value, and power factor; the heat dissipation data includes fan airflow turbulence intensity, internal phase change frequency of heat pipe, wind duct fluid Reynolds number, and hot end temperature difference conductivity; the environmental data includes electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient;
[0024] The calculating, based on the power data, heat dissipation data and environment data of the target device in each sub-time zone, a power quality assessment value, a heat dissipation quality assessment value and an environment quality assessment value of each sub-time zone includes:
[0025] Calculate the power quality assessment value of each of the sub-time zones based on the harmonic distortion rate, surge current peak value, insulation resistance value, and power factor of each of the sub-time zones through a power data analysis model;
[0026] Calculate the heat dissipation quality evaluation value of each of the sub-time zones through a heat dissipation data analysis model based on the fan airflow turbulence intensity, the internal phase change frequency of the heat pipe, the air duct fluid Reynolds number, and the hot end temperature difference conductivity of each of the sub-time zones;
[0027] The environmental quality assessment value of each sub-time zone is calculated through the environmental data analysis model based on the electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient of each sub-time zone.
[0028] In a possible implementation, it further includes:
[0029] When the comprehensive computing power evaluation value of the target device during the operating time is less than the preset comprehensive computing power evaluation value, an early warning signal is output.
[0030] In a second aspect, the present disclosure provides a computing power evaluation device, including:
[0031] A partitioning module, used to divide the running time of the target device into multiple sub-time areas;
[0032] A performance data collection module, used to collect performance data of the target device in each sub-time zone; wherein the performance data includes processor performance data, memory performance data and storage performance data;
[0033] A first calculation module, configured to calculate a performance evaluation value of each sub-time zone based on the performance data in each sub-time zone; wherein the performance evaluation value includes a processor performance evaluation value, a memory performance evaluation value, and a storage performance evaluation value;
[0034] A system data acquisition module, used for acquiring system monitoring data of the target device in each sub-time zone;
[0035] A second calculation module, configured to calculate a comprehensive quality assessment value of infrastructure in each of the sub-time zones based on system monitoring data of the target device in each of the sub-time zones;
[0036] An evaluation module is used to calculate the comprehensive computing power evaluation value of the target device during the running time based on the comprehensive quality evaluation value of the infrastructure, the processor performance evaluation value, the memory performance evaluation value, and the storage performance evaluation value in each sub-time zone.
[0037] In a third aspect, the present disclosure provides an electronic device, including:
[0038] processor;
[0039] a memory for storing instructions executable by the processor;
[0040] The processor is configured to execute the instructions to implement the method described in the first aspect.
[0041] In a fourth aspect, the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method described in the first aspect.
[0042] In a fifth aspect, the present disclosure provides a computer program product, comprising a computer program / instructions, characterized in that when the computer program / instructions are executed by a processor, the method described in the first aspect is implemented.
[0043] The technical solution disclosed in this disclosure brings at least the following beneficial effects:
[0044] In an embodiment of the present disclosure, the operating time of a target device is divided into a plurality of sub-time zones; performance data of the target device in each of the sub-time zones is collected; wherein the performance data includes processor performance data, memory performance data and storage performance data; performance evaluation values of each of the sub-time zones are calculated based on the performance data in each of the sub-time zones; wherein the performance evaluation values include processor performance evaluation values, memory performance evaluation values and storage performance evaluation values; system monitoring data of the target device in each of the sub-time zones is collected; based on the system monitoring data of the target device in each of the sub-time zones, a comprehensive quality evaluation value of infrastructure in each of the sub-time zones is calculated; based on the comprehensive quality evaluation value of the infrastructure in each of the sub-time zones, the processor performance evaluation value, the memory performance evaluation value and the storage performance evaluation value, a comprehensive computing power evaluation value of the target device in the operating time is calculated. In this way, on the one hand, data collection and calculation through the time division method can achieve more surprising performance analysis and monitoring, and thus achieve more refined and accurate computing power evaluation; on the other hand, computing power evaluation can be carried out through the performance data of key components such as processors, memory, storage, and system monitoring data. Data such as data can be used to evaluate computing power, which can achieve the comprehensiveness of computing power evaluation and further improve the accuracy of computing power evaluation methods.
[0045] It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS
[0046] The drawings herein are incorporated into and constitute a part of the specification, illustrate embodiments consistent with the present disclosure, and together with the description are used to explain the principles of the present disclosure, and do not constitute improper limitations on the present disclosure.
[0047] Figure 1 A flowchart of a computing power evaluation method provided in an embodiment of the present disclosure;
[0048] Figure 2 is a structural schematic diagram of a computing power evaluation device provided by an embodiment of the present disclosure;
[0049] Figure 3 A schematic diagram of the structure of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0050] In order to enable ordinary persons in the art to better understand the technical solutions of the present disclosure, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings.
[0051] It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present disclosure described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present disclosure. Instead, they are merely examples of devices and methods consistent with some aspects of the present disclosure as detailed in the appended claims.
[0052] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, stored data, displayed data, etc.) and signals involved in this disclosure are all authorized by the user or fully authorized by all parties, and the collection, use and processing of relevant data need to comply with relevant laws, regulations and standards of relevant countries and regions.
[0053] The acquisition, storage, use, and processing of data in the technical solution disclosed in this disclosure are in compliance with the relevant provisions of national laws and regulations.
[0054] It should be noted that in the embodiments of the present disclosure, there may be existing solutions in the industry such as certain software, components, models, etc., which should be regarded as exemplary. Their purpose is only to illustrate the feasibility of implementing the technical solution of the present disclosure, but it does not mean that the applicant has or will necessarily use the solution.
[0055] As can be seen from the background technology, in the related technologies, firstly, traditional computing power evaluation methods mostly rely on static parameters and manual experience, lack real-time and dynamic adaptability, and are difficult to accurately reflect the true performance of computing power resources under different workloads and environmental conditions. Secondly, the existing evaluation systems are often limited to single-dimensional performance monitoring, ignoring the complex interactions and overall synergy between computing power resources, resulting in one-sided and inaccurate evaluation results. In recent years, with the continuous breakthroughs in advanced technologies such as machine learning and big data analysis, the intelligent evaluation technology of computing power resources has made significant progress. However, these new technologies still face many limitations in practical applications, such as high model complexity, poor real-time performance, and high data quality requirements. Therefore, the development of an intelligent system that can comprehensively, real-time and accurately evaluate the performance of computing power resources has become an urgent need for the current technological development.
[0056] However, since the existing computing power resource evaluation systems can usually only provide simple performance parameter statistics, they are unable to intelligently evaluate the overall performance of computing power resources. Especially in complex computing environments, the performance of computing power resources is affected by many factors, such as the work efficiency of the processor, the access speed of the memory, the read and write capabilities of the storage, etc. Changes in these factors may cause the performance of computing power resources to fluctuate, thereby affecting the stability and efficiency of the entire system. In addition, there are some other problems with the existing computing power resource evaluation systems. For example, some systems only focus on a single performance indicator and ignore the synergy and integrity between computing power resources; although some systems consider multiple performance indicators, they lack effective analysis models and algorithms, making it difficult to accurately evaluate the complex computing power resource status. These problems limit the scope of application and effectiveness of existing computing power resource evaluation systems. In other words, the computing power resource evaluation system in the relevant technology has at least the following problems:
[0057] Limitations of traditional computing power evaluation methods: Traditional computing power evaluation methods often rely on manual experience and static parameters, lack real-time and dynamic adaptability, and are difficult to accurately reflect the actual performance of computing power resources under different workloads and environmental conditions; Single evaluation dimension: Existing computing power resource evaluation systems usually only focus on a single performance indicator, ignoring the complex interactions and overall synergy between computing power resources, resulting in one-sided and inaccurate evaluation results; Lack of intelligence and early warning mechanism: Traditional evaluation systems lack effective intelligent analysis models and early warning mechanisms, and cannot issue timely warnings when computing power resource performance degrades or resources are tight, and cannot help users intervene and adjust in advance; High model complexity and poor real-time performance: Although computing power evaluation methods based on machine learning, big data analysis and other technologies have emerged in recent years, these methods often have high model complexity, poor real-time performance, and high requirements on data quality, making them difficult to be widely promoted in practical applications.
[0058] Based on this, the embodiments of the present disclosure are intended to solve the following specific technical problems:
[0059] 1. Insufficient intelligence and dynamic adaptability of computing power resource evaluation: In related technologies, they mostly rely on static parameters and manual experience, which makes it difficult to reflect the real performance of computing power resources under different workloads and environmental conditions in real time and dynamically. The disclosed embodiments introduce advanced data analysis models and real-time data collection technologies to improve the intelligence and dynamic adaptability of computing power resource evaluation, ensuring that the evaluation results are more accurate and reliable. 2. Singleness of evaluation dimension: In related technologies, the evaluation system often only focuses on performance indicators of a single dimension, ignoring the complex interactions and overall synergy between computing power resources. The disclosed embodiments achieve a comprehensive evaluation of computing power resources through multi-dimensional data collection and analysis, including performance data of key components such as processors, memory, and storage, as well as infrastructure data such as power supply, heat dissipation, and environment. 3. Lack of early warning mechanism: In related technologies, the system lacks an effective early warning mechanism and cannot issue an early warning in time when the performance of computing power resources decreases or resources are tight. The disclosed embodiments establish an early warning module, set a preset evaluation value of comprehensive computing power, monitor the status of computing power resources in real time, and immediately issue an early warning signal once the evaluation value is found to be lower than the preset value, to help users intervene and adjust in advance. 4. Model complexity and real-time issues: Although technologies based on machine learning and big data analysis have made some progress in computing power evaluation, these methods often have high model complexity and poor real-time performance. The disclosed embodiments optimize data collection and analysis algorithms to improve the processing speed and response capability of the system, ensuring that the real-time performance of the system is improved while maintaining the accuracy of the evaluation.
[0060] That is, the method provided by the embodiment of the present disclosure can finely divide the operating time of the target device into multiple sub-time zones through the time zone division mechanism, realize real-time monitoring and analysis of the performance of computing power resources in different time periods, thereby solving the problem of lack of dynamic adaptability of computing power evaluation. At the same time, a multi-dimensional data collection and analysis method is adopted to widely cover the performance data of key components such as processors, memory, storage, and infrastructure data such as power supply, heat dissipation, and environment, so as to realize a comprehensive evaluation of computing power resources and make up for the deficiency of a single evaluation dimension. In addition, by introducing an intelligent data analysis model, real-time processing and analysis of collected data can be realized, key performance indicators and trends can be quickly extracted, and a scientific basis can be provided for the optimal configuration of computing power resources. In addition, an early warning function is also integrated, which monitors the status of computing power resources in real time by presetting the comprehensive computing power evaluation value, and issues an early warning signal when necessary, thereby effectively solving the problem of lack of early warning mechanism.
[0061] The technical solutions provided by various embodiments of the present disclosure are described in detail below in conjunction with the accompanying drawings.
[0062] Figure 1 The flowchart of a computing power evaluation method provided in an embodiment of the present disclosure is provided. The method can be applied to a server, for example, a single server or a server cluster. Figure 1 As shown, the computing power evaluation method may include the following steps:
[0063] S101, dividing the running time of the target device into a plurality of sub-time zones.
[0064] In an embodiment of the present disclosure, when evaluating the computing power of a device, such as a computer (ie, a target device), the operating time of the target device can be determined first. The operating time is divided into multiple sub-time areas. For example, the target time area is divided into sub-time areas by equal time division, and each sub-time area is marked as 1, 2, ... n in sequence. It can be understood that the number of sub-time areas can be set according to needs and actual conditions; the number of target devices can be one or more, that is, the computing power evaluation can be performed on only one target device at a time, or on multiple target devices at the same time.
[0065] S102: Collect performance data of the target device in each sub-time zone.
[0066] Among them, the performance data includes processor performance data, memory performance data and storage performance data.
[0067] In an embodiment of the present disclosure, after the time zone is divided, the performance data required for computing power evaluation can be collected. Exemplarily, the performance data of the target device in each sub-time zone can be collected, for example, the processor performance data, memory performance data, and storage performance data of the target device in each sub-time zone are collected. Assuming that there are n sub-time zones, the processor performance data, memory performance data, and storage performance data of the target device in the first sub-time zone can be collected, and the processor performance data, memory performance data, and storage performance data of the target device in the second sub-time zone can be collected, and so on, ..., the processor performance data, memory performance data, and storage performance data of the target device in the nth sub-time zone are collected.
[0068] S103, calculating a performance evaluation value of each sub-time zone based on the performance data in each sub-time zone; wherein the performance evaluation value includes a processor performance evaluation value, a memory performance evaluation value, and a storage performance evaluation value.
[0069] In an embodiment of the present disclosure, after collecting the performance data of the target device in each sub-time zone, the performance evaluation value may be calculated. Exemplarily, the performance evaluation value of each sub-time zone may be calculated based on the processor performance data, memory performance data, and storage performance data in each sub-time zone. For example, the processor performance evaluation value in each sub-time zone is calculated based on the processor performance data in each sub-time zone, the memory performance evaluation value in each sub-time zone is calculated based on the memory performance data in each sub-time zone, and the storage performance evaluation value in each sub-time zone is calculated based on the storage performance data in each sub-time zone.
[0070] S104, collecting system monitoring data of the target device in each sub-time zone.
[0071] In the embodiments of the present disclosure, infrastructure data collection can also be performed. Exemplarily, system monitoring data of the target device in each sub-time zone can be collected, such as power data, heat dissipation data, environmental data, etc. Assuming there are n sub-time zones, the system monitoring data of the target device in the first sub-time zone can be collected, the system monitoring data of the target device in the second sub-time zone can be collected, and so on, ..., the system monitoring data of the target device in the nth sub-time zone can be collected.
[0072] S105, calculating a comprehensive quality assessment value of infrastructure in each sub-time zone based on the system monitoring data of the target device in each sub-time zone.
[0073] In an embodiment of the present disclosure, after collecting the system monitoring data of the target device in each sub-time zone, the comprehensive quality evaluation value of the infrastructure in each sub-time zone can be calculated based on the system monitoring data of the target device in each sub-time zone. It can be understood that the comprehensive quality evaluation value of the infrastructure can be used to indicate the health status of the infrastructure.
[0074] S106, calculating the comprehensive computing power evaluation value of the target device during the running time based on the comprehensive infrastructure quality evaluation value, processor performance evaluation value, memory performance evaluation value, and storage performance evaluation value in each sub-time zone.
[0075] In the embodiments of the present disclosure, calculations can also be performed based on the comprehensive quality evaluation value of the infrastructure in each sub-time zone, as well as the processor performance evaluation value, memory performance evaluation value, and storage performance evaluation value calculated in each sub-time zone, to calculate the comprehensive computing power evaluation value of the target device during the entire operating time. The comprehensive computing power evaluation value can be used to indicate the overall computing power of the target device. For example, it can be set that the larger the computing power evaluation value, the stronger the computing power. The calculation formula of the comprehensive computing power evaluation value can be as shown in formula (1).
[0076]
[0077] Among them, η represents the comprehensive computing power evaluation value of the target time zone, σ i represents the comprehensive quality assessment value of infrastructure in the i-th sub-time zone, CP i represents the processor performance evaluation value of the i-th sub-time zone, CM i represents the memory performance evaluation value of the i-th sub-time region, CD i represents the storage performance evaluation value of the i-th sub-time zone, and λ represents other influencing factors of the comprehensive computing power evaluation value.
[0078] In an embodiment of the present disclosure, the operating time of a target device is divided into a plurality of sub-time zones; performance data of the target device in each of the sub-time zones is collected; wherein the performance data includes processor performance data, memory performance data and storage performance data; performance evaluation values of each of the sub-time zones are calculated based on the performance data in each of the sub-time zones; wherein the performance evaluation values include processor performance evaluation values, memory performance evaluation values and storage performance evaluation values; system monitoring data of the target device in each of the sub-time zones is collected; based on the system monitoring data of the target device in each of the sub-time zones, a comprehensive quality evaluation value of infrastructure in each of the sub-time zones is calculated; based on the comprehensive quality evaluation value of the infrastructure in each of the sub-time zones, the processor performance evaluation value, the memory performance evaluation value and the storage performance evaluation value, a comprehensive computing power evaluation value of the target device in the operating time is calculated. In this way, on the one hand, data collection and calculation through the time division method can achieve more surprising performance analysis and monitoring, and thus achieve more refined and accurate computing power evaluation; on the other hand, computing power evaluation can be carried out through the performance data of key components such as processors, memory, storage, and system monitoring data. Data such as data can be used to evaluate computing power, which can achieve the comprehensiveness of computing power evaluation and further improve the accuracy of computing power evaluation methods.
[0079] In some possible implementations, collecting performance data of the target device in each sub-time zone includes:
[0080] Collecting processor performance data of the target device in each sub-time zone; wherein the processor performance data includes at least one of a transistor current leakage rate, a power waste ratio, a number of instruction pipeline pauses, and a Thespansky entropy value;
[0081] Collecting memory performance data of the target device in each sub-time zone; wherein the memory performance data includes at least one of cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity;
[0082] The storage performance data of the target device in each sub-time zone is collected; wherein the storage performance data includes at least one of the vibration frequency of the disk detection arm, the entropy value of the solid state hard disk, the magnetization intensity of the storage medium, and the disk array reconstruction time.
[0083] In the embodiment of the present disclosure, collecting the performance data of the target device in each sub-time zone may include collecting the processor performance data of the target device in each sub-time zone, collecting the memory performance data of the target device in each sub-time zone, and collecting the storage performance data of the target device in each sub-time zone. Wherein:
[0084] Collecting the processor performance data of the target device in each sub-time region may include collecting at least one of the transistor current leakage rate, power waste ratio, instruction pipeline pause times, and Thespansky entropy value of the target device in each sub-time region. The aforementioned parameters may be marked as Pl, Pw, Ps, and Pe, respectively. The Thespansky entropy value is an indicator used to describe data complexity. In information theory and complexity science, entropy is a concept used to measure the degree of disorder of a system. The Thespansky entropy value is calculated based on the fractal dimension to calculate the entropy value of the system. The fractal dimension is a dimension used to describe self-similar structures and can be used to describe the structural characteristics of complex systems. The collection methods of various parameters can be: transistor current leakage rate (Pl): real-time current data can be collected on the processor power supply line through a high-precision current sensor, and the current leakage rate of the transistor can be calculated in combination with the working state of the processor; power waste ratio (Pw): the actual energy consumption of the processor during operation can be measured by a power meter, and the power waste ratio can be calculated in combination with its theoretical energy consumption; number of instruction pipeline pauses (Ps): the execution state of the instruction pipeline can be obtained through the built-in performance counter of the processor or by directly reading the debugging interface of the processor, and the number of pauses can be counted; Thermospansky entropy value (Pe): the complexity of the instruction sequence during the execution of the processor can be analyzed, and the Thermospansky entropy value based on the fractal dimension of the instruction sequence can be calculated using a special algorithm.
[0085] Collecting the memory performance data of the target device in each sub-time zone may include collecting at least one of the cache hit rate, bus contention frequency, ECC (error correction code) error rate, and memory electromagnetic interference strength of the target device in each sub-time zone. The aforementioned parameters may be marked as Mc, Mf, Me, and Ms, respectively. The collection method of each parameter may be: cache hit rate (Mc): by monitoring the memory access records, the ratio of the number of direct hits in the cache to the total number of accesses is calculated; bus contention frequency (Mf): the frequency of contention events on the bus can be counted by monitoring the bus usage and arbitration mechanism; ECC error rate (Me): the ECC (error correction code) mechanism built into the memory can be used to record and calculate the error rate of ECC correction; memory electromagnetic interference strength (Ms): electromagnetic field strength sensors are arranged near the memory module to monitor and record the electromagnetic interference level in real time.
[0086] Collecting the storage performance data of the target device in each sub-time zone may include collecting at least one of the disk detection arm vibration frequency, solid state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time of the target device in each sub-time zone. The signature parameters may be marked as Df, De, Ds, and Dt, respectively. The collection method of each parameter may be: disk detection arm vibration frequency (Df): by reading the hard disk internal sensor or external vibration sensor data, the mechanical vibration characteristics of the disk detection arm are analyzed; solid state hard disk entropy value (De): based on the internal state parameters of the solid state hard disk and the read and write performance data, the entropy value of the solid state hard disk is calculated using a specific algorithm to reflect its internal complexity and performance state; storage medium magnetization intensity (Ds): using a magnetometer and other equipment to measure the magnetization characteristics of the storage medium and evaluate its long-term stability and data retention capability; disk array reconstruction time (Dt): in the process of disk array failure recovery or reorganization, the time required for the reconstruction operation is recorded and calculated.
[0087] The correlation between the above parameters is based on: Transistor current leakage rate (Pl): Transistors are the basic units for processors to perform logical operations, and their current leakage rate directly reflects the energy efficiency and stability of transistors. A high leakage rate not only leads to a decrease in energy efficiency, but may also affect the operating speed and stability of the processor, thereby affecting the overall computing power; Power waste ratio (Pw): The power consumption of the processor is an important part of the computing power resource consumption. The power waste ratio reflects the proportion of ineffective energy consumption of the processor in the process of executing tasks, which directly affects the system's energy efficiency ratio and overall computing power output; Instruction pipeline stall times (Ps): The instruction pipeline is the key mechanism for the processor to execute instructions, and its stall times reflect the blockage and delay of the processor during execution. Frequent stalls will reduce the execution efficiency of instructions, thereby reducing the computing power output of the processor; Thermospansky entropy value (Pe): As an indicator of data complexity, the Thermospansky entropy value can indirectly reflect the efficiency and difficulty of the processor in processing complex instruction sets. A high entropy value may mean that the processor needs more resources to process complex instructions, thereby affecting the computing power performance.
[0088] Cache hit rate (Mc): Cache is an important means to improve the access speed of the processor. A high cache hit rate means that more data access can be completed in the cache, reducing the access delay to the memory, improving the execution efficiency of the processor, and thus improving the computing power; Bus contention frequency (Mf): The bus is the channel for the processor to communicate with other components (such as memory, peripherals). The bus contention frequency reflects the competition for bus resources among different components in the system. A high contention frequency will increase the delay and conflict of data transmission, and reduce the overall response speed and computing power performance of the system; ECC error rate (Me): The ECC error rate reflects the integrity and reliability of memory data. High-frequency ECC errors not only affect the accuracy of the data, but may also cause the processor to generate additional burden and delay when processing erroneous data, thereby reducing computing power; Memory electromagnetic interference intensity (Ms): Electromagnetic interference may affect the stability and integrity of memory data. High-intensity electromagnetic interference may cause memory access failures or data errors, thereby affecting the execution efficiency and computing power output of the processor. The disk detection arm vibration frequency (Df), solid-state drive entropy value (De), storage medium magnetization intensity (Ds), and disk array reconstruction time (Dt) are directly related to the performance and reliability of the storage system. A high-performance storage system can read and write data faster and reduce the processor's waiting time, thereby improving the overall computing power. At the same time, the stability and reliability of the storage medium are also important factors in ensuring continuous high computing power output.
[0089] In some possible implementations, calculating the performance evaluation value of each sub-time zone based on the performance data in each sub-time zone includes:
[0090] Calculate the processor performance evaluation value of the target device in each sub-time region through the processor data analysis model based on the transistor current leakage rate, power waste ratio, instruction pipeline pause times, and Therspansky entropy value of the target device in each sub-time region;
[0091] Calculate the memory performance evaluation value of the target device in each sub-time zone through the memory data analysis model based on the cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity of the target device in each sub-time zone;
[0092] The storage performance evaluation value of the target device in each sub-time zone is calculated through the storage data analysis model based on the disk detection arm vibration frequency, solid-state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time of the target device in each sub-time zone.
[0093] In the disclosed embodiment, when calculating the performance evaluation value of each sub-time region based on the performance data in each sub-time region, the processor data analysis model can be used to calculate the processor performance evaluation value of the target device in each sub-time region based on the transistor current leakage rate, power waste ratio, instruction pipeline pause number, and ThermoSpansky entropy value of the target device in each sub-time region. Among them, the processor data analysis model can be a pre-constructed data model for calculating the processor performance evaluation value based on the transistor current leakage rate, power waste ratio, instruction pipeline pause number, and ThermoSpansky entropy value. Its calculation formula is as shown in formula (2). It can be understood that the processor is the core component of the computer system, and its performance directly affects the computing power of the entire system. The processor data analysis model closely combines the actual working state and environmental factors of the processor by collecting data such as the transistor current leakage rate, power waste ratio, instruction pipeline pause number, and ThermoSpansky entropy value in actual operation; the processor data analysis model can evaluate the energy efficiency, stability, and ability to process complex instructions of the processor in real time or regularly, and timely discover potential performance bottlenecks or abnormal states, providing strong support for system optimization and troubleshooting.
[0094]
[0095] Among them, CP i represents the processor performance evaluation value of the i-th sub-time zone, Pl i represents the transistor current leakage rate in the i-th sub-time region, Pw i represents the power waste ratio of the i-th sub-time zone, Ps i Indicates the number of instruction pipeline pauses in the i-th sub-time zone, Pe i represents the Thespansky entropy value of the i-th sub-time region.
[0096] The memory data analysis model can be used to calculate the memory performance evaluation value of the target device in each sub-time zone based on the cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity of the target device in each sub-time zone. The memory data analysis model can be a pre-built mathematical model for calculating the memory performance evaluation value based on the cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity. Its calculation formula is as shown in formula (3). It can be understood that the memory is a key component for storing temporary data in a computer system, and its performance directly affects the data access speed and system responsiveness. The memory data analysis model fully considers the performance of the memory in the actual working environment by monitoring data such as cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity. The memory data analysis model can accurately evaluate the reliability and access efficiency of the memory, promptly discover the trend of memory failure or performance degradation, and provide data support for the stable operation and performance tuning of the system.
[0097]
[0098] Among them, CM i represents the memory performance evaluation value of the ith sub-time zone, Mc i represents the cache hit rate of the ith sub-time zone, Mf i represents the bus contention frequency of the ith sub-time zone, Me i represents the ECC error rate of the ith sub-time zone, Ms i Represents the memory electromagnetic interference intensity of the i-th sub-time zone.
[0099] The storage data analysis model can be used to calculate the storage performance evaluation value of the target device in each sub-time zone based on the disk detection arm vibration frequency, solid-state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time of the target device in each sub-time zone. The storage data analysis model can be a pre-built mathematical model for calculating the storage performance evaluation value based on the disk detection arm vibration frequency, solid-state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time. Its calculation formula is as shown in formula (4). The storage system is an important component of the computer for long-term data storage, and its performance is directly related to the data reading and writing speed and the overall performance of the system. The storage data analysis model closely combines the actual working status and performance characteristics of the storage system by collecting data such as the disk detection arm vibration frequency, solid-state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time. The storage data analysis model can comprehensively evaluate the read and write performance, stability, and reliability of the storage system, timely discover potential storage bottlenecks or failure risks, and provide a scientific basis for the optimization and maintenance of the storage system.
[0100]
[0101] Among them, CD i represents the storage performance evaluation value of the ith sub-time zone, Df i represents the vibration frequency of the disk detection arm in the ith sub-time zone, De i represents the SSD entropy value of the ith sub-time zone, Ds i represents the storage medium magnetization intensity in the ith sub-time region, Dt i Indicates the disk array reconstruction time of the i-th time sub-zone.
[0102] In a possible implementation, the system monitoring data includes power supply data, heat dissipation data, and environmental data;
[0103] Based on the system monitoring data of the target device in each sub-time zone, the comprehensive quality assessment value of the infrastructure in each sub-time zone is calculated, including:
[0104] Based on the power data, heat dissipation data and environmental data of the target device in each sub-time zone, calculate the power quality assessment value, heat dissipation quality assessment value and environmental quality assessment value of each sub-time zone;
[0105] Based on the power quality assessment value, heat dissipation quality assessment value, and environmental quality assessment value of each sub-time zone, the comprehensive infrastructure quality assessment value of each sub-time zone is calculated.
[0106] In the embodiment of the present disclosure, the system monitoring data may include power data, heat dissipation data and environmental data, and the system monitoring data of the target device in each sub-time area is collected, that is, the power data, heat dissipation data and environmental data of the target device in each sub-time area are collected. Correspondingly, when calculating the comprehensive quality assessment value of the infrastructure in each sub-time area based on the system monitoring data of the target device in each sub-time area, the power quality assessment value, heat dissipation quality assessment value and environmental quality assessment value of the target device in each sub-time area can be calculated based on the power data, heat dissipation data and environmental data of the target device in each sub-time area. For example, based on the power data of the target device in each sub-time area, the power quality assessment value of the target device in each sub-time area is calculated; based on the heat dissipation data of the target device in each sub-time area, the heat dissipation quality assessment value of the target device in each sub-time area is calculated; based on the environmental data of the target device in each sub-time area, the environmental quality assessment value of the target device in each sub-time area is calculated. Then, based on the power quality assessment value, heat dissipation quality assessment value and environmental quality assessment value of the target device in each sub-time area, the comprehensive quality assessment value of the infrastructure of the target device in each sub-time area can be calculated. For example, the infrastructure data analysis model can be used to calculate the comprehensive quality assessment value of infrastructure. The calculation formula for the comprehensive quality assessment value of infrastructure can be as follows:
[0107] σ i =(SE i +SH i +SR i )×μ (5)
[0108] Among them, σ i represents the comprehensive quality assessment value of infrastructure in the ith sub-time zone, μ represents other influencing factors of the comprehensive quality assessment value of infrastructure, and SR i represents the environmental quality assessment value of the ith sub-time zone; SH i represents the heat dissipation quality evaluation value of the i-th sub-time zone; SE i Indicates the power quality assessment value of the i-th time sub-zone.
[0109] It is understandable that infrastructure is the basic guarantee for the stable operation of computer systems, and power supply, heat dissipation and environmental conditions have an important impact on system performance. The infrastructure data analysis model closely combines the actual working conditions and environmental factors of the infrastructure by collecting actual operating data such as harmonic distortion rate, surge current peak, fan airflow turbulence intensity, and environmental humidity gradient. The comprehensive quality assessment value of the infrastructure can monitor and evaluate the health status and potential risks of the infrastructure in real time, promptly detect and warn of potential hardware failures or environmental problems, ensure the stable operation of the system, and improve the overall computing power output. In addition, through in-depth analysis of infrastructure data, it can also provide a scientific basis for system upgrades and maintenance to ensure that the system is always in the best condition.
[0110] In a further possible implementation, the power supply data includes harmonic distortion rate, surge current peak value, insulation resistance value, and power factor; the heat dissipation data includes fan airflow turbulence intensity, phase change frequency inside the heat pipe, wind duct fluid Reynolds number, and hot end temperature difference conductivity; the environmental data includes electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient;
[0111] Based on the power data, heat dissipation data, and environment data of the target device in each sub-time zone, the power quality assessment value, heat dissipation quality assessment value, and environment quality assessment value of each sub-time zone are calculated, including:
[0112] The power quality assessment value of each sub-time zone is calculated through the power data analysis model based on the harmonic distortion rate, surge current peak value, insulation resistance value, and power factor of each sub-time zone;
[0113] The heat dissipation quality evaluation value of each sub-time zone is calculated through the heat dissipation data analysis model based on the fan airflow turbulence intensity, the phase change frequency inside the heat pipe, the air duct fluid Reynolds number, and the hot end temperature difference conductivity of each sub-time zone;
[0114] The environmental quality assessment value of each sub-time area is calculated through the environmental data analysis model based on the electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient of each sub-time area.
[0115] In the disclosed embodiment, the power supply data includes harmonic distortion rate, surge current peak value, insulation resistance value, and power factor; the heat dissipation data includes fan airflow turbulence intensity, internal phase change frequency of heat pipe, wind duct fluid Reynolds number, and hot end temperature difference conductivity; the environmental data includes electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient. Accordingly, based on the power supply data, heat dissipation data, and environmental data of the target device in each sub-time zone, when calculating the power supply quality assessment value, heat dissipation quality assessment value, and environmental quality assessment value of each sub-time zone, the following may be included:
[0116] The power quality evaluation value of each sub-time zone is calculated based on the harmonic distortion rate, surge current peak value, insulation resistance value, and power factor of each sub-time zone through the power data analysis model. The power data analysis model is established to analyze the power data and calculate the power quality evaluation value. The calculation formula is as shown in formula (6).
[0117]
[0118] Among them, SE i represents the power quality assessment value of the ith sub-time zone, Ed i represents the harmonic distortion rate of the ith sub-time region, El i represents the peak value of the surge current in the ith sub-time zone, Er i Indicates the insulation resistance value of the ith sub-time zone, Ew i represents the power factor of the ith sub-time zone, El max Indicates the peak value of the inrush current in the target time zone.
[0119] The heat dissipation data analysis model is used to calculate the heat dissipation quality evaluation value of each sub-time zone based on the fan airflow turbulence intensity, the phase change frequency inside the heat pipe, the duct fluid Reynolds number, and the hot end temperature difference conductivity in each sub-time zone. The heat dissipation data analysis model is used to analyze the heat dissipation data and calculate the heat dissipation quality evaluation value. The calculation formula is as shown in formula (7).
[0120]
[0121] Among them, SH i represents the heat dissipation quality evaluation value of the i-th sub-time zone, Hf i represents the fan airflow turbulence intensity in the ith sub-time zone, Hd i represents the phase change frequency inside the heat pipe in the ith sub-time zone, Hc iReynolds number of the duct fluid in the ith sub-time zone, Hp i represents the hot end temperature difference conductivity of the i-th sub-time zone, Hf max Indicates the maximum fan airflow turbulence intensity in the target time zone, Hf min Indicates the minimum fan airflow turbulence intensity for the target time zone.
[0122] The environmental data analysis model is used to calculate the environmental quality assessment value of each sub-time zone based on the electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient of each sub-time zone. The environmental data analysis model is used to analyze environmental data and calculate the environmental quality assessment value. The calculation formula is shown in formula (8).
[0123]
[0124] Among them, SR i represents the environmental quality assessment value of the ith sub-time zone, Rs i represents the electromagnetic radiation intensity of the ith sub-time region, Rl i represents the electrostatic discharge frequency of the ith sub-time zone, Rm i represents the ambient dust particle density in the ith sub-time zone, Rh i Represents the ambient humidity gradient of the i-th sub-time zone.
[0125] In some possible implementations, it further includes:
[0126] When the comprehensive computing power evaluation value of the target device during the running time is less than the preset comprehensive computing power evaluation value, an early warning signal is output.
[0127] In the embodiment of the present disclosure, the comprehensive computing power evaluation value can also be compared with the preset comprehensive computing power preset evaluation value to determine whether the comprehensive computing power evaluation value of the target device during the running time is less than the comprehensive computing power preset evaluation value. If the comprehensive computing power evaluation value of the target device during the running time is less than the comprehensive computing power preset evaluation value, an early warning signal is output. Exemplarily, the comprehensive computing power preset evaluation value can be marked as ηDef. When ηDef<η, it means that the comprehensive computing power evaluation value in the target time area (that is, during the running time) is greater than the comprehensive computing power preset evaluation value, indicating that the computing power resources of the target computer perform well, and the collection and analysis of computing performance related data and infrastructure data are maintained. When ηDef>η, it means that the comprehensive computing power evaluation value of the target time area is less than the comprehensive computing power preset evaluation value, indicating that the computing power resources of the target computer perform poorly, and an early warning signal is sent to the management terminal.
[0128] To make the computing power evaluation method provided by the embodiment of the present disclosure clearer, the following is an explanation with reference to specific examples. The computing power evaluation method provided by the embodiment of the present disclosure may include the following steps:
[0129] Step 1: Time zone division: used to determine the target computer's operating time as the target time zone, and divide the target time zone into various sub-time zones by equal time division, which are marked as 1, 2...n in sequence.
[0130] Step 2: Computing performance related data collection: used to collect processor related data, memory related data and storage related data of each sub-time zone, and transmit the collected data to step 3.
[0131] Step 3: Computing performance related data analysis: including a processor related data analysis unit, a memory related data analysis unit and a storage related data analysis unit, which are used to analyze the data transmitted by the computing performance related data acquisition module and transmit the analysis results to step 6.
[0132] The processor-related data analysis unit is used to establish a processor data analysis model, import the processor data transmitted by the computing performance data acquisition module into the processor data analysis model, and calculate the processor performance evaluation value of each sub-time zone. The memory-related data analysis unit is used to establish a memory data analysis model, import the memory data transmitted by the computing performance data acquisition module into the memory data analysis model, and calculate the memory performance evaluation value of each sub-time zone. The storage-related data analysis unit is used to establish a storage data analysis model, import the storage data transmitted by the computing performance data acquisition module into the storage data analysis model, and calculate the storage performance evaluation value of each sub-time zone.
[0133] Step 4: Infrastructure data collection: used to collect power data, heat dissipation data and environmental data of each sub-time zone, and transmit the collected data to step 5.
[0134] Step 5: Infrastructure data analysis: including a power data analysis unit, a heat dissipation data analysis unit and an environmental data analysis unit, which are used to analyze the data transmitted by the infrastructure data acquisition module and transmit the analysis results to step 6.
[0135] The power data analysis unit is used to establish a power data analysis model, import the power data transmitted by the infrastructure data acquisition module into the power data analysis model, and calculate the power quality assessment value of each sub-time zone. The heat dissipation data analysis unit is used to establish a heat dissipation data analysis model, import the heat dissipation data transmitted by the infrastructure data acquisition module into the heat dissipation data analysis model, and calculate the heat dissipation quality assessment value of each sub-time zone. The environment data analysis unit is used to establish an environment data analysis model, import the environment data transmitted by the infrastructure data acquisition module into the environment data analysis model, and calculate the environment quality assessment value of each sub-time zone.
[0136] Step 6: Comprehensive analysis: used to establish a comprehensive analysis model, import the data transmitted by the computing performance-related data analysis module and the infrastructure data analysis module into the comprehensive analysis model, calculate the comprehensive computing power evaluation value of the target time zone, and transmit it to step 7.
[0137] Step 7: Early warning: It is used to establish a preset comprehensive computing power evaluation value, judge the comprehensive computing power evaluation value of the target time zone through the preset comprehensive computing power evaluation value, and issue an early warning signal based on the judgment result.
[0138] It can be seen that this embodiment involves an intelligent evaluation method for computing power resources, which can accurately monitor computer performance by subdividing time zones and modular divisions, collect performance data such as processors, memory, storage, and infrastructure data such as power supply, heat dissipation, and environment, realize real-time or regular analysis, optimize performance, ensure system stability, and issue alarms in a timely manner through comprehensive analysis and early warning modules to ensure the normal operation of the system, thereby realizing a comprehensive evaluation of computing power resources. Specifically:
[0139] The time zone division module divides the target computer's running time into multiple sub-time zones, which can more finely analyze and monitor the computer's performance in different time periods, help discover potential performance bottlenecks or resource usage anomalies, and thus perform targeted optimization; the performance data of key components such as processors, memory, and storage are collected through the computing performance-related data acquisition module, which is the basis for system performance analysis and optimization. Through real-time or periodic data collection, the system can capture performance changes in a timely manner and provide accurate data support for performance tuning; the collected performance data is analyzed and interpreted through the computing performance-related data analysis module, and key performance indicators and trends are extracted, which helps discover performance bottlenecks, resource contention and other problems, and provides targeted optimization suggestions; the infrastructure data acquisition module collects infrastructure-related data such as power supply, heat dissipation, and environment, which is crucial for evaluating the stability and reliability of the system. By monitoring the infrastructure status in real time, the system can promptly discover potential hardware Failures or environmental problems, and take corresponding preventive measures to ensure the stable operation of the system; through the infrastructure data analysis module, in-depth analysis of infrastructure data is carried out to evaluate the health status and potential risks of the system, which is helpful to discover potential precursors of hardware failures, heat dissipation problems, etc., and to provide early warning and intervention. In addition, infrastructure data analysis can also provide a scientific basis for system upgrades and maintenance to ensure that the system is always in the best condition; through the comprehensive analysis module, the computing performance data and infrastructure data are comprehensively analyzed to evaluate the overall performance and stability of the system. Comprehensive analysis helps to discover cross-domain performance problems, such as performance degradation caused by hardware failures, the impact of environmental factors on system performance, etc. Through comprehensive analysis, the system can provide more comprehensive and accurate performance evaluation results, and provide administrators with strong decision-making support; through the early warning module, timely alarms are issued to notify administrators, which helps administrators to discover problems in time and take corresponding measures to avoid further expansion of problems or affecting the normal operation of the system.
[0140] In summary, this embodiment has significant technical advantages in terms of data management refinement, data processing capabilities, comprehensive analysis functions, and system stability, and can better meet users' needs for computing resource evaluation and provide managers with more efficient, convenient, and reliable data management services. The details are as follows:
[0141] Accurate time zone division: Divide the target computer's running time into multiple sub-time zones for more detailed performance analysis and monitoring.
[0142] Multi-dimensional data collection: Collect performance data of key components such as processors, memory, storage, and infrastructure data such as power supply, heat dissipation, and environment.
[0143] Intelligent data analysis: Use advanced data analysis models to conduct in-depth analysis of collected data and extract key performance indicators and trends.
[0144] Comprehensive analysis: Comprehensively analyze computing performance data and infrastructure data to evaluate the overall performance and stability of the system.
[0145] Early warning mechanism: Establish an early warning module to judge the comprehensive computing power evaluation value through preset evaluation values, and issue early warning signals when necessary to help users intervene and adjust in time.
[0146] The specific implementation and technical effects of each step of this embodiment are similar to those of the above method embodiments, and will not be repeated here.
[0147] Based on the same inventive concept, the present disclosure also provides a computing power evaluation device. Figure 2 As shown, the computing power evaluation device 200 includes:
[0148] A division module 210, for dividing the running time of the target device into a plurality of sub-time zones;
[0149] The performance data collection module 220 is used to collect the performance data of the target device in each sub-time zone; wherein the performance data includes processor performance data, memory performance data and storage performance data;
[0150] A first calculation module 230, configured to calculate a performance evaluation value of each sub-time zone based on the performance data in each sub-time zone; wherein the performance evaluation value includes a processor performance evaluation value, a memory performance evaluation value, and a storage performance evaluation value;
[0151] A system data collection module 240, used to collect system monitoring data of the target device in each sub-time zone;
[0152] A second calculation module 250, configured to calculate a comprehensive quality assessment value of infrastructure in each of the sub-time zones based on the system monitoring data of the target device in each of the sub-time zones;
[0153] The evaluation module 260 is used to calculate the comprehensive computing power evaluation value of the target device during the running time based on the comprehensive quality evaluation value of the infrastructure, the processor performance evaluation value, the memory performance evaluation value, and the storage performance evaluation value in each sub-time zone.
[0154] In a possible implementation, the performance data collection module 220 includes:
[0155] A first collection unit is used to collect processor performance data of the target device in each sub-time zone; wherein the processor performance data includes at least one of a transistor current leakage rate, a power waste ratio, a number of instruction pipeline pauses, and a Thespansky entropy value;
[0156] A second collection unit is used to collect memory performance data of the target device in each sub-time zone; wherein the memory performance data includes at least one of a cache hit rate, a bus contention frequency, an ECC error rate, and a memory electromagnetic interference intensity;
[0157] The third acquisition unit is used to collect storage performance data of the target device in each sub-time zone; wherein the storage performance data includes at least one of the vibration frequency of the disk detection arm, the entropy value of the solid state hard disk, the magnetization intensity of the storage medium, and the disk array reconstruction time.
[0158] In a possible implementation manner, the first calculation module 230 includes:
[0159] A first calculation unit is used to calculate a processor performance evaluation value of the target device in each sub-time region based on the transistor current leakage rate, power waste ratio, instruction pipeline pause times, and Therspansky entropy value of the target device in each sub-time region through a processor data analysis model;
[0160] A second calculation unit is used to calculate the memory performance evaluation value of the target device in each sub-time zone based on the cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity of the target device in each sub-time zone through a memory data analysis model;
[0161] The third calculation unit is used to calculate the storage performance evaluation value of the target device in each sub-time zone based on the disk detection arm vibration frequency, solid state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time of the target device in each sub-time zone through a storage data analysis model.
[0162] In a possible implementation, the system monitoring data includes power supply data, heat dissipation data, and environmental data;
[0163] The second calculation module 250 includes:
[0164] A fourth calculation unit, configured to calculate a power quality assessment value, a heat dissipation quality assessment value, and an environment quality assessment value of each of the sub-time zones based on the power data, heat dissipation data, and environment data of the target device in each of the sub-time zones;
[0165] The fifth calculation unit is used to calculate the comprehensive quality assessment value of the infrastructure in each of the sub-time zones based on the power quality assessment value, the heat dissipation quality assessment value, and the environment quality assessment value of each of the sub-time zones.
[0166] In a possible implementation, the power supply data includes harmonic distortion rate, surge current peak value, insulation resistance value, and power factor; the heat dissipation data includes fan airflow turbulence intensity, internal phase change frequency of heat pipe, wind duct fluid Reynolds number, and hot end temperature difference conductivity; the environmental data includes electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient;
[0167] The fourth computing unit is used for:
[0168] Calculate the power quality assessment value of each of the sub-time zones based on the harmonic distortion rate, surge current peak value, insulation resistance value, and power factor of each of the sub-time zones through a power data analysis model;
[0169] Calculate the heat dissipation quality evaluation value of each of the sub-time zones through a heat dissipation data analysis model based on the fan airflow turbulence intensity, the internal phase change frequency of the heat pipe, the air duct fluid Reynolds number, and the hot end temperature difference conductivity of each of the sub-time zones;
[0170] The environmental quality assessment value of each sub-time zone is calculated through the environmental data analysis model based on the electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient of each sub-time zone.
[0171] In a possible implementation, it further includes:
[0172] The early warning module is used to output an early warning signal when the comprehensive computing power evaluation value of the target device during the operating time is less than the preset comprehensive computing power evaluation value.
[0173] The specific implementation method and technical effect of the device provided in the embodiment of the present disclosure are similar to those of the above-mentioned method embodiment, and will not be repeated here.
[0174] According to an embodiment of the present disclosure, the present disclosure also discloses an electronic device, a computer-readable storage medium, and a computer program product.
[0175] Figure 3A schematic block diagram of an example electronic device 300 that can be used to implement an embodiment of the present disclosure is shown. The electronic device 300 is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely examples and are not intended to limit the implementation of the present disclosure described and / or required herein.
[0176] like Figure 3 As shown, the electronic device 300 includes a computing unit 301, which can perform various appropriate actions and processes according to a computer program stored in a read-only memory (ROM) 302 or a computer program loaded from a storage unit 308 into a random access memory (RAM) 303. In the RAM 303, various programs and data required for the operation of the device 300 can also be stored. The computing unit 301, the ROM 302, and the RAM 303 are connected to each other via a bus 304. An input / output (I / O) interface 305 is also connected to the bus 304.
[0177] A number of components in the electronic device 300 are connected to the I / O interface 305, including: an input unit 306, such as a keyboard, a mouse, etc.; an output unit 307, such as various types of displays, speakers, etc.; a storage unit 308, such as a disk, an optical disk, etc.; and a communication unit 309, such as a network card, a modem, a wireless communication transceiver, etc. The communication unit 309 allows the electronic device 300 to exchange information / data with other devices through a computer network such as the Internet and / or various telecommunication networks.
[0178] The computing unit 301 may be a variety of general and / or special processing components with processing and computing capabilities. Some examples of the computing unit 301 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various dedicated artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, digital signal processors (DSPs), and any appropriate processors, controllers, microcontrollers, etc. The computing unit 301 performs the various methods and processes described above, such as a computing power evaluation method. For example, in some embodiments, the computing power evaluation method may be implemented as a computer software program, which is tangibly contained in a machine-readable medium, such as a storage unit 308. In some embodiments, part or all of the computer program may be loaded and / or installed on the electronic device 300 via ROM 302 and / or communication unit 309. When the computer program is loaded into RAM 303 and executed by the computing unit 301, one or more steps of the computing power evaluation method described above may be performed. Alternatively, in other embodiments, the computing unit 301 may be configured to perform the computing power evaluation method in any other appropriate manner (e.g., by means of firmware).
[0179] Various implementations of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), application specific standard products (ASSPs), systems on chips (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various implementations can include: being implemented in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which can be a special purpose or general purpose programmable processor that can receive data and instructions from a storage system, at least one input device, and at least one output device, and transmit data and instructions to the storage system, the at least one input device, and the at least one output device.
[0180] The program code of the computer program product for implementing the method of the present disclosure can be written in any combination of one or more programming languages. These program codes can be provided to a processor or controller of a general-purpose computer, a special-purpose computer, or other programmable data processing device, so that the program code, when executed by the processor or controller, enables the functions / operations specified in the flow chart and / or block diagram to be implemented. The program code can be executed entirely on the machine, partially on the machine, partially on the machine as a stand-alone software package and partially on a remote machine, or entirely on a remote machine or server.
[0181] In the context of the present disclosure, a computer-readable storage medium may be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, device, or equipment. A computer-readable storage medium may be a machine-readable signal medium or a machine-readable storage medium. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or equipment, or any suitable combination of the foregoing. A more specific example of a computer-readable storage medium may include an electrical connection based on one or more lines, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
[0182] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user can provide input to the computer. Other types of devices can also be used to provide interaction with the user; for example, the feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including acoustic input, voice input, or tactile input).
[0183] The systems and techniques described herein can be implemented in a computing system that includes backend components (e.g., as a data server), or a computing system that includes middleware components (e.g., an application server), or a computing system that includes frontend components (e.g., a user computer with a graphical user interface or a web browser through which a user can interact with implementations of the systems and techniques described herein), or a computing system that includes any combination of such backend components, middleware components, or frontend components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: a local area network (LAN), a wide area network (WAN), the Internet, and a blockchain network.
[0184] A computer system may include a client and a server. The client and the server are generally remote from each other and usually interact through a communication network. The relationship between the client and the server is generated by computer programs running on the corresponding computers and having a client-server relationship with each other. The server may be a cloud server, also known as a cloud computing server or cloud host, which is a host product in the cloud computing service system to solve the defects of difficult management and weak business scalability in traditional physical hosts and VPS services ("Virtual Private Server", or "VPS" for short). The server may also be a server of a distributed system, or a server combined with a blockchain.
[0185] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps recorded in this disclosure can be executed in parallel, sequentially or in different orders, as long as the desired results of the technical solutions disclosed in this disclosure can be achieved, and this document does not limit this.
[0186] The above specific implementations do not constitute a limitation on the protection scope of the present disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
Claims
1. A computing power evaluation method, characterized in that: include: Divide the target device's operating time into multiple sub-time zones; Collecting performance data of the target device in each sub-time zone; wherein the performance data includes processor performance data, memory performance data and storage performance data; Based on the performance data in each sub-time zone, calculating the performance evaluation value of each sub-time zone; wherein the performance evaluation value includes a processor performance evaluation value, a memory performance evaluation value, and a storage performance evaluation value; Collecting system monitoring data of the target device in each of the sub-time zones; Calculate the comprehensive quality assessment value of the infrastructure in each of the sub-time zones based on the system monitoring data of the target device in each of the sub-time zones; Based on the comprehensive quality assessment value of the infrastructure, the processor performance assessment value, the memory performance assessment value, and the storage performance assessment value in each sub-time zone, the comprehensive computing power assessment value of the target device during the running time is calculated.
2. The computing power evaluation method according to claim 1, characterized in that: The collecting the performance data of the target device in each sub-time zone includes: Collecting processor performance data of the target device in each sub-time zone; wherein the processor performance data includes at least one of a transistor current leakage rate, a power waste ratio, a number of instruction pipeline pauses, and a Thespansky entropy value; Collecting memory performance data of the target device in each sub-time zone; wherein the memory performance data includes at least one of cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity; Collect storage performance data of the target device in each sub-time zone; wherein the storage performance data includes at least one of the following: disk detection arm vibration frequency, solid state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time.
3. The computing power evaluation method according to claim 2, characterized in that: The calculating the performance evaluation value of each sub-time zone based on the performance data in each sub-time zone includes: Calculate the processor performance evaluation value of the target device in each sub-time zone by using a processor data analysis model based on the transistor current leakage rate, power waste ratio, instruction pipeline pause times, and Therspansky entropy value of the target device in each sub-time zone; Calculate the memory performance evaluation value of the target device in each sub-time zone based on the cache hit rate, bus contention frequency, ECC error rate, and memory electromagnetic interference intensity of the target device in each sub-time zone through a memory data analysis model; The storage performance evaluation value of the target device in each sub-time zone is calculated through a storage data analysis model based on the disk detection arm vibration frequency, solid state hard disk entropy value, storage medium magnetization intensity, and disk array reconstruction time of the target device in each sub-time zone.
4. The computing power evaluation method according to claim 1, characterized in that: The system monitoring data includes power supply data, heat dissipation data and environmental data; The calculating the comprehensive quality assessment value of the infrastructure in each of the sub-time zones based on the system monitoring data of the target device in each of the sub-time zones comprises: Calculate the power quality assessment value, the heat dissipation quality assessment value, and the environmental quality assessment value of each of the sub-time zones based on the power data, heat dissipation data, and environmental data of the target device in each of the sub-time zones; Based on the power quality assessment value, heat dissipation quality assessment value, and environment quality assessment value of each of the sub-time zones, a comprehensive infrastructure quality assessment value of each of the sub-time zones is calculated.
5. The computing power evaluation method according to claim 4, characterized in that: The power supply data includes harmonic distortion rate, surge current peak value, insulation resistance value, and power factor; the heat dissipation data includes fan airflow turbulence intensity, internal phase change frequency of heat pipe, wind duct fluid Reynolds number, and hot end temperature difference conductivity; the environmental data includes electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient; The calculating, based on the power data, heat dissipation data and environment data of the target device in each sub-time zone, a power quality assessment value, a heat dissipation quality assessment value and an environment quality assessment value of each sub-time zone includes: Calculate the power quality assessment value of each of the sub-time zones based on the harmonic distortion rate, surge current peak value, insulation resistance value, and power factor of each of the sub-time zones through a power data analysis model; Calculate the heat dissipation quality evaluation value of each of the sub-time zones through a heat dissipation data analysis model based on the fan airflow turbulence intensity, the internal phase change frequency of the heat pipe, the air duct fluid Reynolds number, and the hot end temperature difference conductivity of each of the sub-time zones; The environmental quality assessment value of each sub-time zone is calculated through the environmental data analysis model based on the electromagnetic radiation intensity, electrostatic discharge frequency, environmental dust particle density, and environmental humidity gradient of each sub-time zone.
6. The computing power evaluation method according to claim 1, characterized in that: Also includes; When the comprehensive computing power evaluation value of the target device during the operating time is less than the preset comprehensive computing power evaluation value, an early warning signal is output.
7. A computing power evaluation device, characterized in that: include: A partitioning module, used to divide the running time of the target device into multiple sub-time areas; A performance data collection module, used to collect performance data of the target device in each sub-time zone; wherein the performance data includes processor performance data, memory performance data and storage performance data; A first calculation module, configured to calculate a performance evaluation value of each sub-time zone based on the performance data in each sub-time zone; wherein the performance evaluation value includes a processor performance evaluation value, a memory performance evaluation value, and a storage performance evaluation value; A system data acquisition module, used for acquiring system monitoring data of the target device in each sub-time zone; A second calculation module, configured to calculate a comprehensive quality assessment value of infrastructure in each of the sub-time zones based on system monitoring data of the target device in each of the sub-time zones; An evaluation module is used to calculate the comprehensive computing power evaluation value of the target device during the running time based on the comprehensive quality evaluation value of the infrastructure, the processor performance evaluation value, the memory performance evaluation value, and the storage performance evaluation value in each sub-time zone.
8. An electronic device, characterized in that: include: processor; a memory for storing instructions executable by the processor; The processor is configured to execute the instructions to implement the method according to any one of claims 1 to 6.
9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the method according to any one of claims 1 to 6 is implemented.
10. A computer program product comprising a computer program / instructions, characterized in that When the computer program / instructions are executed by a processor, the method according to any one of claims 1 to 6 is implemented.
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