Chip temperature real-time prediction method and system, storage medium and electronic equipment

Abstract

The invention provides a chip temperature real-time prediction method and system, a storage medium and electronic equipment, and the method comprises the following steps: constructing a temperature label data set of a chip, the temperature label data including temperature information and power information of each node of the chip; acquiring a temperature acquisition data set of the chip, wherein the temperature acquisition data set comprises real-time temperature, historical power and current power of each node of the chip; constructing a chip temperature real-time prediction model; and training the chip temperature real-time prediction model based on the temperature label data set and the temperature acquisition data set so as to predict the real-time temperature of the chip based on the trained chip temperature real-time prediction model. According to the chip temperature real-time prediction method and system, the storage medium and the electronic equipment, real-time prediction of the chip temperature is realized based on the graph convolutional neural network, the accuracy is high, and the speed is high.

Description

Technical Field

[0001] The present invention relates to the technical field of data processing based on deep learning, and relates to a chip temperature real-time prediction method, system, storage medium and electronic device. Background Art

[0002] Chip temperature prediction is a key issue in the semiconductor field, and a series of mature analysis techniques have been developed. For example, analytical methods represented by commercial finite element analysis software and compact thermal models are widely adopted in the industry, which can perform extremely high-precision modeling and thermal simulation of chips. However, as chip design develops towards 3D and high integration, traditional analytical methods face a series of challenges in thermal analysis of complex chip designs, such as expensive computing costs, high modeling difficulty, and slow reasoning speed.

[0003] The main difficulty of traditional chip thermal analysis is that it models the chip temperature prediction as a partial differential equation in a high-dimensional space. As the chip size and the number of thermal cores increase dramatically, the dimension of the equation also grows exponentially, so the computational and time costs required to solve the problem are also extremely expensive.

[0004] Deep neural networks have unique advantages in solving partial differential equations in high-dimensional space. They can obtain approximate functions of solutions in high-dimensional space through a large amount of data training, thereby avoiding direct solutions to the original problem and saving computational and time costs. At present, there are some chip thermal analysis solutions based on deep learning. For example, a physics-informed neural network (PINN) is used to solve chip temperature, and deep learning is used to solve partial differential equations (PDE) such as heat conduction. In addition, data-driven generative adversarial networks (GAN) and long short-term memory networks (LSTM) are also used for predictive estimation of chip heat maps.

[0005] However, although current research methods have achieved certain results, they still face the following challenges and limitations:

[0006] (1) Acquisition of data sets is critical, especially obtaining chip temperature and power data in the real world, which is a difficult task in itself;

[0007] (2) The interpretability of existing models is still insufficient. Simplifying complex chip problems into images and using artificial intelligence-based image analysis methods such as convolutional neural networks (CNNs) may be too simplistic and cannot fully capture the multidimensionality of the problem.

[0008] (3) When there are a large number of heat sources in the chip, the accuracy of existing methods may be affected, and the required computing resources will also increase significantly. Summary of the invention

[0009] The present invention provides a chip temperature real-time prediction method, system, storage medium and electronic device, which realize the real-time prediction of chip temperature based on graph convolutional neural network with high accuracy and fast speed.

[0010] In a first aspect, the present invention provides a method for real-time prediction of chip temperature, the method comprising the following steps: constructing a temperature label data set of a chip, the temperature label data including temperature information and power information of each node of the chip; acquiring a temperature acquisition data set of the chip, the temperature acquisition data including real-time temperature, historical power and current power of each node of the chip; constructing a real-time prediction model for chip temperature; training the real-time prediction model for chip temperature based on the temperature label data set and the temperature acquisition data set, so as to predict the real-time temperature of the chip based on the trained real-time prediction model for chip temperature.

[0011] In an implementation of the first aspect, constructing a temperature tag dataset of a chip includes the following steps:

[0012] Based on the MatEx open source chip temperature simulation tool, layout files containing 16, 36, and 49 nodes are designed;

[0013] assigning a random power value between 0 and 20 watts to each node of the chip at different time points based on a random function;

[0014] Based on an automated script, a preset number of groups of temperature label data are generated according to the layout file and the random power value to construct the temperature label data set.

[0015] In an implementation of the first aspect, building a chip temperature real-time prediction model includes the following steps:

[0016] Constructing a graph convolutional neural network, wherein the graph convolutional neural network includes three graph convolutional neural network layers and a multi-layer perceptron;

[0017] Based on the spatial relationship of the internal nodes of the chip, a learnable weight parameter is assigned to each edge of the graph convolutional neural network;

[0018] An adjacency matrix corresponding to the node is constructed, so that the adjacency matrix and the temperature collection data are used as input data of the graph convolutional neural network.

[0019] In an implementation of the first aspect, the graph convolutional neural network layer is used to perform node aggregation calculation on input data of the graph convolutional neural network;

[0020] in, F l represents the input feature, F l+1 represents the node feature matrix after a graph convolution operation; E represents the edge weight matrix, and each non-zero element in E represents the weight parameter of an edge; A represents the adjacency matrix containing self-loops, D represents the degree matrix of the node, Θ represents the trainable weight matrix, and ⊙ represents element-by-element multiplication.

[0021] In an implementation manner of the first aspect, the adjacency matrix adopts an adjacency matrix corresponding to a fully connected graph.

[0022] In an implementation of the first aspect, constructing an adjacency matrix corresponding to the node includes the following steps:

[0023] For each node, calculate the Euclidean distance between the node and all nodes;

[0024] Determine whether the Euclidean distance is less than a cutoff radius;

[0025] If it is smaller than the cutoff radius, a connection relationship between the two nodes is established;

[0026] If it is not less than the cutoff radius, the connection relationship between the two nodes is not established.

[0027] In an implementation of the first aspect, constructing an adjacency matrix corresponding to the node includes the following steps:

[0028] Set the number of clusters k;

[0029] Perform a clustering operation on all nodes and divide all nodes into k clusters;

[0030] A fully connected relationship is established for all nodes in each cluster, and a virtual super node is set in each cluster. The virtual super node is connected to all child nodes in the cluster, and the feature value of the virtual super node is the average of all child nodes in the cluster;

[0031] Establish a fully connected relationship between the virtual super nodes of all clusters.

[0032] In a second aspect, the present invention provides a chip temperature real-time prediction system, the system comprising a first building module, an acquisition module, a second building module and a prediction module;

[0033] The first building module is used to build a temperature label data set of the chip, and the temperature label data includes temperature information and power information of the chip;

[0034] The acquisition module is used to acquire a temperature acquisition data set of the chip, wherein the temperature acquisition data includes the real-time temperature, historical power and current power of the chip;

[0035] The second building module is used to build a chip temperature real-time prediction model;

[0036] The prediction module is used to train the chip temperature real-time prediction model based on the temperature tag data set and the temperature acquisition data set, so as to predict the real-time temperature of the chip based on the trained chip temperature real-time prediction model.

[0037] In a third aspect, the present invention provides an electronic device, the electronic device comprising: a processor and a memory;

[0038] The memory is used to store computer programs;

[0039] The processor is used to execute the computer program stored in the memory, so that the electronic device executes the above-mentioned chip temperature real-time prediction method.

[0040] In a fourth aspect, the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by an electronic device, implements the above-mentioned chip temperature real-time prediction method.

[0041] As described above, the chip temperature real-time prediction method, system, storage medium and electronic device of the present invention have the following beneficial effects:

[0042] (1) Based on the graph convolutional neural network, the hot spots inside the chip and its operating condition information are mapped into the graph structure, and three methods for constructing the adjacency matrix are proposed to achieve real-time prediction of chip temperature with high accuracy and high speed;

[0043] (2) It can fully explore the spatial topological relationship between hot spots inside the chip, realize real-time prediction of the internal temperature of the chip, and assist the scheduling system in kernel task scheduling;

[0044] (3) The accuracy of chip real-time temperature prediction can be experimentally verified under different node numbers and distributions. Compared with traditional methods, the average inference speed is about 2 ms, which is at least one order of magnitude faster than traditional methods, and the mean square error can be controlled within 0.5, which fully meets the needs of real-time chip temperature prediction. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1Shown is a flow chart of a chip temperature real-time prediction method in one embodiment of the present invention;

[0046] Figure 2 It is a schematic diagram showing a framework of a chip temperature real-time prediction method in one embodiment of the present invention;

[0047] Figure 3 Shown is a schematic diagram of the structure of a chip temperature real-time prediction model in one embodiment of the present invention;

[0048] Figure 4 A schematic diagram showing a loss function of a chip temperature real-time prediction model of the present invention in one embodiment;

[0049] Figure 5 It is a schematic diagram showing a comparison of the time consumption of the chip temperature real-time prediction method of the present invention and the conventional chip temperature real-time prediction method in one embodiment;

[0050] Figure 6 Shown is a schematic diagram of the structure of a chip temperature real-time prediction system in one embodiment of the present invention;

[0051] Figure 7 It is a schematic structural diagram of an electronic device of the present invention in one embodiment. DETAILED DESCRIPTION

[0052] The following describes the embodiments of the present invention by specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that the following embodiments and features in the embodiments can be combined with each other without conflict.

[0053] It should be noted that the illustrations provided in the following embodiments are only schematic illustrations of the basic concept of the present invention, and thus the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0054] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In addition, the technical solutions between the various embodiments can be combined with each other, but they must be based on the ability of ordinary technicians in the field to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such a combination of technical solutions does not exist and is not within the scope of protection required by the present invention.

[0055] Aiming at the temperature prediction of large-size, multi-hot core chips, the chip temperature real-time prediction method, system, storage medium and electronic device of the present invention realize accurate temperature prediction of the internal heat distribution of multi-core chips based on improved graph convolutional neural networks (GCN). A graph structure is used to represent the nodes of the multi-core chip and its characteristic data (such as temperature and power), and a corresponding adjacency matrix is ​​constructed to capture the heat transfer relationship between nodes. By constructing three different adjacency matrices, the thermal structure layout of the chip can be adapted to different scenarios; at the same time, the adjacency matrix is ​​allowed to be updated during the model training process, so as to more accurately capture the heat transfer pattern and realize effective prediction of the temperature distribution of multi-core chips.

[0056] The technical solutions in the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings in the embodiments of the present invention.

[0057] like Figure 1 and Figure 2 As shown, in one embodiment, the chip temperature real-time prediction method of the present invention includes steps S1 to S4.

[0058] Step S1: construct a temperature label data set of a chip, wherein the temperature label data includes temperature information and power information of each node of the chip.

[0059] Specifically, firstly, based on the MatEx open source chip temperature simulation tool, layout files containing 16, 36, and 49 nodes are designed. Then, based on a random function, a random power value between 0 and 20 watts is assigned to each node of the chip at different time points. Finally, based on an automated script, a preset number of groups (such as 5000 groups) of temperature label data are generated according to the layout file and the random power value to construct the temperature label data set. Among them, the temperature label data includes the temperature information and power information of each node of the chip.

[0060] Step S2: Acquire a temperature acquisition data set of the chip, wherein the temperature acquisition data includes the real-time temperature, historical power, and current power of each node of the chip.

[0061] Specifically, the real-time temperature, historical power and current power of each node of the chip are collected to construct a temperature collection data set. The temperature label data set is used as the label data set of the subsequent temperature real-time prediction model; the temperature collection data set is used as the input data set of the temperature real-time prediction model. The input data set and the label data set are divided into a training set and a test set, and the ratio of the two is 4:1.

[0062] Step S3: construct a chip temperature real-time prediction model.

[0063] Specifically, building a chip temperature real-time prediction model includes the following steps:

[0064] 31) A graph convolutional neural network is constructed for the spatial relationship of the hot nodes inside the chip to capture the spatial characteristics of the hot nodes inside the chip. The graph convolutional neural network includes three graph convolutional neural network layers GCN_layer and a multi-layer perceptron. Figure 3 As shown, the graph convolutional neural network includes three graph convolutional neural network layers, two adjacent graph convolutional neural network layers are provided with a ReLU activation function, and the multi-layer perceptron MLP is connected after the third graph convolutional neural network.

[0065] 32) Based on the spatial relationship between the internal nodes of the chip, a learnable weight parameter is assigned to each edge of the graph convolutional neural network.

[0066] The graph convolutional neural network layer is used to perform node aggregation calculation on the input data of the graph convolutional neural network, which can be expressed as: where F l represents the input feature, F l+1 represents the node feature matrix after a graph convolution operation; E represents the edge weight matrix, and each non-zero element in E represents the weight parameter of an edge; A represents the adjacency matrix including self-loops, and D represents the degree matrix of the node. Θ represents the trainable weight matrix, which has the function of feature dimension transformation. ⊙ represents element-by-element multiplication. It is the -1 / 2 power of the degree matrix D. By performing such operations on the degree matrix, the adjacency matrix can be normalized in subsequent calculations. The purpose of this calculation is to symmetric normalize the adjacency matrix. E is a matrix with the same shape and dilution as A. By giving edges learnable weights, the chip temperature real-time prediction model can more accurately simulate and learn the information transmission mechanism between nodes, thereby improving network performance and prediction accuracy.

[0067] 33) constructing an adjacency matrix corresponding to the node, so as to use the adjacency matrix and the temperature collection data as input data of the graph convolutional neural network.

[0068] Among them, the graph convolutional neural network model of the present invention combines the characteristics of hot spot space and heat conduction inside the chip on the basis of the traditional graph neural network model, and can construct the adjacency matrix through three different methods.

[0069] Method 1: The adjacency matrix adopts the adjacency matrix A corresponding to the fully connected graph N×N The fully connected graph structure is dense. Although it captures all the information of the nodes very comprehensively, it also brings several significant problems. In a fully connected graph structure, each node is directly connected to all other nodes, which may contain many irrelevant and unimportant connections, lose the structural information of the graph, and may also cause overfitting problems in model training. In addition, the calculation of GCN is mainly related to the number of edges in the graph. The number of edges in a fully connected dense graph is N. 2 , the amount of calculation will increase quadratically with the number of nodes, especially when the graph is large, which will undoubtedly increase the computational cost and time. Therefore, the fully connected matrix is ​​suitable for situations where the design structure is simple and the number of heat sources is small.

[0070] Method 2: Cutoff radius R based on Euclidean distance 0 Construct an adjacency matrix. Considering that the temperature between heat source nodes is updated through heat transfer, according to Fourier's heat conduction law Where Q represents the heat flux density, it can be seen that Q and temperature gradient When considering heat transfer between different heat source nodes, the distance dx is an important influencing factor. The larger the distance, the smaller the temperature gradient, which leads to a decrease in the heat flux density Q. Therefore, the larger the distance between two heat source nodes, the slower the heat transfer between them; conversely, the faster the heat transfer. Therefore, the truncation radius R based on the Euclidean distance in the present invention is 0 To generate the adjacency matrix, each node only considers the connection relationship between itself and the remaining nearby nodes. For each node, the Euclidean distance between the node and all nodes (including itself) is calculated, and it is determined whether the Euclidean distance is less than the cutoff radius. If it is less than the cutoff radius, the connection relationship between the two nodes is constructed; if it is not less than the cutoff radius, the connection relationship between the two nodes is not constructed.

[0071] Method 3: Set the number of clusters k, where k is a natural number greater than 1. Perform a clustering operation on all nodes and divide all nodes into k clusters. Establish a fully connected relationship for all nodes in each cluster, set a virtual super node in each cluster, the virtual super node is connected to all child nodes in the cluster, and the feature value of the virtual super node is the mean of all child nodes in the cluster; establish a fully connected relationship for the virtual super nodes of all clusters, so as to construct the adjacency matrix.

[0072] Step S4: training the chip temperature real-time prediction model based on the temperature tag data set and the temperature acquisition data set, so as to predict the real-time temperature of the chip based on the trained chip temperature real-time prediction model.

[0073] Specifically, the adjacency matrix and the temperature acquisition data are used as inputs of the chip temperature real-time prediction model. in , the predicted temperature distribution F can be output out , and we get the training set loss function curve and the validation set loss function curve respectively. Among them, f i (n) respectively represent the feature i of each node n input by the chip temperature real-time prediction model and the dimension of each feature, such as the temperature and power consumption of each node of the chip. f(n) represents the output feature value of the chip temperature real-time prediction model, that is, the temperature distribution data of each node n to be predicted. When the training reaches the point where the loss function curve of the training set tends to be stable and decreases very slowly, and the loss function curve of the validation set no longer decreases, the training is stopped and the training parameters of the chip temperature real-time prediction model are saved. Among them, the loss function uses mean square error (MSE) and mean absolute error (MAE) as evaluation indicators of the experiment. Figure 4 FIG. 1 is a schematic diagram of a loss function of the chip temperature real-time prediction model in an embodiment.

[0074] After the chip temperature real-time prediction model is trained, the real-time temperature, historical power, current power and adjacency matrix of each node of the chip collected in real time are input into the trained chip temperature real-time prediction model to obtain the distribution data of the real-time prediction of the chip internal temperature.

[0075] In addition, ablation experiments were conducted on the simulation data set to verify the effect of the graph convolutional neural network model and different adjacency matrix strategies on improving network performance. The chip temperature real-time prediction model was run on the test set with the training parameters to obtain the distribution data of the real-time prediction of the chip internal temperature, and finally the effect of chip temperature prediction was visualized in the form of a heat map.

[0076] In order to verify the real-time capability of the chip temperature real-time prediction model, the inference time of different methods was evaluated. The widely used HotSpot and the chip temperature simulation tool MatEx used in the data set generation in this paper were selected as the comparison method. Figure 5As shown in the figure, the method of the present invention is at least one order of magnitude faster than the traditional thermal modeling method HotSpot method and MatEx tool in inference speed. As the number of nodes increases, the difference can reach several orders of magnitude, and the error is small, and the MSE can be controlled within 0.5. The chip temperature real-time prediction model of the present invention consumes an average of less than 2ms to infer a power change, which fully meets the requirements of real-time temperature prediction.

[0077] The protection scope of the chip temperature real-time prediction method described in the embodiment of the present invention is not limited to the execution order of the steps listed in this embodiment. All solutions implemented by adding, reducing or replacing steps in the prior art based on the principles of the present invention are included in the protection scope of the present invention.

[0078] An embodiment of the present invention also provides a chip temperature real-time prediction system, which can implement the chip temperature real-time prediction method described in the present invention. However, the implementation device of the chip temperature real-time prediction system described in the present invention includes but is not limited to the structure of the chip temperature real-time prediction system listed in this embodiment. All structural deformations and replacements of the prior art made according to the principles of the present invention are included in the protection scope of the present invention.

[0079] like Figure 6 As shown, in one embodiment, the chip temperature real-time prediction system of the present invention includes a first construction module 61 , an acquisition module 62 , a second construction module 63 and a prediction module 64 .

[0080] The first construction module 61 is used to construct a temperature label data set of a chip, and the temperature label data includes temperature information and power information of the chip.

[0081] The acquisition module 62 is connected to the first construction module 61 and is used to acquire a temperature acquisition data set of a chip, wherein the temperature acquisition data includes the real-time temperature, historical power and current power of the chip.

[0082] The second building module 63 is connected to the acquisition module 62 and is used to build a real-time prediction model for chip temperature.

[0083] The prediction module 64 is connected to the second construction module 63, and is used to train the chip temperature real-time prediction model based on the temperature label data set and the temperature acquisition data set, so as to predict the real-time temperature of the chip based on the trained chip temperature real-time prediction model.

[0084] The structures and principles of the first building module 61 , the acquisition module 62 , the second building module 63 and the prediction module 64 correspond to the steps in the above-mentioned chip temperature real-time prediction method, so they are not described here in detail.

[0085] In the several embodiments provided by the present invention, it should be understood that the disclosed system, device or method can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of modules / units is only a logical function division, and there may be other division methods in actual implementation, such as multiple modules or units can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules or units, which can be electrical, mechanical or other forms.

[0086] The modules / units described as separate components may or may not be physically separated, and the components displayed as modules / units may or may not be physical modules, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules / units may be selected according to actual needs to achieve the purpose of the embodiments of the present invention. For example, the functional modules / units in the various embodiments of the present invention may be integrated into one processing module, or each module / unit may exist physically separately, or two or more modules / units may be integrated into one module / unit.

[0087] Those of ordinary skill in the art should further appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0088] The embodiment of the present invention also provides a computer-readable storage medium. A person of ordinary skill in the art can understand that all or part of the steps in the method for implementing the above embodiment can be completed by instructing the processor through a program, and the program can be stored in a computer-readable storage medium, and the storage medium is a non-transitory medium, such as a random access memory, a read-only memory, a flash memory, a hard disk, a solid-state hard disk, a magnetic tape, a floppy disk, an optical disc, and any combination thereof. The above storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or a data center that includes one or more available media integrated. The available medium can be a magnetic medium (e.g., a floppy disk, a hard disk, a tape), an optical medium (e.g., a digital video disc (DVD)), or a semiconductor medium (e.g., a solid-state disk (SSD)), etc.

[0089] An embodiment of the present invention further provides an electronic device, which includes a processor and a memory.

[0090] The memory is used to store computer programs.

[0091] The memory includes: ROM, RAM, disk, USB flash drive, memory card or CD and other media that can store program codes.

[0092] The processor is connected to the memory and is used to execute the computer program stored in the memory so that the electronic device executes the above-mentioned EEG signal acquisition method.

[0093] Preferably, the processor can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.

[0094] like Figure 7As shown, the electronic device of the present invention is in the form of a general computing device. The components of the electronic device may include but are not limited to: one or more processors or processing units 71, a memory 72, and a bus 73 connecting different system components (including the memory 72 and the processing unit 71).

[0095] Bus 73 represents one or more of several types of bus structures, including a memory bus or memory controller, a peripheral bus, an accelerated graphics port, a processor or a local bus using any of a variety of bus architectures. By way of example, these architectures include, but are not limited to, an Industry Standard Architecture (ISA) bus, a Micro Channel Architecture (MAC) bus, an Enhanced ISA bus, a Video Electronics Standards Association (VESA) local bus, and a Peripheral Component Interconnect (PCI) bus.

[0096] Electronic devices typically include a variety of computer system readable media. These media can be any available media that can be accessed by the electronic device, including volatile and non-volatile media, removable and non-removable media.

[0097] The memory 72 may include computer system readable media in the form of volatile memory, such as random access memory (RAM) 721 and / or cache memory 722. The electronic device may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, the storage system 723 may be used to read and write non-removable, non-volatile magnetic media ( Figure 7 not shown, usually called a "hard drive"). Although Figure 7 Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk"), and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, a DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to the bus 73 via one or more data medium interfaces. The memory 72 may include at least one program product having a set (e.g., at least one) of program modules that are configured to perform the functions of the various embodiments of the present invention.

[0098] A program / utility 724 having a set (at least one) of program modules 7241 may be stored, for example, in the memory 72, such program modules 7241 including but not limited to an operating system, one or more application programs, other program modules, and program data, each of which or some combination may include an implementation of a network environment. The program modules 7241 generally perform the functions and / or methods of the embodiments described herein.

[0099] The electronic device may also communicate with one or more external devices (e.g., keyboards, pointing devices, displays, etc.), one or more devices that enable a user to interact with the electronic device, and / or any device that enables the electronic device to communicate with one or more other computing devices (e.g., network cards, modems, etc.). Such communication may be performed via input / output (I / O) interface 74. Furthermore, the electronic device may also communicate with one or more networks (e.g., local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) via network adapter 75. Figure 7 As shown, the network adapter 75 communicates with other modules of the electronic device via the bus 73. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with the electronic device, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0100] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A chip temperature real-time prediction method, characterized in that: The method comprises the following steps: Constructing a temperature label data set of a chip, wherein the temperature label data includes temperature information and power information of each node of the chip; Acquire a temperature acquisition data set of the chip, wherein the temperature acquisition data includes the real-time temperature, historical power and current power of each node of the chip; Build a real-time prediction model for chip temperature; The chip temperature real-time prediction model is trained based on the temperature tag data set and the temperature acquisition data set, so as to predict the real-time temperature of the chip based on the trained chip temperature real-time prediction model.

2. The chip temperature real-time prediction method according to claim 1, characterized in that: Building a temperature label dataset for a chip includes the following steps: Based on the MatEx open source chip temperature simulation tool, layout files containing 16, 36, and 49 nodes are designed; assigning a random power value between 0 and 20 watts to each node of the chip at different time points based on a random function; Based on an automated script, a preset number of groups of temperature label data are generated according to the layout file and the random power value to construct the temperature label data set.

3. The chip temperature real-time prediction method according to claim 1, characterized in that: Building a real-time prediction model for chip temperature includes the following steps: Constructing a graph convolutional neural network, wherein the graph convolutional neural network includes three graph convolutional neural network layers and a multi-layer perceptron; Based on the spatial relationship of the internal nodes of the chip, a learnable weight parameter is assigned to each edge of the graph convolutional neural network; An adjacency matrix corresponding to the node is constructed, so that the adjacency matrix and the temperature collection data are used as input data of the graph convolutional neural network.

4. The chip temperature real-time prediction method according to claim 3, characterized in that: The graph convolutional neural network layer is used to perform node aggregation calculation on the input data of the graph convolutional neural network; in, F l represents the input feature, F l+1 represents the node feature matrix after a graph convolution operation; E represents the edge weight matrix, and each non-zero element in E represents the weight parameter of an edge; A represents the adjacency matrix containing self-loops, D represents the degree matrix of the node, Θ represents the trainable weight matrix, and ⊙ represents element-by-element multiplication.

5. The chip temperature real-time prediction method according to claim 3, characterized in that: The adjacency matrix adopts the adjacency matrix corresponding to the fully connected graph.

6. The chip temperature real-time prediction method according to claim 3, characterized in that: Constructing the adjacency matrix corresponding to the node comprises the following steps: For each node, calculate the Euclidean distance between the node and all nodes; Determine whether the Euclidean distance is less than a cutoff radius; If it is smaller than the cutoff radius, a connection relationship between the two nodes is established; If it is not less than the cutoff radius, the connection relationship between the two nodes is not established.

7. The chip temperature real-time prediction method according to claim 3, characterized in that: Constructing the adjacency matrix corresponding to the node comprises the following steps: Set the number of clusters k; Perform a clustering operation on all nodes and divide all nodes into k clusters; A fully connected relationship is established for all nodes in each cluster, and a virtual super node is set in each cluster. The virtual super node is connected to all child nodes in the cluster, and the feature value of the virtual super node is the average of all child nodes in the cluster; Establish a fully connected relationship between the virtual super nodes of all clusters.

8. A chip temperature real-time prediction system, characterized in that: The system comprises a first construction module, an acquisition module, a second construction module and a prediction module; The first building module is used to build a temperature label data set of the chip, and the temperature label data includes temperature information and power information of the chip; The acquisition module is used to acquire a temperature acquisition data set of the chip, wherein the temperature acquisition data includes the real-time temperature, historical power and current power of the chip; The second building module is used to build a chip temperature real-time prediction model; The prediction module is used to train the chip temperature real-time prediction model based on the temperature tag data set and the temperature acquisition data set, so as to predict the real-time temperature of the chip based on the trained chip temperature real-time prediction model.

9. A storage medium having a computer program stored thereon, characterized in that: When the program is executed by a processor, the chip temperature real-time prediction method according to any one of claims 1 to 7 is implemented.

10. An electronic device, characterized in that: include: Processor and memory; The memory is used to store computer programs; The processor is used to execute the computer program stored in the memory, so that the electronic device executes the chip temperature real-time prediction method according to any one of claims 1 to 7.

Images