Display device

Abstract

The invention provides a display device. The display device comprises a system-on-chip configured to output a first type of differential data signal; the data conversion bridge chip is electrically connected with the system chip, and the data conversion bridge chip is configured to convert the first type of differential data signals into second type of differential data signals; the source electrode driving chip is electrically connected with the data conversion bridging chip and is configured to receive and process the second type of differential data signals and then output the second type of differential data signals to a display panel; wherein the number of the second type of differential data signals is integer multiples of the number of the first type of differential data signals. According to the scheme, along with continuous improvement of the resolution ratio and the refresh rate of the display device, a source electrode driving chip does not need to be redesigned, the production cost is reduced, and meanwhile the signal transmission quality is guaranteed.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display device. Background Art

[0002] The LCD device is mainly composed of a backlight source and an open cell, wherein the open cell is connected to a source driver chip, and the source driver chip is connected to the system chip (SOC) through a circuit pin connector (FFC Pin Map). Figure 1 As shown, in some high-resolution and high-refresh-rate display devices, since the system chip and circuit pin connectors have been standardized, the source driver chip is required to have a pair of differential signal inputs. However, if a display device with higher resolution and higher refresh rate is to be met, the source driver chip in the related art cannot meet this requirement, and the source driver chip needs to be redesigned to make the transmission rate of the differential signal line higher. In this way, as the resolution and refresh rate of the display device continue to increase, the differential transmission rate of the source driver chip will continue to increase, which will lead to an increase in production design costs and time costs, and the source driver chip is also difficult to standardize. Summary of the invention

[0003] The embodiments of the present application provide a display device to solve the problem in the related art that the performance of a source driver chip cannot match the increasingly higher resolution and refresh rate requirements of the display device.

[0004] To solve the above problems, the technical solutions provided by this application are as follows:

[0005] The present application provides a display device, comprising:

[0006] A system chip configured to output a first type differential data signal;

[0007] a data conversion bridge chip, electrically connected to the system chip, the data conversion bridge chip being configured to convert the first type of differential data signal into a second type of differential data signal; and

[0008] a source driver chip, electrically connected to the data conversion bridge chip, configured to receive and process the second type of differential data signal and then output it to the display panel;

[0009] The number of the second type of differential data signals is an integer multiple of the number of the first type of differential data signals.

[0010] In one embodiment, the data conversion bridge chip includes a plurality of data conversion bridge modules;

[0011] Each of the data conversion bridge modules is configured to convert a pair of the first-type differential data signals into two pairs of the second-type differential data signals.

[0012] In one embodiment, the source driver chip includes a plurality of source driver modules;

[0013] Each of the data conversion bridge modules is connected to one of the source driving modules to convert N pairs of the first differential data signals into 2N pairs of the second differential data signals;

[0014] Wherein, N is an integer greater than 0.

[0015] In one embodiment, the source driver chip includes a plurality of source driver modules;

[0016] The data conversion bridge chip includes a plurality of data conversion bridge modules, each of which is connected to one of the source driver modules;

[0017] Each of the data conversion bridge modules includes at least a portion of cascaded data conversion bridge modules to convert N pairs of the first type differential data signals into M pairs of the second type differential data signals;

[0018] N is an integer greater than 0 and M is an integer multiple of N.

[0019] In one embodiment, the differential transmission rate X of the source driver chip is smaller than the total data bandwidth Y required by the display panel;

[0020] Wherein, Y=a×b×c×d, a is the resolution width of the display panel, b is the resolution height of the display panel, c is the refresh rate of the display panel, and d is the color depth of the display panel.

[0021] In one embodiment, the display panel has a resolution of 4K, a refresh rate of 165 Hz, and a color depth of 24 bits;

[0022] The source driver chip includes 12 source driver modules, and the data conversion bridge modules are provided with 6. The differential transmission rate of each source driver module is greater than or equal to 2 Gbps.

[0023] In one embodiment, a pair of the first-type differential data signals includes a positive polarity first-type differential data signal and a negative polarity first-type differential data signal.

[0024] In one embodiment, a pair of the second-type differential data signals includes a positive polarity second-type differential data signal and a negative polarity second-type differential data signal.

[0025] In one embodiment, the display panel has an RBG pixel structure;

[0026] The first type of differential data signal includes at least RBG pixel data, and the second type of differential data signal includes at least RBG pixel data and GRB pixel data.

[0027] In one embodiment, the data conversion bridge module includes any one of a differential signal distributor, a differential buffer and an FPGA.

[0028] The present application provides a display device including: a system chip configured to output a first type of differential data signal; a data conversion bridge chip electrically connected to the system chip, the data conversion bridge chip configured to convert the first type of differential data signal into a second type of differential data signal; and a source driver chip electrically connected to the data conversion bridge chip, configured to receive and process the second type of differential data signal and then output it to a display panel; wherein the number of the second type of differential data signals is an integer multiple of the number of the first type of differential data signals. Through the above scheme, as the resolution and refresh rate of the display device continue to increase, there is no need to redesign the source driver chip, which reduces the production cost while ensuring the quality of signal transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0030] Attached Figure 1 It is a schematic diagram of the structure of a source driver chip in the related art;

[0031] Attached Figure 2 is a schematic diagram of the overall structure of a display device in an embodiment of the present application;

[0032] Attached Figure 3 It is a schematic diagram of a partial module structure of a display device in an embodiment of the present application;

[0033] Attached Figure 4 is a schematic diagram of the circuit structure of the display device in the embodiment of the present application;

[0034] Attached Figure 5 A schematic diagram of pixel data received by a data conversion bridge module in an embodiment of the present application;

[0035] Attached Figure 6 A schematic diagram of pixel data output by the data conversion bridge module in an embodiment of the present application.

[0036] Description of reference numerals in the figures:

[0037] 1. Display device; 10. Display panel; 20. System chip; 30. Data conversion bridge chip; 31. Data conversion bridge module; 40. Source driver chip; 41. Source driver module. DETAILED DESCRIPTION

[0038] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.

[0039] It will be understood that although the terms "first", "second", etc. may be used herein to describe various components, these components should not be limited by these terms. These components are only used to distinguish one component from another.

[0040] As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0041] It will also be understood that the terms “comprises” and / or “comprising” as used herein specify the presence of stated features or components, but do not exclude the presence or addition of one or more other features or components.

[0042] Reference Figures 2 to 4 As shown, the present application provides a display device 1, including a display panel 10, a system chip 20, a data conversion bridge chip 30 and a source driver chip 40. The system chip 20 is configured to output a first type of differential data signal, the data conversion bridge chip 30 is electrically connected to the system chip 20, the data conversion bridge chip 30 is configured to convert the first type of differential data signal into a second type of differential data signal, and the source driver chip 40 is electrically connected to the data conversion bridge chip 30, and is configured to receive and process the second type of differential data signal and then output it to the display panel 10. It should be noted that the number of the second type of differential data signals is an integer multiple of the number of the first type of differential data signals.

[0043] Through the above scheme, the present application can convert the first type of differential data signals emitted by the system chip 20 into more second type differential data signals through the data conversion bridge chip 30 without redesigning the source driver chip 40, which can effectively reduce time and production costs, and can also improve the signal transmission efficiency.

[0044] Specifically, refer to Figure 3As shown, in some embodiments of the present application, the data conversion bridge chip 30 includes a plurality of data conversion bridge modules 31, wherein each data conversion bridge module 31 is configured to convert a pair of first-class differential data signals into two pairs of second-class differential data signals. It should be noted that a pair of first-class differential data signals includes a positive first-class differential data signal and a negative first-class differential data signal, and a pair of second-class differential data signals includes a positive second-class differential data signal and a negative second-class differential data signal.

[0045] Specifically, in some embodiments of the present application, the source driver chip 40 also includes multiple source driver modules 41. Depending on the output capacity of the source driver module 41, the number of source driver modules 41 required by the display device 1 is also different. During actual use, it can be specifically set according to needs, and this application does not limit it here.

[0046] On this basis, as an implementation of the data conversion bridge module 31, each data conversion bridge module 31 is connected to a source driver module 41, and N pairs of first-class differential data signals can be converted into 2N pairs of second-class differential data signals; wherein N is an integer greater than 0. Through this solution, the data conversion bridge chip 30 can output the second-class differential data signals twice the number of the first-class differential data signals. In this case, the signal transmission capacity can be improved without changing the source driver chip 40, which is conducive to reducing the production cost of the display device 1.

[0047] In addition, as some other implementations of the data conversion bridge module 31, the data conversion bridge chip 30 may include multiple data conversion bridge modules, each of which is connected to a source driver module 41; wherein each data conversion bridge module at least includes a partially cascaded data conversion bridge module 31 to convert N pairs of first-class differential data signals into M pairs of second-class differential data signals; N is an integer greater than 0 and M is an integer multiple of N. It should be noted that the data conversion bridge module can be a virtual range division or a division on an actual hardware circuit, which is not limited in this application. In this embodiment, in the two output ends of a data conversion bridge module 31, any output end is connected to the input end of another data conversion bridge module 31, and the other data end of the previous data conversion bridge module 31 is directly connected to the source driver module 41, so that N pairs of first-class differential data signals can be converted into 3N pairs of second-class differential data signals. At this time, a data conversion bridge module includes two data conversion bridge modules 31. Similarly, if the two output ends of a data conversion bridge module 31 are respectively connected to the input ends of the other two data conversion modules, then N pairs of first-class differential data signals can be converted into 4N pairs of second-class differential data signals. At this time, a data conversion bridge module includes three data conversion bridge modules 31. By analogy, according to the different cascading methods of the data conversion modules, the output of multiple numbers of second-class differential data signals can be achieved. It should be noted that in this embodiment, since the first-class differential data signal will undergo multiple data conversions, some anti-interference circuit modules can also be set in the data conversion bridge chip 30 to avoid deviations of the first-class differential data signal after multiple data conversions.

[0048] In some more specific embodiments, the above-mentioned data conversion bridge module 31 may also include any one of a differential signal distributor, a differential buffer and an FPGA.

[0049] In the above embodiment, due to the data conversion through the data conversion bridge chip 30, it is no longer necessary to continuously increase the differential transmission rate of the source driver chip 40. In some embodiments of the present application, the differential transmission rate X of the source driver chip 40 is less than the total data bandwidth Y required by the display panel 10; wherein Y=a×b×c×d, a is the resolution width of the display panel 10, b is the resolution height of the display panel 10, c is the refresh rate of the display panel 10, and d is the color depth of the display panel 10.

[0050] More specifically, see Figure 4As shown, in some embodiments of the present application, the resolution of the display panel 10 is 4K, the refresh rate is 165Hz, and the color depth is 24 bits; the source driver chip 40 includes 12 source driver modules 41, and the data conversion bridge module 31 is provided with 6, then the differential transmission rate of each source driver module 41 can be greater than or equal to 2Gbps.

[0051] In addition, it should be noted that in some embodiments of the present application, the display panel 10 has an RBG pixel structure; Figure 5 As shown, the first type of differential data signal includes at least RBG pixel data, then refer to Figure 6 As shown, the second type of differential data signal includes at least RBG pixel data and GRB pixel data.

[0052] In summary, although the present application has been disclosed as above with preferred embodiments, the above preferred embodiments are not intended to limit the present application. Ordinary technicians in this field can make various changes and modifications without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be based on the scope defined in the claims.

Claims

1. A display device, characterized in that: include: A system chip configured to output a first type differential data signal; A data conversion bridge chip, electrically connected to the system chip, wherein the data conversion bridge chip is configured to convert the first type of differential data signal into a second type of differential data signal; as well as a source driver chip, electrically connected to the data conversion bridge chip, and configured to receive and process the second type of differential data signal and then output it to the display panel; The number of the second type of differential data signals is an integer multiple of the number of the first type of differential data signals.

2. The display device according to claim 1, characterized in that The data conversion bridge chip includes a plurality of data conversion bridge modules; Each of the data conversion bridge modules is configured to convert a pair of the first-type differential data signals into two pairs of the second-type differential data signals.

3. The display device according to claim 2, characterized in that: The source driver chip includes a plurality of source driver modules; Each of the data conversion bridge modules is connected to one of the source driving modules to convert N pairs of the first differential data signals into 2N pairs of the second differential data signals; Wherein, N is an integer greater than 0.

4. The display device according to claim 2, characterized in that: The source driver chip includes a plurality of source driver modules; The data conversion bridge chip includes a plurality of data conversion bridge modules, each of which is connected to one of the source driver modules; Each of the data conversion bridge modules includes at least a portion of cascaded data conversion bridge modules to convert N pairs of the first type differential data signals into M pairs of the second type differential data signals; N is an integer greater than 0 and M is an integer multiple of N.

5. The display device according to claim 2, characterized in that: The differential transmission rate X of the source driver chip is less than the total data bandwidth Y required by the display panel; Wherein, Y=a×b×c×d, a is the resolution width of the display panel, b is the resolution height of the display panel, c is the refresh rate of the display panel, and d is the color depth of the display panel.

6. The display device according to claim 5, characterized in that: The display panel has a resolution of 4K, a refresh rate of 165Hz, and a color depth of 24 bits; The source driver chip includes 12 source driver modules, and the data conversion bridge modules are provided with 6. The differential transmission rate of each source driver module is greater than or equal to 2 Gbps.

7. The display device according to claim 1, characterized in that: The pair of the first-type differential data signals includes a positive polarity first-type differential data signal and a negative polarity first-type differential data signal.

8. The display device according to claim 1, characterized in that: A pair of the second-type differential data signals includes a positive polarity second-type differential data signal and a negative polarity second-type differential data signal.

9. The display device according to claim 1, characterized in that: The display panel has an RBG pixel structure; The first type of differential data signal includes at least RBG pixel data, and the second type of differential data signal includes at least RBG pixel data and GRB pixel data.

10. The display device according to claim 2, characterized in that: The data conversion bridge module includes any one of a differential signal distributor, a differential buffer and an FPGA.

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