A memory

Abstract

The present invention provides a memory, including: a packaging substrate, connected with a main control module, a flash memory module, a power supply module, a plurality of unconnected pins, and a plurality of solder balls, wherein the unconnected pins are connected to some of the solder balls; a current switching module, electrically connected to the power supply module; at least one semiconductor temperature control module, the semiconductor temperature control module including: a first substrate, located at the periphery of the main control module and the flash memory module; a second substrate, arranged opposite to the first substrate, and connected to the unconnected pins; a semiconductor temperature control array unit, formed between the first substrate and the second substrate; wherein the current switching module is also electrically connected to the semiconductor temperature control array unit, and is used to adjust the flow direction of the current in the semiconductor temperature control array unit according to the control signal of the main control module, so as to control the cooling or heating of the semiconductor temperature control array unit. The memory provided by the present invention can work normally under extreme temperature conditions.

Description

Technical Field

[0001] The present invention relates to the field of storage, and in particular to a memory. Background Art

[0002] The reliability issues of embedded storage devices eMMC in extreme temperature environments have long restricted their application expansion. In the prior art, high temperature environments will aggravate the charge leakage of storage cells, resulting in reduced data retention and increased bit error rates, while low temperatures will cause programming / erase voltage threshold drift, resulting in abnormal write operations. At the same time, the controller is prone to clock timing mismatch when the temperature is extreme, causing state machine jumps or deadlock risks, and the thermal expansion differences of packaging materials will also accelerate mechanical fatigue of solder joints.

[0003] Existing solutions alleviate the problem by means of graded screening (commercial, industrial, automotive, military) or frequency reduction, but they face significant defects such as cost surge, volume expansion or performance degradation, and it is difficult to meet the comprehensive requirements of wide temperature range, high reliability and miniaturization in scenarios such as automotive electronics. Therefore, there is room for improvement. Summary of the invention

[0004] The object of the present invention is to provide a memory capable of operating normally under extreme temperature conditions.

[0005] In order to solve the above technical problems, the present invention is achieved through the following technical solutions: The present invention provides a memory, comprising: A packaging substrate, wherein a main control module, a flash memory module, a power supply module, and a plurality of unconnected pins are connected to one side of the packaging substrate, and a plurality of solder balls are connected to the other side of the packaging substrate, and the unconnected pins are connected to some of the solder balls; A current switching module, electrically connected to the power supply module; At least one semiconductor temperature control module, the semiconductor temperature control module comprising: A first substrate, located outside the main control module and the flash memory module; a second substrate, disposed opposite to the first substrate, the second substrate being connected to the unconnected pins; A semiconductor temperature control array unit is formed between the first substrate and the second substrate; Among them, the current switching module is also electrically connected to the semiconductor temperature control array unit, and is used to adjust the flow direction of the current in the semiconductor temperature control array unit according to the control signal of the main control module to control the cooling or heating of the semiconductor temperature control array unit.

[0006] In one embodiment of the present invention, the semiconductor temperature control array unit includes a plurality of arrays of semiconductor temperature control units; two adjacent semiconductor temperature control units are connected in series; the semiconductor temperature control unit includes: a first guide strip, attached to the second substrate; A P-type semiconductor structure electrically connected to the first guide bar; A second guide bar, attached to the first substrate and electrically connected to the P-type semiconductor structure; An N-type semiconductor structure electrically connected to the second guide bar; and a third guide bar, attached to the second substrate and electrically connected to the N-type semiconductor structure; There is a gap between the first guide bar and the third guide bar.

[0007] In one embodiment of the present invention, the control signal includes a first signal and a second signal, and the current switching module includes: a first switching circuit, electrically connected to the main control module and the semiconductor temperature control array unit; the first switching circuit is used to conduct according to a first signal and supply power to the semiconductor temperature control array unit; and A second switching circuit is electrically connected to the main control module and the semiconductor temperature control array unit; the second switching circuit is used to conduct according to a second signal and supply power to the semiconductor temperature control array unit; The direction of the current flowing in the first switching circuit and the semiconductor temperature control array unit is recorded as a first direction, and the direction of the current flowing in the second switching circuit and the semiconductor temperature control array unit is recorded as a second direction, and the first direction is opposite to the second direction.

[0008] In one embodiment of the present invention, the semiconductor temperature control array unit includes a first power supply end and a second power supply end; the first switching circuit includes: a first MOS transistor, whose gate is electrically connected to the main control module, whose source is electrically connected to the power supply module, and whose drain is electrically connected to the first power supply terminal; and a second MOS transistor, whose gate is electrically connected to the main control module, whose source is electrically connected to the second power supply terminal, and whose drain is electrically connected to the ground pin of the packaging substrate; The first MOS tube and the second MOS tube are turned on according to a first signal.

[0009] In one embodiment of the present invention, the second switching circuit includes: a third MOS transistor, whose gate is electrically connected to the main control module, whose source is electrically connected to the power supply module, and whose drain is electrically connected to the second power supply terminal; and a fourth MOS transistor, a gate of which is electrically connected to the main control module, a source of which is electrically connected to the first power supply end, and a drain of which is electrically connected to the ground pin of the packaging substrate; The third MOS tube and the fourth MOS tube are turned on according to the second signal.

[0010] In one embodiment of the present invention, the second substrate is connected to the unconnected pins via a thermally conductive material, and the unconnected pins are connected to some solder balls via a thermally conductive material.

[0011] In one embodiment of the present invention, the material of the first substrate is insulating ceramic, and the material of the second substrate is insulating ceramic.

[0012] In one embodiment of the present invention, a temperature sensing unit is further included, and the temperature sensing unit is used to obtain the current temperature of the main control module and / or the flash memory module; the main control module is used to adjust the current temperature according to the following steps: Determine the current temperature and the preset temperature range: When the current temperature is outside the preset temperature range, the main control module generates and sends a control signal with a duty cycle of 100%; When the current temperature is within a preset temperature range, the main control module adjusts the duty cycle of the control signal until the current temperature reaches a target temperature.

[0013] In one embodiment of the present invention, the main control module is used to adjust the duty cycle of the control signal according to the following steps: Obtaining a temperature change of the main control module and / or the flash memory module within a unit time; Determine the temperature change and the preset change threshold: When the temperature change is greater than a preset change threshold, reducing the duty cycle of the control signal until the temperature change is less than or equal to the preset change threshold; When the temperature change is less than or equal to a preset change threshold, the duty cycle of the control signal is maintained until the current temperature reaches a target temperature.

[0014] In one embodiment of the present invention, the flash memory module includes a plurality of flash memory blocks; the main control module is used to perform the data migration operation according to the following steps: Acquiring temperature change data of the main control module and / or the flash memory module within a preset time period; Determine the temperature change data and the preset temperature difference threshold: When the temperature change data is greater than a preset temperature difference threshold, a data block for writing data is identified within the preset time period; and the main control module performs a data migration operation to write the data stored in the identified data block into an idle data block.

[0015] As described above, the present invention provides a memory, which significantly improves the comprehensive performance of the memory in extreme temperature environments by combining an embedded semiconductor temperature control module with a dynamic control strategy. A semiconductor temperature control array unit is used to bidirectionally adjust the temperature (cooling / heating), and a current switching module is used to reverse the current direction to achieve a fast response. The duty cycle is adaptively adjusted to accurately control the temperature of the main control / flash memory module, eliminating the high cost problem of traditional graded screening solutions. The integrated thermal path design and ceramic substrate packaging ensure efficient heat diffusion and reduce the volume. The dynamic migration mechanism of the data block is triggered by temperature sensing monitoring, and the data is transferred to a stable area when the temperature fluctuates violently, avoiding the increase in the bit error rate caused by charge leakage / threshold drift.

[0016] Of course, any product implementing the present invention does not necessarily need to achieve all of the advantages described above at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings required for describing the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other accompanying drawings can be obtained based on these accompanying drawings without paying creative work.

[0018] Figure 1 is a schematic diagram of a memory in one embodiment of the present invention; Figure 2 is a schematic diagram of a current switching module in one embodiment of the present invention; Figure 3 Schematic diagram of a semiconductor temperature control module in one embodiment of the present invention; Figure 4 FIG. 4 is a schematic diagram of a semiconductor temperature control unit according to an embodiment of the present invention.

[0019] In the figure: 100, packaging substrate; 110, first power supply port; 120, second power supply port; 200, main control module; 210, first output end; 220, second output end; 300. Flash memory module; 400. current switching module; 500, semiconductor temperature control module; 510, first substrate; 520, second substrate; 530, semiconductor temperature control array unit; 531, first power supply terminal; 532, second power supply terminal; 533, semiconductor temperature control unit; 5331, first guide bar; 5332, P-type semiconductor structure; 5333, second guide bar; 5334, N-type semiconductor structure; 5335, third guide bar. DETAILED DESCRIPTION

[0020] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. According to the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0021] See also Figure 1 The present invention discloses a memory that can work stably under extreme temperature conditions (below -55°C or above 125°C). The memory can be an embedded MultiMediaCard (eMMC) or a universal flash storage (UFS). The memory can include a packaging substrate 100, a main control module 200, a flash memory module 300, a current switching module 400, a semiconductor temperature control module 500, a power supply module, and a temperature sensing unit. Among them, the main control module 200, the flash memory module 300, the current switching module 400, the semiconductor temperature control module 500, the power supply module, and the temperature sensing unit can be connected to the packaging substrate 100.

[0022] In some embodiments, the package substrate 100 may be a common substrate in a memory, used to mount and connect various electronic components. A plurality of unconnected pins (Not Connected, NC) may be connected to the package substrate 100. Unconnected pins refer to pins on the package substrate 100 that are not connected to other circuits or components in the design. Unconnected pins can be used for future expansion or debugging. A plurality of solder balls (Solder Balls) are connected to the other side of the package substrate 100, and the solder balls can serve as interfaces for connecting the package substrate 100 to external circuits or devices. The solder balls are located on the other side of the package substrate, providing electrical connections and mechanical support.

[0023] In some embodiments, some unconnected pins and some solder balls may be connected by thermally conductive materials. The function of the thermally conductive material is to transfer heat and help dissipate heat. The thermally conductive material may be copper or other materials, which are not limited here. Copper has good thermal conductivity and electrical conductivity. In this way, the thermally conductive material between the unconnected pins and the solder balls can help transfer heat from one side of the package substrate to the other side, thereby improving the heat dissipation performance of the memory.

[0024] In some embodiments, the main control module 200 may be a microcontroller unit (MCU). The main control module 200 may be used to perform specific control tasks, such as reading data, processing instructions from external electronic devices, etc. The processing core of the main control module 200 may be designed based on the RISC-V architecture to perform various control and computing tasks.

[0025] In some embodiments, the flash memory module 300 is a complete storage unit composed of multiple flash memory particles (NAND Flash Die). Flash memory particles (Flash Die) refer to the basic physical unit of flash memory, which is an independent NAND flash memory chip. Multiple flash planes (Flash Plane) are arranged in the flash memory particles (Flash Die). Flash plane is a logical partition inside the flash memory particle, and each plane can perform read and write operations independently. The basic erase unit of the flash memory plane can be a flash block (Flash Block), and the flash memory block is composed of multiple pages (Page). Page is the basic read and write unit of the flash memory block, which is composed of multiple flash memory cells (Cell). Flash memory cell is the smallest physical unit for storing data, and each cell can store 1 bit or more bits of data. When the main control module 200 performs a read operation, it needs to read data in units of pages. When the main control module 200 performs a write operation, it needs to write data in units of pages, but the entire flash memory block needs to be erased before writing. When the main control module 200 performs an erase operation, it needs to erase data in units of flash memory blocks, and all cells are restored to the "1" state after erasing.

[0026] In some embodiments, the power supply module can convert the external power supply into the voltage and current required by the memory and ensure the stability and reliability of the power supply. The power supply module can include at least a voltage regulator, a filter capacitor, a protection circuit, etc. The voltage regulator can be used to convert the external power supply into the voltage required by the memory. The filter capacitor can be used to smooth the voltage and reduce power supply noise. The protection circuit may include overvoltage protection, overcurrent protection, short circuit protection and other circuits to ensure power supply safety.

[0027] See also Figure 1In some embodiments, the number of semiconductor temperature control modules 500 may be at least one. When the number of semiconductor temperature control modules 500 is multiple, two adjacent semiconductor temperature control modules 500 may be connected in series. The semiconductor temperature control module 500 may be used to adjust the temperature of the main control module 200 and the flash memory module 300. The semiconductor temperature control module 500 may include a first substrate 510, a second substrate 520, and a semiconductor temperature control array unit 530.

[0028] See also Figure 1 and Figure 3 In some embodiments, the number of the first substrate 510 may be multiple. The first substrate 510 may be located at the periphery of the main control module 200 and the flash memory module 300. The number of the second substrates 520 may be the same as that of the first substrates 510, and the two may correspond to each other, and the second substrate 520 may be arranged opposite to the first substrate 510. The second substrate 520 may be connected to the unconnected pins near it by a thermally conductive material, and the thermally conductive material may be copper or other materials, which are not limited here. The semiconductor temperature control array unit 530 may be formed between the first substrate 510 and the second substrate 520. The semiconductor temperature control array unit 530 may be a semiconductor refrigeration sheet.

[0029] In some embodiments, the material of the first substrate 510 may be insulating ceramic. The material of the second substrate 520 may be insulating ceramic. The insulating ceramic may be aluminum nitride (AlN) ceramic, beryllium oxide (BeO) ceramic, boron nitride (BN) ceramic, etc., which are not limited here.

[0030] See also Figure 1 , Figure 2 and Figure 3 In some embodiments, the current switching module 400 can be electrically connected to the power supply module. The current switching module 400 can also be electrically connected to the semiconductor temperature control array unit 530. The current switching module 400 controls the semiconductor temperature control array unit 530 to cool or heat by controlling the flow direction of current in the semiconductor temperature control array unit 530. Among them, the semiconductor temperature control array unit 530 can be used to realize the Peltier effect. The Peltier effect is a type of thermoelectric effect. When current passes through a loop composed of two different conductors (or semiconductors), heat absorption or heat release will occur at the joint of the two conductors.

[0031] See also Figure 1 , Figure 2 and Figure 3In some embodiments, when the temperature of the main control module 200 and the flash memory module 300 is too high, the main control module 200 can generate and send a control signal, and the current switching module 400 can adjust the flow direction of the current in the semiconductor temperature control array unit 530 based on the control signal, so that the first substrate 510 absorbs heat and the second substrate 520 generates heat. The heat on the second substrate 520 can be transmitted to the outside of the package substrate 100 through the unconnected pins, the thermal conductive material, and the solder balls in sequence, thereby achieving a cooling effect. When the temperature of the main control module 200 and the flash memory module 300 is too low, the main control module 200 can generate and send a control signal, and the current switching module 400 can adjust the flow direction of the current in the semiconductor temperature control array unit 530 based on the control signal, so that the first substrate 510 generates heat and the second substrate 520 absorbs heat. The second substrate 520 can absorb the heat outside the package substrate 100 through the unconnected pins, the thermal conductive material, and the solder balls in sequence, thereby achieving a heating effect.

[0032] See also Figure 1 In some embodiments, the main control module 200 may be provided with a first output terminal 210 and a second output terminal 220. The main control module 200 may send different control signals through the first output terminal 210 and the second output terminal 220, respectively. For example, the main control module 200 may generate and send a first signal (IO1) through the first output terminal 210, and the main control module 200 may generate and send a second signal (IO2) through the second output terminal 220.

[0033] See also Figure 1 In some embodiments, the current switching module 400 may include a first switching circuit and a second switching circuit. The first switching circuit may be electrically connected to the first output terminal 210 of the main control module 200 and the semiconductor temperature control array unit 530, and the first switching circuit may be used to conduct according to the first signal and supply power to the semiconductor temperature control array unit 530. The second switching circuit may be electrically connected to the second output terminal 220 of the main control module and the semiconductor temperature control array unit 530, and the second switching circuit may be used to conduct according to the second signal and supply power to the semiconductor temperature control array unit 530. The flow direction of the current in the first switching circuit and the semiconductor temperature control array unit 530 is recorded as the first direction, and the flow direction of the current in the second switching circuit and the semiconductor temperature control array unit 530 is recorded as the second direction, and the first direction is opposite to the second direction.

[0034] See also Figure 1In some embodiments, since there are multiple semiconductor temperature control array units 530, in order to facilitate the connection of multiple semiconductor temperature control array units 530 to the first switching circuit and the second switching circuit respectively, at this time, a first power supply port 110 and a second power supply port 120 may be formed on the package substrate 100. Among them, after multiple semiconductor temperature control array units 530 are connected in series, the first power supply end 531 of the semiconductor temperature control array unit 530 connected in series can be electrically connected to the first power supply port 110, and the second power supply end 532 of the semiconductor temperature control array unit 530 connected in series can be electrically connected to the second power supply port 120. The first switching circuit can be electrically connected to the first power supply port 110 and the second power supply port 120 respectively, and the second switching circuit can also be electrically connected to the first power supply port 110 and the second power supply port 120 respectively. At this time, the first switching circuit can supply power to the semiconductor temperature control array unit 530 connected in series, and the second switching circuit can also supply power to the semiconductor temperature control array unit 530 connected in series. Among them, at the same time, the first switching circuit and the second switching circuit cannot simultaneously supply power to the semiconductor temperature control array unit 530 connected in series.

[0035] See also Figure 1 and Figure 2 In some embodiments, the first switching circuit may include a first MOS transistor M1 and a second MOS transistor M2. The gate of the first MOS transistor M1 may be electrically connected to the first output terminal 210 of the main control module 200, the source thereof may be electrically connected to the power supply module, and the drain thereof may be electrically connected to the first power supply port 110. The gate of the second MOS transistor M2 may be electrically connected to the first output terminal 210 of the main control module 200, the source thereof may be electrically connected to the second power supply port 120, and the drain thereof may be electrically connected to the ground pin of the package substrate 100. When the main control module 200 generates and sends the first signal through the first output terminal 210, the gates of the first MOS transistor M1 and the second MOS transistor M2 may be turned on. At this time, the power supply module may supply power to the source of the first MOS transistor M1, and the current may sequentially pass through the first power supply port 110, the semiconductor temperature control array unit 530 connected in series, the second power supply port 120, the source of the second MOS transistor M2, the drain of the second MOS transistor M2, and the ground pin of the package substrate 100 to form a loop.

[0036] See also Figure 1 and Figure 2In some embodiments, the second switching circuit may include a third MOS transistor M3 and a fourth MOS transistor M4. The gate of the third MOS transistor M3 may be electrically connected to the second output terminal 220 of the main control module 200, the source thereof may be electrically connected to the power supply module, and the drain thereof may be electrically connected to the second power supply port 120. The gate of the fourth MOS transistor M4 may be electrically connected to the second output terminal 220 of the main control module 200, the source thereof may be electrically connected to the first power supply port 110, and the drain thereof may be electrically connected to the ground pin of the package substrate 100. When the main control module 200 generates and sends the second signal through the second output terminal 220, the gates of the third MOS transistor M3 and the fourth MOS transistor M4 may be turned on. At this time, the power supply module may supply power to the source of the third MOS transistor M3, and the current may sequentially pass through the second power supply port 120, the semiconductor temperature control array unit 530 connected in series, the first power supply port 110, the source of the fourth MOS transistor M4, the drain of the fourth MOS transistor M4, and the ground pin of the package substrate 100 to form a loop.

[0037] See also Figure 1 and Figure 2 In some embodiments, the models of the first MOS tube M1, the second MOS tube M2, the third MOS tube M3, and the fourth MOS tube M4 may not be limited, for example, they may be metal oxide semiconductor field effect transistors (N MOSFET), and the specific model may be AO3400A.

[0038] See also Figure 3 and Figure 4 In some embodiments, the semiconductor temperature control array unit 530 may include a plurality of arrays of semiconductor temperature control units 533. Two adjacent semiconductor temperature control units 533 may be connected in series. The semiconductor temperature control unit 533 may include a first guide bar 5331, a P-type semiconductor structure 5332, a second guide bar 5333, an N-type semiconductor structure 5334, and a third guide bar 5335. Among them, the first guide bar 5331 may be attached to the second substrate 520. The P-type semiconductor structure 5332 may be electrically connected to the first guide bar 5331. The second guide bar 5333 may be attached to the first substrate 510 and electrically connected to the P-type semiconductor structure 5332. The N-type semiconductor structure 5334 may be electrically connected to the second guide bar 5333. The third guide bar 5335 may be attached to the second substrate 520 and electrically connected to the N-type semiconductor structure 5334. There is a gap between the first guide bar 5331 and the third guide bar 5335. The first guide bar 5331 may be electrically connected to the first power supply terminal 531. The third guide bar 5335 may be electrically connected to the second power supply terminal 532.

[0039] See also Figure 3In some embodiments, at the connection between the N-type semiconductor structure 5334 and the second guide bar 5333, the potential energy of the electrons in the second guide bar 5333 is lower than the potential energy of the current-carrying electrons in the N-type semiconductor structure 5334. This part of the electrons in the second guide bar 5333 must obtain additional energy to enter the N-type semiconductor structure 5334, that is, this part of the electrons can enter the N-type semiconductor structure 5334 only after absorbing heat in the second guide bar 5333, so that the second guide bar 5333 forms a cooling end. When the electrons want to enter the third guide bar 5335 from the N-type semiconductor structure 5334, since the electrons flow from a place with high potential energy to a place with low potential energy, they need to release energy, and thus release heat at this place, so that the third guide bar 5335 forms a heat dissipation end.

[0040] See also Figure 3 In some embodiments, at the connection between the P-type semiconductor structure 5332 and the second guide bar 5333, the potential energy of the positive charge in the second guide bar 5333 is lower than the potential energy of the current-carrying holes in the P-type semiconductor structure 5332. This part of the positive charge in the second guide bar 5333 must obtain additional energy before entering the P-type semiconductor structure 5332, that is, this part of the positive charge can enter the P-type semiconductor structure 5332 after absorbing heat in the second guide bar 5333, so that the second guide bar 5333 forms a cooling end. When the positive charge is to enter the first guide bar 5331 from the P-type semiconductor structure 5332, since the positive charge flows from a place with high potential energy to a place with low potential energy, it needs to release energy, so heat is released at this place, so that the first guide bar 5331 forms a heat dissipation end. Therefore, the second guide bar 5333 forms a heat absorption end, and the first guide bar 5331 and the third guide bar 5335 form a heat dissipation end, forming a semiconductor heat pump. Of course, if the polarities of the sources of the first guide bar 5331 and the third guide bar 5335 are reversed, the first guide bar 5331 and the third guide bar 5335 can form a cooling end, and the second guide bar 5333 can form a heat dissipation end.

[0041] See also Figure 4 In some embodiments, since the semiconductor temperature control units 533 are arranged in an array, the first guide bar 5331 or the third guide bar 5335 of two adjacent semiconductor temperature control units 533 can be shared. For example, the third guide bar 5335 of the first semiconductor temperature control unit 533 and the first guide bar 5331 of the second semiconductor temperature control unit 533 can be the same guide bar.

[0042] In some embodiments, the number of the temperature sensing unit may be at least one, and the temperature sensing unit may be installed on the main control module 200 and / or the flash memory module 300 to obtain the current temperature of the main control module 200 and / or the flash memory module 300, and send the current temperature to the main control module 200. The main control module 200 may determine how to adjust the current temperature of the main control module 200 and / or the flash memory module 300 based on the current temperature.

[0043] In some embodiments, temperature changes may affect the physical and electrical properties of the flash memory module 300. At high temperatures, the charge in the floating gate of the flash memory module 300 is more likely to leak, resulting in data loss or errors. At low temperatures, the charge leakage rate of the flash memory module 300 slows down, but low temperatures may cause the threshold voltage of the transistor to change, affecting data reading. At the same time, when the temperature difference changes greatly over a period of time, the flash memory module 300 is more sensitive. For example, when the temperature drops rapidly from 70°C to -10°C, the stability of the charge in the floating gate is affected by the temperature. Rapid temperature changes may cause uneven charge distribution, affecting data reading. At the same time, sudden temperature changes may cause the threshold voltage of the transistor to drift, affecting the accurate reading of data. That is, rapid temperature changes may cause bit errors when reading data.

[0044] In some embodiments, the main control module 200 is used to adjust the current temperature according to the following steps: Step S10, judging the current temperature and the preset temperature range: Step S20: When the current temperature is outside the preset temperature range, the main control module generates and sends a control signal with a duty cycle of 100%; Step S30: When the current temperature is within the preset temperature range, the main control module adjusts the duty cycle of the control signal until the current temperature reaches the target temperature.

[0045] In some embodiments, when executing step S10, specifically, the preset temperature range can be a target temperature interval set by a user or a system. For example, the ambient temperature in which the memory can safely work needs to be between -55°C and 125°C. At this time, the preset temperature range can be set to -10°C to 85°C. Of course, the specific size of the preset temperature range is not limited and can be set according to actual needs and the model of the memory.

[0046] In some embodiments, when executing step S20, specifically, when the current temperature is lower than the lower limit of the preset temperature range (e.g., -10°C), or the current temperature is higher than the upper limit of the preset temperature range (e.g., 85°C), it can be considered that the current temperature is outside the preset temperature range. At this time, the main control module 200 needs to set the duty cycle of the control signal to 100%, and the control signal is output at maximum power, and quickly heats or cools so that the current temperature enters the preset temperature range as soon as possible. Among them, the duty cycle is the ratio of the high level time in the control signal to the total cycle, which is used to adjust the average power output of the semiconductor temperature control module 500.

[0047] In some embodiments, when the current temperature is within a preset temperature range, the main control module 200 can dynamically adjust the duty cycle according to the deviation between the current temperature and the target temperature. For example, if the current temperature is close to the target temperature, the duty cycle is reduced to reduce the power output; for another example, if the current temperature is far from the target temperature, the duty cycle is increased to increase the power output. Dynamic adjustment of the duty cycle can stabilize the current temperature near the target temperature to avoid overshoot or oscillation. Among them, the target temperature refers to the optimal operating environment temperature of the memory, and its numerical value is not limited and can be set according to actual needs and the model of the memory. Among them, the main control module 200 can achieve duty cycle adjustment through PWM (pulse width modulation) technology.

[0048] In some embodiments, the main control module 200 may be configured to adjust the duty cycle of the control signal according to the following steps: Step S31, obtaining the temperature change of the main control module and / or the flash memory module within a unit time; Step S32: Determine the temperature change and the preset change threshold: Step S33, when the temperature change is greater than the preset change threshold, reducing the duty cycle of the control signal until the temperature change is less than or equal to the preset change threshold; Step S34: When the temperature change is less than or equal to the preset change threshold, the duty cycle of the control signal is maintained until the current temperature reaches the target temperature.

[0049] In some embodiments, when executing step S31, specifically, the temperature change refers to the temperature change value (ΔT) of the main control module 200 and / or the flash memory module 300 within a unit time. The temperature change can be obtained by setting a sampling interval, such as every second or every minute, by the main control module 200; monitoring the current temperature in real time through the temperature sensing unit; and calculating the change in the current temperature before and after the sampling interval.

[0050] In some embodiments, when executing step S32, specifically, the preset change threshold refers to the maximum value of the allowable temperature change set by the main control module 200. For example, within a sampling interval, the preset change threshold can be set to 1°C. Among them, the specific size of the sampling interval can be set according to actual needs, for example, it can be 1 minute. The specific size of the preset change threshold can also be set according to actual needs. At this time, within a sampling interval, the size of the temperature change amount and the preset change threshold can be judged.

[0051] In some embodiments, when executing step S33 and step S34, specifically, when the temperature change is greater than the preset change threshold, it can be considered that the temperature difference change is large. In order to prevent problems with the data stored in the flash memory module 300, the temperature change speed can be slowed down by reducing the duty cycle of the control signal. When the temperature change is less than or equal to the preset change threshold, the duty cycle of the current control signal can be maintained to continue adjusting the temperature.

[0052] In some embodiments, when the semiconductor temperature control module 500 is working, the difference between the current temperature of the main control module 200 and / or the flash memory module 300 and the target temperature may be large. In the case of a large temperature difference, writing data to the flash memory block may cause uneven charge distribution and increase the probability of bit errors. Specifically, writing data to the flash memory block requires changing the charge state in the floating gate through voltage operation. In the case of a large temperature difference, the stability of the charge is poor, and the write operation may cause uneven charge distribution and increase the risk of data errors. In order to protect the data written at this stage, the main control module 200 is also used to perform data migration operations according to the following steps: Step S40, obtaining temperature change data of the main control module and / or the flash memory module within a preset time period; Step S50, judging the temperature change data and the preset temperature difference threshold: Step S60: When the temperature change data is greater than a preset temperature difference threshold, a data block for writing data is identified within a preset time period; the main control module performs a data migration operation to write the data stored in the identified data block into an idle data block.

[0053] In some embodiments, when executing step S40, specifically, the preset duration may be a duration set by the main control module 200. The preset duration may be unlimited, for example, it may be 30 minutes. Within the preset duration, by monitoring the current temperature of the main control module 200 and / or the flash memory module 300, the corresponding temperature change data can be calculated.

[0054] In some embodiments, when step S50 is executed, specifically, the preset temperature difference threshold may be the maximum allowable temperature fluctuation value set by the main control module 200. The value of the preset temperature difference threshold may not be limited, for example, it may be 50°C.

[0055] In some embodiments, when step S60 is executed, specifically, when the temperature change data is greater than a preset temperature difference threshold, the main control module 200 can identify the data block where the data is written within a preset time period. Subsequently, the main control module 200 can select an unoccupied free block from the flash memory module 300, copy the data in the data block where the data is written to the free block, and update the address mapping table. By migrating data to a more stable free block, data reliability can be improved.

[0056] It can be seen that in the above scheme, the combination of embedded semiconductor temperature control module and dynamic control strategy significantly improves the comprehensive performance of memory in extreme temperature environment. The semiconductor temperature control array unit is used to adjust the temperature (cooling / heating) bidirectionally, and the current switching module is used to reverse the current direction to achieve fast response. The duty cycle adaptive adjustment is used to accurately control the temperature of the main control / flash memory module, eliminating the high cost problem of traditional hierarchical screening solutions. The integrated thermal path design and ceramic substrate packaging ensure efficient heat diffusion and reduce the volume. The dynamic migration mechanism of data blocks is triggered by temperature sensor monitoring, and the data is transferred to the stable area when the temperature fluctuates violently to avoid the increase in bit error rate caused by charge leakage / threshold drift.

[0057] The embodiments of the present invention disclosed above are only used to help illustrate the present invention. The embodiments do not describe all the details in detail, nor do they limit the invention to specific implementation methods. Obviously, many modifications and changes can be made according to the content of this specification. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the present invention, so that those skilled in the art can understand and use the present invention well. The present invention is limited only by the claims and their full scope and equivalents.

Claims

1. A memory, characterized in that: include: A packaging substrate, wherein a main control module, a flash memory module, a power supply module, and a plurality of unconnected pins are connected to one side of the packaging substrate, and a plurality of solder balls are connected to the other side of the packaging substrate, and the unconnected pins are connected to some of the solder balls; A current switching module, electrically connected to the power supply module; At least one semiconductor temperature control module, the semiconductor temperature control module comprising: A first substrate, located outside the main control module and the flash memory module; a second substrate, disposed opposite to the first substrate, the second substrate being connected to the unconnected pins; A semiconductor temperature control array unit is formed between the first substrate and the second substrate; Among them, the current switching module is also electrically connected to the semiconductor temperature control array unit, and is used to adjust the flow direction of the current in the semiconductor temperature control array unit according to the control signal of the main control module to control the cooling or heating of the semiconductor temperature control array unit.

2. The memory according to claim 1, characterized in that: The semiconductor temperature control array unit includes a plurality of arrays of semiconductor temperature control units; two adjacent semiconductor temperature control units are connected in series; The semiconductor temperature control unit comprises: a first guide strip, attached to the second substrate; A P-type semiconductor structure electrically connected to the first guide bar; A second guide bar, attached to the first substrate and electrically connected to the P-type semiconductor structure; An N-type semiconductor structure electrically connected to the second guide bar; and a third guide bar, attached to the second substrate and electrically connected to the N-type semiconductor structure; There is a gap between the first guide bar and the third guide bar.

3. The memory according to claim 1, characterized in that: The control signal includes a first signal and a second signal, and the current switching module includes: a first switching circuit, electrically connected to the main control module and the semiconductor temperature control array unit; the first switching circuit is used to conduct according to a first signal and supply power to the semiconductor temperature control array unit; and A second switching circuit is electrically connected to the main control module and the semiconductor temperature control array unit; the second switching circuit is used to conduct according to a second signal and supply power to the semiconductor temperature control array unit; The direction of the current flowing in the first switching circuit and the semiconductor temperature control array unit is recorded as a first direction, and the direction of the current flowing in the second switching circuit and the semiconductor temperature control array unit is recorded as a second direction, and the first direction is opposite to the second direction.

4. The memory according to claim 3, characterized in that: The semiconductor temperature control array unit includes a first power supply end and a second power supply end; the first switching circuit includes: a first MOS transistor, whose gate is electrically connected to the main control module, whose source is electrically connected to the power supply module, and whose drain is electrically connected to the first power supply terminal; and a second MOS transistor, whose gate is electrically connected to the main control module, whose source is electrically connected to the second power supply terminal, and whose drain is electrically connected to the ground pin of the packaging substrate; The first MOS tube and the second MOS tube are turned on according to a first signal.

5. The memory according to claim 4, characterized in that: The second switching circuit comprises: a third MOS transistor, whose gate is electrically connected to the main control module, whose source is electrically connected to the power supply module, and whose drain is electrically connected to the second power supply terminal; and a fourth MOS transistor, a gate of which is electrically connected to the main control module, a source of which is electrically connected to the first power supply end, and a drain of which is electrically connected to the ground pin of the packaging substrate; The third MOS tube and the fourth MOS tube are turned on according to the second signal.

6. The memory according to claim 1, characterized in that: The second substrate is connected to the unconnected pins via a heat-conducting material, and the unconnected pins are connected to some solder balls via a heat-conducting material.

7. The memory according to claim 1, characterized in that: The first substrate is made of insulating ceramic, and the second substrate is made of insulating ceramic.

8. The memory according to claim 1, characterized in that: It also includes a temperature sensing unit, which is used to obtain the current temperature of the main control module and / or the flash memory module; the main control module is used to adjust the current temperature according to the following steps: Determine the current temperature and the preset temperature range: When the current temperature is outside the preset temperature range, the main control module generates and sends a control signal with a duty cycle of 100%; When the current temperature is within the preset temperature range, the main control module adjusts the duty cycle of the control signal until the current temperature reaches the target temperature.

9. The memory according to claim 8, characterized in that: The main control module is used to adjust the duty cycle of the control signal according to the following steps: Obtaining a temperature change of the main control module and / or the flash memory module within a unit time; Determine the temperature change and the preset change threshold: When the temperature change is greater than a preset change threshold, reducing the duty cycle of the control signal until the temperature change is less than or equal to the preset change threshold; When the temperature change is less than or equal to a preset change threshold, the duty cycle of the control signal is maintained until the current temperature reaches a target temperature.

10. The memory according to claim 8, characterized in that: The flash memory module includes a plurality of flash memory blocks; the main control module is used to perform data migration operations according to the following steps: Acquiring temperature change data of the main control module and / or the flash memory module within a preset time period; Determine the temperature change data and the preset temperature difference threshold: When the temperature change data is greater than a preset temperature difference threshold, identifying a data block for writing data within the preset time period; The main control module performs a data moving operation to write the data stored in the identified data block into an idle data block.

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