Wafer warpage detection device, processing equipment, method and storage medium

By generating interference fringe images to determine wafer warpage, the problem of difficult detection of the gap between wafers and wafer trays in existing technologies is solved, improving detection accuracy and processing stability, and ensuring product quality.

CN119786369BActive Publication Date: 2026-03-27PIOTECH (SHENYANG) SEMICONDUCTOR EQUIPMENT CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-12-19
Publication Date
2026-03-27

AI Technical Summary

Technical Problem

Existing technologies make it difficult to directly detect the gap between wafers and wafer trays, resulting in low processing accuracy and quality, especially in abnormal situations where detection accuracy is low.

Method used

The distance from the wafer to the wafer tray surface is determined by generating the number of fringes in the interference fringe image, and the wafer warpage is determined accordingly. The interference fringe image is generated using a monochromatic light source, a semi-reflective mirror, a reflector, an optical fiber, and a detector. The warpage is then calculated by analyzing the number of fringes using a processor.

Benefits of technology

This improves the accuracy and reliability of wafer condition detection, ensures the stability of the processing technology and product quality, and prevents the risk of scrap due to abnormal contact between the wafer and the tray.

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Abstract

The application provides a wafer warping detection device, a processing device, a method and a storage medium. The detection device comprises a monochromatic light source for providing a detection light beam. At least three half-reflective half-transmissive lenses are used to obtain the detection light beam, reflect it to corresponding mirrors, and then transmit the detection light beam to corresponding optical fibers and the next half-reflective half-transmissive lens. At least three mirrors are respectively used to detect the detection light beam, form a reference light beam, and transmit the reference light beam to corresponding detectors. At least three optical fibers are respectively used to transmit the detection light beam to at least three detection windows, irradiate corresponding measured points of a wafer to be measured through the detection windows, reflect to form an object light beam, and transmit the object light beam to corresponding detectors. At least three detectors are respectively used to collect the reference light beam and the object light beam. A processor is connected to the detectors, and is used to determine distances from each corresponding measured point of the wafer to be measured to a wafer tray surface according to the number of interference fringes in an interference fringe image, and determine the warping of the wafer according to the distances.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of semiconductor device processing, and in particular, to a wafer bow detection device, a semiconductor device processing apparatus, a semiconductor device processing method, and a computer readable storage medium. BACKGROUND

[0002] In the process of semiconductor device processing, the gap between the wafer and the wafer tray is an important parameter, and its accurate control is crucial to ensure the processing precision and quality. However, since the gap between the wafer and the wafer tray is difficult to detect directly, the traditional monitoring method often detects it indirectly. One common detection method is to use an electronic substrate clamp (ESC) to detect the change of current, so as to indirectly judge whether the wafer is stable. But this detection method also has certain limitations, especially when the electronic substrate clamp fails to successfully adsorb the wafer, the wafer deformation (Wafer Bow) is large, or there are abnormal conditions such as pin jamming, the current signal may not accurately reflect the true wafer state. In addition, another detection method is to measure the output power of the heating disc to infer the temperature change of the wafer, so as to indirectly judge the state of the wafer. However, since heat conduction depends on many factors, such as the contact state between the wafer and the heating disc, the heat conduction efficiency, etc., this makes the accuracy of this detection method easily affected under complex working conditions, and its detection precision is not high.

[0003] In order to overcome the above-mentioned defects existing in the prior art, there is an urgent need in the art for an improved wafer bow detection device, a semiconductor device processing apparatus, a semiconductor device processing method and a computer readable storage medium, for improving the detection precision and reliability of the wafer state in the process of semiconductor device processing, so as to ensure the stability of the processing technology and the quality of the product. SUMMARY

[0004] The following presents a simplified summary of one or more aspects in order to provide a basic understanding of such aspects. This summary is not an extensive overview of all contemplated aspects, and is intended to neither identify key or critical elements of all aspects nor delineate the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later.

[0005] In order to overcome the above-mentioned defects of the prior art, the present application provides a wafer warpage detection device, a semiconductor device processing equipment, a semiconductor device processing method and a computer readable storage medium, which can determine the distance from the wafer to the wafer tray surface according to the number of fringes in the generated interference fringe image, and determine the wafer warpage accordingly, so as to improve the detection accuracy and reliability of the wafer state in the semiconductor device processing process, thereby ensuring the stability of the processing process and the quality of the product.

[0006] Specifically, the wafer warpage detection device according to the first aspect of the present application comprises a monochromatic light source, at least three half-reflective half-transmissive lenses, at least three mirrors, at least three optical fibers, at least three detectors and a processor. The monochromatic light source is used to provide a narrow-band detection beam. The at least three half-reflective half-transmissive lenses are arranged in sequence along the propagation path of the detection beam, used to obtain the detection beam via the first optical surface thereof, reflect it to the corresponding mirror, and then transmit the transmitted detection beam to the corresponding optical fiber and the next half-reflective half-transmissive lens via the second optical surface thereof. The at least three mirrors are respectively used to reflect the detection beam provided by the half-reflective half-transmissive lens to form a reference beam, and transmit the reference beam to the corresponding detector. The at least three optical fibers are respectively used to transmit the detection beam provided by the half-reflective half-transmissive lens to at least three detection windows on the wafer tray surface, irradiate the corresponding measured points of the wafer to be measured via each detection window, reflect to form an object beam, and transmit the object beam to the corresponding detector. The at least three detectors are respectively used to collect the reference beam and the corresponding object beam to generate a corresponding interference fringe image. The processor is connected to each detector, used to determine the distance from each corresponding measured point of the wafer to be measured to the wafer tray surface according to the number of fringes in the interference fringe image generated by each detector, and determine the warpage of the wafer accordingly.

[0007] Further, in some embodiments of the present application, the step of determining the distance from each corresponding measured point of the wafer to be measured to the wafer tray surface according to the number of fringes in the interference fringe image generated by each detector comprises: analyzing the interference fringe image to determine the number of measured fringes therein; obtaining the number of calibration fringes when the distance to the wafer tray surface is 0; and calculating the distance from the corresponding measured point of the wafer to be measured to the wafer tray surface according to the difference between the number of calibration fringes and the number of measured fringes.

[0008] Further, in some embodiments of the present application, the step of determining the warpage of the wafer includes: determining the three-dimensional coordinates of a first measured point on the wafer to be measured according to the first planar position of the first detection window and the corresponding first distance; determining the three-dimensional coordinates of a second measured point on the wafer to be measured according to the second planar position of the second detection window and the corresponding second distance; determining the three-dimensional coordinates of a third measured point on the wafer to be measured according to the third planar position of the third detection window and the corresponding third distance; and determining the warpage of the wafer to be measured according to the three-dimensional coordinates of the first measured point, the second measured point, the third measured point, and at least one reference point on the wafer to be measured.

[0009] Further, in some embodiments of the present application, the step of determining the warpage of the wafer according to the three-dimensional coordinates of the first measured point, the second measured point, the third measured point, and at least one reference point on the wafer to be measured includes: determining a reference plane of the wafer to be measured according to the three-dimensional coordinates of the first measured point, the second measured point, and the third measured point on the wafer to be measured; obtaining the three-dimensional coordinates of any fourth measured point on the wafer to be measured, or a contact point between the wafer to be measured and the wafer tray; and determining the warpage of the wafer to be measured according to the reference plane and the three-dimensional coordinates of the fourth measured point or the contact point.

[0010] Further, in some embodiments of the present application, the detection window includes a protective layer and a support layer. The protective layer is made of a light-transmitting material, and is used to isolate the process environment above the wafer tray, transmit the detection light beam provided by the optical fiber to the corresponding measured point on the wafer to be measured, and transmit the object light beam back to the optical fiber. The support layer is located below the protective layer, and is used to support and fix the protective layer and the optical fiber.

[0011] Further, in some embodiments of the present application, the material of the protective layer is quartz. And / or the material of the support layer is selected from ceramic, polyetherimide, or polyether ether ketone.

[0012] Further, in some embodiments of the present application, the monochromatic light source is a helium-neon laser, which is used to provide a narrow-band detection light beam with a wavelength of 632.8 nm.

[0013] In addition, the processing equipment for the semiconductor device according to the second aspect of the present application includes a process chamber and a wafer warpage detection device according to the first aspect of the present application. The process chamber includes a wafer tray. The wafer tray is provided with a plurality of detection windows. The wafer warpage detection device is used to determine the warpage of a wafer carried by the wafer tray.

[0014] In addition, the processing method of the semiconductor device provided by the third aspect of the present application comprises the following steps: a wafer to be processed is transmitted into a process chamber and placed on the surface of a wafer tray; the warping degree of the wafer is detected on line by using the wafer warping degree detection device provided by the first aspect of the present application; in response to the warping degree of the wafer being greater than a preset threshold, the subsequent processing process is stopped, and / or an alarm indicating that the wafer is in an abnormal state is issued; and in response to the warping degree of the wafer being less than or equal to the preset threshold, the subsequent processing process is performed.

[0015] In addition, the computer readable storage medium provided by the fourth aspect of the present application has computer instructions stored thereon. When the computer instructions are executed by a processor, the processing method of the semiconductor device provided by the third aspect of the present application is implemented. BRIEF DESCRIPTION OF DRAWINGS

[0016] The above features and advantages of the present application can be better understood by reading the detailed description of embodiments of the present application in conjunction with the following drawings, in which: the components are not necessarily drawn to scale and components of similar or identical function or features can have the same or similar reference label.

[0017] Figure 1 A top view of a wafer tray provided by some embodiments of the present application is shown.

[0018] Figure 2 A structural schematic diagram of a wafer warping degree detection device provided by some embodiments of the present application is shown.

[0019] Figure 3 A cross-sectional schematic diagram of a detection window provided by some embodiments of the present application is shown.

[0020] Figure 4 A flowchart of a processing method of a semiconductor device provided by some embodiments of the present application is shown.

[0021] Figure 5 A schematic diagram of the state of a wafer on a wafer tray provided by some embodiments of the present application is shown.

[0022] Figure 6 A schematic diagram of the state of a wafer on a wafer tray provided by some embodiments of the present application is shown.

[0023] Figure 7 A schematic diagram of the state of a wafer on a wafer tray provided by some embodiments of the present application is shown. DETAILED DESCRIPTION

[0024] The following detailed description is presented to enable any person skilled in the art to make and use the application. Various modifications to the embodiments described herein will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other embodiments without departing from the scope of the application. Thus, the present application is not intended to be limited to the embodiments described herein but is to be accorded the widest scope consistent with the principles and features disclosed herein. To the extent that section headings are used, they should not be understood as limiting the subject matter described therein or as perturbing the meaning of the description, which is meant to be given its fullest reasonable interpretation.

[0025] In the description of the present application, it is to be understood that the specific structural embodiments disclosed are merely representative for purposes of the specification only and that other suitable structural embodiments could be utilized without departing the scope of the present application. For purposes of the present application, the term "mounted", "connected", "coupled", or any variant thereof, are intended to mean the connection of any two elements, directly or indirectly, with or without wiring. In the description of the present application, it is to be understood that the terms "on" as well as into, under, above, over, etc., are meant to be interpreted as "on, above, under, under, etc. the orientation of the figure being described, and are not meant to be interpreted as limiting the position of the named part.

[0026] In addition, the use of "upper", "lower", "right", "left", "top", "bottom", "horizontal" and "vertical" herein are used for convenience and are not meant to be limiting as to the position of the device when manufactured or used. These terms are only used to describe the relative position of the device as shown in the figures.

[0027] It is to be understood that the terms "first", "second", "third", etc. can be used herein to describe various components, regions, layers and / or sections which should not be limited by these terms in which the components, regions, layers and / or sections are only used to distinguish the different components, regions, layers and / or sections from one another. Therefore, terms describing a first component, region, layer and / or section discussed below can also be termed as a second component, region, layer and / or section without departing from the scope of the present application.

[0028] As mentioned above, since the gap between the wafer and the wafer tray is difficult to be directly detected, the conventional monitoring method often detects it by indirect means. One common detection means is to detect the change of the current by using the electronic substrate clamp (ESC), so as to indirectly determine whether the wafer is stable. But this detection method also has certain limitations, especially when the electronic substrate clamp fails to successfully adsorb the wafer, the wafer bow is large, or there are abnormal conditions such as pin jamming, the current signal may not accurately reflect the real wafer state. In addition, another detection means is to measure the output power of the heating disc to infer the temperature change of the wafer, so as to indirectly determine the state of the wafer. However, since heat conduction depends on many factors, such as the contact state between the wafer and the heating disc, the heat conduction efficiency, etc., which makes the accuracy of this detection method under complex working conditions easily affected, and its detection precision is not high.

[0029] In order to overcome the above-mentioned defects existing in the prior art, the present application provides a wafer bowing degree detection device, a semiconductor device processing equipment, a semiconductor device processing method and a computer readable storage medium, which can determine the distance from the wafer to the wafer tray surface according to the number of fringes in the generated interference fringe image, and determine the bowing degree of the wafer accordingly, so as to improve the detection precision and reliability of the wafer state in the processing process of the semiconductor device, thereby ensuring the stability of the processing process and the quality of the product.

[0030] In some non-limiting embodiments, the semiconductor device processing equipment provided by the second aspect of the present application comprises a process chamber and the wafer bowing degree detection device provided by the first aspect of the present application.

[0031] Please refer to Figure 1 and Figure 2 . Figure 1 A top view of a wafer tray according to some embodiments of the present application is shown. Figure 2 A structure diagram of a wafer bowing degree detection device according to some embodiments of the present application is shown.

[0032] In Figure 1 the illustrated embodiment, the semiconductor device processing equipment comprises a process chamber and a wafer bowing degree detection device. The process chamber comprises a wafer tray 20. Here, the wafer tray is provided with a plurality of detection windows, and the wafer bowing degree detection device is used to determine the bowing degree of the wafer 30 carried by the wafer tray.

[0033] Further, in Figure 1In the shown embodiment, the three detection windows 21-23 are arranged in a triangular array, and are located at a distance of 3-5 mm from the edge step of the wafer tray.

[0034] In some alternative embodiments, the detection windows can also be 4 or 6.

[0035] In Figure 2 In the shown embodiment, the wafer warpage detection device according to the first aspect of the present application comprises a monochromatic light source 11, at least three half-reflective half-transmissive lenses 121-123, at least three mirrors 131-133, at least three optical fibers 141-143, and at least three detectors 151-153. Here, the monochromatic light source 11 is configured to provide a narrow-band detection beam. The at least three half-reflective half-transmissive lenses 121-123 are arranged along the propagation path of the detection beam in sequence, and are configured to receive the detection beam via the first optical surface thereof, reflect the detection beam to the corresponding mirror 131-133, and transmit the transmitted detection beam to the corresponding optical fiber and the next half-reflective half-transmissive lens via the second optical surface thereof. The at least three mirrors 131-133 are respectively configured to reflect the detection beam provided by the half-reflective half-transmissive lens to form a reference beam, and transmit the reference beam to the corresponding detector 151-153. The at least three optical fibers 141-143 are respectively configured to transmit the detection beam provided by the half-reflective half-transmissive lens to at least three detection windows on the surface of the wafer tray 20, irradiate the corresponding measurement point of the wafer 30 to be measured via each detection window to form an object beam by reflection, and transmit the object beam to the corresponding detector 151-153. The at least three detectors 151-153 are respectively configured to collect the reference beam and the corresponding object beam to generate a corresponding interference fringe image.

[0036] In some non-limiting embodiments, the semiconductor device processing apparatus according to the second aspect of the present application comprises a memory and a processor. Here, the memory comprises but is not limited to the computer readable storage medium according to the fourth aspect described above, and the computer instructions are stored on the computer readable storage medium. The processor is connected to the memory and the detectors 151-153, and is configured to execute the computer instructions stored on the memory to determine the distance from the surface of the wafer tray to each corresponding measurement point of the wafer to be measured according to the number of fringes in the interference fringe image generated by each detector, and determine the warpage of the wafer based on the distance.

[0037] For further reference Figure 3 . Figure 3 A cross-sectional view of a detection window according to some embodiments of the present application is shown.

[0038] In Figure 3In the shown embodiment, the detection windows 21-23 include a protective layer 31 and a support layer 32. Here, the protective layer 31 is made of a light-transmitting material, and is configured to isolate the process environment above the wafer tray, transmit the detection beams provided by the optical fibers 141-143 to the corresponding measurement points of the wafer 30 to be measured, and transmit the object beams back to the optical fibers 141-143. The support layer 32 is located below the protective layer 31, and is configured to support and fix the protective layer 31 and the optical fibers 141-143.

[0039] Further, in some embodiments, the protective layer 31 is made of quartz. The support layer 32 is made of ceramic, polyetherimide or polyether ether ketone.

[0040] In addition, in some alternative embodiments, the monochromatic light source 11 is a helium-neon laser, which is configured to provide the detection beams with a narrow wavelength band of 632.8 nm.

[0041] The working principle of the semiconductor device processing apparatus will be described below in combination with some embodiments of semiconductor device processing methods. Those skilled in the art can understand that these embodiments of semiconductor device processing methods are only some non-restrictive embodiments provided by the present application, which are intended to clearly demonstrate the main concept of the present application and provide some specific schemes for facilitating the public to implement, but not to limit the whole functions or the whole working modes of the semiconductor device processing apparatus. Similarly, the semiconductor device processing apparatus is also only a non-restrictive embodiment provided by the present application, which does not limit the execution subject and the execution order of each step in the semiconductor device processing methods.

[0042] Please refer to Figure 4 . Figure 4 A flowchart of a semiconductor device processing method according to some embodiments of the present application is shown.

[0043] As shown in Figure 4 , the semiconductor device processing apparatus can first transfer the wafer 30 to be processed into the process chamber, and place it on the surface of the wafer tray 20.

[0044] Then, the semiconductor device processing apparatus can detect the wafer 30 in real time by using the wafer warping degree detection device according to the first aspect of the present application.

[0045] Specifically, the processor can determine the distance from each corresponding measurement point of the wafer to be measured to the surface of the wafer tray 20 according to the number of fringes in the interference fringe images generated by the detectors 151-153.

[0046] Further, in determining the distance from the surface of the wafer tray 20 to each corresponding measurement point of the wafer under test 30, the processor can first analyze the interference fringe image to determine the actual number of fringes k1. Then, the calibration number of fringes k2 when the distance from the surface of the wafer tray 20 is 0 is obtained.

[0047] Then, the processor can calculate the distance Δd from the surface of the wafer tray 20 to each corresponding measurement point of the wafer under test 30 according to the difference Δk between the calibration number of fringes and the actual number of fringes:

[0048]

[0049] Further, the processor can determine the warpage of the wafer 30 according to the distance from the surface of the wafer tray 20 to each corresponding measurement point of the wafer under test 30.

[0050] Specifically, the processor can first determine the three-dimensional coordinates (x1, y1, z1) of the first measurement point of the wafer under test 30 according to the first plane position (x1, y1) of the first detection window and the corresponding first distance Δd1.

[0051] Similarly, the processor can also determine the three-dimensional coordinates (x2, y2, z2) of the second measurement point of the wafer under test 30 according to the second plane position (x2, y2) of the second detection window and the corresponding second distance Δd2, and determine the three-dimensional coordinates (x3, y3, z3) of the third measurement point of the wafer under test 30 according to the third plane position (x3, y3) of the third detection window and the corresponding third distance Δd3.

[0052] Further, the processor can determine the warpage of the wafer under test 30 according to the three-dimensional coordinates of the first measurement point, the second measurement point, and the third measurement point of the wafer under test, and at least one reference point.

[0053] Further, the processor can determine the reference plane of the wafer under test 30 according to the three-dimensional coordinates of the first measurement point, the second measurement point, and the third measurement point of the wafer under test 30.

[0054] Then, the processor can obtain the three-dimensional coordinates of any fourth measurement point of the wafer under test 30, or the contact point of the wafer under test 30 and the wafer tray 20.

[0055] Further, the processor can determine the warpage of the wafer under test 30 according to the reference plane and the three-dimensional coordinates of the fourth measurement point or the contact point.

[0056] Please further refer to Figures 5-7 . Figure 5 A schematic diagram of the state of a wafer on a wafer tray according to some embodiments of the present application is shown. Figure 6A schematic diagram of a wafer on a wafer tray is shown according to some embodiments of the present application. Figure 7 A schematic diagram of a wafer on a wafer tray is shown according to some embodiments of the present application.

[0057] As shown in FIG. 1, after determining the warpage of the wafer 30, the semiconductor device processing equipment can stop the subsequent processing flow and / or issue an alarm indicating that the wafer state is abnormal, in response to the warpage of the wafer 30 being greater than a preset threshold, or the distance Δd from the measured point to the surface of the wafer tray 20 being greater than a preset distance (e.g., 0.5 mm, 1 mm, 1.5 mm). Figure 5 Figure 6 Alternatively, as shown in FIG. 2, the semiconductor device processing equipment can perform the subsequent processing flow, in response to the warpage of the wafer 30 being less than or equal to the preset threshold, or the distance Δd from all measured points to the surface of the wafer tray 20 being less than the preset distance.

[0058] Alternatively, as shown in FIG. 2, the semiconductor device processing equipment can perform the subsequent processing flow, in response to the warpage of the wafer 30 being less than or equal to the preset threshold, or the distance Δd from all measured points to the surface of the wafer tray 20 being less than the preset distance. Figure 7

[0059] Thus, the present application can prevent the risk of wafer scrap due to abnormal contact state between the wafer and the wafer tray during the processing of the semiconductor device by adding a detection process of the wafer warpage in the processing of the semiconductor device, thereby improving the accuracy and reliability of the semiconductor processing.

[0060] In summary, the wafer warpage detection device, the semiconductor device processing equipment, the semiconductor device processing method, and the computer readable storage medium provided by the present application can determine the distance from the wafer to the surface of the wafer tray according to the number of fringes in the generated interference fringe image, and determine the warpage of the wafer accordingly, for improving the detection accuracy and reliability of the wafer state during the processing of the semiconductor device, thereby ensuring the stability of the processing and the quality of the product.

[0061] Although the methods are illustrated and described as a series of acts, it will be appreciated that the methods are not limited by the order of acts as some acts can, in accordance with one or more embodiments, occur simultaneously or in different order than shown and described herein.

[0062] Those skilled in the art will understand that information, signals, and data can be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that can be referenced throughout the above description can be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0063] ​​Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans can implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

[0064] The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein can be implemented or performed with a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor can be a microprocessor, but in the alternative, the processor can be any conventional processor, controller, microcontroller, or state machine. A processor can also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0065] The steps of a method or algorithm described in connection with the embodiments disclosed herein can be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module can reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium can be integral to the processor. The processor and the storage medium can reside in an ASIC. The ASIC can reside in a user terminal. In the alternative, the processor and the storage medium can reside as discrete components in a user terminal.

[0066] In one or more exemplary embodiments, the functions described can be implemented in hardware, software, firmware, or any combination thereof. If implemented in software as a computer program product, the functions can be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media can be any available media that can be accessed by a computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

[0067] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein can be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A device for detecting wafer warpage, characterized in that, Comprise: a monochromatic light source for providing a narrow-band detection beam; at least three half-reflective half-transmissive lenses arranged in sequence along a propagation path of the detection beam for acquiring the detection beam via a first optical surface thereof, reflecting the detection beam to a corresponding mirror, and transmitting the transmitted detection beam via a second optical surface thereof to a corresponding optical fiber and a next half-reflective half-transmissive lens; at least three mirrors respectively for reflecting the detection beam provided by the half-reflective half-transmissive lenses to form a reference beam, and transmitting the reference beam to a corresponding detector; at least three optical fibers respectively for transmitting the detection beam provided by the half-reflective half-transmissive lenses to at least three detection windows on a wafer tray surface, irradiating a corresponding measured point of a wafer to be measured via each of the detection windows to form an object beam by reflection, and transmitting the object beam to a corresponding detector; at least three detectors respectively for collecting the reference beam and the corresponding object beam to generate a corresponding interference fringe image; and a processor connected to each of the detectors for determining a distance from each corresponding measured point of the wafer to be measured to the wafer tray surface according to a number of fringes in the interference fringe image generated by each of the detectors, and determining a warpage of the wafer according to the distance.

2. The detection device of claim 1, wherein, The step of determining the distance from each corresponding measured point of the wafer to be measured to the wafer tray surface according to the number of fringes in the interference fringe image generated by each of the detectors comprises: analyzing the interference fringe image to determine a number of measured fringes therein; acquiring a number of calibration fringes when the distance from the wafer tray surface is 0; and calculating the distance from the corresponding measured point of the wafer to be measured to the wafer tray surface according to a difference between the number of calibration fringes and the number of measured fringes.

3. The detection device of claim 2, wherein, The step of determining the warpage of the wafer comprises: determining a three-dimensional coordinate of a first measured point on the wafer to be measured according to a first planar position of a first detection window and a corresponding first distance; determining a three-dimensional coordinate of a second measured point on the wafer to be measured according to a second planar position of a second detection window and a corresponding second distance; determining a three-dimensional coordinate of a third measured point on the wafer to be measured according to a third planar position of a third detection window and a corresponding third distance; and determining the warpage of the wafer to be measured according to the three-dimensional coordinates of the first measured point, the second measured point, the third measured point, and at least one reference point.

4. The detection device of claim 3, wherein, The step of determining the warpage of the wafer to be measured according to the three-dimensional coordinates of the first measured point, the second measured point, the third measured point, and at least one reference point comprises: determining a reference plane of the wafer to be measured according to the three-dimensional coordinates of the first measured point, the second measured point, and the third measured point; acquiring a three-dimensional coordinate of any fourth measured point on the wafer to be measured, or a contact point between the wafer to be measured and the wafer tray; and determining the warpage of the wafer to be measured according to the reference plane and the three-dimensional coordinate of the fourth measured point or the contact point.

5. The detection device of claim 1, wherein, The detection window comprises: a protective layer made of a light-transmitting material, for isolating a process environment above the wafer tray, transmitting a detection beam provided by the optical fiber to a corresponding measurement point of the wafer to be measured, and transmitting the object beam back to the optical fiber; and a support layer located below the protective layer, for supporting and fixing the protective layer and the optical fiber.

6. The detection device of claim 5, wherein, the material of the protective layer is quartz, and / or the material of the support layer is selected from ceramic, polyetherimide or polyether ether ketone.

7. The detection device of claim 1, wherein, the monochromatic light source is a helium-neon laser, for providing a narrow-band detection beam with a wavelength of 632.8 nm.

8. A processing apparatus of a semiconductor device, characterized by comprising: comprising: a process chamber comprising a wafer tray, wherein the wafer tray is provided with a plurality of detection windows; and the wafer warpage detection device according to any one of claims 1-7, for determining the warpage of a wafer carried by the wafer tray. comprising the following steps:

9. A method of processing a semiconductor device, characterized by, feeding a wafer to be processed into a process chamber and placing it on the surface of a wafer tray; using the wafer warpage detection device according to any one of claims 1-7 to detect the warpage of the wafer on-line; in response to the warpage of the wafer being greater than a preset threshold, stopping the subsequent processing process, and / or issuing an alarm indicating that the wafer is in an abnormal state; and in response to the warpage of the wafer being less than or equal to the preset threshold, performing the subsequent processing process. the computer instructions, when executed by a processor, implement the processing method of the semiconductor device according to claim 9. ​ 10. A computer readable storage medium having stored thereon computer instructions, wherein, ​

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