A Software-Defined Radio Digital Signal Frequency Conversion Method, System and Medium

Abstract

The present invention discloses a software radio digital signal frequency conversion method, system and medium; relating to the technical field of digital signal processing; including: collecting an input signal; performing complex multiplication operation on the input signal and a carrier signal to obtain a frequency-converted signal; based on an adjustable filtering and decimation module, performing integer or rational multiple filtering and decimation on the frequency-converted signal to obtain an output signal; wherein the rational multiple filtering and decimation is implemented by a numerically controlled oscillator and an interpolation unit; on the basis of the traditional technology of implementing a digital down-converter on an FPGA, this solution makes improvements in method and structure, and based on the adjustable filtering and decimation module, performs integer or rational multiple filtering and decimation on the frequency-converted signal to obtain an output signal; realizes free adjustment of the digital down-conversion multiple, and realizes the rational multiple configuration of digital down-conversion based on the numerically controlled oscillator and the interpolation unit.

Description

Technical Field

[0001] The present invention relates to the technical field of digital signal processing, and in particular to a method, system and medium for frequency conversion of software radio digital signals. Background Art

[0002] Digital down converter (DDC) is a key component in digital signal processing, mainly used to convert intermediate frequency (IF) signals into baseband signals. The working principle of DDC is to achieve frequency conversion by multiplying the input signal with orthogonal sine and cosine signals. This process usually involves modules such as digital mixers, low-pass filters, and sampling rate conversion. FPGA is widely used in the implementation of DDC due to its flexibility and high performance. It can process high-bandwidth and high-sampling-rate signals and is suitable for application scenarios such as software-defined radio (SDR).

[0003] When implementing digital downconverters on FPGAs, commonly used structures include cascaded integrator comb (CIC) filters and finite impulse response (FIR) filters. Cascaded integrator comb filters are favored for their simple structure and low resource consumption, but they are insufficient in spectrum performance, and multiple cascaded integrator comb filters are usually required to be cascaded to improve performance. At the same time, there are the following defects:

[0004] 1) Insufficient spectral performance: CIC filters have poor spectral performance, especially in suppressing side lobes, which leads to the need to cascade multiple filters to improve performance, which increases the complexity of the design and resource consumption;

[0005] 2) The decimation multiple is not flexible: Currently, the decimation multiple of DDCs on the market is mainly fixed or only supports 2 n Multiples do not support rational number multiples transformation;

[0006] 3) The DDC decimation multiple cannot be flexibly configured: The decimation multiple of the current FPGA-based DDC algorithm is mostly fixed when in use and cannot be flexibly configured;

[0007] 4) Limited supported bandwidth: Currently, the DDC output bandwidth on the market is basically fixed and cannot be adjusted, and cannot be suitable for a variety of application scenarios. Summary of the invention

[0008] The technical problem to be solved by the present invention is that when a digital down converter is implemented on an FPGA, there are problems such as insufficient spectrum performance, inflexible extraction multiples and limited supported bandwidth. The present invention aims to provide a method, system and medium for frequency conversion of a software radio digital signal. On the basis of the traditional technology for implementing a digital down converter on an FPGA, improvements are made in the method and structure. Based on an adjustable filtering extraction module, the frequency conversion signal is filtered and extracted by integer multiples or rational multiples to obtain an output signal; the digital down conversion multiples are freely adjusted; and the rational number multiples configuration of the digital down conversion is realized based on a numerically controlled oscillator and an interpolation unit.

[0009] The present invention is achieved through the following technical solutions:

[0010] The present invention provides a method for frequency conversion of a software radio digital signal, comprising:

[0011] Collect input signals;

[0012] Performing a complex multiplication operation on the input signal and the carrier signal to obtain a frequency conversion signal;

[0013] Based on the adjustable filtering extraction module, the frequency conversion signal is filtered and extracted by integer multiples or rational multiples to obtain an output signal;

[0014] The rational number multiple filtering extraction is realized by a numerically controlled oscillator and an interpolation unit, wherein the interpolation unit is used to convert the sampling rate of the frequency conversion signal to the target output sampling rate; and the numerically controlled oscillator is used to overflow control the interpolation unit.

[0015] Working principle of this scheme: Based on the traditional technology of realizing digital down-converter on FPGA, this scheme makes improvements in method and structure, and based on the adjustable filtering extraction module, performs integer multiple or rational number filtering extraction on the frequency conversion signal to obtain the output signal; realizes the free adjustment of the digital down-conversion multiple, and realizes the rational number multiple configuration of digital down-conversion based on the numerically controlled oscillator and the interpolation unit.

[0016] A further optimization scheme is that the input signal and the carrier signal are complex multiplied to obtain a frequency conversion signal; including the method:

[0017] Generate a pseudo-frequency-converted cosine carrier signal and a sine carrier signal based on a function signal generator;

[0018] The cosine carrier signal and the sine carrier signal are complex multiplied with the input signal to obtain a frequency conversion signal.

[0019] A further optimization scheme is that the adjustable filtering extraction module performs integer multiple or rational number multiple filtering extraction on the frequency conversion signal to obtain an output signal; including a method: first performing multi-stage half-band filtering extraction processing on the frequency conversion signal, and then performing a first-stage rational number multiple filtering extraction; the adjustable filtering extraction module includes a filtering extraction module in which the number of stages of multi-stage half-band filtering extraction processing is adjustable, and it is possible to select whether to perform a first-stage rational number multiple filtering extraction.

[0020] A further optimization scheme is that the method of first-level rational number multiple filtering extraction includes:

[0021] Obtain the frequency conversion signal r (m) and its sampling interval T after multi-stage half-band filtering and extraction processing s , and set the step amount and overflow flag of the numerically controlled oscillator; the step amount is determined by the rational number sampling rate conversion multiple;

[0022] Make the numerically controlled oscillator accumulate according to the step amount and calculate the decimal interval of each accumulation;

[0023] Whenever the numerically controlled oscillator accumulates to the overflow mark, the interpolation unit inserts a data point into the frequency conversion signal r(m) according to the current decimal interval and records the interpolation time at this time;

[0024] Determine the time offset △T of the interpolation time relative to the actual sampling point of the variable frequency signal r (m); ; Indicates the decimal interval of the kth accumulation;

[0025] The output signal is obtained based on the time offset ΔT and polynomial interpolation.

[0026] A further optimization scheme is that the numerically controlled oscillator counts down to achieve step accumulation, and the count value of the numerically controlled oscillator is:

[0027] ;

[0028] in, W(m-1) Indicates the m-1th accumulated step amount of the numerically controlled oscillator; Indicates the mth accumulated count value of the numerically controlled oscillator; It represents the m-1th accumulated count value of the numerically controlled oscillator; mod[] represents remainder; for example, mod[ab,1]=(ab)%1.

[0029] A further optimization scheme is that the calculation method of the decimal interval includes:

[0030] The decimal interval when inserting the data point for the kth time is calculated according to the following formula :

[0031] ;

[0032] in, It indicates the mth accumulated count value of the numerically controlled oscillator when the data point is inserted for the kth time; It indicates the count value accumulated by the numerically controlled oscillator for the m+1th time when the data point is inserted for the kth time; Indicates the mth accumulated step amount of the numerically controlled oscillator; It indicates the mth accumulated count value of the numerically controlled oscillator when the data point is inserted for the 0th time; T i Represents the sampling interval of the output signal; T s Represents the sampling interval of the frequency conversion signal r (m).

[0033] A further optimization scheme is that the polynomial interpolation method is a cubic polynomial interpolation method, and the cubic polynomial interpolation method is implemented by a Farrow filter structure;

[0034] The outputs of the input Farrow filter structure after the first FIR filter, the second FIR filter, the third FIR filter and the fourth FIR filter are respectively used as the cubic coefficient, quadratic coefficient, linear coefficient and constant term of the cubic polynomial; the cubic polynomial is separated by decimals. is the variable value;

[0035] The value of the cubic polynomial is calculated as an output signal.

[0036] A further optimization scheme is that the coefficient lengths of the first FIR filter, the second FIR filter, the third FIR filter and the fourth FIR filter are all 4;

[0037] The coefficients of the first FIR filter are: 0, 0, 1, 0;

[0038] The coefficients of the second FIR filter are: -1 / 6, 1, -1 / 2, -1 / 3;

[0039] The coefficients of the third FIR filter are: 0, 1 / 2, -1, 1 / 2;

[0040] The coefficients of the fourth FIR filter are: 1 / 6, -1 / 2, 1 / 2, -1 / 6.

[0041] The present invention also provides a software radio digital signal frequency conversion system, which is used to implement the above-mentioned software radio digital signal frequency conversion method; the system comprises:

[0042] An acquisition module, used for acquiring input signals;

[0043] A first operation module, used for performing a complex multiplication operation on the input signal and the carrier signal to obtain a frequency conversion signal;

[0044] The adjustable filtering and extraction module is used to perform integer multiple or rational multiple filtering and extraction on the frequency conversion signal to obtain an output signal; wherein the rational multiple filtering and extraction is implemented by a numerically controlled oscillator and an interpolation unit, and the interpolation unit is used to convert the sampling rate of the frequency conversion signal to the target output sampling rate; the numerically controlled oscillator is used to overflow control the interpolation unit.

[0045] The present solution also provides a computer-readable medium on which a computer program is stored. The computer program is executed by a processor to implement the above-mentioned method for frequency conversion of a software radio digital signal.

[0046] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0047] 1. A method, system and medium for frequency conversion of a software radio digital signal provided by the present invention; based on the traditional technology of realizing a digital down converter on an FPGA, the method and structure are improved, and based on an adjustable filtering extraction module, the frequency conversion signal is filtered and extracted by integer multiples or rational multiples to obtain an output signal; the digital down conversion multiples are freely adjusted, and the rational number multiples configuration of the digital down conversion is realized based on a digitally controlled oscillator and an interpolation unit;

[0048] 2. A method, system and medium for frequency conversion of a software radio digital signal provided by the present invention; the number of stages of multi-stage half-band filtering and extraction processing in the adjustable filtering and extraction module is adjustable, and the filtering and extraction module can select whether to perform a first-stage rational number multiple filtering and extraction. Under the cooperation of the multi-stage half-band filtering and extraction processing and the first-stage rational number multiple filtering and extraction, the multiple of digital down-conversion can be freely adjusted to an integer or a rational number within a certain range. BRIEF DESCRIPTION OF THE DRAWINGS

[0049] In order to more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. It should be understood that the following drawings only illustrate certain embodiments of the present invention and should not be regarded as limiting the scope. For those of ordinary skill in the art, other relevant drawings can be obtained based on these drawings without creative work. In the drawings:

[0050] Figure 1 It is a flowchart of a digital signal frequency conversion method based on FPGA;

[0051] Figure 2 This is a schematic diagram of the structure of the rational number multiple filtering extraction module;

[0052] Figure 3 This is a schematic diagram of the counting principle of a numerically controlled oscillator;

[0053] Figure 4 Schematic diagram of the relationship between the equivalent sampling time of the frequency conversion signal r (m)) and the output signal y (n);

[0054] Figure 5 This is a schematic diagram of the Farrow filter structure principle;

[0055] Figure 6 This is a schematic diagram of the Farrow filter structure;

[0056] Figure 7 This is a schematic diagram of the extraction module structure. DETAILED DESCRIPTION

[0057] In order to make the objectives, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with embodiments and drawings. The exemplary embodiments of the present invention and their description are only used to explain the present invention and are not intended to limit the present invention.

[0058] When a digital down converter is implemented on an FPGA, there are problems such as insufficient spectrum performance, inflexible decimation multiples, and limited supported bandwidth. In view of this, the present invention provides the following embodiments to solve the above problems.

[0059] Embodiment 1: This embodiment provides a method for frequency conversion of a software radio digital signal, such as Figure 1 As shown, including:

[0060] Step 1: Collect input signal;

[0061] Step 2: Performing complex multiplication operation on the input signal and the carrier signal to obtain a frequency conversion signal; this step specifically includes the following method:

[0062] Generate a pseudo-frequency-converted cosine carrier signal and a sine carrier signal based on a function signal generator;

[0063] The cosine carrier signal and the sine carrier signal are complex multiplied with the input signal to obtain a frequency conversion signal.

[0064] Step three: Based on the adjustable filtering and extraction module, the frequency conversion signal is subjected to integer multiple or rational multiple filtering and extraction to obtain an output signal; wherein the rational multiple filtering and extraction is implemented by a numerically controlled oscillator and an interpolation unit, and the interpolation unit is used to convert the sampling rate of the frequency conversion signal to the target output sampling rate; the numerically controlled oscillator is used to overflow control the interpolation unit.

[0065] This step specifically includes a method: firstly subjecting the frequency conversion signal to multi-stage half-band filtering and extraction, and then subjecting it to a first stage of rational number multiple filtering and extraction; the adjustable filtering and extraction module indicates that the number of stages of multi-stage half-band filtering and extraction is adjustable, and it is possible to choose whether to subject it to a first stage of rational number multiple filtering and extraction. The specific filter for multi-stage half-band filtering and extraction can be a half-band filter or a 2x extraction filter; in order to support rational number multiple extraction, this solution cascades a first stage of rational number multiple filtering and extraction module after the multi-stage half-band filter, and the structure of the rational number multiple filtering and extraction module is as follows: Figure 2 As shown, the application process can choose to perform or not perform a first-stage rational number filtering extraction according to actual needs.

[0066] The method of first-level rational number multiple filtering extraction includes:

[0067] S31, obtaining the frequency conversion signal r (m) and its sampling interval T obtained after multi-stage half-band filtering and extraction processing s , and set the step amount and overflow flag of the numerically controlled oscillator; the step amount is determined by the rational number sampling rate conversion multiple;

[0068] S32, making the numerically controlled oscillator accumulate according to the step amount, and calculating the decimal interval of each accumulation; the numerically controlled oscillator counts down to achieve the accumulation of the step amount, and the count value of the numerically controlled oscillator is:

[0069]

[0070] in, W(m-1) Indicates the m-1th accumulated step amount of the numerically controlled oscillator; Indicates the mth accumulated count value of the numerically controlled oscillator; It represents the m-1th accumulated count value of the numerically controlled oscillator; mod[] represents remainder. The counting principle of the numerically controlled oscillator is as follows: Figure 3 shown.

[0071] The calculation method of decimal interval includes: It can be calculated from the two similar triangles shown by the thick lines in the schematic diagram of the numerically controlled oscillator counting. Then the decimal interval when inserting the data point for the kth time is calculated according to the following formula: :

[0072]

[0073] in, It indicates the mth accumulated count value of the numerically controlled oscillator when the data point is inserted for the kth time; It indicates the count value accumulated by the numerically controlled oscillator for the m+1th time when the data point is inserted for the kth time; Indicates the mth accumulated step amount of the numerically controlled oscillator; It indicates the mth accumulated count value of the numerically controlled oscillator when the data point is inserted for the 0th time; T i Represents the sampling interval of the output signal; T s Represents the sampling interval of the frequency conversion signal r (m).

[0074] S33, whenever the numerically controlled oscillator accumulates to the overflow mark, the interpolation unit inserts a data point into the frequency conversion signal r (m) according to the current decimal interval, and records the interpolation time at this time;

[0075] S34, determining a time offset ΔT of the interpolation time relative to the actual sampling point of the variable frequency signal r (m); ; Indicates the decimal interval of the kth accumulation;

[0076] S35, obtaining an output signal based on the time offset ΔT and polynomial interpolation method.

[0077] The function of the interpolation unit in this scheme is to convert the input s The frequency conversion signal r(m) with a sampling interval of Ti is converted into an output signal y(n) with a sampling interval of Ti. The equivalent sampling time relationship between the interpolation unit input signal, that is, the frequency conversion signal r(m) and the output signal y(n) is as follows: Figure 4 As shown, the upward arrow indicates the input sampling time, the downward arrow indicates the output sampling time, and the decimal deviation is As long as the time offset of the interpolation moment relative to the actual sampling point can be determined, the output value can be determined by its adjacent sampling values.

[0078] The polynomial interpolation method in this scheme is a cubic polynomial interpolation method, which is implemented by a Farrow filter structure; the Farrow filter structure is as follows: Figure 5 and Figure 6 The input signal of Farrow filter structure passes through the first FIR filter b 3 (i) The second FIR filter b 2 (i) The third FIR filter b 1 (i) and the fourth FIR filter b 0 The output signals v(3), v(2), v(1) and v(0) after (i) are respectively used as the cubic coefficient, quadratic coefficient, linear coefficient and constant term of the cubic polynomial; the cubic polynomial is expressed in decimal intervals is the variable value; the value of the cubic polynomial is calculated as the output signal Y (k). Where the first FIR filter b 3 (i) The second FIR filter b 2 (i) The third FIR filter b 1 (i) and the fourth FIR filter b 0The coefficient length of (i) is 4; the first FIR filter b 3 The coefficients of (i) are: 0, 0, 1, 0; the second FIR filter b 2 The coefficients of (i) are: -1 / 6, 1, -1 / 2, -1 / 3; the third FIR filter b 1 The coefficients of (i) are: 0, 1 / 2, -1, 1 / 2; the fourth FIR filter b 0 The coefficients of (i) are: 1 / 6, -1 / 2, 1 / 2, -1 / 6.

[0079] Embodiment 2: This embodiment provides a software radio digital signal frequency conversion system, which is used to implement a software radio digital signal frequency conversion method described in Embodiment 1; the system includes:

[0080] An acquisition module, used for acquiring input signals;

[0081] A first operation module, used for performing a complex multiplication operation on the input signal and the carrier signal to obtain a frequency conversion signal;

[0082] The adjustable filtering and extraction module is used to perform integer multiple or rational multiple filtering and extraction on the frequency conversion signal to obtain an output signal; wherein the rational multiple filtering and extraction is implemented by a numerically controlled oscillator and an interpolation unit, and the interpolation unit is used to convert the sampling rate of the frequency conversion signal to the target output sampling rate; the numerically controlled oscillator is used to overflow control the interpolation unit.

[0083] like Figure 7 As shown, the adjustable filter extraction module includes a half-band filter extraction module and a rational number multiple filter extraction module. In this embodiment, the half-band filter extraction module is a cascade of multiple filter 2-times extraction units; the data sent to the adjustable filter extraction module is output after passing through each level of filter extraction units, and the output from which level of half-band filter is determined by the extraction level. After each level of half-band filter, the data rate will be halved. Therefore, when implementing, the serial computing capability of the Xilinx FIR compiler can be used to save resource overhead.

[0084] The coefficients of the half-band filter in the half-band filter extraction module can be designed by filterDesigner in Matlab. Specifically, the parameter configuration in this embodiment is: the normalized bandwidth w of the filter pass is 0.4 and the order is 38.

[0085] The function of the half-band filter extraction module (low-pass filter) is to suppress the frequency components outside the target signal. In actual implementation, the fir1 function in Matlab software can be used. Considering that the value of the normalized bandwidth of the low-pass filter (the ratio of the target signal bandwidth to the rational number multiple extraction unit input signal sampling rate) is not fixed at this time, it may be within a range. Therefore, the low-pass filter can be designed as a group of filters (for example, including 32 groups of filter coefficients), and the normalized bandwidth of the group of filters is uniformly valued within the range. Which group of filters to actually use can be dynamically selected according to the parameter settings of the current signal. The order of this group of low-pass filters can be set to about 30 orders, and it can be appropriately selected according to the actual available FPGA resources.

[0086] Rational number multiple extraction has no constraints on the extraction multiple itself, but its interpolation process is essentially a low-pass filter structure, and its interpolation output effect is related to the ratio between the signal bandwidth and the interpolator input sampling rate. The smaller the ratio, the better the interpolation effect. Therefore, for the last level of rational number multiple extraction unit, the ratio of its input sampling rate to the target signal bandwidth should not be too small (for example, more than 2 times).

[0087] In this embodiment, the down-conversion multiple is 2 to 1024, and the decimation multiple of the last level of rational number decimation is set to be between 2 and 4, including 2 times but excluding 4 times decimation. Figure 7 The 9-level half-band filter extraction plus one level of rational number multiple extraction shown in the figure can achieve 2 times extraction at each level of half-band filter extraction, and rational number multiple extraction can achieve any extraction between 2 and 4 times, thus achieving complete coverage of the extraction multiple between 2 and 1024.

[0088] If the normalized bandwidth of the output signal of the adjustable filter extraction module is w ( w is the ratio of the bandwidth of the output signal of the adjustable filter extraction module to the sampling rate, which is known for each specific application), then the normalized bandwidth range of the low-pass filter before the rational number multiple extraction in the last stage is 0.25 w ~0.5 w Therefore, the normalized bandwidth of the 32 low-pass filters designed based on the fir1 function is:

[0089] .

[0090] Calling the fir1 function in Matlab software can calculate them one by one, and then the coefficients of these 32 sets of low-pass filters. In actual design, a filter selection port is added to the port to select which of the 32 filters to use to filter the signal. The filter selection parameter value is 0~31, where 0 represents the filter coefficient with the smallest normalized bandwidth and 31 represents the largest filter coefficient.

[0091] For extraction multiples Deci (a rational number between 2 and 1024, including 2 and 1024), let the number of half-band decimation stages actually used in the 9-stage half-band filtering decimation be DeciHB , let the rational number extraction multiple be set to DeciRational ,but DeciHB and DeciRational The calculation method is as follows:

[0092] ;

[0093] ;

[0094] Among them, floor(*) represents the rounding down function.

[0095] For example, for a decimation factor of 2, Deci =2, substituting into the above two equations, we can get:

[0096] ;

[0097] .

[0098] For a decimation factor of 3.25, Deci =3.25, substituting into the above two equations, we can get:

[0099] ;

[0100] .

[0101] For a draw multiple of 3.999, Deci =3.999, substituting into the above two formulas, we can get:

[0102] ;

[0103] .

[0104] For a decimation factor of 512.5, Deci =512.5, substituting into the above two formulas, we can get:

[0105] ;

[0106] .

[0107] visible, DeciHB The value is between 0 and 9, including 0 and 9; DeciRational The value is between 2 and 4, including 2 but excluding 4, which is consistent with the design.

[0108] In practical application, DeciHB The value is directly configured as a port parameter, while DeciRational The value is converted into the step amount NCO of the rational number multiple filter extraction module and sent in. The step amount NCO calculation method is as follows:

[0109] NCO = round(2 Z / DeciRational)

[0110] Wherein, Z represents the width of the decimal place of the step amount, Z=28.

[0111] The rational number multiple filtering extraction module also uses the inverse NCOInv of the step amount NCO. The calculation method of the inverse NCOInv is as follows:

[0112] NCOInv = round(2 Z1 *DeciRational)

[0113] Wherein, Z1 represents the number of decimal places of the countdown NCOInv, Z1=21.

[0114] If the sampling rate of the input signal of the adjustable filter extraction module is F , the signal bandwidth is B , the sampling rate before the last level of rational number extraction is , its normalized filter bandwidth w inst for:

[0115] ,

[0116] Select the normalized bandwidth of the 32 groups of coefficients mentioned above to be no less than the normalized filter bandwidth w inst The corresponding coefficients are OK.

[0117] The adjustable filter extraction module supports the function of setting the bit width of input data and output data according to the definition of the nbits parameter of the top-level port; selects whether to include the orthogonal frequency conversion unit according to the definition of the usePINC parameter; and selects whether to include the rational number multiple filter extraction module according to the definition of the useNCO parameter.

[0118] The adjustable filter extraction module provides an input data valid indication input port, which can adapt to different input data bandwidths; the input port ideci is the half-band extraction level DeciHB ; Input port inco is DeciRational The calculated step size NCO is taken; the input port incoinv is the inverse NCOInv of the step size NCO; the input port ilpfsel is the low-pass filter coefficient selection number.

[0119] The rational number multiple filtering extraction module includes: an interpolation control unit and an interpolation unit. The interpolation unit implements cubic polynomial interpolation calculation by a cubic interpolation calculation unit. The interpolation control unit includes a numerically controlled oscillator NCO. Whenever the accumulation of the numerically controlled oscillator NCO reaches an overflow mark, the interpolation unit inserts data points in the frequency conversion signal according to the current decimal interval; under the regular overflow control of the interpolation control unit, the interpolation unit realizes the conversion of the input signal sampling rate to the required output sampling rate.

[0120] Embodiment 3: This embodiment provides a computer-readable medium on which a computer program is stored. The computer program is executed by a processor to implement a method for frequency conversion of a software radio digital signal as described in Embodiment 1. Specifically, the following steps are performed:

[0121] Step 1, collecting input signals;

[0122] Step 2, performing complex multiplication operation on the input signal and the carrier signal to obtain a frequency conversion signal;

[0123] Step three, based on a numerically controlled oscillator and an interpolation unit, filtering and extracting the frequency conversion signal by integer multiples or rational multiples to obtain an output signal; the interpolation unit is used to convert the sampling rate of the frequency conversion signal to the target output sampling rate; the numerically controlled oscillator is used to overflow control the interpolation unit.

[0124] The specific implementation methods described above further illustrate the objectives, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above description is only a specific implementation method of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A method for frequency conversion of a software radio digital signal, characterized in that: include: Collect input signals; Performing a complex multiplication operation on the input signal and the carrier signal to obtain a frequency conversion signal; Based on the adjustable filtering extraction module, the frequency conversion signal is subjected to integer multiple or rational multiple filtering extraction to obtain an output signal; the specific method includes: the frequency conversion signal is first subjected to multi-stage half-band filtering extraction processing, and then subjected to a first-stage rational multiple filtering extraction; the adjustable filtering extraction module includes a filtering extraction module in which the number of stages of multi-stage half-band filtering extraction processing is adjustable, and whether to perform a first-stage rational multiple filtering extraction can be selected; The method of first-level rational number multiple filtering extraction includes: Obtain the frequency conversion signal r(m) and its sampling interval T after multi-stage half-band filtering and extraction processing s , and set the step amount and overflow flag of the numerically controlled oscillator; the step amount is determined by the rational number sampling rate conversion multiple; Make the numerically controlled oscillator accumulate according to the step amount and calculate the decimal interval of each accumulation; Whenever the numerically controlled oscillator accumulates to the overflow mark, the interpolation unit inserts a data point into the frequency conversion signal r(m) according to the current decimal interval and records the interpolation time at this time; Determine the time offset △T of the interpolation time relative to the actual sampling point of the variable frequency signal r (m); An output signal is obtained based on a time offset △T and a polynomial interpolation method; The rational number multiple filtering extraction is realized by a numerically controlled oscillator and an interpolation unit, wherein the interpolation unit is used to convert the sampling rate of the frequency conversion signal to the target output sampling rate; and the numerically controlled oscillator is used to overflow control the interpolation unit.

2. A method for frequency conversion of software radio digital signals according to claim 1, characterized in that: The input signal is subjected to complex multiplication operation with a carrier signal to obtain a frequency conversion signal; comprising: method: Generate a pseudo-frequency-converted cosine carrier signal and a sine carrier signal based on a function signal generator; The cosine carrier signal and the sine carrier signal are complex multiplied with the input signal to obtain a frequency conversion signal.

3. A method for frequency conversion of software radio digital signals according to claim 1, characterized in that: The numerically controlled oscillator counts down to achieve the accumulation of step amounts, and the count value of the numerically controlled oscillator is: ； in, W(m-1) Indicates the m-1th accumulated step amount of the numerically controlled oscillator; Indicates the mth accumulated count value of the numerically controlled oscillator; It represents the m-1th accumulated count value of the numerically controlled oscillator; mod[] represents the remainder.

4. A method for frequency conversion of software radio digital signals according to claim 1, characterized in that: The calculation method of the decimal interval includes: The decimal interval when inserting the data point for the kth time is calculated according to the following formula : ； in, It indicates the mth accumulated count value of the numerically controlled oscillator when the data point is inserted for the kth time; It indicates the count value accumulated by the numerically controlled oscillator for the m+1th time when the data point is inserted for the kth time; Indicates the mth accumulated step amount of the numerically controlled oscillator; It indicates the mth accumulated count value of the numerically controlled oscillator when the data point is inserted for the 0th time; T i Represents the sampling interval of the output signal; T s Represents the sampling interval of the frequency conversion signal r (m).

5. The method for frequency conversion of a software radio digital signal according to claim 1, characterized in that: The polynomial interpolation method is a cubic polynomial interpolation method, and the cubic polynomial interpolation method is implemented by a Farrow filter structure; The outputs of the input Farrow filter structure after the first FIR filter, the second FIR filter, the third FIR filter and the fourth FIR filter are respectively used as the cubic coefficient, quadratic coefficient, linear coefficient and constant term of the cubic polynomial; the cubic polynomial is separated by decimals. is the variable value; The value of the cubic polynomial is calculated as an output signal.

6. A method for frequency conversion of software radio digital signals according to claim 5, characterized in that: The coefficient lengths of the first FIR filter, the second FIR filter, the third FIR filter and the fourth FIR filter are all 4; The coefficients of the first FIR filter are: 0, 0, 1, 0; The coefficients of the second FIR filter are: -1 / 6, 1, -1 / 2, -1 / 3; The coefficients of the third FIR filter are: 0, 1 / 2, -1, 1 / 2; The coefficients of the fourth FIR filter are: 1 / 6, -1 / 2, 1 / 2, -1 / 6.

7. A software radio digital signal frequency conversion system, characterized in that: A method for frequency conversion of a software radio digital signal used to implement any one of claims 1 to 6; the system comprises: An acquisition module, used for acquiring input signals; A first operation module, used for performing a complex multiplication operation on the input signal and the carrier signal to obtain a frequency conversion signal; The adjustable filtering and extraction module is used to perform integer multiple or rational multiple filtering and extraction on the frequency conversion signal to obtain an output signal; wherein the rational multiple filtering and extraction is implemented by a numerically controlled oscillator and an interpolation unit, and the interpolation unit is used to convert the sampling rate of the frequency conversion signal to the target output sampling rate; the numerically controlled oscillator is used to overflow control the interpolation unit.

8. A computer readable medium having a computer program stored thereon, characterized in that: The computer program is executed by a processor to implement a method for frequency conversion of a software radio digital signal as described in any one of claims 1 to 6.

Images