Method and apparatus for driver calibration

Through the combination of the current comparator and the copy circuit, the driving current is monitored and adjusted, and the output current changes caused by the offset voltage of the operational amplifier are solved, thereby achieving high accuracy calibration of the driving circuit.

CN119787989APending Publication Date: 2025-04-08SEMICON COMPONENTS IND LLC
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Patent Information

Application Number
CN202411848820.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2018-06-07
Filing Date
2019-06-06
Publication Date
2025-04-08

AI Technical Summary

Technical Problem

Conventional drive circuits have a change between the actual output current and the ideal output current due to the offset voltage introduced by the operational amplifier.

Method used

Using a combination of current comparator circuits and replication circuits, the driving current is adjusted to reduce the offset output current by monitoring the driving current and providing feedback signals. The calibration circuit design of components such as current comparator circuits, controllers, digital-to-analog converters, differential operational amplifiers and feedback circuits is adopted.

Benefits of technology

By calibrating the output current compensation offset voltage introduced by the operational amplifier, the actual output current is closer to the ideal output current, and the accuracy of the driving circuit is improved.

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Abstract

The present invention is entitled "Method and apparatus for driver calibration". The present invention relates to a driver calibration circuit and method for calibrating a driver. The method and apparatus may include various circuits and / or systems to minimize an offset output current (e.g., a drive current) caused by an offset voltage in an operational amplifier. The method and apparatus may include a current comparator circuit and a replica circuit, which operate in conjunction with each other to monitor the drive current and provide a feedback signal, which is then used to adjust the drive current and improve the accuracy of the drive current. The technical effect achieved by the present invention is to provide a drive circuit that compensates for the offset voltage introduced by the operational amplifier by calibrating the output current, so that the actual output current is closer to the ideal output current.
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Description

[0001] This application is a divisional application of the application filed on June 6, 2019, with application number 201910489738.1 and invention name “Method and device for drive calibration”. Technical Field

[0002] The present invention relates to a driver calibration circuit and method for calibrating a driver. Background Art

[0003] Electronic devices such as mobile phones, cameras, and computers often combine lens modules with image sensors for capturing images. Many imaging systems employ autofocus methods and various signal processing techniques to improve image quality by adjusting the position of the lens relative to the image sensor.

[0004] Autofocus systems typically utilize drivers and actuators to move the lens to an optimal position to improve image quality. The system also utilizes operational amplifiers to facilitate signal propagation. However, operational amplifiers may experience offset voltages, which cause the driver to produce an output current that is different from the expected (ideal) current. For high-performance drivers, the variation between the actual output current and the ideal output current must be reduced or removed. Summary of the invention

[0005] The present invention relates to a driver calibration circuit and method for calibrating a driver.

[0006] The technical problem solved by the present invention is that a conventional driving circuit has a variation between an actual output current and an ideal output current due to an offset voltage (typically introduced by an operational amplifier).

[0007] The method and apparatus may include various circuits and / or systems to minimize an offset output current (e.g., drive current) due to an offset voltage in an operational amplifier. The method and apparatus may include a current comparator circuit and a replica circuit that operate in conjunction with each other to monitor the drive current and provide a feedback signal that is then used to adjust the drive current and improve the accuracy of the drive current.

[0008] According to one aspect, a driver calibration circuit includes: a current comparator circuit that responds to a bias voltage and generates a threshold current; a controller that is connected to the current comparator circuit and is configured to generate: a DAC code; and a calibration code; a digital-to-analog converter (DAC) that is connected to the controller and is configured to: generate a first voltage based on the DAC code; and generate a second voltage based on the calibration code; a differential operational amplifier (DOA) that is connected to the DAC and is configured to: receive a first voltage; receive a feedback voltage; and generate an operational amplifier output voltage; a driver that is connected to an output terminal of the DOA, wherein the driver responds to the operational amplifier output voltage by generating a drive current; a feedback circuit that is connected to the DAC, the driver, and the DOA, and is configured to generate a feedback voltage based on the second voltage; and a replica circuit that is connected to: the current comparator circuit; the output terminal of the DOA; and the driver; wherein the replica circuit generates a replica current proportional to the drive current.

[0009] In one embodiment of the driver calibration circuit, the current comparator circuit includes a first transistor, a second transistor, a third transistor and a fourth transistor connected in series; and the current comparator circuit generates a comparator output voltage according to a comparison result of the replica current and the threshold current.

[0010] In one embodiment of the above driver calibration circuit, the replica circuit is connected to a first node between the first transistor and the second transistor.

[0011] In one embodiment of the above driver calibration circuit, the controller is connected to the output terminal of the current comparator circuit and is configured to generate a calibration code according to the comparator output voltage.

[0012] In one embodiment of the above-mentioned driver calibration circuit, the driver includes a driving transistor; the gate terminal of the driving transistor is connected to the output terminal of the DOA; the source terminal of the driving transistor is connected to the feedback circuit; and when the driving current is approximately zero amperes, the drain voltage of the driving transistor is approximately equal to the supply voltage.

[0013] In one embodiment of the above-mentioned driver calibration circuit, the replica circuit includes a replica transistor, and wherein: the gate terminal of the replica transistor is connected to the output terminal of the DOA; the drain terminal of the replica transistor is connected to the current comparator circuit; and the source terminal of the replica circuit is connected to the source terminal of the driving transistor.

[0014] According to another aspect, a method for calibrating a driver includes: generating a threshold current; generating a replica current proportional to a driving current of the driver; comparing the replica current with the threshold current; generating a comparator output voltage based on the comparison result; transmitting the comparator output voltage to a controller; generating a calibration code based on the comparator output voltage; generating a first voltage based on the calibration code; and applying the first voltage to an operational amplifier.

[0015] In one operation, generating a calibration code based on the comparator output voltage includes selecting a calibration code from a set of a plurality of predetermined calibration codes.

[0016] In one operation, the method further includes: generating a second voltage; applying the second voltage to the operational amplifier; and generating an operational amplifier output based on the first voltage and the second voltage.

[0017] In one operation, generating the replica current includes: applying the same voltage to the replica circuit and the driver simultaneously; and applying a second voltage to the replica circuit, the second voltage being approximately equal to the supply voltage.

[0018] The technical effect achieved by the present invention is to provide a driving circuit, which compensates for the offset voltage introduced by the operational amplifier by calibrating the output current, so that the actual output current is closer to the ideal output current. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] When considered in conjunction with the following exemplary drawings, the present technology can be more fully understood with reference to the detailed description. In the following drawings, similar reference numerals are used throughout to refer to similar elements and steps among the various drawings.

[0020] Figure 1 is a block diagram of an imaging system according to an exemplary embodiment of the present technology;

[0021] Figure 2 is a circuit diagram of a control circuit according to an exemplary embodiment of the present technology;

[0022] Figure 3 is a graph of an ideal output current, an actual output current, and a corrected output current of a driver according to an exemplary embodiment of the present technology; and

[0023] Figure 4 is a graph of driver voltages according to an exemplary embodiment of the present technology. DETAILED DESCRIPTION

[0024] The present technology may be described in terms of functional block components and various processing steps. Such functional blocks may be implemented by any number of components configured to perform specified functions and achieve various results. For example, the present technology may employ various actuators, sensors, lenses, current generators, controllers, signal converters, semiconductor devices such as transistors and capacitors that can perform multiple functions. In addition, the present technology may be implemented in conjunction with any number of systems (such as automotive, aviation, medical, scientific, monitoring and consumer electronics devices), and the systems described are only exemplary applications of the technology. In addition, the present technology may employ any number of conventional techniques for capturing image data, sampling image data, processing image data, etc.

[0025] Methods and apparatus for driver calibration according to various aspects of the present technology may operate in conjunction with any suitable electronic system, such as an imaging system, a "smart device", a wearable device, a consumer electronic device, etc. Figure 1 , the exemplary imaging system 100 can be incorporated into an electronic device, such as a digital camera or a portable computing device. For example, in various embodiments, the imaging system 100 can include a camera module 105 and an image signal processor (ISP) 130.

[0026] The camera module 105 may capture image data and perform various operating functions, such as autofocus and / or optical image stabilization. For example, the camera module 105 may include an image sensor 125, a lens module 115 positioned adjacent to the image sensor 125, and a control circuit 120. The control circuit 120 and the lens module 115 may be configured to communicate with each other and operate together to automatically focus an object or scene on the image sensor 125.

[0027] The image sensor 125 may be suitably configured to capture image data. For example, the image sensor 125 may include a pixel array (not shown) to detect light and transmit information constituting an image by converting variable attenuation of light waves (when these light waves pass through or are reflected by an object) into electrical signals. The pixel array may include a plurality of pixels arranged in rows and columns, and the pixel array may contain any number of rows and columns, such as hundreds or thousands of rows and columns. Each pixel may include any suitable photoelectric sensor, such as a photogate, a photodiode, etc., to detect light and convert the detected light into an electric charge. The image sensor 125 may be implemented in conjunction with any suitable technology, such as an active pixel sensor in a complementary metal oxide semiconductor (CMOS) and a charge coupled device.

[0028] The lens module 115 may be configured to focus light on a sensing surface of the image sensor 125. For example, the lens module 115 may include a lens 135 having a fixed diameter positioned adjacent to the sensing surface of the image sensor 125. The lens module 115 may also include an actuator 110 (e.g., a linear resonant actuator such as a voice coil motor (VCM)) configured to move the lens 135 along the x-axis, the y-axis, and the z-axis.

[0029] In various embodiments, the imaging system 100 can be configured to move the portion of the lens module 115 that holds the lens 135 to perform an autofocus function. For example, the lens module 115 can include a telescopic portion (not shown) that moves relative to a stationary portion (not shown). In various embodiments, the telescopic portion can hold the lens 135. Thus, the actuator 110 can move the telescopic portion to shift the lens 135 away from or closer to the image sensor 125, thereby bringing an object or scene into focus on the image sensor 125. In various embodiments, the image sensor 125 can be fixed to the stationary portion, or can be arranged at a fixed distance from the stationary portion.

[0030] In various embodiments, the image signal processor 130 may perform various digital signal processing functions (such as color interpolation, color correction, facilitating autofocus, exposure adjustment, noise reduction, white balance adjustment, compression, etc.) to produce an output image. The image signal processor 130 may include any number of semiconductor devices, such as transistors, capacitors, etc., for performing calculations, transmitting and receiving image pixel data, and storage units, such as random access memory, non-volatile memory, or any other memory device suitable for a specific application, for storing pixel data. In various embodiments, the image signal processor 130 may be implemented with a programmable logic device, such as a field programmable gate array (FPGA), or any other device with a reconfigurable digital circuit. In other embodiments, the image signal processor 130 may be implemented in hardware using non-programmable devices. The image signal processor 130 may be partially or completely formed in a silicon-containing integrated circuit using any suitable complementary metal oxide semiconductor (CMOS) technology or manufacturing process, partially or completely formed in an ASIC (application-specific integrated circuit) using a processor and a memory system, or partially or completely formed using another suitable implementation.

[0031] The image signal processor 130 may transmit the output image to an output device, such as a display screen or a memory component, for storing and / or viewing the image data. The output device may receive digital image data, such as video data, image data, frame data, and / or gain information, from the image signal processor 130. In various embodiments, the output device may include an external device, such as a computer display, a memory card, or some other external unit.

[0032] The control circuit 120 controls power and supplies the power to various devices within the system. For example, the control circuit 120 may control power and supply the power to the lens module 115 to move the actuator 110 and / or the lens 135 to a desired position. The control circuit 120 may operate in conjunction with the image signal processor 130, the image sensor 125, and / or other systems to determine the appropriate amount of power and / or current to supply to the actuator 110. The control circuit 120 may include any suitable device and / or system capable of providing energy to the actuator 110. In an exemplary embodiment, the control circuit 120 may include a driver 235, a controller 210, a digital-to-analog converter (DAC) 215, an operational amplifier (op-amp) 220, a current generator 205, a feedback circuit 260, a current comparator circuit 250, and a replica circuit 225.

[0033] The controller 210 controls the operation of the DAC 215. The controller 210 may receive signals from other components in the system, such as a clock signal (not shown), which the controller 210 uses to perform various control operations and / or generate various control signals. In an exemplary embodiment, the controller 210 may supply a DAC code to the DAC 215. The DAC code may include a first digital code. The controller 210 may generate a DAC code based on information from the image sensor 125, the ISP 130, and / or other relevant information.

[0034] According to an exemplary embodiment, the controller 210 may further include a memory (not shown) configured to store a plurality of offset calibration codes. The offset calibration codes may be stored in, for example, a lookup table or other suitable storage medium. The controller 210 may generate a current comparator voltage V COMP To select one of the offset calibration codes (OCCs) and transmit the OCC to the DAC 215. The OCC may include a second digital code.

[0035] Controller 210 may include any suitable circuits and / or systems for generating digital signals, such as DAC codes and OCCs. For example, controller 210 may include various logic circuits configured to perform comparisons, arithmetic functions, signal conversions, and the like.

[0036] In the DAC 215, a digital value may be converted into an analog value (eg, voltage) and an output signal may be generated according to various input signals. According to an exemplary embodiment, the DAC 215 may be connected to the controller 210 and receive a DAC code and an OCC. The DAC 215 may generate a DAC output signal V according to the DAC code. DAC , and can also generate a calibration voltage V according to OCC CALDAC 215 can also be connected to operational amplifier 220 and configured to convert the DAC output signal V DAC is transmitted to the input terminal of the operational amplifier 220. The DAC 215 can also be connected to the feedback circuit 260 and configured to convert the calibration voltage V CAL Transmitted to the feedback circuit 260.

[0037] The feedback circuit 260 can be configured to CAL and / or other signals to generate the feedback voltage V F For example, the feedback circuit 260 may include various circuits, such as amplifiers, resistors, etc., to amplify the desired signal, amplify the differential signal, measure voltage, and / or detect current. According to an exemplary embodiment, the feedback voltage V F Based on the calibration voltage V CAL and the voltage drop across the sensing resistor 245 .

[0038] The sensing resistor 245 may be connected to the driver 235 at a first end and to ground at a second end. The sensing resistor 245 may also be connected to the feedback circuit 260 with a connector that connects the first end and the second end to the feedback circuit 260. Thus, the feedback circuit 260 may detect the drive current I by measuring the voltage drop across the sensing resistor 245. DR .

[0039] The operational amplifier 220 may be configured to receive input signals and amplify the difference between the input signals (i.e., differential input). The operational amplifier 220 may include an inverting terminal (-) for receiving a first input signal and a non-inverting terminal (+) for receiving a second input signal. In an exemplary embodiment, the operational amplifier 220 is connected to the DAC 215 and is configured to receive the DAC output signal V at the non-inverting terminal (+). DAC And receives the feedback voltage V at the inverting terminal (-) F The operational amplifier 220 may include a conventional operational amplifier 220 formed using transistors, resistors, and capacitors.

[0040] Due to the manufacturing process, the transistors used to form operational amplifier 220 may not be precisely matched, which results in operational amplifier 220 having an output V that is zero at non-zero values ​​of the differential input. OUT_AMP This is often referred to as the input offset voltage, and this offset contributes to the offset current.

[0041] The current generator circuit 205 may be configured to generate a reference current I REF and supplies various bias voltages to the current comparator circuit 250, such as the bias voltage V 偏置1 、V 偏置2 、V偏置3 and V 偏置4 The current generator circuit 205 may include any circuit and / or device suitable for generating a desired reference current. For example, the current generator circuit 205 may include a bandgap current reference circuit 255 and various transistors.

[0042] The bandgap current reference circuit 255 may include conventional circuitry suitable for generating a desired reference current. The bandgap current reference circuit 255 may operate in conjunction with various transistors to generate the reference current I REF .

[0043] The current comparator circuit 250 determines whether the current signal exceeds a predetermined threshold current I COMP_TH And accordingly generate the comparator output voltage V COMP The current comparator circuit 250 may be configured as a folded cascode comparator. For example, the comparator circuit 250 may include a plurality of transistors connected in series, such as transistors M1:M4, and each transistor receiving a different bias voltage, such as bias voltage V 偏置1 、V 偏置2 、V 偏置3 and V 偏置4 The transistors M1 and M2 may include PMOS transistors, and the transistors M3 and M4 may include NMOS transistors.

[0044] According to an exemplary embodiment, the current comparator circuit 250 can be connected to the current generator circuit 205 to receive various bias voltages to generate a fixed current through transistors M1, M2, M3, and M4. COMP_TH According to the bias voltage and the reference current I REF is proportional and is described by the following formula: COMP_TH =I REF ×(1 / X), where I REF is the reference current, and 1 / X is the ratio of the number of transistors in the current comparator 250 to the number of transistors in the current generator 205 .

[0045] According to an exemplary embodiment, the current comparator circuit 250 may be connected to the replica circuit 225 at a first node N1, where the first node N1 is located between the transistors M1 and M2. The voltage at the first node N1 may be referred to as a first node voltage V N1 The current comparator circuit 250 may also be connected to the controller 210 via the buffer amplifier 240 at a second node N2, where the second node is located between the transistors M2 and M3. The voltage at the second node N2 may be referred to as a second node voltage V N2 .

[0046] The current comparator circuit 250 can also be connected to the supply voltage V DD For example, transistor M1 can be directly connected to the supply voltage V DD , and transistors M2:M4 are indirectly connected.

[0047] The driver 235 (ie, the driving circuit) facilitates moving the lens 135 to a desired position. For example, the driver 235 may generate a driving current I DR The driver 235 can supply the driving current I DR The magnitude and direction of the actuator 110 change to achieve the desired position of the lens 135. The actuator 110 responds to the driving current I DR The lens 135 is moved by the driving current I DR In general, the drive current can be described by the following formula: DR :I DR =A×I REF , where A is the gain value, and I REF is the reference current.

[0048] Driver 235 may include any circuit suitable for driving actuator 110 in response to an input signal. For example, driver 235 may be configured as an H-bridge driver including a plurality of transistors (such as transistors M6:M9). Driver 235 may also be configured to receive and respond to an operational amplifier output V OUT_AMP For example, the gate terminal of transistor M7 may be connected to the output terminal of operational amplifier 220 and may be connected to the output terminal of operational amplifier 220 according to the output V OUT_AMP In an exemplary embodiment, transistors M6 and M8 are configured as P-channel MOSFETs (PMOS), and M7 and M9 are configured as N-channel MOSFETs (NMOS), where each transistor has a gate terminal, a drain terminal, and a source terminal.

[0049] In an exemplary embodiment, the driver 235 may be coupled to the actuator 110 at a third node N3 and a fourth node N4, wherein the third node N3 is located between the transistors M6 and M7, and wherein the fourth node N4 is located between the transistors M8 and M9. The voltage at the third node N3 may be referred to as a third node voltage V N3 , and the voltage at the fourth node N4 may be referred to as a fourth node voltage V N4 .

[0050] Therefore, selectively operating transistors M6:M9 will dictate the operation of actuator 110 and / or the drive current I DR For example, the drive current I DR In the first direction (ie, Figure 2The driving current I DR The direction of can be based on the desired position of lens 135.

[0051] According to an exemplary embodiment, based on the manufacturing process, the transistors M6:M9 of the driver 235 have a minimum length to reduce the on-resistance of the driver 235. Generally speaking, as the drain-source voltage increases, the driving current I in the short channel device is increased compared to the long channel device. DR Increase more.

[0052] The replica circuit 225 generates and drives the current I DR A proportional current (i.e., a replica current I REP ). The replica circuit 225 may be connected to the current comparator circuit 250, the operational amplifier 220, and the driver 235. The replica circuit 225 may include a circuit adapted to generate a current I DR For example, the replica circuit 225 may include a transistor M5, wherein the transistor M5 is an NMOS transistor, and wherein the gate terminal of the transistor M5 may be connected to the output terminal of the operational amplifier 220 and receive the operational amplifier output V OUT_AMP The source terminal of the transistor M5 may be connected to the source terminal of the transistor M7. The drain terminal of the transistor M5 may be connected to the first node N1 of the current comparator circuit 250 and the replica current I REP According to the driving current I DR flows through transistor M5.

[0053] When the copy current I REP When the current comparator circuit 250 changes, the current I REP With the threshold current I COMP_TH The difference is compared and the comparator voltage V is output according to the difference COMP For example, if the copied current I REP Less than the threshold current I COMP_TH , then the comparator voltage V COMP is high (e.g., digital 1), and if the replica current I REP Greater than the threshold current I COMP_TH , then the comparator voltage V COMP is low (e.g., digital 0).

[0054] According to various embodiments, methods and apparatus for driver calibration operate to reduce or otherwise remove the drive current I DR For example, and refer to Figure 3, the offset is defined as the difference between the actual drive current, before calibration, and the ideal drive current (where the drive current is zero when the DAC value is zero). Therefore, the method and apparatus for driver calibration operate to substantially match the actual drive current to the ideal drive current. After calibration, the actual drive current may be within 1 least significant bit (LSB) of the ideal drive current. For example, 1 LSB may be equal to 200 μA.

[0055] refer to Figures 2 to 4 During operation, the replica circuit 225 drives the current I DR Generates replica current I REP This is done by ensuring that the gate-source voltage (V gs_M5 ) and the gate-source voltage (V gs_M7 ) is the same and ensures that the drain-source voltage (V ds_M5 ) and the drain-source voltage (V ds_M5 ) is the same. Because the gate terminal of the replica transistor M5 and the gate terminal of the transistor M7 receive the same voltage (e.g., V OUT_AMP ), so the gate-source voltage of replica transistor M5 (V gs_M5 ) and the gate-source voltage (V gs_M7 ) is the same. In addition, because the drain terminal of the replica transistor M5 is connected to the first node N1, the first node is biased by the bias voltage V 偏置2 Determine and approximately equal to the supply voltage V DD Subtract the overdrive voltage V OD (i.e., V N1 =V DD –V OD ), so when the driving current I DR When the drain-source voltage (V ds_M5 ) and the drain-source voltage (V ds_M7 ) is basically the same. Overdrive voltage V OD It may be in the range from about 0.1V to 0.2V.

[0056] According to an exemplary operation, the current comparator 250 copies the current I REP With the threshold current I COMP_TH For example, if the threshold current I COMP_TH If the replica current is, for example, 3 μA, the current comparator circuit 250 compares the replica current and determines whether the replica current is less than or greater than 3 μA and generates a comparator voltage V according to the comparison result. COMP If the copied current I REP is less than 3μA, then the comparator voltage VCOMP is high, and if the copy current I REP is greater than 3μA, then the comparator voltage V COMP Is low.

[0057] Then, the current comparator 250 converts the comparator voltage V COMP is transmitted to the controller 210. The controller 210 receives and responds to the comparator voltage V by increasing or decreasing OCC. COMP For example, if the comparator voltage V COMP is high, then OCC decreases, and if the comparator voltage V COMP DAC 215 uses OCC to change or adjust the calibration voltage V CAL , and then this calibrated voltage is used to generate the feedback voltage V F and generates the op amp output V OUT_AMP .

[0058] According to an exemplary method, when the driving current I DR Calibration is performed at approximately 0A. Figure 4 , when the drive current is about 0A, the supply voltage V DD , the voltage at the third node N3 (V N3 ) and the voltage at the fourth node N4 (V N4 ) are basically the same.

[0059]

[0066] Based on the above and as described with respect to the forward direction, the offset current may also be corrected in the reverse direction.

[0060] In the above description, the technology has been described with reference to specific exemplary embodiments. However, various modifications and changes may be made without departing from the scope of the technology of the present invention. The specification and the drawings are considered in an illustrative manner rather than a restrictive manner, and all such modifications are intended to be included within the scope of the technology. Therefore, the scope of the technology should be determined by the general embodiments described and their legal equivalents, rather than by the specific examples described above. For example, the steps listed in any method or process embodiment may be performed in any appropriate order, and are not limited to the explicit order provided in the specific examples. In addition, the components and / or elements listed in any system embodiment may be combined in a variety of arrangements to produce substantially the same results as the technology of the present invention, and are therefore not limited to the specific configurations set forth in the specific examples.

[0061] The above has described benefits, other advantages and solutions to problems with respect to specific embodiments. However, any benefit, advantage, solution to problems, or any element that makes any specific benefit, advantage or solution appear or become more obvious should not be construed as a critical, required or essential feature or component.

[0062] The terms "comprises," "comprising," or any variations thereof, are intended to refer to a non-exclusive inclusion, such that a process, method, article, composition, or apparatus that includes a list of elements includes not only those listed elements, but may also include other elements not expressly listed or inherent to such process, method, article, composition, or apparatus. Other combinations and / or modifications of the above-described structures, arrangements, applications, proportions, elements, materials, or components used in the implementation of the present technology, except for those not specifically cited, may be varied or otherwise specially adapted to a specific environment, manufacturing specifications, design parameters, or other operating requirements without departing from its general principles.

[0063] The present technology has been described above with reference to exemplary embodiments. However, changes and modifications may be made to the exemplary embodiments without departing from the scope of the present technology. These and other changes or modifications are intended to be included within the scope of the present technology.

[0064] According to one aspect, a driver calibration circuit includes: a current comparator circuit that responds to a bias voltage and generates a threshold current; a controller that is connected to the current comparator circuit and is configured to generate: a DAC code; and a calibration code; a digital-to-analog converter (DAC) that is connected to the controller and is configured to: generate a first voltage based on the DAC code; and generate a second voltage based on the calibration code; a differential operational amplifier (DOA) that is connected to the DAC and is configured to: receive a first voltage; receive a feedback voltage; and generate an operational amplifier output voltage; a driver that is connected to an output terminal of the DOA, wherein the driver responds to the operational amplifier output voltage by generating a drive current; a feedback circuit that is connected to the DAC, the driver, and the DOA, and is configured to generate a feedback voltage based on the second voltage; and a replica circuit that is connected to: the current comparator circuit; the output terminal of the DOA; and the driver; wherein the replica circuit generates a replica current proportional to the drive current.

[0065] In one embodiment, a current comparator circuit includes a first transistor, a second transistor, a third transistor, and a fourth transistor connected in series.

[0066] In one embodiment, the replica circuit is connected to a first node between the first transistor and the second transistor.

[0067] In one embodiment, the current comparator circuit generates a comparator output voltage based on a comparison of the replica current and a threshold current.

[0068] In one embodiment, if the replica current is less than the threshold current, the comparator output voltage is high, and if the replica current is greater than the threshold current, the comparator output voltage is low.

[0069] In one embodiment, the controller is connected to the output terminal of the current comparator circuit and is configured to generate a calibration code based on the comparator output voltage.

[0070] In one embodiment, the DOA includes a non-inverting terminal and an inverting terminal, and receives a first voltage at the non-inverting terminal and a feedback voltage at the inverting terminal.

[0071] In one embodiment, the driver includes a drive transistor; a gate terminal of the drive transistor is connected to the output terminal of the DOA; and a source terminal of the drive transistor is connected to the feedback circuit.

[0072] In one embodiment, when the drive current is approximately zero amperes, the drain voltage of the drive transistor is approximately equal to the supply voltage.

[0073] In one embodiment, the replica circuit includes a replica transistor, and wherein: a gate terminal of the replica transistor is connected to an output terminal of the DOA; a drain terminal of the replica transistor is connected to a current comparator circuit; and a source terminal of the replica circuit is connected to a source terminal of the drive transistor.

[0074] According to another aspect, a method for calibrating a driver includes: generating a threshold current; generating a replica current proportional to a driving current of the driver; comparing the replica current with the threshold current; generating a comparator output voltage based on the comparison result; transmitting the comparator output voltage to a controller; generating a calibration code based on the comparator output voltage; generating a first voltage based on the calibration code; and applying the first voltage to an operational amplifier.

[0075] In one embodiment, generating a calibration code based on the comparator output voltage includes selecting the calibration code from a set of a plurality of predetermined calibration codes.

[0076] In one embodiment, the method further includes: generating a second voltage; applying the second voltage to the operational amplifier; and generating an operational amplifier output based on the first voltage and the second voltage.

[0077] In one embodiment, generating the replica current includes: applying the same voltage to the replica circuit and the driver simultaneously; and applying a second voltage to the replica circuit, the second voltage being approximately equal to the supply voltage.

[0078] According to yet another aspect, an imaging system includes: a generator circuit configured to generate a bias voltage; a current comparator circuit connected to the generator circuit and configured to generate a threshold current; a controller configured to: store a plurality of calibration codes; and transmit a calibration code of the plurality of calibration codes; a digital-to-analog converter (DAC) connected to the generator circuit and configured to: receive the calibration code; generate a DAC voltage; and generate the calibration voltage according to the calibration code; a differential operational amplifier (DOA) connected to the DAC and including: a first input terminal and a second input terminal, wherein the DOA is configured to: receive the DAC voltage at the first input terminal; and transmit the calibration voltage at the second input terminal. receiving a feedback voltage at the output terminal of the DOA; and generating an operational amplifier output voltage at the output terminal; a driver connected to the output terminal of the DOA and including a driving transistor; wherein: a gate terminal of the driving transistor is connected to the output terminal of the DOA; and a source terminal of the driving transistor is connected to a second output terminal of the DOA; a feedback circuit connected to the DAC, the driver and the DOA and configured to generate a feedback voltage based on a calibration voltage; and a replica circuit including a replica transistor, wherein: a gate terminal of the replica transistor is connected to the output terminal of the DOA; a drain terminal of the replica transistor is connected to the current comparator circuit; and a source terminal of the replica circuit is connected to the source terminal of the driving transistor.

[0079] In one embodiment, the replica circuit generates a replica current that is proportional to the current through the driver.

[0080] In one embodiment, the current comparator includes a first transistor, a second transistor, a third transistor, and a fourth transistor connected in series.

[0081] In one embodiment, the replica circuit is connected to a first node between the first transistor and the second transistor.

[0082] In one embodiment, the current comparator circuit generates a comparator output voltage based on a comparison of the replica current and a threshold current.

[0083] In one embodiment, if the replica current is less than the threshold current, the comparator output voltage is high, and if the replica current is greater than the threshold current, the comparator output voltage is low.

Claims

1. A driver calibration circuit, comprising: a current comparator circuit configured to generate a threshold current and comprising a first node and a second node; a controller connected to the second node of the current comparator circuit; A digital-to-analog converter DAC connected to an output terminal of the controller; an amplifier connected to an output terminal of the DAC; a driver connected to the output terminal of the amplifier and configured to have a first current; as well as a replica circuit connected to the first node of the current comparator circuit, the output terminal of the amplifier, and the driver; The replica current is configured to have a second current proportional to the first current. 2 . The driver calibration circuit of claim 1 , the current comparator circuit comprising a first transistor and a second transistor connected in series with each other. 3 . The driver calibration circuit of claim 2 , wherein the first node is located between the first transistor and the second transistor; and the second node is located between the second transistor and a third transistor.

4. The driver calibration circuit of claim 3 , wherein the replica circuit comprises a third transistor, the third transistor comprising: A drain terminal connected to the first node of the current comparator circuit, a source terminal connected to the driver, and a gate connected to the output terminal of the driver and the amplifier. 5 . The driver calibration circuit of claim 1 , wherein the driver comprises a fourth transistor having a gate terminal connected to the output terminal of the amplifier and a source terminal connected to the replica circuit. 6 . The driver calibration circuit of claim 1 , wherein the current comparator circuit is configured to generate a comparator output voltage at the second node.

7. The driver calibration circuit of claim 1, wherein the second current is proportional to the first current.

8. An imaging system comprising: Lens; an actuator configured to adjust the position of the lens; a current comparator circuit including a first node having a first voltage and a second node having a second voltage; a driver configured to drive the actuator and comprising a first terminal responsive to the second voltage and a second terminal connected to a reference voltage; as well as The replica circuit includes a third terminal connected to the first node, a fourth terminal connected to the second terminal of the driver, and a fifth terminal connected to the first terminal of the driver. 9 . The imaging system of claim 8 , wherein the replica circuit is configured to generate a replica current proportional to a drive current of the driver.

10. The imaging system of claim 8, wherein the current comparator circuit further comprises a first transistor and a second transistor connected in series with each other.

11. The imaging system of claim 10, wherein the first node is located between the first transistor and the second transistor.

12. The imaging system of claim 8, wherein the current comparator circuit is configured to generate a comparator output voltage at the second node.