Low noise amplifier applied to millimeter waves

Abstract

The invention discloses a low-noise amplifier applied to millimeter waves, the low-noise amplifier comprises a first-pole cascode amplification circuit and a second-pole cascode amplification circuit, the first-pole cascode amplification circuit comprises NMOS (N-channel metal oxide semiconductor) transistors NM1 to NM2, mutual inductor inductors L1 to L2 with the mutual inductance coefficient of K1, capacitors C1 to C3, mutual inductor inductors L4 to L5 with the mutual inductance coefficient of K2 and an inductor L3; and the second-stage common-source amplification circuit comprises an NMOS transistor NM3, inductors L6-L8 and a capacitor C4. The input end of the low-noise amplifier disclosed by the invention uses the coupled resonator to carry out impedance matching for compensating a narrower working bandwidth caused by the single resonant frequency of the source degeneration inductor amplifier, so that the working bandwidth of the low-noise amplifier is improved. The low-noise amplifier is simple in function implementation mode, and has high gain flatness and noise flatness on the basis of function implementation.

Description

Technical Field

[0001] The invention belongs to the field of electronic information and relates to a low noise amplifier, in particular to a low noise amplifier applied to millimeter waves. Background Art

[0002] With the rapid development of wireless communication technology, especially the global deployment of 5G technology, the demand for data transmission rate and network capacity is increasing. Millimeter wave frequency band has become one of the key technologies to meet these needs due to its rich spectrum resources.

[0003] Millimeter wave technology can provide data transmission rates of up to tens of Gbps and is an important means to achieve high-speed wireless communications. However, due to its higher frequency and shorter wavelength, millimeter wave signals are susceptible to various interferences and losses, which requires high-performance millimeter wave low-noise amplifiers to ensure the quality of its signals.

[0004] As the first active circuit in the RF receiving link, the performance of the low noise amplifier (LNA) directly affects the sensitivity and noise performance of the entire system. Since the bandwidth of the millimeter wave frequency band is wide, a broadband low noise amplifier is required to cover its operating frequency band. A broadband high-gain low noise amplifier can provide more stable signal amplification for the millimeter wave communication system and ensure good communication performance under various environmental conditions. Therefore, the development of a broadband high-gain low noise amplifier is crucial for the millimeter wave communication system. Summary of the invention

[0005] The present invention provides a low noise amplifier applied to millimeter waves, which can not only cover the operating frequency band of 24G to 27GHz, but also achieve higher flatness of gain and noise under the condition of higher gain and low noise.

[0006] The objective of the present invention is achieved through the following technical solutions:

[0007] A low noise amplifier applied to millimeter waves, comprising a first-stage common-source common-gate amplifier circuit and a second-stage common-source amplifier circuit, wherein:

[0008] The first-pole common-source common-gate amplifier circuit includes NMOS transistors NM1-NM2, mutual inductors L1-L2 with a mutual inductance coefficient of K1, capacitors C1-C3, mutual inductors L4-L5 with a mutual inductance coefficient of K2, and an inductor L3;

[0009] One end of the mutual inductor L1 is connected to the input end, and the other end of the mutual inductor L1 is connected to the ground end;

[0010] One end of the mutual inductor L2 is connected to the gate of the NMOS transistor NM1, and the other end of the mutual inductor L2 is connected to the bias voltage VB1;

[0011] One end of the capacitor C1 is connected to the input end, and the other end of the capacitor C1 is connected to the ground end;

[0012] One end of the capacitor C2 is connected to the gate of the NMOS transistor NM1, and the other end of the capacitor C2 is connected to the ground;

[0013] One end of the inductor L3 is connected to the ground, and the other end of the inductor L3 is connected to the source of the NMOS transistor NM1;

[0014] The source of the NMOS transistor NM1 is connected to one end of the inductor L3, the gate of the NMOS transistor NM1 is connected to the inductor L2 of the mutual inductor and one end of the capacitor C2, and the drain of the NMOS transistor NM1 is connected to the source of the NMOS transistor NM2;

[0015] The gate of the NMOS transistor NM2 is connected to the power supply terminal, and the drain of the NMOS transistor NM2 is connected to one end of the transformer inductor L4;

[0016] One end of the mutual inductor L4 is connected to the power supply end, and the other end of the mutual inductor L4 is connected to the drain of the NMOS transistor NM2;

[0017] One end of the mutual inductor L5 is connected to the bias voltage VB2, and the other end of the mutual inductor L5 is connected to the capacitor C3 and the input end of the second stage amplifier circuit;

[0018] One end of the capacitor C3 is connected to one end of the mutual inductor L5 and the input end of the second stage amplifier circuit, and the other end of the capacitor C3 is connected to the ground;

[0019] The second-stage common-source amplifier circuit includes an NMOS transistor NM3, inductors L6-L8 and a capacitor C4;

[0020] The gate of the NMOS transistor NM3 is connected to the capacitor C3 and one end of the mutual inductor L5, the source of the NMOS transistor NM3 is connected to one end of the inductor L6, and the drain of the NMOS transistor NM3 is connected to one end of the inductor L7;

[0021] One end of the inductor L6 is connected to the source of the NMOS transistor NM3, and one end of the inductor L6 is connected to the ground;

[0022] One end of the inductor L7 is connected to the drain of the NMOS transistor NM3, and the other end of the inductor L7 is connected to one end of the inductor L8 and one end of the capacitor C4;

[0023] One end of the inductor L8 is connected to the capacitor C4 and one end of the inductor L7, and the other end of the inductor L8 is connected to the power supply end;

[0024] One end of the capacitor C4 is connected to one end of the inductor L7 and the inductor L8, and the other end of the capacitor C4 is connected to the output end.

[0025] Compared with the prior art, the present invention has the following advantages:

[0026] 1. The input end of the low noise amplifier of the present invention uses a coupled resonator for impedance matching to compensate for the narrower operating bandwidth caused by the single resonant frequency of the source-degenerate inductor amplifier, thereby improving the operating bandwidth of the low noise amplifier.

[0027] 2. The low noise amplifier of the present invention has a simple function implementation mode and has high gain flatness and noise flatness on the basis of realizing the function. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is an overall circuit module of the low noise amplifier of the present invention.

[0029] Figure 2 is the gain S of the low noise amplifier of the present invention 21 Graph.

[0030] Figure 3 is the input return loss S of the low noise amplifier of the present invention 11 Graph.

[0031] Figure 4 is the output return loss S of the low noise amplifier of the present invention 22 Graph.

[0032] Figure 5 It is a noise figure (NF) curve diagram of the low noise amplifier of the present invention. DETAILED DESCRIPTION

[0033] The technical solution of the present invention is further described below in conjunction with the accompanying drawings, but is not limited thereto. Any modification or equivalent replacement of the technical solution of the present invention without departing from the spirit and scope of the technical solution of the present invention should be included in the protection scope of the present invention.

[0034] The present invention provides a low noise amplifier for use in a 24GHz to 27GHz operating frequency band, and the low noise amplifier can be used in a radio frequency integrated system on a chip (SoC: System on a Chip). Figure 1As shown, the low noise amplifier includes a low noise amplifier main circuit composed of an NMOS transistor, a mutual inductor inductor, an inductor and a capacitor, and the low noise amplifier main circuit includes a first pole common source and common gate amplifier circuit and a second pole common source amplifier circuit composed of an NMOS transistor, a mutual inductor inductor, an inductor and a capacitor. The first pole common source and common gate amplifier circuit connects the NMOS transistor in a common source and common gate form, and performs feedback through the inductor, and the input end of the first pole common source and common gate amplifier circuit is matched through the mutual inductor and the capacitor to compensate for the narrow working bandwidth caused by the single resonant frequency of the source pole degenerate inductor amplifier, thereby improving the working bandwidth of the low noise amplifier, and the second pole common source amplifier circuit feeds back the common source NMOS transistor through the inductor, and matches the output through the series inductor and the capacitor.

[0035] The first-stage common-source and common-gate amplifier circuit is composed of NMOS transistors NM1-NM2, mutual inductors L1-L2 with mutual inductance coefficient K1, capacitors C1-C3, mutual inductors L4-L5 with mutual inductance coefficient K2 and inductor L3. One end of the mutual inductor L1 is connected to the input end, and the other end of the mutual inductor L1 is connected to the ground end; one end of the mutual inductor L2 is connected to the gate of the NMOS transistor NM1, and the other end of the mutual inductor L2 is connected to the bias voltage VB1; one end of the capacitor C1 is connected to the input end, and the other end of the capacitor C1 is connected to the ground end; one end of the capacitor C2 is connected to the gate of the NMOS transistor NM1, and the other end of the capacitor C2 is connected to the ground end; one end of the inductor L3 is connected to the ground end, and the other end of the inductor L3 is connected to the source of the NMOS transistor NM1; the source of the NMOS transistor NM1 is connected to one end of the inductor L3, and the gate of the NMOS transistor NM1 is connected to the mutual inductor L 2 and one end of capacitor C2, the drain of NMOS transistor NM1 is connected to the source of NMOS transistor NM2; the gate of NMOS transistor NM2 is connected to the power supply terminal, and the drain of NMOS transistor NM2 is connected to one end of mutual inductor L4; one end of mutual inductor L4 is connected to the power supply terminal, and the other end of mutual inductor L4 is connected to the drain of NMOS transistor NM2; one end of mutual inductor L5 is connected to bias voltage VB2, and the other end of mutual inductor L5 is connected to capacitor C3 and the input end of the second stage amplifier circuit; one end of capacitor C3 is connected to one end of mutual inductor L5 and the input end of the second stage common source amplifier circuit, and the other end of capacitor C3 is connected to the ground end. Mutual inductors L1~L2 and capacitors C1~C2 constitute an input impedance matching structure, and perform input impedance matching to ensure that the input return loss of the circuit is low. Meanwhile, a coupled resonator is used at the input end for impedance matching to compensate for the narrower working bandwidth caused by the single resonant frequency of the source-degenerate inductor amplifier, thereby improving the working bandwidth of the low noise amplifier.

[0036] The second-stage common source amplifier circuit is composed of an NMOS transistor NM3, inductors L6-L8 and a capacitor C4. The gate of the NMOS transistor NM3 is connected to the capacitor C3 and one end of the mutual inductor inductor L5, the source of the NMOS transistor NM3 is connected to one end of the inductor L6, and the drain of the NMOS transistor NM3 is connected to one end of the inductor L7; one end of the inductor L6 is connected to the source of the NMOS transistor NM3, and one end of the inductor L6 is connected to the ground; one end of the inductor L7 is connected to the drain of the NMOS transistor NM3, and the other end of the inductor L7 is connected to one end of the inductor L8 and one end of the capacitor C4; one end of the inductor L8 is connected to the capacitor C4 and one end of the inductor L7, and the other end of the inductor L8 is connected to the power supply terminal; one end of the capacitor C4 is connected to one end of the inductor L7 and one end of the inductor L8, and the other end of the capacitor C4 is connected to the output terminal. The inductor L7, the inductor L8 and the capacitor C4 constitute an output impedance matching structure, and output impedance matching is performed to ensure that the output return loss of the circuit is low.

[0037] In the present invention, the working principle of the low noise amplifier is as follows:

[0038] like Figure 1 As shown, the input signal is matched with the input impedance through the matching structure composed of the mutual inductor inductors L1-L2 and the capacitors C1-C2, and the output signal is input to the gate of the NMOS transistor NM1. The gate signal of the NMOS transistor is output to the drain of the NMOS transistor NM1 and the source of the NMOS transistor NM2 through the feedback structure of the NMOS transistor NM1 and the inductor L3, and then transmitted from the drain of the NMOS transistor NM2 to the common source and common gate structure composed of the NMOS transistor NM1 and the NMOS transistor NM2. The input DC signal of the NMOS transistor NM1 is transmitted to the gate of the NMOS transistor NM1 by the bias voltage VB1 through the mutual inductor L2, and the input DC signal of the NMOS transistor NM2 is connected to the power supply terminal. The drain signal of the NMOS transistor NM2 is transmitted to the second-stage common source amplifier circuit through the matching structure composed of the mutual inductor L4-L5 with a mutual inductance coefficient K2 and the capacitor C3. The output signal of the first amplifier circuit is input to the gate of the NMOS transistor NM3, and the gate signal of the NMOS transistor is output to the drain of the NMOS transistor NM3 through the feedback structure of the NMOS transistor NM3 and the inductor L6. The drain signal of the NMOS transistor NM3 is output through the output impedance matching structure composed of the inductor L7, the inductor L8 and the capacitor C4. The input signal of the NMOS transistor NM3 is connected to the gate of the NMOS transistor NM3 by the bias voltage VB2 through the mutual inductor L5.

[0039] Figure 2 is the gain S of the low noise amplifier 21 Graph, Figure 3is the input return loss S of the low noise amplifier 11 Graph, Figure 4 is the output return loss of the low noise amplifier S 22 Graph, Figure 5 This is the noise figure (NF) curve of the low noise amplifier. Figure 2 It can be seen that the gain S 21 ≥13.56dB and the gain flatness is 1.36dB, by Figure 5 It can be seen that the NF flatness is 0.28dB.

[0040] It can be seen from the above embodiments that the low noise amplifier of the present invention has the advantages of wider bandwidth, better gain, noise, gain flatness and noise flatness, lower input return loss and output return loss, etc., and can be widely used in RF / millimeter wave technology.

Claims

1. A low noise amplifier for millimeter wave, characterized in that The low noise amplifier comprises a first-stage common-source common-gate amplifier circuit and a second-stage common-source amplifier circuit, wherein: The first-pole common-source common-gate amplifier circuit includes NMOS transistors NM1-NM2, mutual inductors L1-L2 with a mutual inductance coefficient of K1, capacitors C1-C3, mutual inductors L4-L5 with a mutual inductance coefficient of K2, and an inductor L3; One end of the mutual inductor L1 is connected to the input end, and the other end of the mutual inductor L1 is connected to the ground end; One end of the mutual inductor L2 is connected to the gate of the NMOS transistor NM1, and the other end of the mutual inductor L2 is connected to the bias voltage VB1; One end of the capacitor C1 is connected to the input end, and the other end of the capacitor C1 is connected to the ground end; One end of the capacitor C2 is connected to the gate of the NMOS transistor NM1, and the other end of the capacitor C2 is connected to the ground; One end of the inductor L3 is connected to the ground, and the other end of the inductor L3 is connected to the source of the NMOS transistor NM1; The source of the NMOS transistor NM1 is connected to one end of the inductor L3, the gate of the NMOS transistor NM1 is connected to the inductor L2 of the mutual inductor and one end of the capacitor C2, and the drain of the NMOS transistor NM1 is connected to the source of the NMOS transistor NM2; The gate of the NMOS transistor NM2 is connected to the power supply terminal, and the drain of the NMOS transistor NM2 is connected to one end of the mutual inductor L4; One end of the mutual inductor L4 is connected to the power supply end, and the other end of the mutual inductor L4 is connected to the drain of the NMOS transistor NM2; One end of the mutual inductor L5 is connected to the bias voltage VB2, and the other end of the mutual inductor L5 is connected to the capacitor C3 and the input end of the second stage amplifier circuit; One end of the capacitor C3 is connected to one end of the mutual inductor L5 and the input end of the second stage amplifier circuit, and the other end of the capacitor C3 is connected to the ground; The second-stage common-source amplifier circuit includes an NMOS transistor NM3, inductors L6-L8 and a capacitor C4; The gate of the NMOS transistor NM3 is connected to the capacitor C3 and one end of the mutual inductor L5, the source of the NMOS transistor NM3 is connected to one end of the inductor L6, and the drain of the NMOS transistor NM3 is connected to one end of the inductor L7; One end of the inductor L6 is connected to the source of the NMOS transistor NM3, and one end of the inductor L6 is connected to the ground; One end of the inductor L7 is connected to the drain of the NMOS transistor NM3, and the other end of the inductor L7 is connected to one end of the inductor L8 and one end of the capacitor C4; One end of the inductor L8 is connected to the capacitor C4 and one end of the inductor L7, and the other end of the inductor L8 is connected to the power supply end; One end of the capacitor C4 is connected to one end of the inductor L7 and the inductor L8, and the other end of the capacitor C4 is connected to the output end.

2. The low noise amplifier for millimeter wave according to claim 1, characterized in that The transformer inductors L1-L2 and capacitors C1-C2 form an input impedance matching structure.

3. The low noise amplifier for millimeter wave according to claim 1, characterized in that The inductor L7, the inductor L8 and the capacitor C4 form an output end impedance matching structure.

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