Interlock circuits, electronic devices and interlock systems

Abstract

The embodiment of the present application discloses an interlocking circuit, an electronic device and an interlocking system, wherein the interlocking circuit comprises: an interlocking input module, a control module, a diode matrix and an interlocking output module; the interlocking input module is used to output a first output signal through a first output end of the interlocking input module when an interlocking trigger signal is detected, and output a second output signal through a second output end of the interlocking input module; the diode matrix is ​​used to transmit the first output signal to the interlocking output module; the control module is used to output a control signal when receiving the second output signal; the interlocking output module is used to trigger interlocking when receiving the first output signal, or trigger interlocking when receiving the control signal. By adopting the present application, the extensibility of the interlocking circuit can be improved, the volume of the interlocking circuit can be reduced, the implementation cost can be reduced, and the applicability is strong.

Description

Technical Field

[0001] The present application relates to the technical field of equipment safety, and in particular to an interlocking circuit, an electronic device and an interlocking system. Background Art

[0002] With the development of the industrial automation industry, it is necessary to detect the working status of the load equipment in real time during its operation and stop the load equipment in time when the working status is abnormal, so as to maintain the safety of operators and equipment.

[0003] Taking semiconductor devices as load devices as an example, interlocking technology is often used in the working process of semiconductor devices to stop them from working when the working state of the semiconductor devices is abnormal. Interlocking technology can use the output of various sensors as the input of the interlocking circuit to detect the working state of the semiconductor devices in real time, and then output a control signal to stop the semiconductor devices from working when the working state is abnormal. In a specific implementation, interlocking can be implemented based on the safety module programming of a programmable logic controller (PLC). The input of the sensor is detected by the PLC safety module, and then the input of the sensor is processed to output the corresponding control signal to control the semiconductor device to stop running. However, the system of the PLC safety module is closed, the functional expansion is poor, and the way of triggering the interlock of the PLC safety module is single and the reliability is poor. In addition, the PLC safety module is large in size, high in implementation cost, and poor in applicability. Summary of the invention

[0004] The present application provides an interlocking circuit, an electronic device and an interlocking system, which can improve the scalability and reliability of the interlocking circuit, reduce the volume of the interlocking circuit, reduce the implementation cost, and have strong applicability.

[0005] In a first aspect, an embodiment of the present application provides an interlock circuit, an interlock input module, a control module, a diode matrix and an interlock output module; the input end of the interlock input module is used to detect an interlock trigger signal, the first output end of the interlock input module is connected to the input end of the diode matrix, the second output end of the interlock input module is connected to the input end of the control module, the output end of the diode matrix is ​​connected to the first input end of the interlock output module, the output end of the control module is connected to the second input end of the interlock output module, and the first output end and the second output end of the interlock output module are connected to a load device; the interlock input module is used to output a first output signal to the diode matrix through the first output end of the interlock input module when an interlock trigger signal is detected, and output a second output signal to the control module through the second output end of the interlock input module; the diode matrix is ​​used to transmit the first output signal to the interlock output module; the control module is used to output a control signal to the interlock output module when receiving the second output signal; the interlock output module is used to trigger interlocking when receiving the first output signal, or trigger interlocking to control the load device to stop working when receiving the control signal. In the present application, interlocking can be triggered based on the first output signal or the second output signal of the interlocking circuit to control the load device, such as a semiconductor device, to stop working, thereby increasing the triggering method of the load device interlocking and improving the reliability of the interlocking circuit. The electronic components in the interlocking circuit are small in size and can be flexibly connected, thereby improving the expansibility of the interlocking circuit, reducing the size of the interlocking circuit, having a simple structure, low implementation cost, and strong applicability.

[0006] In a possible implementation of the first aspect, the interlock input module includes a first coil, a first switch, and a second switch; one end of the first coil is used as the input end of the interlock input module, the other end of the first coil is grounded, one end of the first switch is used as the first output end of the interlock input module, the other end of the first switch is suspended or grounded, one end of the second switch is used as the second output end of the interlock input module, and the other end of the second switch is connected to a power supply or grounded; the first coil is used to trigger the first switch to be grounded when receiving the interlock trigger signal so as to output the first output signal to the diode matrix through the first output end of the interlock input module, and trigger the second switch to be grounded so as to output a ground signal as the second output signal through the second output end of the interlock input module. In the present application, the interlock input module can output the first output signal and the second output signal through two non-interfering circuits based on an interlock trigger signal, so that interlocking can be achieved through the first output signal or the second output signal, and it can be ensured that when one of the first output signal or the second output signal is generated abnormally, the other signal can be generated normally without interference to trigger interlocking normally, thereby further improving the reliability of the interlock circuit.

[0007] In a possible implementation of the first aspect, the diode matrix includes a diode, the cathode of the diode serves as the input end of the diode matrix and is connected to the first output end of the interlock input module, and the anode of the diode serves as the output end of the diode matrix; the cathode of the diode is used to receive the first output signal from the first output end of the interlock input module, and the anode of the diode is used to output the first output signal.

[0008] In a possible implementation of the first aspect, the interlocking circuit includes at least two interlocking input modules, the diode matrix includes at least two diodes, the cathode of one of the diodes serves as the input end of the diode matrix and is connected to the first output end of one of the interlocking input modules, and the anodes of the at least two diodes are connected in parallel to serve as the output end of the diode matrix; wherein the number of diodes included in the diode matrix is ​​equal to the number of interlocking input modules. In the present application, the number of interlocking input modules connected to the interlocking circuit can be configured through the diode matrix, and then the same interlocking output module can be controlled through multiple interlocking input modules, which increases the way to trigger the interlocking, and the diode matrix is ​​small in size and flexible in connection, thereby improving the expansibility of the interlocking circuit.

[0009] In a possible implementation of the first aspect, the interlock output module includes a first relay, a first control unit and a second control unit; the first relay includes a second coil and a third switch; the first connection end of the first control unit is connected to a power supply, the second connection end of the first control unit serves as a first input end of the interlock output module, the third connection end of the first control unit is connected to one end of the second coil, the fourth connection end of the first control unit is connected to the first connection end of the second control unit, the second connection end of the second control unit serves as a second input end of the interlock output module, the third connection end of the second control unit is connected to the other end of the second coil, the fourth connection end of the second control unit is grounded, one end of the third switch serves as the first output end of the interlock output module, and the other end of the third switch is connected to the second output end of the interlock output module or is suspended; the first control unit is used to control the second coil to be de-energized when receiving the first output signal, so as to control the third switch to be suspended; the second control unit is used to control the second coil to be de-energized when receiving the control signal, so as to control the third switch to be suspended; the third switch is used to disconnect the connection between the first output end and the second output end of the interlock output module when suspended to trigger interlocking. In the present application, the interlock output module can trigger interlocking by the first output signal and the second output signal respectively. The circuit triggered by the first output signal and the circuit triggered by the second output signal do not interfere with each other, thereby further improving the reliability of the interlocking circuit.

[0010] In a possible implementation of the first aspect, the first control unit is further used to connect the power supply and the second coil to supply power to the second coil when the first output signal is not received; the second control unit is used to connect the second coil and the ground to control the power-on of the second coil when the control signal is not received; the second coil is also used to trigger the third switch to connect the first output terminal and the second output terminal of the interlocking output module when power is on.

[0011] In a possible implementation of the first aspect, the interlock output module further includes an interlock state output terminal; the first relay further includes a fourth switch; one end of the fourth switch serves as the interlock state output terminal, and the other end of the fourth switch is connected to a power supply or ground; the second coil is also used to trigger the fourth switch to be grounded when powered on; the second coil is also used to trigger the fourth switch to be connected to a power supply when not powered on; the fourth switch is used to output an interlocking effective alarm signal when grounded; the interlocking effective alarm signal is used to indicate that the interlocking circuit triggers interlocking successfully; the fourth switch is also used to output an interlocking failure alarm signal when connected to the power supply; the interlocking failure alarm signal is used to indicate that the interlocking circuit fails to trigger interlocking. In the present application, the interlock output module can output an interlocking effective alarm signal and an interlocking failure alarm signal through the interlock state output terminal to indicate the interlocking triggering result of the interlocking circuit, and then the interlocking triggering result can be applied to other peripheral circuits, further improving the extensibility of the interlocking circuit and having strong applicability.

[0012] In a possible implementation of the first aspect, the first control unit includes a first transistor, a first resistor, a second resistor and a third resistor; the first resistor and the second resistor are connected in series between the power supply and the fourth connection terminal of the first control unit, the series connection terminal of the first resistor and the second resistor serves as the second connection terminal of the first control unit, the first connection terminal of the first transistor serves as the first connection terminal of the first control unit, the second connection terminal of the first transistor is connected to the series connection terminal through the third resistor, and the third connection terminal of the first transistor serves as the third connection terminal of the first control unit; the first transistor is used to conduct the connection between the power supply and the second coil to control the second coil to be energized, or to disconnect the connection between the power supply and the second coil based on the first output signal to control the second coil to be de-energized.

[0013] In a possible implementation manner of the first aspect, the second control unit includes a second triode, a third triode, a fourth resistor, a fifth resistor and a sixth resistor; the first end of the fifth resistor serves as the second connection end of the second control unit, the first end of the fifth resistor is also connected to the power supply through the sixth resistor, the second end of the fifth resistor is connected to the first connection end of the second triode, the second connection end of the second triode is grounded, the third connection end of the second triode, the first connection end of the third triode, and one end of the fourth resistor are connected in parallel as the first connection end of the second control unit, the second connection end of the third triode serves as the third connection end of the second control unit, the third connection end of the third triode serves as the fourth connection end of the second control unit, and the other end of the fourth resistor is grounded; the second triode is used to output the control signal through the second connection end when receiving the control signal and trigger the third triode to control the second coil to not be energized; the third triode is used to control the second coil to be energized when the control signal is not received.

[0014] In a possible implementation of the first aspect, the interlock circuit further includes a bypass module; the first input end of the bypass module is used to connect a bypass switch control, the second input end of the bypass module is used to receive a bypass validation signal, the first connection end of the bypass module is connected to the first output end of the interlock input module, the second connection end of the bypass module is connected to the input end of the diode matrix, the third connection end of the bypass module is connected to the control module, and the fourth connection end of the bypass module is connected to the second input end of the interlock output module; the bypass module is used to disconnect the connection between the interlock input module and the diode matrix and the connection between the interlock output module and the control module when the bypass validation signal is received and the triggering operation of the bypass switch control is detected; the bypass module is also used to connect the connection between the interlock input module and the diode matrix, and connect the connection between the interlock output module and the control module when the triggering operation of the bypass switch control is not detected or the bypass validation signal is not received. In the present application, the bypass module can avoid accidental interlocking when interlocking failure is required by controlling the connection between the interlocking input module and the diode matrix and the connection between the control module and the interlocking output module, thereby improving the reliability of the interlocking circuit.

[0015] In a possible implementation manner of the first aspect, the bypass module includes a second relay, a third control unit and a third relay; the third relay includes a third coil, a fifth switch and a sixth switch; one end of the second relay serves as a first input end of the bypass module, the other end of the second relay is connected to the first input end of the third control unit, the second input end of the third control unit serves as a second input end of the bypass module, the output end of the third control unit is connected to one end of the third coil, the other end of the third coil is grounded, one end of the fifth switch serves as a first connection end of the bypass module, the other end of the fifth switch serves as a second connection end of the bypass module, and one end of the sixth switch is grounded or serves as a The third connection terminal, the other end of the sixth switch serves as the fourth connection terminal of the bypass module; the second relay is used to supply power to the third control unit when the triggering operation of the bypass switch control is detected; the third control unit is used to control the third coil to be energized when obtaining electric energy from the second relay and receiving the bypass effectiveness signal, triggering the fifth switch through the third coil to disconnect the connection between the first connection terminal and the second connection terminal of the bypass module to disconnect the connection between the interlock input module and the diode matrix, and triggering the sixth switch to disconnect the connection between the third connection terminal and the fourth connection terminal of the bypass module to ground the fourth connection terminal of the bypass module and disconnect the connection between the interlock output module and the control module.

[0016] In a possible implementation of the first aspect, the second relay is also used to stop supplying power to the third control unit when the triggering operation of the bypass switch control is not detected; the third control unit is also used to control the third coil to be de-energized when an interlock failure alarm signal or power failure is received, so that the third coil triggers the fifth switch to turn on the connection between the first connection end and the second connection end of the bypass module, and triggers the sixth switch to turn on the connection between the third connection end and the fourth connection end of the bypass module.

[0017] In a possible implementation of the first aspect, the third control unit includes a field effect tube, a seventh resistor, an eighth resistor and a fourth transistor; one end of the seventh resistor is connected to the first connection end of the field effect tube, the first connection end of the field effect tube serves as the first input end of the third control unit, the second connection end of the field effect tube is respectively connected to the other end of the seventh resistor and one end of the eighth resistor, the other end of the eighth resistor is connected to the first connection end of the fourth transistor, the third connection end of the field effect tube serves as the output end of the third control unit, the second connection end of the fourth transistor serves as the second input end of the third control unit, and the third connection end of the fourth transistor is grounded; the field effect tube is used to be turned on when receiving the bypass activation signal to control the power on of the third coil; the field effect tube is also used to be disconnected when the power is off or the bypass activation signal is not received to stop supplying power to the third coil.

[0018] In a second aspect, an embodiment of the present application provides an electronic device, comprising a sensor and an interlocking circuit provided by the first aspect and any possible implementation scheme of the first aspect; the sensor is used to transmit an interlocking trigger signal to the interlocking circuit.

[0019] In a third aspect, an embodiment of the present application provides an interlocking system, the interlocking system comprising a load device and an interlocking circuit provided in the first aspect and any possible implementation of the first aspect. The load device may include but is not limited to wafer semiconductor manufacturing equipment, testing equipment, and packaging equipment. In the interlocking system provided in the present application, the scalability of the interlocking system can be improved based on the interlocking circuit, the volume of the interlocking system can be reduced, the implementation cost can be reduced, the structure is simple, and the applicability is strong. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 is a structural schematic diagram of an interlocking system provided in an embodiment of the present application;

[0021] Figure 2 is another structural schematic diagram of the interlocking system provided in an embodiment of the present application;

[0022] Figure 3 is a schematic diagram of the structure of the interlock input module provided in an embodiment of the present application;

[0023] Figure 4 is a schematic diagram of the structure of a diode matrix provided in an embodiment of the present application;

[0024] Figure 5 is a schematic diagram of the structure of the interlocking output module provided in an embodiment of the present application;

[0025] Figure 6 is a schematic diagram of the structure of the bypass module provided in an embodiment of the present application;

[0026] Figure 7 is a schematic diagram of the structure of the interlocking circuit provided in an embodiment of the present application;

[0027] Figure 8 It is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0028] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application.

[0029] To facilitate understanding, some nouns are briefly explained as follows:

[0030] 1. Installing components refers to installing (such as welding) diodes at the intersections of the matrix, which can be used to control the transmission path of the current. In the interlocking circuit, the connection relationship between the front-stage input circuit and the rear-stage output circuit of the diode can be changed by installing or not installing diodes, so that the interlocking circuit can realize different circuit functions, which is simple to operate and flexible.

[0031] 2. Ground signal refers to the signal generated when the device or port is grounded, which can be used as a zero potential reference signal.

[0032] 3. Pull up, also known as pull-up, circuit pull up refers to the process of converting the signal line or control line in the circuit from a low level (usually 0V) to a high level (usually 3.3V or 5V). In digital electronic circuits, a low level is usually defined as a logic signal 0, and a high level is defined as a logic signal 1.

[0033] 4. Pull-up control signal, used to trigger the pull-up operation of the pin / port in the interlock circuit to convert the low-level signal to a high-level signal.

[0034] 5. Interlock refers to two devices or mechanisms that rely on each other to prevent the occurrence of unexpected states, and are used to protect the safety of operators and load devices such as semiconductor devices. The load device in this application refers to a device that can perform safety interlocking through an interlocking circuit, such as semiconductor equipment, elevator control equipment, etc. For the interlocking of semiconductor equipment, it is mainly to detect the working state or working environment of the semiconductor equipment in real time through various sensors (door magnetic sensors, leakage sensors, etc.), and use the detection results as the input of the interlocking circuit. In this application, interlocking refers to disconnecting the circuit connection of the working circuit of the load device when the load device is in an abnormal working state through an interlocking circuit to control the load device to stop working, thereby protecting other devices in the circuit or the entire system from damage. For example, when a pipeline leak is detected in a developing machine or other equipment through a leakage sensor, the semiconductor device is controlled to stop working, or when the door lock of the semiconductor device is detected to be open through a door magnetic sensor, the semiconductor device is controlled to stop working.

[0035] 6. Interlock status signal, including interlock validation alarm signal and interlock failure alarm signal, the interlock validation alarm signal is used to indicate that the interlock circuit triggers interlock successfully, and the interlock failure alarm signal is used to indicate that the interlock circuit triggers interlock failure. In this application, the interlock failure alarm signal in the interlock status signal can be used to generate a bypass validation signal that triggers the bypass module to take effect, and the interlock validation alarm signal and the interlock failure alarm signal can also be transmitted to other peripheral circuits that need to detect the interlock status of the interlock circuit.

[0036] 7. Power supply. The power supply in this application includes VCC (Voltage at the Common Collector) and VDD (Voltage Drain-to-Drain). VCC refers to the power supply voltage of the circuit, which represents the voltage connected to the circuit. VDD refers to the operating voltage of the chip, which can be connected to the power pin of the chip to power various internal modules.

[0037] The interlock circuit and interlock system provided in the embodiments of the present application can be applied to the load equipment safety interlock scenario. The load equipment can be a semiconductor device or other equipment that requires safety interlock, such as an elevator control device that ensures that the elevator door will not be forced open when the elevator is running, and an access control device that ensures that one door cannot be opened before another door is closed. The present application is not limited and takes the semiconductor device as the load device as an example. The interlock circuit can trigger the interlock when an interlock trigger signal is detected, so that the semiconductor device stops working in an abnormal working environment, ensuring the safety of the operator and the semiconductor device. For ease of description, the embodiments of the present application take the semiconductor device safety interlock scenario as an example for description.

[0038] See also Figure 1 , Figure 1 Schematic diagram of the structure of the interlocking system provided in the embodiment of the present application. Figure 1 As shown, the interlocking system may include an interlocking circuit 1 and a load device 3. The interlocking circuit 1 may include an interlocking input module 1a, a diode matrix 1b, an interlocking output module 1c and a control module 1d. The load device 3 may include but is not limited to semiconductor equipment. The semiconductor equipment includes but is not limited to wafer semiconductor manufacturing equipment, testing equipment and packaging equipment. For ease of description, this application takes the load device 3 as a semiconductor device as an example for explanation.

[0039] In some feasible embodiments, the input end (i.e., in11) of the interlock input module 1a can be used to detect an interlock trigger signal. Optionally, the input end of the interlock input module 1a can be connected to a sensor, which can detect the working state of the semiconductor device or other working states of devices that can affect the semiconductor device, and when the working state of the semiconductor device is detected to be abnormal, the interlock trigger signal is output to the input end of the interlock input module 1a when the semiconductor device needs to be interlocked. The working state of the semiconductor device includes a normal working state and an abnormal working state. The normal working state is used to indicate that the device of the semiconductor device is operating normally and there are no hidden dangers in the working environment; the abnormal working state is used to indicate that the device of the semiconductor device is operating incorrectly or there are hidden dangers in the working environment. Optionally, the interlock trigger signal can also be generated by program or software control and transmitted to the input end of the interlock input module 1a through other peripheral circuits, and this application does not limit this. The interlock trigger signal can be a high-level signal or a low-level signal, and the interlock trigger signal is used to indicate the abnormal working state of the working environment of the semiconductor device. It should be noted that the above-mentioned high-level signal can be used to indicate one of the normal working state or abnormal working state of the working environment of the semiconductor device. Conversely, the above-mentioned low-level signal can be used to indicate the other of the normal working state or abnormal working state of the semiconductor device. Whether the above-mentioned high-level signal or low-level signal specifically indicates the normal working state or the abnormal working state should be determined according to the actual product form, and this application does not impose any restrictions.

[0040] In some feasible embodiments, the control module 1d of the interlocking circuit 1 can be a microcontroller, a central processing unit, a single-chip microcomputer, etc., which is not limited in this application and is described by taking a microcontroller as an example. Optionally, the control module 1d can be independently deployed and directly or indirectly connected to the interlocking input module 1a and the interlocking output module 1c, or it can be integrated into a functional module in the interlocking input module 1a or the interlocking output module 1c. The control module 1d can control the interlocking output module 1c to trigger interlocking or not trigger interlocking based on the received signal (such as a ground signal or a high-level signal). For example, when the control module 1d receives a ground signal, a control signal (such as a high control signal) for controlling the interlocking output module 1c to trigger interlocking can be output, and then the interlocking output module 1c can be controlled to trigger interlocking. In this application, the control signal such as the control signal that pulls up the control signal can control the second input end of the interlocking output module 1c to convert the signal transmitted to the interlocking output module 1c into a high-level signal, that is, the second input end of the interlocking output module 1c can receive a high-level signal when receiving the control signal. When the control module 1d receives a high-level signal, it does not output a control signal, and thus does not control the interlock output module 1c to trigger interlocking. Among them, the control module 1d and the interlock output module 1c can be directly connected, or they can be connected to the bypass module 2d or other peripheral circuits. The specific details should be determined according to the product form, and this application does not impose any restrictions on this. Optionally, if the control module 1d is integrated as a functional module in the interlock input module 1a, the control signal can be output to the interlock output module 1c through the second output end of the interlock input module 1a. Optionally, if the control module 1d is integrated as a functional module in the interlock output module 1c, the signal output by the second output end of the interlock input module 1a can be received through the second input end of the interlock output module, and when the second output signal is received, a control signal is generated to trigger the interlock output module 1c to perform interlocking.

[0041] In some feasible implementations, the output end (i.e., out13) of the above-mentioned diode matrix 1b can be connected to the first input end (i.e., in13) of the interlock output module 1c. Optionally, other circuits or devices can also be connected between the output end of the diode matrix 1b and the first input end of the interlock output module 1c, which can be specifically determined according to the product form and is not limited here. Optionally, the above-mentioned diode matrix 1b can include a diode, in which case the cathode of the diode can be used as the input end of the diode matrix 1b, and the anode of the diode can be used as the output end of the diode matrix 1b. Optionally, the above-mentioned diode matrix 1b can also include multiple diodes, and the multiple diodes are connected in parallel, wherein the cathode of a diode is used as an input end of the diode matrix 1b, and the anodes of multiple diodes can be used as the output of the diode matrix 1b after being connected in parallel. It should be noted that the cathode of a diode can be connected to an interlock input module 1a, so the number of diodes in the diode matrix is ​​equal to the number of interlock input modules 1a. In addition, a diode matrix 1b can also be connected to an interlock output module 1c, so the number of diode matrices 1b in the interlock circuit is equal to the number of interlock output modules 1c.

[0042] In some feasible embodiments, the first input end of the interlock output module 1c is connected to the diode matrix 1b, and the second input end (i.e., in14) of the interlock output module 1c is connected to the output end (i.e., out16) of the control module 1d. The interlock output module 1c can receive a control signal through the second input end of the interlock output module 1c, and then trigger the interlock based on the control signal. The interlock output module 1c also includes a first output end (i.e., out14) and a second output end (i.e., out15), and the first output end and the second output end can be connected to a semiconductor device. When the interlock is triggered, the circuit connection between the first output end and the second output end is disconnected to stop the semiconductor device from working.

[0043] Optionally, in some feasible implementations, the above interlocking circuit may further include a bypass module. For ease of understanding, please refer to Figure 2 , Figure 2 is another structural schematic diagram of the interlocking system provided in the embodiment of the present application. Figure 2 As shown, the interlocking system may include an interlocking circuit 2, a load device 3 and a sensor 4. Optionally, the sensor 4 may also be loaded into a functional module outside the interlocking system. The interlocking system is connected to the sensor 4. The specific product form can be determined according to the actual application scenario, and this application does not impose any restrictions.

[0044] In some feasible embodiments, the interlock circuit 2 can connect the sensor 4 and the load device 3, and the interlock circuit 2 includes an interlock input module 2a, a diode matrix 2b, an interlock output module 2c, a bypass module 2d and a control module 2e; the load device 3 may include a semiconductor device. The interlock input module 2a may include an input terminal (i.e., in21), a first output terminal (i.e., out21) and a second output terminal (i.e., out22); the diode matrix 2b may include an input terminal (i.e., in22) and an output terminal (i.e., out23); the interlock output module 2c may include a first input terminal (i.e., in23), a second input terminal (i.e., in24), a first output terminal (i.e., out24) and a second output terminal (i.e., out25); the control module 2e may include an input terminal (i.e., in27) and an output terminal (i.e., out26). The interlock input module 2a, the diode matrix 2b, the interlock output module 2c, the control module 2e and the semiconductor device in the interlock circuit 2 may be referred to above. Figure 1 The description of the interlock input module 1a, the diode matrix 1b, the interlock output module 1c, the control module 1d and the semiconductor device in the corresponding embodiment is not repeated. The bypass module 2d may include a first input terminal (i.e., in25), a second input terminal (i.e., in26), a first connection terminal (i.e., con21), a second connection terminal (i.e., con22), a third connection terminal (i.e., con23) and a fourth connection terminal (i.e., con24); the control module 2e may include an input terminal (i.e., in27) and an output terminal (i.e., out26).

[0045] In some feasible embodiments, the input end of the interlock input module 2a can be used as the input end of the interlock circuit 2 to connect the sensor 4, the first output end of the interlock input module 2a can be connected to the first connection end of the bypass module 2d, the second output end of the interlock input module 2a can be connected to the input end of the control module 2e, the second connection end of the bypass module 2d can be connected to the diode matrix 2b, the output end of the diode matrix 2b can be connected to the first input end of the interlock output module 2c, the third connection end of the bypass module 2d can be connected to the output end of the control module 2e, the fourth connection end of the bypass module 2d can be connected to the second input end of the interlock output module 2c, and the first output end and the second output end of the interlock output module 2c can be used to directly or indirectly connect to the semiconductor device. For example, the first output end and the second output end of the interlock output module 2c can be connected to the peripheral circuit that controls the operation of the semiconductor device to control the semiconductor device to stop working; optionally, the circuit connection between the first output end and the second output end of the interlock output module 2c can also be used as a part of the working circuit of the semiconductor device, which is not limited in this application.

[0046] In some feasible implementations, a bypass module 2d can be connected between the interlock input module 2a and the diode matrix 2b. The bypass module 2d can be used to control the connection between the interlock input module 2a and the diode matrix 2b and the connection between the control module 2e and the interlock output module 2c, thereby avoiding the accidental interlocking when debugging the semiconductor device, which affects the debugging. The bypass module 2d is controlled by the first input end and the second input end of the bypass module 2d to be effective or not. The bypass module 2d is effective only when the inputs of the first input end and the second input end of the bypass module 2d indicate that the bypass module 2d is effective. The first input end of the bypass module 2d can be connected to a bypass switch control. The bypass switch control can be a safety key, a button with a key, or other types of controls. The bypass switch control can be used to control the bypass module 2d to be effective or not. For example, when the bypass switch control is triggered, the bypass module 2d is triggered to take effect; when the bypass switch control is closed or not triggered, the bypass module 2d is ineffective.

[0047] The second input end of the bypass module 2d can receive a bypass activation signal for controlling the bypass module 2d to be effective. The bypass activation signal can be controlled by a device or apparatus (hereinafter referred to as "program device") installed with an application or software that can be used to generate the bypass activation signal, and then transmitted to the bypass module 2d through the control module 2e, logic circuit or other types of circuits or devices, and the present application does not limit this. Exemplarily, the bypass activation signal can be a high-level signal, an interlock failure alarm signal, etc., and the bypass module 2d is effective when receiving the above-mentioned bypass activation signal. Optionally, the program device can also output a bypass failure signal (such as a low-level signal, an interlock activation alarm signal, etc.) that triggers the bypass module 2d to fail, and the bypass module 2d is not effective when receiving the above-mentioned bypass failure signal. It should be noted that the specific signal type of the above-mentioned bypass activation signal or bypass failure signal can be determined according to the product form. For example, the bypass activation signal can be a high-level signal, and the bypass failure signal is a low-level signal. The relevant application or software can trigger the program device to output a high-level signal to the bypass module 2d to make the bypass effective; optionally, the relevant application or software can also trigger the program device to output a low-level signal to the bypass module 2d to make the bypass ineffective. Optionally, the program device can also automatically identify whether the interlock circuit 2 triggers the interlock, so as to trigger the bypass module 2d to take effect when the bypass switch control is triggered and the interlock circuit 2 fails to trigger the interlock. At this time, a bypass effective signal can be generated based on an interlock failure alarm signal indicating that the interlock circuit 2 fails to trigger the interlock, and a bypass ineffective signal can be generated based on an interlock effective alarm signal indicating that the interlock circuit 2 is triggered.

[0048] Optionally, in some feasible embodiments, the interlock status output end of the above-mentioned interlock output module 2c can also be directly connected to the second input end of the bypass module 2d, and the interlock failure alarm signal can be determined as the bypass validation signal, and the interlock validation alarm signal can be determined as the bypass failure signal, and then the bypass module can be directly controlled through the interlock output module 2c and the bypass switch control.

[0049] To facilitate understanding of the internal structures of the above-mentioned interlock input module, diode matrix, interlock output module and bypass module, the structures of the above-mentioned interlock input module, diode matrix, interlock output module and bypass module are respectively described below.

[0050] See also Figure 3 , Figure 3 Schematic diagram of the structure of the interlock input module provided in the embodiment of the present application. Figure 3 As shown, the interlock input module includes a relay, and the relay includes a first coil (i.e., L1), a first switch (i.e., io31) and a second switch (i.e., io32). One end of the first coil serves as the input end of the interlock input module, and the other end of the first coil is grounded; one end of the first switch serves as the first output end of the interlock input module, and the other end of the first switch is suspended or grounded; one end of the second switch serves as the second output end of the interlock input module, and the other end of the second switch is connected to the power supply VCC or grounded.

[0051] The interlock input module can control the first coil to be conductive or non-conductive based on the signal received by the input end of the interlock input module, thereby controlling the output of the first output end and the second output end of the interlock input module. The relationship between the signal received by the input end of the interlock input module and the signal output by the first output end and the second output end can be seen in Table 1, which is a schematic table of port signals of the interlock input module provided in the embodiment of the present application. For ease of description, the embodiment of the present application takes a low-level signal as an interlock trigger signal as an example for explanation.

[0052] port Input First output Second output Signal High level signal No signal High level signal Signal Low level signal ground signal ground signal

[0053] Table 1

[0054] Table 1 describes the signals received or output by the three ports of the input end, the first output end, and the second output end of the interlock input module. Specifically, when the input end of the interlock input module does not receive the interlock trigger signal (such as the interlock trigger signal is a low level signal, and the signal actually received is a high level signal), the first output end of the interlock input module is in a suspended state, no signal output, and the second output end of the interlock input module is connected to a power supply (such as VCC) and outputs a high level signal. When the input end of the interlock input module receives the interlock trigger signal (such as a low level signal), the first output end of the interlock input module is grounded and outputs a ground signal, and the second output end of the interlock input module is also grounded and outputs a ground signal.

[0055] In some feasible implementations, one end of the first coil can receive an interlock trigger signal when used as an input end of the interlock input module. For example, when one end of the first coil is connected to a sensor, the first coil can receive an interlock trigger signal transmitted by the sensor through the input end, indicating that the semiconductor device is in an abnormal working state, or a signal indicating that the semiconductor device is in a normal working state (i.e., a signal that does not trigger interlock). Optionally, the interlock trigger signal can be a high-level signal, in which case a low-level signal indicates that the semiconductor device is in a normal working state, and the interlock input module triggers the interlock process when it receives a high-level signal; or, the interlock trigger signal can be a low-level signal, in which case a high-level signal indicates that the semiconductor device is in a normal working state, and the interlock input module triggers the interlock process when it receives a low-level signal.

[0056] When the first coil receives an interlock trigger signal (such as a low-level signal), the first coil can be triggered to be powered off, thereby triggering the first switch to be grounded. At this time, the first output end of the interlock input module can output a ground signal as the first output signal. When the above-mentioned first coil is powered off, the second switch can also be triggered to be grounded. At this time, the second output end of the interlock input module can output a ground signal as the above-mentioned second output signal. It should be noted that, according to the working principle of the relay, when the above-mentioned first coil is energized, the switch contacts of the first switch and the second switch in the relay can be triggered to connect to one end of the first coil that is energized (at Figure 3 When the first coil is de-energized, the switch contacts of the first switch and the second switch in the relay can be triggered to connect to the end of the first coil away from the energized coil (in Figure 3 The switch contacts are shown connected to the lower end of the switch).

[0057] When the first coil does not receive the above-mentioned interlock trigger signal (for example, the interlock trigger signal is a low-level signal, and the actually received signal is a high-level signal), the first coil can be triggered to energize, thereby triggering the above-mentioned first switch to be suspended and triggering the above-mentioned second switch to connect the power supply. At this time, the first output end of the interlock input module has no signal output, and the second output end of the interlock input module can output a high-level signal.

[0058] In some feasible implementations, the type of signal output by the interlock input module through the first output terminal and the second output terminal when receiving the interlock trigger signal, and the type of signal output by the first output terminal and the second output terminal when not receiving the interlock trigger signal can be changed by changing the circuit connection of the peripheral circuit, and the function implemented by the interlock circuit provided in the present application can be implemented based on the changed output, and the present application does not limit it. Exemplarily, the circuit connection of the peripheral circuit can be changed so that the interlock input module outputs a high level signal through the second output terminal when receiving the interlock trigger signal to trigger the interlock output module to perform interlocking.

[0059] It should be noted that the above description of the interlock input module can also be referred to the above Figure 1 Interlock input module 1a in Figure 2 The description of the interlock input module 2a in will not be repeated here.

[0060] See also Figure 4 , Figure 4 is a schematic diagram of the structure of the diode matrix provided in the embodiment of the present application. Optionally, the above diode matrix may include a plurality of diodes. Figure 4As shown, taking the diode matrix including n diodes as an example, the diode matrix may include diode 1, diode 2, ..., diode n, where n is an integer greater than or equal to 2. The n diodes are connected in parallel, and the cathodes of the n diodes can be used as the input end of the diode matrix (i.e., in41), and the anodes of the n diodes can be used as the output end of the diode matrix (i.e., out42) after being connected in parallel. The cathode of each of the above diodes can be connected to an interlocking input module. Exemplarily, diode 1 is connected to interlocking input module 1, diode 2 is connected to interlocking input module 2, ..., and diode n is connected to interlocking input module n. The anodes of the n diodes can be connected in parallel to an interlocking output module. Optionally, the diode matrix may include only one diode, the cathode of which can be used as the input end of the diode matrix (i.e., in41), and the anode of the diode can be used as the output end of the diode matrix (i.e., out42). It should be noted that the number of diode matrices in the interlocking system can be one or more, and the number of diode matrices is equal to the number of interlocking output modules, and the number of diodes contained in the diode matrix is ​​equal to the number of interlocking input modules connected to the diode matrix. The diode matrix can also be connected to the interlock input module or the interlock output module through other peripheral circuits. The diode matrix is ​​used to output the first output signal through the output end of the diode matrix when the input end of the diode matrix receives the first output signal.

[0061] It is understandable that the interlock input module connected to the diode can control the interlock output module connected to the diode. That is, when multiple diodes are respectively connected to multiple interlock input modules, the multiple interlock input modules can control the interlock output modules connected after the anodes of the multiple diodes are connected in parallel. For example, Figure 4 The interlock input module 1, interlock input module 2, ..., interlock input module n shown can control the interlock output module through the diode matrix. When any of the above n interlock input modules receives the interlock trigger signal, it can control the interlock output module to trigger the interlock. Therefore, the newly added interlock input module can be connected through the newly added diode by adding diodes in the diode matrix, or the interlock input module connected by the deleted diode can be disconnected by deleting diodes in the diode matrix. In addition, the connection relationship between different interlock input modules and different interlock output modules can be determined by the connection status of the diodes. Therefore, the interlock circuit can be flexibly expanded through the diode matrix, and the diode is small in size, and the expansion can be achieved without the help of expensive and complex devices. The interlock circuit is small in size, low in implementation cost, and strong in applicability. It should be noted that the above description of the diode matrix can also be referred to the above Figure 1 The diode matrix 1b and Figure 2 The description of the diode matrix 2b is omitted here.

[0062] See also Figure 5 , Figure 5 Schematic diagram of the structure of the interlock output module provided in the embodiment of the present application. Figure 5 The interlock output module shown may include a first relay (i.e., K1), a first control unit, and a second control unit. The first relay may include a second coil (i.e., L2) and a third switch (i.e., io51); a first connection end (i.e., con511) of the first control unit is connected to a power supply VDD, a second connection end (i.e., con512) of the first control unit is used as a first input end (i.e., in51) of the interlock output module, a third connection end (i.e., con513) of the first control unit is connected to one end of the second coil, a fourth connection end (i.e., con514) of the first control unit is connected to a first connection end (i.e., con521) of the second control unit, a second connection end (i.e., con522) of the second control unit is used as a second input end (i.e., in52) of the interlock output module, a third connection end (i.e., con523) of the second control unit is connected to the other end of the second coil, a fourth connection end (i.e., con524) of the second control unit is grounded, one end of the third switch is used as a first output end (i.e., out51) of the interlock output module, and the other end of the third switch is connected to a second output end (i.e., out52) of the interlock output module or is suspended.

[0063] In some feasible embodiments, the interlock output module can receive a signal through the first input end of the interlock output module or the second input end of the interlock output module to determine whether to trigger the interlock based on the received signal, and output the interlock state signal (including the interlock effectiveness alarm signal and the interlock failure alarm signal) through the interlock state output end. Among them, the first input end of the interlock output module can receive the above-mentioned first output signal from the diode matrix, and the second input end of the interlock output module can receive the above-mentioned control signal from the control module. The above-mentioned interlock state output end can output an interlock effectiveness alarm signal (such as a high level signal) when the interlock output module successfully triggers the interlock, and output an interlock failure alarm signal (such as a low level signal or a ground signal) when the interlock output module fails to trigger the interlock. The above-mentioned interlock state signal can be used to trigger the program device to generate a bypass effectiveness signal or a bypass failure signal, thereby controlling the bypass module to take effect or not. Exemplarily, when the interlock status signal is an interlocking effective alarm signal, the trigger program device generates a bypass failure signal, and the bypass module is not effective; when the interlock status signal is an interlocking failure alarm signal, the trigger program device generates a bypass effective signal, and then triggers the bypass module to take effect based on the bypass effective signal. Optionally, the above interlock status signal can also be transmitted to other peripheral circuits to realize the functions of other peripheral circuits, and this application does not limit it. For example, it is directly transmitted to the second input terminal of the bypass module, and the interlocking effective alarm signal is determined as the bypass failure signal, and the interlocking failure alarm signal is determined as the bypass effective signal.

[0064] To facilitate understanding of the relationship between the signals received by the first input terminal and the second input terminal in the interlock output module, the signal output by the interlock status output terminal, and the connection status of the first output terminal and the second output terminal, please refer to Table 2, which is a schematic table of the signals and connection status of the interlock output module port provided in an embodiment of the present application.

[0065]

[0066] Table 2

[0067] Table 2 shows the relationship between the signal input by the first input terminal and the second input terminal of the interlock output module, the connection state between the first output terminal and the second output terminal, and the signal output by the interlock state output terminal. Exemplarily, the present application uses a pull-up control signal as a control signal, a high-level signal as an interlock failure alarm signal for indicating that the interlock output module fails to trigger the interlock, and a ground signal as an example for illustrating the interlock effectiveness alarm signal for the interlock output module to successfully trigger the interlock. When the second input terminal of the interlock output module receives a high-level signal (the above-mentioned high-level signal is obtained by the second input terminal of the interlock output module performing a pull-up operation based on the pull-up control signal), the interlock is triggered, and the port receives or outputs a ground signal indicating that the port is grounded.

[0068] Specifically, when the first input terminal of the interlock output module is in a suspended state and no signal is input, and the second input terminal of the interlock output module receives a ground signal, the first output terminal and the second output terminal are in a conductive state, and the interlock state output terminal outputs a high-level signal, that is, the interlock state output terminal is connected to a power supply (for example, VCC) at this time.

[0069] When the first input terminal of the interlock output module receives a ground signal, no matter the second input terminal of the interlock output module receives a ground signal or a high level signal, the first output terminal and the second output terminal are both in a disconnected state, and the interlock state output terminal outputs a ground signal, that is, the interlock state output terminal is grounded.

[0070] When the second input terminal of the interlock output module receives a high level signal, no matter the first input terminal of the interlock output module receives a ground signal or is in a suspended state with no signal input, the first output terminal and the second output terminal are both in a disconnected state, and the interlock state output terminal outputs a ground signal.

[0071] In some feasible implementations, the first control unit is used to control the connection between the power supply and the second coil to control whether the second coil is powered on or off. Specifically, the second connection end of the first control unit can be used as the first input end of the interlock output module. When the first control unit receives the first output signal, the connection between the power supply and the second coil can be disconnected to control the second coil to be powered off. The first output signal can be obtained by transmitting the diode matrix. When the second coil is not powered on, the switch contact of the third switch can be triggered to connect to the end away from the second coil (at Figure 5 The third switch can be controlled to be suspended. When the first control unit does not receive the first output signal, the connection between the power supply and the second coil can be turned on to supply power to the second coil.

[0072] In some feasible embodiments, the second control unit can also be used to control whether the second coil is powered on or off. The second connection end of the second control unit can be used as the second input end of the interlock output module. When the second control unit receives a control signal, the second input end can be pulled up so that the second input end receives a high-level signal to trigger the second coil to be powered off, and then the third switch can be controlled to be suspended. The third switch is used to disconnect the connection between the first output end and the second output end of the interlock output module when suspended to trigger interlocking. In this application, the disconnection of the connection between the first output end and the second output end of the interlock output module can be regarded as a successful triggering of interlocking. When the second control unit does not receive a control signal (for example, when the received signal is a ground signal or there is no signal input), the connection between the second coil and the ground can be turned on, thereby controlling the second coil to be powered on. The second coil is also used to trigger the third switch to turn on the connection between the first output end and the second output end of the interlock output module when powered on. In this application, when the connection between the first output end and the second output end of the interlock output module is turned on, the interlock output module is not triggered to perform interlocking, which can also be regarded as a failure to trigger interlocking. It should be noted that the first control unit and the second control unit can both control the second coil to be energized or not. When the first control unit receives the first output signal or the second control unit receives the control signal, the second coil is controlled to be not energized; when the first control unit does not receive the first output signal and the second control unit does not receive the control signal, the second coil is controlled to be energized.

[0073] In some feasible implementations, the interlock output module further includes an interlock status output terminal (i.e., out53); the first relay further includes a fourth switch (i.e., io52). One end of the fourth switch can be used as the interlock status output terminal of the interlock output module, and the other end of the fourth switch is connected to the power supply VCC or ground. Among them, the second coil is also used to trigger the fourth switch to be grounded when powered on, and to trigger the fourth switch to connect the power supply when not powered on. The fourth switch is used to output an interlocking validity alarm signal when grounded, and to output an interlocking failure alarm signal when the power supply is connected. The interlocking validity alarm signal is used to indicate that the interlocking circuit triggers the interlock successfully; the interlocking failure alarm signal is used to indicate that the interlocking circuit fails to trigger the interlock.

[0074] In some possible implementations, such as Figure 5 As shown, the first control unit may include a first transistor (i.e., Q1), a first resistor (i.e., R1), a second resistor (i.e., R2), and a third resistor (i.e., R3). The first resistor and the second resistor are connected in series between the power supply and the fourth connection terminal of the first control unit, the series connection terminal of the first resistor and the second resistor (i.e., con50) serves as the second connection terminal of the first control unit, the first connection terminal of the first transistor serves as the first connection terminal of the first control unit, the second connection terminal of the first transistor is connected to the series connection terminal through the third resistor, and the third connection terminal of the first transistor serves as the third connection terminal of the first control unit. The first transistor may determine the model of the first transistor according to the circuit logic in the interlocking circuit. For ease of description, each transistor in this application is described by taking an NPN transistor as an example. When the first transistor is an NPN transistor, the first connection terminal of the first transistor may be the collector of the first transistor, the second connection terminal of the first transistor may be the base of the first transistor, and the third connection terminal of the first transistor may be the emitter of the first transistor.

[0075] The above-mentioned first transistor is used to turn on the connection between the power supply and the second coil to control the second coil to be powered on when the second connection end of the first control unit does not receive the first output signal, or to disconnect the connection between the power supply and the second coil based on the first output signal to control the second coil to be powered off when the second connection end of the first control unit receives the first output signal.

[0076] In some possible implementations, such as Figure 5As shown, the second control unit includes a second triode (i.e., Q2), a third triode (i.e., Q3), a fourth resistor (i.e., R4), a fifth resistor (i.e., R5), and a sixth resistor (i.e., R6). The first end of the fifth resistor serves as the second connection end of the second control unit, the first end of the fifth resistor is also connected to the power supply VCC through the sixth resistor, the second end of the fifth resistor is connected to the first connection end of the second triode, the second connection end of the second triode is grounded, the third connection end of the second triode and the first connection end of the third triode, and one end of the fourth resistor are connected in parallel as the first connection end of the second control unit, the second connection end of the third triode serves as the third connection end of the second control unit, the third connection end of the third triode serves as the fourth connection end of the second control unit, and the other end of the fourth resistor is grounded. The second triode is used to output a control signal through the second connection end when receiving a control signal, thereby triggering the third triode to disconnect the connection between the second coil and the ground to control the second coil to be not energized. The third triode is used to control the second coil to be energized when the control signal is not received. For example, when the second triode and the third triode are the above-mentioned NPN triodes, the base of the second triode can be used as the first connection terminal of the second triode, the emitter of the second triode can be used as the second connection terminal of the second triode, and the collector of the second triode can be used as the third connection terminal of the second triode. The base of the above-mentioned third triode can be used as the first connection terminal of the third triode, the collector of the second triode can be used as the second connection terminal of the second triode, and the emitter of the third triode can be used as the third connection terminal of the third triode. The resistance value of each resistor in this application should be determined according to the resistance value, voltage and other data of each device in the interlocking circuit, so as to realize the function of the interlocking circuit by selecting a resistor with a resistance value suitable for the interlocking circuit, and this application does not make any restrictions.

[0077] It can be understood that the first control unit and the second control unit of the above-mentioned interlock output module respectively control the circuit connection of different parts in the interlock output module, and the first control unit and the second control unit can both control the disconnection of the working circuit in the interlock output module, so the first control unit can be triggered by the first output signal to disconnect a part of the working circuit in the interlock output module to make the working circuit invalid (that is, the interlock takes effect), and the second output signal can also be triggered by the second output unit to disconnect another part of the working circuit in the interlock output module to make the working circuit invalid. That is to say, the first control unit and the second control unit can both trigger interlocking, and when one of the first control unit or the second control unit is abnormal or invalid, the interlocking can still be triggered by the other control unit, so the reliability of the interlocking circuit can be improved.

[0078] It should be noted that the above description of the interlock output module can also be found in the above Figure 1 Interlock output module 1c and Figure 2 The description of the interlock output module 2c is not repeated here.

[0079] See also Figure 6 , Figure 6 Schematic diagram of the structure of the bypass module provided in the embodiment of the present application. Figure 6 As shown, the bypass module includes a second relay (i.e., K2), a third control unit, and a third relay (i.e., K3). The third relay includes a third coil (i.e., L3), a fifth switch (i.e., io61), and a sixth switch (i.e., io62); one end of the second relay serves as the first input end (i.e., in61) of the bypass module, the other end of the second relay is connected to the first input end (i.e., in631) of the third control unit, the second input end (i.e., in632) of the third control unit serves as the second input end (i.e., in62) of the bypass module, the output end (i.e., out631) of the third control unit is connected to one end of the third coil, the other end of the third coil is grounded, one end of the fifth switch serves as the first connection end (i.e., con61) of the bypass module, the other end of the fifth switch serves as the second connection end (i.e., con62) of the bypass module, one end of the sixth switch is grounded or serves as the third connection end (i.e., con63) of the bypass module, and the other end of the sixth switch serves as the fourth connection end (i.e., con64) of the bypass module.

[0080] In some feasible implementations, the second relay may include a coil and a switch. One end of the coil in the second relay may serve as the first input end of the bypass module, and the other end of the coil in the second relay is grounded. Figure 6 As shown, one end of the switch in the second relay can be connected to the first input end of the third control unit as the output end of the second relay, and the other end of the switch in the second relay can be connected to the power supply VDD or left hanging. Optionally, the second relay may also include other switches (not shown in the figure), and illustratively, one end of the switch can be used as the trigger state output end of the bypass switch control of the bypass module, and the other end of the switch can be connected to the power supply or left hanging. The above-mentioned second relay is used to conduct the connection between the power supply and the third control unit to supply power to the third control unit when the trigger operation of the bypass switch control is detected. It can be understood that when the trigger operation of the above-mentioned bypass switch control is detected, the coil in the above-mentioned second relay is energized, and at this time, the switch contact in the second relay is connected to an end of the second relay close to the coil (shown in the figure as connecting the end located above), and at this time, the connection between the power supply and the third control unit is conducted.

[0081] In some feasible embodiments, the third control unit is used to control the third coil to be energized when obtaining power from the second relay and receiving the bypass validation signal, so as to trigger the fifth switch to disconnect the connection between the first connection end and the second connection end of the bypass module through the third coil, and trigger the sixth switch to disconnect the connection between the third connection end and the fourth connection end of the bypass module so that the fourth connection end of the bypass module is grounded. The second input end of the bypass module can receive the above-mentioned bypass validation signal, and the above-mentioned control unit can obtain power through the second relay when the bypass switch control is triggered. It can be understood that when the above-mentioned third coil is energized, the switch contacts of the above-mentioned fifth switch and sixth switch can be connected to a side close to the third coil (shown in the figure as connecting the upper end of the fifth switch and the sixth switch respectively). At this time, the connection between the first connection end and the second connection end of the bypass module is disconnected, the fourth connection end is grounded, and the third connection end is suspended, and the bypass module is effective at this time. It can be understood that since the interlock input module and the diode matrix are connected through the first connection end and the second connection end of the bypass module, when the connection between the first connection end and the second connection end of the bypass module is disconnected, the connection between the interlock input module and the diode matrix is ​​disconnected. Similarly, the interlock output module and the control module are connected through the third connection end and the fourth connection end of the bypass module, so when the third connection end and the fourth connection end of the bypass module are disconnected, the connection between the interlock output module and the control module is disconnected. When the triggering operation of the bypass switch control is not detected or the bypass effectiveness signal is not received, the third coil is not energized. At this time, the connection between the first connection end and the second connection end of the bypass module is conductive, and the connection between the third connection end and the fourth connection end is also conductive, and the bypass module fails.

[0082] In some feasible embodiments, the third control unit includes a field effect tube (i.e., MOS), a seventh resistor (i.e., R7), an eighth resistor (i.e., R8), and a fourth transistor (i.e., Q4). One end of the seventh resistor is connected to the first connection end of the field effect tube, and the first connection end of the field effect tube serves as the first input end of the third control unit. The second connection end of the field effect tube is respectively connected to the other end of the seventh resistor and one end of the eighth resistor, and the other end of the eighth resistor is connected to the first connection end of the fourth transistor. The third connection end of the field effect tube serves as the output end of the third control unit, and the second connection end of the fourth transistor serves as the second input end of the third control unit. The third connection end of the fourth transistor is grounded. The field effect tube can be a positive channel Metal Oxide Semiconductor (MOS) transistor, or a MOS tube; the field effect tube can also be replaced by other switches that can control whether the third coil is energized or not according to the interlocking circuit. Exemplarily, when the above-mentioned field effect transistor is a MOS transistor, the source of the field effect transistor can be used as the first connection terminal of the field effect transistor, the gate of the field effect transistor can be used as the second connection terminal of the field effect transistor, and the drain of the field effect transistor can be used as the third connection terminal of the field effect transistor. The collector of the above-mentioned fourth triode can be used as the first connection terminal of the fourth triode, the base of the fourth triode can be used as the second connection terminal of the fourth triode, and the emitter of the fourth triode can be used as the third connection terminal of the fourth triode.

[0083] In some feasible implementations, the field effect tube is used to conduct when receiving the bypass activation signal to control the third coil to be energized. The field effect tube is also used to disconnect when the power is off or the bypass activation signal is not received to stop supplying power to the third coil. That is, when the triggering operation of the bypass switch control is detected and the bypass activation signal is received, the third coil can be energized, that is, the bypass switch control and the bypass activation signal jointly control whether the bypass module is effective or not.

[0084] It should be noted that the above description of the interlock output module can also be found in the above Figure 2 The description of the interlock output module 2c in the corresponding embodiment will not be repeated here.

[0085] See also Figure 7 , Figure 7 Schematic diagram of the structure of the interlocking circuit provided in the embodiment of the present application. Figure 7As shown, the first output end (i.e., out711) of the interlock input module is connected to the first connection end (i.e., con741) of the bypass module, the second output end (i.e., out712) of the interlock input module is connected to the input end (i.e., in751) of the control module, the second connection end (i.e., con742) of the bypass module is connected to the input end (i.e., in721) of the diode matrix, the first input end (i.e., in741) of the bypass module is connected to the bypass switch control, the second input end (i.e., in742) of the bypass module is used to receive a bypass validation signal, the third connection end (i.e., con743) of the bypass module is connected to the output end (i.e., out751) of the control module, the fourth connection end (i.e., con744) of the bypass module is connected to the second input end (i.e., in732) of the interlock output module, and the output end (i.e., out721) of the diode matrix is ​​connected to the first input end (i.e., in731) of the interlock output module. The input end (i.e., in711) of the above-mentioned interlock input module can be connected to a sensor (not shown in the figure), the first output end (i.e., out731) and the second output end (i.e., out732) of the above-mentioned interlock output module can be connected to a semiconductor device (not shown in the figure), and the interlock state output end (i.e., out733) of the above-mentioned interlock output module can be used to output a signal indicating the result of the interlock circuit triggering the interlock, such as an interlock validity signal indicating that the interlock is successfully triggered and an interlock failure signal indicating that the interlock is failed to be triggered. For ease of description, the embodiment of the present application is described by taking the interlock circuit including an interlock input module, a diode matrix, and an interlock output module as an example, and the above-mentioned diode matrix includes a diode.

[0086] For the description of the first coil (ie, L71), the first switch (ie, io71), and the second switch (ie, io72) of the interlock input module, please refer to the above Figure 3 For the description of the diodes in the diode matrix, please refer to the above Figure 4 The description in the corresponding embodiment; for the description of the first resistor (i.e., R71), the second resistor (i.e., R72), the third resistor (i.e., R73), the fourth resistor (i.e., R74), the fifth resistor (i.e., R75), the sixth resistor (i.e., R76), the first transistor (i.e., Q71), the second transistor (i.e., Q72), the third transistor (i.e., Q73), the second coil (i.e., L72), the third switch (i.e., io73), the fourth switch (i.e., io74), the first connection end (i.e., con711), the second connection end (i.e., con712), the third connection end (i.e., con713), the fourth connection end (i.e., con714) of the first control unit and the first connection end (i.e., con721), the second connection end (i.e., con722), the third connection end (i.e., con723), and the fourth connection end (i.e., con724) of the second control unit in the interlock output module, please refer to the above Figure 5The description in the corresponding embodiment; for the description of the fourth transistor (i.e., Q74), the second relay (i.e., K72), the seventh resistor (i.e., R77), the eighth resistor (i.e., R78), the field effect transistor (i.e., MOS), the third coil (i.e., L73), the fifth switch (i.e., io75), the sixth switch (i.e., io76), the first input terminal (i.e., in7431), the second input terminal (i.e., in7432) and the output terminal (i.e., out743) of the above-mentioned bypass module, please refer to the above-mentioned Figure 6 For the description of the control module, please refer to the above Figure 2 The description of the control module in the corresponding embodiment will not be repeated here.

[0087] For ease of understanding, the present application embodiment uses the interlock circuit in the interlock system in the semiconductor equipment safety interlock scenario to illustrate the application. Take the sensor that identifies the opening or closing of the door lock of the space where the semiconductor equipment is located (such as a machine room or equipment cabinet) as an example of a sensor that outputs an interlock trigger signal. When the door lock is opened, an indication signal that triggers the interlock circuit interlock is generated (for example, the sensor generates a low-level signal when the door lock is opened), and when the door lock is closed, an indication signal that does not trigger the interlock circuit interlock is generated (for example, the sensor generates a high-level signal when the door lock is closed).

[0088] When the sensor detects that the door lock is open, a low-level signal can be transmitted to the input end of the interlock input module as an interlock trigger signal. When the input end of the interlock input module receives the low-level signal transmitted by the sensor, the first coil can be triggered to be de-energized, thereby triggering the first switch and the second switch to be grounded. The interlock input module can output a ground signal as a first output signal through its first output end, and output a ground signal as a second output signal through its second output end. When the receiving end of the diode matrix in the interlock circuit receives the above-mentioned first output signal, the first output signal can be output through the output end of the diode matrix. When the first input end of the interlock output module receives the above-mentioned first output signal, the first control unit can be triggered to control the second coil to be de-energized. Among them, the interlock output module can disconnect the power supply from the second coil through the first transistor in the first control unit to control the second coil to be de-energized. When the above-mentioned second coil is de-energized, the third switch can be triggered to disconnect the connection between the first output end and the second output end of the interlock output module, and the fourth switch can be triggered to be grounded. At this time, the interlock circuit triggers the interlock, controls the semiconductor device connected to the interlock output module to stop working, and outputs the interlock effectiveness alarm signal through the interlock status output end of the interlock output module.

[0089] In some feasible implementations, the control module may receive a second output signal transmitted by the interlock input module. When the second output signal is a ground signal, the control module may output a control signal to the interlock output module. When the interlock output module receives the control signal, the second control unit in the interlock output module is triggered to control the second coil to be de-energized. The interlock output module may transmit a control signal to a third transistor through the second transistor in the second control unit, and then control the connection between the second coil and the ground to be disconnected through the third transistor, thereby controlling the second coil to be de-energized to trigger interlocking.

[0090] Optionally, when the above-mentioned interlock circuit includes a bypass module, the bypass module can be triggered to take effect when debugging the semiconductor device and it is necessary to avoid triggering the interlock, so as to control the interlock circuit not to trigger the interlock. For example, when the operator is debugging the semiconductor device, if the door lock is opened by others, the interlock will be triggered to affect the debugging. At this time, the bypass module can be triggered to take effect to control the semiconductor device not to stop working when the door lock is opened. Specifically, when the bypass switch control connected to the first input end of the bypass module is triggered, the coil in the second relay can be controlled to be energized, and then the connection between the power supply and the third control unit in the bypass module can be turned on. The program device can output a bypass activation signal to the bypass module, and when the second input end of the bypass module receives the bypass activation signal, the connection between the fourth transistor and the ground in the third control unit can be turned on. Therefore, when the bypass switch control is triggered and the bypass module receives the bypass activation signal, the third control unit can be controlled to obtain electrical energy through the second relay to control the third coil to be energized. When the third coil is energized, the fifth switch can be triggered to disconnect the connection between the first connection section and the second connection end of the bypass module, and the sixth switch can be triggered to disconnect the connection between the third connection end and the fourth connection end of the bypass module to ground the fourth connection end of the bypass module, thereby triggering the bypass to take effect. At this time, the outputs of the interlock input module and the control module will not trigger the interlock, that is, if the door lock is opened at this time, the interlock will not be triggered, and the semiconductor device can work normally.

[0091] In summary, the above-mentioned interlock circuit can trigger the interlock when the sensor detects that the door lock is opened, so as to control the semiconductor device connected to the interlock circuit to stop working; it can also control the bypass module to take effect so that the interlock circuit does not trigger the interlock due to the opening of the door lock, so as to control the semiconductor device connected to the interlock circuit to work normally.

[0092] By adopting the interlocking circuit provided by the present application, when the interlocking input module detects the interlocking trigger signal, the first output signal can be output through the first output end of the interlocking input module, and the second output signal can be output through the second output end of the interlocking input module; the above-mentioned first output signal can also be transmitted to the interlocking output module through the diode matrix; the interlocking can also be triggered when the above-mentioned first output signal is received by the interlocking output module, or when the control signal is received, the above-mentioned control signal triggers the input when the second output signal is a ground signal. By adopting the present application, the extensibility of the interlocking circuit can be improved, the volume of the interlocking circuit can be reduced, the implementation cost can be reduced, and the applicability is strong.

[0093] The present application also provides an electronic device, for ease of understanding, see Figure 8 , Figure 8 Schematic diagram of the structure of the electronic device provided by this application. Figure 8 As shown, the electronic device includes a sensor and an interlocking circuit, the input end of the sensor is used as the input end of the electronic device, the output end of the sensor is used to connect the input end of the interlocking circuit, and the output end of the interlocking circuit is used as the output end of the electronic device. Among them, the sensor can be a door magnetic sensor, a liquid leakage sensor, etc., which can detect the working state or working environment of the load equipment, and can be directly or indirectly connected to the interlocking circuit.

[0094] In some feasible implementations, the sensor is used to detect the working state or working environment of the load device, and generates an interlock trigger signal when the load device is detected to be in an abnormal working state, and transmits the interlock trigger signal to the interlock circuit to trigger the interlock circuit to interlock. Figures 1 to 7 The functions realized by the sensors in the corresponding embodiments, the above interlocking circuit can realize the above Figures 1 to 7 The functions realized by the interlocking circuit 1 or the interlocking circuit 2 in the corresponding embodiment, the above-mentioned sensor and the interlocking circuit can be referred to in the above Figures 1 to 7 The description of the sensor and the interlocking circuit in the corresponding embodiment will not be repeated here.

[0095] By using the electronic device provided in the present application, the interlock circuit interlock can be triggered when the sensor detects that the load device is in an abnormal working state to control the load device to stop working. The electronic device has a small size, flexible loading position, low implementation cost and strong applicability.

[0096] Those skilled in the art will appreciate that the systems and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in terms of function in the above description. Professional and technical personnel may use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

Claims

1. An interlock circuit, characterized in that: It comprises an interlock input module, a control module, a diode matrix and an interlock output module; the input end of the interlock input module is used to detect an interlock trigger signal, the first output end of the interlock input module is connected to the input end of the diode matrix, the second output end of the interlock input module is connected to the input end of the control module, the output end of the diode matrix is ​​connected to the first input end of the interlock output module, the output end of the control module is connected to the second input end of the interlock output module, and the first output end and the second output end of the interlock output module are used to connect to a load device; The interlock input module is used to output a first output signal to the diode matrix through a first output terminal of the interlock input module and output a second output signal to the control module through a second output terminal of the interlock input module when an interlock trigger signal is detected; The diode matrix is ​​used to transmit the first output signal to the interlock output module; The control module is used to output a control signal to the interlock output module upon receiving the second output signal; The interlock output module is used to trigger interlock when receiving the first output signal, or to trigger interlock when receiving the control signal to control the load device to stop working.

2. The interlock circuit according to claim 1, characterized in that: The interlock input module comprises a first coil, a first switch and a second switch; one end of the first coil serves as an input end of the interlock input module, the other end of the first coil is grounded, one end of the first switch serves as a first output end of the interlock input module, the other end of the first switch is suspended or grounded, one end of the second switch serves as a second output end of the interlock input module, and the other end of the second switch is connected to a power supply or grounded; The first coil is used to trigger the first switch to be grounded when receiving the interlock trigger signal to output the first output signal to the diode matrix through the first output end of the interlock input module, and to trigger the second switch to be grounded to output the ground signal as the second output signal through the second output end of the interlock input module.

3. The interlock circuit according to claim 1 or 2, characterized in that: The diode matrix comprises a diode, the cathode of the diode serves as the input terminal of the diode matrix and is connected to the first output terminal of the interlock input module, and the anode of the diode serves as the output terminal of the diode matrix; The cathode of the diode is used to receive the first output signal from the first output terminal of the interlock input module, and the anode of the diode is used to output the first output signal.

4. The interlock circuit according to claim 1 or 2, characterized in that: The interlock circuit includes at least two interlock input modules, and the diode matrix includes at least two diodes. The cathode of one of the diodes serves as the input end of the diode matrix and is connected to the first output end of one of the interlock input modules, and the anodes of the at least two diodes are connected in parallel to serve as the output end of the diode matrix; wherein the number of the diodes included in the diode matrix is ​​equal to the number of the interlock input modules.

5. The interlock circuit according to any one of claims 1 to 4, characterized in that: The interlock output module includes a first relay, a first control unit and a second control unit; the first relay includes a second coil and a third switch; the first connection end of the first control unit is connected to a power supply, the second connection end of the first control unit serves as a first input end of the interlock output module, the third connection end of the first control unit is connected to one end of the second coil, the fourth connection end of the first control unit is connected to the first connection end of the second control unit, the second connection end of the second control unit serves as a second input end of the interlock output module, the third connection end of the second control unit is connected to the other end of the second coil, the fourth connection end of the second control unit is grounded, one end of the third switch serves as a first output end of the interlock output module, and the other end of the third switch is connected to the second output end of the interlock output module or is left hanging; The first control unit is used for controlling the second coil to be de-energized upon receiving the first output signal, so as to control the third switch to be suspended; The second control unit is used for controlling the second coil to be de-energized upon receiving the control signal, so as to control the third switch to be suspended; The third switch is used to disconnect the connection between the first output terminal and the second output terminal of the interlock output module when suspended to trigger interlocking.

6. The interlock circuit according to claim 5, characterized in that: The first control unit is further used to connect the power supply and the second coil to supply power to the second coil when the first output signal is not received; The second control unit is used for conducting the connection between the second coil and the ground to control the second coil to be energized when the control signal is not received; The second coil is further used to trigger the third switch to conduct the connection between the first output terminal and the second output terminal of the interlock output module when powered on.

7. The interlock circuit according to claim 5 or 6, characterized in that: The interlock output module further includes an interlock state output terminal; the first relay further includes a fourth switch; one end of the fourth switch serves as the interlock state output terminal, and the other end of the fourth switch is connected to a power supply or ground; The second coil is also used to trigger the fourth switch to ground when powered on; The second coil is also used to trigger the fourth switch to connect to the power supply when no power is supplied; The fourth switch is used to output an interlocking effective alarm signal when grounded, and the interlocking effective alarm signal is used to indicate that the interlocking circuit triggers the interlocking successfully; The fourth switch is further configured to output an interlock failure alarm signal when connected to the power supply, wherein the interlock failure alarm signal is configured to indicate that the interlock circuit fails to trigger an interlock.

8. The interlock circuit according to any one of claims 5 to 7, characterized in that: The first control unit includes a first triode, a first resistor, a second resistor and a third resistor; the first resistor and the second resistor are connected in series between the power supply and the fourth connection terminal of the first control unit, the series connection terminal of the first resistor and the second resistor serves as the second connection terminal of the first control unit, the first connection terminal of the first triode serves as the first connection terminal of the first control unit, the second connection terminal of the first triode is connected to the series connection terminal through the third resistor, and the third connection terminal of the first triode serves as the third connection terminal of the first control unit; The first transistor is used to connect the power supply and the second coil to control the second coil to be energized, or disconnect the power supply and the second coil based on the first output signal to control the second coil to be de-energized.

9. The interlock circuit according to any one of claims 5 to 8, characterized in that: The second control unit includes a second triode, a third triode, a fourth resistor, a fifth resistor and a sixth resistor; the first end of the fifth resistor serves as the second connection end of the second control unit, the first end of the fifth resistor is also connected to the power supply through the sixth resistor, the second end of the fifth resistor is connected to the first connection end of the second triode, the second connection end of the second triode is grounded, the third connection end of the second triode, the first connection end of the third triode and one end of the fourth resistor are connected in parallel as the first connection end of the second control unit, the second connection end of the third triode serves as the third connection end of the second control unit, the third connection end of the third triode serves as the fourth connection end of the second control unit, and the other end of the fourth resistor is grounded; The second transistor is used for outputting the control signal through the second connection end and triggering the third transistor to control the second coil to be de-energized when receiving the control signal; The third transistor is used for controlling the second coil to be energized when the control signal is not received.

10. The interlock circuit according to any one of claims 1 to 9, characterized in that: The interlock circuit further comprises a bypass module; a first input end of the bypass module is connected to a bypass switch control, a second input end of the bypass module is used to receive a bypass validation signal, a first connection end of the bypass module is connected to a first output end of the interlock input module, a second connection end of the bypass module is connected to an input end of the diode matrix, a third connection end of the bypass module is connected to the control module, and a fourth connection end of the bypass module is connected to a second input end of the interlock output module; The bypass module is used to disconnect the connection between the interlock input module and the diode matrix and the connection between the interlock output module and the control module when receiving the bypass validation signal and detecting the triggering operation of the bypass switch control; The bypass module is also used to conduct the connection between the interlock input module and the diode matrix, and conduct the connection between the interlock output module and the control module when the trigger operation of the bypass switch control is not detected or the bypass validation signal is not received.

11. The interlock circuit according to claim 10, characterized in that: The bypass module includes a second relay, a third control unit and a third relay; the third relay includes a third coil, a fifth switch and a sixth switch; one end of the second relay serves as a first input end of the bypass module, the other end of the second relay is connected to the first input end of the third control unit, the second input end of the third control unit serves as a second input end of the bypass module, the output end of the third control unit is connected to one end of the third coil, the other end of the third coil is grounded, one end of the fifth switch serves as a first connection end of the bypass module, the other end of the fifth switch serves as a second connection end of the bypass module, one end of the sixth switch is grounded or serves as a third connection end of the bypass module, and the other end of the sixth switch serves as a fourth connection end of the bypass module; The second relay is used to supply power to the third control unit when a triggering operation of the bypass switch control is detected; The third control unit is used to control the third coil to be energized when it obtains electric energy from the second relay and receives the bypass validation signal, trigger the fifth switch through the third coil to disconnect the connection between the first connection end and the second connection end of the bypass module to disconnect the connection between the interlock input module and the diode matrix, and trigger the sixth switch to disconnect the connection between the third connection end and the fourth connection end of the bypass module to ground the fourth connection end of the bypass module and disconnect the connection between the interlock output module and the control module.

12. The interlock circuit according to claim 11, characterized in that: The second relay is further used to stop supplying power to the third control unit when the triggering operation of the bypass switch control is not detected; The third control unit is also used to control the third coil to be de-energized when an interlock failure alarm signal or power failure is received, so that the third coil triggers the fifth switch to turn on the connection between the first connection end and the second connection end of the bypass module, and triggers the sixth switch to turn on the connection between the third connection end and the fourth connection end of the bypass module.

13. The interlock circuit according to claim 11 or 12, characterized in that: The third control unit includes a field effect tube, a seventh resistor, an eighth resistor and a fourth triode; one end of the seventh resistor is connected to the first connection end of the field effect tube, the first connection end of the field effect tube serves as the first input end of the third control unit, the second connection end of the field effect tube is respectively connected to the other end of the seventh resistor and one end of the eighth resistor, the other end of the eighth resistor is connected to the first connection end of the fourth triode, the third connection end of the field effect tube serves as the output end of the third control unit, the second connection end of the fourth triode serves as the second input end of the third control unit, and the third connection end of the fourth triode is grounded; The field effect tube is used to conduct when receiving the bypass enabling signal to control the third coil to be energized; The field effect transistor is further configured to be disconnected when power is cut off or the bypass enabling signal is not received to stop supplying power to the third coil.

14. An electronic device, characterized in that: The electronic device comprises a sensor and an interlock circuit as described in any one of claims 1 to 13; the sensor is used to transmit the interlock trigger signal to the interlock circuit.

15. An interlocking system, characterized in that: The interlocking system comprises a load device and an interlocking circuit as described in any one of claims 1-13.

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