Phase-locked loop, control method, electronic equipment and storage medium

Abstract

The embodiment of the invention discloses a phase-locked loop, a control method, electronic equipment and a storage medium, and the phase-locked loop comprises a voltage sensor which is used for measuring a voltage signal of a power grid in real time; the SOGI module is used for receiving an output signal of the voltage sensor and generating a D-axis output signal and a Q-axis output signal; the dynamic gain adjusting unit is used for dynamically adjusting the gain of the SOGI module by separating fundamental wave and harmonic wave components through a wave trap according to a residual signal between the D-axis output signal and the power grid voltage signal; and the minimum value amplitude limiting processing unit is used for carrying out minimum value amplitude limiting processing on the gain output by the dynamic gain adjusting unit, so that the gain of the SOGI module is not lower than a preset minimum value. According to the invention, the technical problem that the existing scheme cannot accurately adjust the appropriate gain of the SOGI link is solved.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular, relates to a phase-locked loop, a control method, an electronic device and a storage medium. Background Art

[0002] The grid power interfaces of distributed renewable energy units such as photovoltaic / wind power, electrochemical energy storage devices, etc. are all power electronic converters. Accurate frequency and phase synchronization are the key to achieving stable operation and efficient energy conversion of power electronic converters. Existing grid synchronization technologies are mainly divided into two categories: open-loop phase locking and closed-loop phase locking. The zero-crossing phase detection method is a traditional open-loop phase locking method. Under ideal grid conditions, the grid phase and frequency information is obtained by detecting the rising edge of the voltage. Although this method is easy to implement, the phase locking time is long and the phase locking accuracy is poor when there are harmonics in the grid, which cannot meet the actual requirements of modern grid-connected inverters. Closed-loop phase locking is also called phase-locked loop (PLL). Because it belongs to a closed-loop control system, it has high phase locking accuracy and good dynamic performance. It has been widely used in the field of grid synchronization.

[0003] According to different application scenarios, the phase-locked loop technology is divided into three-phase phase-locked loop and single-phase phase-locked loop. The three-phase phase-locked loop is mainly suitable for the field of three-phase system power grid synchronization, while the single-phase phase-locked loop is mainly used to realize the synchronization function in the single-phase power grid system. The three-phase power grid is a symmetrical system, so its phase information can be obtained through Park transformation to obtain a pair of orthogonal sinusoidal voltage vectors to extract phase information. However, for the single-phase system, it only has a single input voltage signal, and additional links need to be added to detect the phase information. Therefore, the single-phase phase-locked loop has a more complex structure than the three-phase phase-locked loop.

[0004] On the other hand, with the extensive application of power electronic equipment in the power system, the power system is becoming increasingly power electronic, resulting in increasingly serious harmonic pollution problems in the power grid, which has also brought more stringent challenges to synchronization technology. Therefore, how to accurately capture the phase of the fundamental power grid and achieve single-phase power grid synchronization in the case of harmonic distortion is an urgent problem to be solved.

[0005] At present, the single-phase PLL technology based on the second-order generalized integrator (SOGI) has been widely studied and applied due to its simple implementation and delay-free filtering characteristics. SOGI can generate a signal that is orthogonal to the input signal and is not affected by frequency, generating a sine wave with a phase difference of 90 degrees. However, the orthogonal signal generator in SOGI has basically no filtering capability and has basically no suppression effect on the harmonics in the grid-side voltage, especially the low-order harmonics. Voltage harmonics will exist simultaneously in a pair of orthogonal signals output by SOGI, causing the output frequency and phase results to fluctuate, and it is impossible to achieve accurate synchronization with the fundamental voltage phase. By reducing the gain of the SOGI link, its anti-harmonic capability can be improved, but it will cause the overall dynamic response speed of the PLL to slow down, making it difficult to achieve rapid synchronization of the grid voltage phase under variable conditions. Therefore, the existing scheme cannot accurately adjust the gain of the appropriate SOGI link. Summary of the invention

[0006] The embodiments of the present invention provide a phase-locked loop, a control method, an electronic device and a storage medium, so as to at least solve the technical problem that the existing solution cannot accurately adjust the gain of a suitable SOGI link.

[0007] According to a first aspect of an embodiment of the present invention, a phase-locked loop is provided, comprising: a voltage sensor for measuring a grid voltage signal in real time; a SOGI module, the SOGI module receiving an output signal of the voltage sensor and generating a D-axis output signal and a Q-axis output signal; a dynamic gain adjustment unit, the dynamic gain adjustment unit dynamically adjusting the gain of the SOGI module by separating fundamental and harmonic components through a notch filter according to a residual signal between the D-axis output signal and the grid voltage signal; and a minimum value limiting processing unit, the minimum value limiting processing unit performing minimum value limiting processing on the gain output by the dynamic gain adjustment unit, so that the gain of the SOGI module is not lower than a preset minimum value.

[0008] Optionally, the voltage sensor is a photoelectric voltage sensor.

[0009] Optionally, the initial gain setting value of the SOGI module is 1.414.

[0010] Optionally, the dynamic gain adjustment unit includes a first gain correction coefficient and a second gain correction coefficient, wherein the first gain correction coefficient is used for gain correction of fundamental wave residual, and the second gain correction coefficient is used for gain correction of harmonic residual.

[0011] According to the second aspect of an embodiment of the present invention, a phase-locked loop control method is also provided, including: measuring a grid voltage signal in real time; generating a D-axis output signal and a Q-axis output signal through a SOGI module according to the grid voltage signal; dynamically adjusting the gain of the SOGI module according to a residual signal between the D-axis output signal and the grid voltage signal, and separating the fundamental residual and the harmonic residual in the residual signal through a notch filter; and performing minimum value limiting processing on the gain after dynamic gain adjustment so that the gain is not lower than a preset minimum value.

[0012] Optionally, the fundamental residual and the harmonic residual in the residual signal are separated by a notch filter, and the gain of the SOGI module is dynamically adjusted, including: separating the fundamental residual and the harmonic residual in the residual signal by a notch filter, determining a gain increase value based on the fundamental residual, and determining a gain reduction value based on the harmonic residual; and dynamically adjusting the gain of the SOGI module according to the gain increase value and the gain reduction value.

[0013] Optionally, the phase-locked loop control method also includes: using the adjusted gain of the SOGI module to determine the output of the SODI module to obtain a corrected D-axis output signal and a corrected Q-axis output signal; inputting the corrected D-axis output signal and the corrected Q-axis output signal into the phase-locked loop to determine the voltage phase angle.

[0014] According to a third aspect of an embodiment of the present invention, there is also provided an electronic device, comprising a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the phase-locked loop control method in any embodiment of the first aspect above.

[0015] According to a fourth aspect of an embodiment of the present invention, a non-volatile storage medium is further provided, in which a computer program is stored, wherein the computer program is configured to execute the phase-locked loop control method in any embodiment of the above-mentioned first aspect when running on a computer or a processor.

[0016] According to a fifth aspect of an embodiment of the present invention, a computer program product is also provided, including a computer program, and when the computer program is executed by a processor, the phase-locked loop control method of any embodiment of the first aspect above is implemented.

[0017] In the embodiment of the present invention, a voltage sensor is used to measure the grid voltage signal in real time; a SOGI module, the SOGI module receives the output signal of the voltage sensor and generates a D-axis output signal and a Q-axis output signal; a dynamic gain adjustment unit, the dynamic gain adjustment unit separates the fundamental and harmonic components through a notch filter according to the residual signal between the D-axis output signal and the grid voltage signal, and dynamically adjusts the gain of the SOGI module; a minimum value limiting processing unit, the minimum value limiting processing unit performs minimum value limiting processing on the gain output by the dynamic gain adjustment unit, so that the gain of the SOGI module is not less than the preset minimum value. By comprehensively considering the dynamic response speed and the anti-harmonic capability, the fundamental frequency residual and the harmonic residual between the D-axis output signal of the SOGI link input signal are used to dynamically adjust the SOGI gain, increase the gain in the dynamic tracking process with a large fundamental frequency residual, and improve the tracking speed; when tending to a steady state, the gain is reduced according to the harmonic residual to enhance the filtering capability; thereby achieving high-performance synchronization under various grid conditions, solving the technical problem that the existing solution cannot accurately adjust the gain of the appropriate SOGI link. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of this application. The exemplary embodiments of the present invention and their descriptions are provided to explain the present invention and do not constitute an improper limitation of the present invention.

[0019] In the figure:

[0020] Figure 1 is a schematic diagram of the structure of a phase-locked loop according to one embodiment of the present invention;

[0021] Figure 2 is a flow chart of a phase-locked loop control method according to one embodiment of the present invention. DETAILED DESCRIPTION

[0022] In order to enable those skilled in the art to better understand the scheme of the present invention, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0023] It should be noted that the terms "first", "second", etc. in the specification and claims of the present invention and the above-mentioned drawings are set to distinguish similar objects, and are not necessarily set to describe a specific order or sequence. It should be understood that the terms used in this way are interchangeable where appropriate, so that the embodiments of the present invention described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units that are clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0024] SOGI can track and phase-shift specific frequency AC components and can be used to separate and filter the positive and negative sequences of voltage signals. The schematic diagram is shown in the attached figure. Figure 1 As shown in the figure, x is the filter input signal, D and Q are the filter output signals, ω0 is the angular frequency of the AC signal to be tracked, and k is the filter gain coefficient.

[0025] The equivalent transfer function of SOGI can be expressed as:

[0026]

[0027] In the formula, D(s) represents the transfer function of the D-axis output relative to the input x, and Q(s) represents the transfer function of the Q-axis output relative to the input x. By calculating the amplitude-frequency and phase-frequency characteristics of D(s) and Q(s), it can be seen that the gain of D(s) and Q(s) at the angular frequency ω0 is 1, but the phase shift angle of D(s) is 0, and the phase shift angle of Q(s) is 90°, indicating that the filter can complete the differential tracking and phase shift of the given frequency AC signal. In other frequency bands, D(s) and Q(s) show bandpass and low-pass characteristics, respectively, and the characteristics are related to k. The smaller k is, the smaller the bandwidth of SOGI is, the worse the dynamic response performance is, but the anti-harmonic ability is better; conversely, the larger k is, the larger the bandwidth of SOGI is, the better the dynamic response performance is, but the anti-harmonic ability is poor. Therefore, the value of k will affect the dynamic response speed and anti-harmonic ability of SOGI, but it is impossible to take both indicators into account.

[0028] Reference Figure 1 According to an embodiment of the present invention, a phase-locked loop is provided, comprising:

[0029] A voltage sensor is used to measure the grid voltage signal in real time; a SOGI module, which receives the output signal of the voltage sensor and generates a D-axis output signal and a Q-axis output signal; a dynamic gain adjustment unit, which dynamically adjusts the gain of the SOGI module by separating the fundamental and harmonic components through a notch filter according to the residual signal between the D-axis output signal and the grid voltage signal; and a minimum value limiting processing unit, which performs minimum value limiting processing on the gain output by the dynamic gain adjustment unit so that the gain of the SOGI module is not lower than a preset minimum value.

[0030] In the embodiment of the present invention, a voltage sensor is used to measure the grid voltage signal in real time; a SOGI module, the SOGI module receives the output signal of the voltage sensor and generates a D-axis output signal and a Q-axis output signal; a dynamic gain adjustment unit, the dynamic gain adjustment unit separates the fundamental and harmonic components through a notch filter according to the residual signal between the D-axis output signal and the grid voltage signal, and dynamically adjusts the gain of the SOGI module; a minimum value limiting processing unit, the minimum value limiting processing unit performs minimum value limiting processing on the gain output by the dynamic gain adjustment unit, so that the gain of the SOGI module is not less than the preset minimum value. By comprehensively considering the dynamic response speed and the anti-harmonic capability, the fundamental frequency residual and the harmonic residual between the D-axis output signal of the SOGI link input signal are used to dynamically adjust the SOGI gain, increase the gain in the dynamic tracking process with a large fundamental frequency residual, and improve the tracking speed; when tending to a steady state, the gain is reduced according to the harmonic residual to enhance the filtering capability; thereby achieving high-performance synchronization under various grid conditions, solving the technical problem that the existing solution cannot accurately adjust the gain of the appropriate SOGI link.

[0031] Optionally, the voltage sensor is a photoelectric voltage sensor.

[0032] Optionally, the initial gain setting value of the SOGI module is 1.414.

[0033] Optionally, the dynamic gain adjustment unit includes a first gain correction coefficient and a second gain correction coefficient, wherein the first gain correction coefficient is used for gain correction of fundamental wave residual, and the second gain correction coefficient is used for gain correction of harmonic residual.

[0034] Specifically, in order to take into account the dynamic response speed and anti-harmonic capability of PLL, the present invention discloses an improved SOGI structure, which is characterized in that the gain k of SOGI is dynamically adjusted according to the fundamental and harmonic residuals between the input and the D-axis output of SOGI. Specifically, k is increased according to the fundamental residual level, and k is reduced according to the harmonic residual level. Since the fundamental residual only appears in the dynamic response process of SOGI and PLL, and is close to 0 in steady state, therefore, increasing k based on the fundamental residual level can increase k in the dynamic response process of SOGI and PLL, thereby accelerating the response speed; while reducing k based on the harmonic residual level helps to improve the anti-harmonic capability of PLL in steady state.

[0035] The residual between the SOGI input and the D-axis output can be expressed as:

[0036] ΔD=xD

[0037] Where ΔD is the residual error between the SOGI input and the D-axis output.

[0038] The fundamental and harmonic components in ΔD can be expressed as:

[0039] ΔD h =G Notch (s) · ΔD

[0040] ΔD 1 =[1-G Notch (s)]·ΔD

[0041] Where, ΔD h , ΔD 1 They represent the harmonic and fundamental residuals between SOGI input and D-axis output respectively; GNotch(s) represents the transfer function of the notch filter centered on the fundamental frequency.

[0042] Furthermore, according to ΔD h , ΔD 1 The effective value of determines the correction term of SOGI gain:

[0043] Δk 1 =ρ 1 ·||ΔD 1 || RMS

[0044] Δk h =-ρ h ·||ΔD h || RMS

[0045] In the formula, ρ 1 , h They are the SOGI gain correction coefficients related to the fundamental and harmonic residuals respectively.

[0046] The final SOGI gain is expressed as:

[0047] k=k org +Δk 1 +Δk h

[0048] In the formula, k org Indicates the SOGI gain before correction.

[0049] In practice, in order to avoid system instability caused by k<0, k needs to be limited to a minimum value, that is:

[0050]

[0051] In the formula, k min Indicates the minimum value allowed for k.

[0052] According to an embodiment of the present invention, an embodiment of a phase-locked loop control method is also provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system containing at least one set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0053] The method embodiment can also be executed in an electronic device including a memory and a processor, a similar control device or a cloud. Taking an electronic device as an example, the electronic device may include one or more processors and a memory configured to store data. Optionally, the electronic device may also include a communication device configured to have a communication function and a display device. It will be understood by those of ordinary skill in the art that the above structural description is only illustrative and does not limit the structure of the above electronic device. For example, the electronic device may also include more or fewer components than the above structural description, or have a configuration different from the above structural description.

[0054] The processor may include one or more processing units. For example, the processor may include a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processing (DSP) chip, a microcontroller unit (MCU), a field-programmable gate array (FPGA), a neural network processor (NPU), a tensor processing unit (TPU), an artificial intelligence (AI) type processor, and the like. Among them, different processing units may be independent components or integrated into one or more processors. In some instances, the electronic device may also include one or more processors.

[0055] The memory may be configured to store a computer program, such as a computer program corresponding to the phase-locked loop control method in the embodiment of the present invention, and the processor implements the above-mentioned phase-locked loop control method by running the computer program stored in the memory. The memory may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory may further include a memory remotely arranged relative to the processor, and these remote memories may be connected to the electronic device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0056] The communication device is configured to receive or send data via a network. The above-mentioned specific examples of the network may include a wireless network provided by a communication provider of the mobile terminal. In one example, the communication device includes a network adapter (network interface controller, NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the communication device can be a radio frequency (radio frequency, RF) module, which is configured to communicate with the Internet wirelessly. In some embodiments of the present solution, the communication device is configured to be connected to a mobile device such as a mobile phone, a tablet, and instructions can be sent to the electronic device through the mobile device.

[0057] The display device may be a touch screen type liquid crystal display (LCD) and a touch display (also referred to as a "touch screen" or "touch display screen"). The liquid crystal display may enable a user to interact with a user interface of the electronic device. In some embodiments, the electronic device has a graphical user interface (GUI), and a user may interact with the GUI by touching a finger release and / or gestures on a touch-sensitive surface, and executable instructions configured to perform the above-mentioned human-computer interaction functions are configured / stored in a computer program product or a readable storage medium executable by one or more processors.

[0058] Figure 2 is a flow chart of a phase-locked loop control method according to one embodiment of the present invention. Figure 2 As shown, the following steps are included:

[0059] Step S101, measuring the grid voltage signal in real time.

[0060] Step S102: Generate a D-axis output signal and a Q-axis output signal through a SOGI module according to the grid voltage signal.

[0061] Step S103 , dynamically adjusting the gain of the SOGI module according to the residual signal between the D-axis output signal and the grid voltage signal and separating the fundamental wave residual and the harmonic wave residual in the residual signal by a notch filter.

[0062] Step S104, performing minimum value limiting processing on the gain after dynamic gain adjustment, so that the gain is not lower than a preset minimum value.

[0063] Optionally, the fundamental residual and the harmonic residual in the residual signal are separated by a notch filter, and the gain of the SOGI module is dynamically adjusted, including: separating the fundamental residual and the harmonic residual in the residual signal by a notch filter, determining a gain increase value based on the fundamental residual, and determining a gain reduction value based on the harmonic residual; and dynamically adjusting the gain of the SOGI module according to the gain increase value and the gain reduction value.

[0064] Optionally, the phase-locked loop control method also includes: using the adjusted gain of the SOGI module to determine the output of the SODI module to obtain a corrected D-axis output signal and a corrected Q-axis output signal; inputting the corrected D-axis output signal and the corrected Q-axis output signal into the phase-locked loop to determine the voltage phase angle.

[0065] Specifically, the method described in the above embodiment is exemplarily performed as follows:

[0066] S1: Voltage measurement: First, the grid voltage is measured in real time through a voltage sensor to obtain a voltage signal x.

[0067] S2: Initialize SOGI. Figure 1 The phase-locked loop structure shown in FIG. 1 initializes the SOGI module and sets its gain k to a typical value, such as 1.414.

[0068] S3: Signal processing: The measured voltage signal x is input into the initialized SOGI module, and the output signals of the D axis and the Q axis are obtained through SOGI processing, which are recorded as D and Q respectively.

[0069] S4: Calculate gain correction value: Next, calculate the residual error ΔD between the SOGI input and the D-axis output, and determine the correction term of the SOGI gain by analyzing the fundamental and harmonic components in ΔD. Fundamental residual error ΔD 1 and harmonic residual ΔD h It can be passed through the notch filter G Notch (s) to separate the transfer function.

[0070] S5: Dynamically adjust the gain: according to the fundamental wave residual ΔD 1 The effective value of increases the gain k of SOGI to speed up the dynamic response speed; at the same time, according to the harmonic residual ΔD h The effective value of , reduce the gain k, to improve the anti-harmonic capability. The gain correction can be achieved by the following formula: new =k org +ρ 1 ΔD 1 -ρ h ΔD h , where ρ 1 and ρ h are the SOGI gain correction coefficients related to the fundamental and harmonic residuals, k org is the SOGI gain before correction.

[0071] S6: Limiting: In order to avoid the system instability caused by too small gain k value, it is necessary to perform minimum value limiting on k to ensure that k is not less than the preset minimum value k min .

[0072] S7: Recalculate output: using the corrected SOGI gain k new , recalculate the output of SOGI and obtain new D-axis and Q-axis output signals.

[0073] S8: Closed-loop phase locking: Input D and Q into the phase-locked loop to obtain the voltage phase angle θ.

[0074] In order to verify the technical advantages of the phase-locked loop provided by the present invention, simulation models of the traditional simulation loop and the simulation loop provided by the present application are built in a simulation environment, and the output results of the two are compared. In the test, the grid voltage is a superposition of a fundamental frequency component with an amplitude of 100V, a frequency of 50Hz, and a phase angle of 0° and a 5th harmonic component with an amplitude of 20V, a frequency of 250Hz, and a phase angle of 0°. In order to compare the dynamic response speed of the two algorithms, at time t=1.0s, the phase angle of the 50Hz voltage fundamental component is suddenly changed from 0° to 60°.

[0075] In both algorithms, the initial gain k of SOGI is org are all set to 1.414. The ρ under the improved SOGI provided by the present invention 1 and ρ h Take 10 and 30 respectively, k min Take 0.2. As can be seen from the figure, under the injection of 30% of the fifth-order background harmonic, the output frequency of the traditional SOGI-PLL fluctuates greatly, and the output frequency range is 49.6-50.4Hz in steady state; in contrast, the frequency output range of the proposed improved PLL structure in steady state is 49.95-50.05Hz, and the fluctuation range is reduced by 87 compared with the traditional strategy, which better completes the synchronization with the base frequency voltage signal.

[0076] In terms of dynamic response, the traditional PLL and the improved PLL complete the tracking of the voltage signal after the mutation within 0.05s and 0.08s respectively. The dynamic response speed of the improved PLL is slightly slower, but it can still meet the control requirements of the power electronic converter. On the other hand, the maximum frequency deviation of the improved PLL is about 4Hz, which is only about 40% of the traditional PLL, indicating that the proposed PLL structure has stronger anti-interference ability.

[0077] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course can also be implemented by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present invention is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present invention.

[0078] An embodiment of the present invention further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the phase-locked loop control method described in any of the above embodiments.

[0079] Optionally, in this embodiment, the processor in the above electronic device may be configured to run a computer program to perform the following steps:

[0080] Step S101, measuring the grid voltage signal in real time.

[0081] Step S102: Generate a D-axis output signal and a Q-axis output signal through a SOGI module according to the grid voltage signal.

[0082] Step S103 , dynamically adjusting the gain of the SOGI module according to the residual signal between the D-axis output signal and the grid voltage signal and separating the fundamental wave residual and the harmonic wave residual in the residual signal by a notch filter.

[0083] Step S104, performing minimum value limiting processing on the gain after dynamic gain adjustment, so that the gain is not lower than a preset minimum value.

[0084] Optionally, the fundamental residual and the harmonic residual in the residual signal are separated by a notch filter, and the gain of the SOGI module is dynamically adjusted, including: separating the fundamental residual and the harmonic residual in the residual signal by a notch filter, determining a gain increase value based on the fundamental residual, and determining a gain reduction value based on the harmonic residual; and dynamically adjusting the gain of the SOGI module according to the gain increase value and the gain reduction value.

[0085] Optionally, the phase-locked loop control method also includes: using the adjusted gain of the SOGI module to determine the output of the SODI module to obtain a corrected D-axis output signal and a corrected Q-axis output signal; inputting the corrected D-axis output signal and the corrected Q-axis output signal into the phase-locked loop to determine the voltage phase angle.

[0086] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be described in detail here.

[0087] An embodiment of the present invention further provides a non-volatile storage medium, in which a computer program is stored, wherein the computer program is configured to execute the phase-locked loop control method described in any of the above embodiments when running on a computer or a processor.

[0088] Optionally, in this embodiment, the computer program may be configured to store a computer program configured to perform the following steps:

[0089] Step S101, measuring the grid voltage signal in real time.

[0090] Step S102: Generate a D-axis output signal and a Q-axis output signal through a SOGI module according to the grid voltage signal.

[0091] Step S103 , dynamically adjusting the gain of the SOGI module according to the residual signal between the D-axis output signal and the grid voltage signal and separating the fundamental wave residual and the harmonic wave residual in the residual signal by a notch filter.

[0092] Step S104, performing minimum value limiting processing on the gain after dynamic gain adjustment, so that the gain is not lower than a preset minimum value.

[0093] Optionally, the fundamental residual and the harmonic residual in the residual signal are separated by a notch filter, and the gain of the SOGI module is dynamically adjusted, including: separating the fundamental residual and the harmonic residual in the residual signal by a notch filter, determining a gain increase value based on the fundamental residual, and determining a gain reduction value based on the harmonic residual; and dynamically adjusting the gain of the SOGI module according to the gain increase value and the gain reduction value.

[0094] Optionally, the phase-locked loop control method also includes: using the adjusted gain of the SOGI module to determine the output of the SODI module to obtain a corrected D-axis output signal and a corrected Q-axis output signal; inputting the corrected D-axis output signal and the corrected Q-axis output signal into the phase-locked loop to determine the voltage phase angle.

[0095] Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments and optional implementation modes, and this embodiment will not be described in detail here.

[0096] An embodiment of the present invention further provides a computer program product, including a computer program, and when the computer program is executed by a processor, the phase-locked loop control method described in any of the above embodiments is implemented.

[0097] Optionally, in this embodiment, the above computer program implements the following steps when executed by a processor:

[0098] Step S101, measuring the grid voltage signal in real time.

[0099] Step S102: Generate a D-axis output signal and a Q-axis output signal through a SOGI module according to the grid voltage signal.

[0100] Step S103 , dynamically adjusting the gain of the SOGI module according to the residual signal between the D-axis output signal and the grid voltage signal and separating the fundamental wave residual and the harmonic wave residual in the residual signal by a notch filter.

[0101] Step S104, performing minimum value limiting processing on the gain after dynamic gain adjustment, so that the gain is not lower than a preset minimum value.

[0102] Optionally, the fundamental residual and the harmonic residual in the residual signal are separated by a notch filter, and the gain of the SOGI module is dynamically adjusted, including: separating the fundamental residual and the harmonic residual in the residual signal by a notch filter, determining a gain increase value based on the fundamental residual, and determining a gain reduction value based on the harmonic residual; and dynamically adjusting the gain of the SOGI module according to the gain increase value and the gain reduction value.

[0103] Optionally, the phase-locked loop control method also includes: using the adjusted gain of the SOGI module to determine the output of the SODI module to obtain a corrected D-axis output signal and a corrected Q-axis output signal; inputting the corrected D-axis output signal and the corrected Q-axis output signal into the phase-locked loop to determine the voltage phase angle.

[0104] In the above embodiments of the present invention, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0105] In some embodiments provided in the present application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the modules can be a logical function division. There may be other division methods in actual implementation. For example, multiple modules or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, modules or indirect coupling or communication connection of modules, which can be electrical or other forms.

[0106] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed on multiple modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of the present embodiment.

[0107] In addition, each functional module in each embodiment of the present invention may be integrated into one processing module, or each module may exist physically separately, or two or more modules may be integrated into one module. The above integrated modules may be implemented in the form of hardware or in the form of software functional modules.

[0108] If the integrated module is implemented in the form of a software function module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions for a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk and other media that can store program codes.

[0109] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A phase-locked loop, characterized in that: include: Voltage sensor, used to measure the grid voltage signal in real time; A SOGI module, the SOGI module receives the output signal of the voltage sensor and generates a D-axis output signal and a Q-axis output signal; A dynamic gain adjustment unit, wherein the dynamic gain adjustment unit dynamically adjusts the residual signal between the D-axis output signal and the grid voltage signal by separating the fundamental and harmonic components through a notch filter. Gain of SOGI module; A minimum value clipping processing unit is configured to perform minimum value clipping processing on the gain output by the dynamic gain adjustment unit so that the gain of the SOGI module is not lower than a preset minimum value.

2. The phase-locked loop according to claim 1, characterized in that: The voltage sensor is a photoelectric voltage sensor.

3. The phase-locked loop according to claim 1, characterized in that: The initial gain setting value of the SOGI module is 1.

414.

4. The phase-locked loop according to claim 1, characterized in that: The dynamic gain adjustment unit includes a first gain correction coefficient and a second gain correction coefficient, wherein the first gain correction coefficient is used for gain correction of fundamental wave residual, and the second gain correction coefficient is used for gain correction of harmonic residual.

5. A phase-locked loop control method, characterized in that: include: Real-time measurement of grid voltage signals; According to the grid voltage signal, a D-axis output signal and a Q-axis output signal are generated through a SOGI module; According to the residual signal between the D-axis output signal and the grid voltage signal, and by separating the fundamental wave residual and the harmonic wave residual in the residual signal through a notch filter, dynamically adjusting the gain of the SOGI module; The gain after dynamic gain adjustment is subjected to minimum value limiting processing so that the gain is not lower than a preset minimum value.

6. The phase-locked loop control method according to claim 5, characterized in that: The method of separating the fundamental wave residual and the harmonic wave residual in the residual signal by using a notch filter and dynamically adjusting the gain of the SOGI module includes: Separating the fundamental wave residual and the harmonic wave residual in the residual signal by a notch filter, determining a gain increase value based on the fundamental wave residual, and determining a gain reduction value based on the harmonic wave residual; The gain of the SOGI module is dynamically adjusted according to the gain increase value and the gain decrease value.

7. The phase-locked loop control method according to claim 5, characterized in that: Also includes: Determine the output of the SODI module by using the adjusted gain of the SOGI module to obtain a corrected D-axis output signal and a corrected Q-axis output signal; The modified D-axis output signal and the modified Q-axis output signal are input into a phase-locked loop to determine the voltage phase angle.

8. An electronic device, characterized in that: The invention comprises a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the phase-locked loop control method as described in any one of claims 5 to 7.

9. A non-volatile storage medium, characterized in that: The non-volatile storage medium stores a computer program, wherein the computer program is configured to execute the phase-locked loop control method described in any one of claims 5 to 7 when running on a computer or a processor.

10. A computer program product, characterized in that The method comprises a computer program, which, when executed by a processor, implements the phase-locked loop control method according to any one of claims 5 to 7.

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